Lines Matching defs:val
51 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val) \ argument
53 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
139 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val) \ argument
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
182 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val) \ argument
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
225 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val) \ argument
227 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
268 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val) \ argument
270 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
311 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val) \ argument
313 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
354 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val) \ argument
356 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
397 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val) \ argument
399 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
440 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val) \ argument
442 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
483 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val) \ argument
485 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
505 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val) \ argument
507 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val) \ argument
556 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
591 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val) \ argument
593 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
616 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val) \ argument
618 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
638 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val) \ argument
640 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
663 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val) \ argument
665 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
685 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val) \ argument
687 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
710 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val) \ argument
712 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
762 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val) \ argument
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
784 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val) \ argument
786 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
806 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
834 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
856 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
884 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
906 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
928 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
930 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
953 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
975 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
977 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1000 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val) \ argument
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1022 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1024 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1044 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUT(x, val) \ argument
1046 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1066 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUT(x, val) \ argument
1068 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1091 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUT(x, val) \ argument
1093 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUTM(x, mask, val) \ argument
1113 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUT(x, val) \ argument
1115 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
1138 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUT(x, val) \ argument
1140 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUTM(x, mask, val) \ argument
1190 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1192 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1212 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1214 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1234 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1236 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1262 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1264 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1284 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1286 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1312 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1314 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1334 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1336 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1356 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1358 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1381 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1383 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1403 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1405 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1428 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
1430 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1450 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1452 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1472 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUT(x, val) \ argument
1474 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1494 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUT(x, val) \ argument
1496 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1519 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUT(x, val) \ argument
1521 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUTM(x, mask, val) \ argument
1541 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUT(x, val) \ argument
1543 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUTM(x, mask, val) \ argument
1566 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUT(x, val) \ argument
1568 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUTM(x, mask, val) \ argument
1618 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1620 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1640 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1642 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1662 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1664 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1690 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1692 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1712 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1714 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1740 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1742 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1762 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1764 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1784 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1786 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1809 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1811 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1831 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1833 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1856 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUT(x, val) \ argument
1858 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1878 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1880 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1900 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val) \ argument
1902 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1922 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val) \ argument
1924 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1947 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val) \ argument
1949 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1969 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val) \ argument
1971 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1994 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val) \ argument
1996 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
2046 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2048 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2068 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2070 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2090 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2092 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2118 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2120 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2140 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2142 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2168 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2170 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2190 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2192 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2212 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2214 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2237 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2239 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2259 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val) \ argument
2261 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2281 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val) \ argument
2283 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2306 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val) \ argument
2308 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
2328 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val) \ argument
2330 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
2353 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val) \ argument
2355 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
2405 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2407 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2427 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2429 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2449 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2451 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2477 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2479 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2499 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2501 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2527 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2529 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2549 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2551 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2571 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2573 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2596 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2598 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2618 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2620 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2643 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val) \ argument
2645 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2665 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2667 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2687 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val) \ argument
2689 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2709 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val) \ argument
2711 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2734 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val) \ argument
2736 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
2756 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val) \ argument
2758 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
2781 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val) \ argument
2783 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
2833 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2835 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2855 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2857 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2877 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2879 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2905 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2907 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2927 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2929 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2955 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2957 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2977 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2979 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2999 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
3001 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
3024 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3026 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3046 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3048 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3071 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val) \ argument
3073 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3093 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3095 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3115 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val) \ argument
3117 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3137 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val) \ argument
3139 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3162 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val) \ argument
3164 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val) \ argument
3184 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val) \ argument
3186 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
3209 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val) \ argument
3211 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val) \ argument
3261 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
3263 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
3283 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
3285 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
3305 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
3307 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
3333 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
3335 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
3355 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
3357 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
3383 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
3385 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
3405 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
3407 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
3427 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
3429 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
3452 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3454 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3474 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3476 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3499 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
3501 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3521 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3523 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3543 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val) \ argument
3545 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3565 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val) \ argument
3567 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3590 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val) \ argument
3592 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
3615 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val) \ argument
3617 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
3640 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val) \ argument
3642 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
3695 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3697 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3717 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3719 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3739 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3741 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3767 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3769 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3795 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3797 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3817 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3819 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3839 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3841 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3864 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val) \ argument
3866 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3886 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3888 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3908 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val) \ argument
3910 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3930 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val) \ argument
3932 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3955 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val) \ argument
3957 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3980 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val) \ argument
3982 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
4005 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val) \ argument
4007 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
4060 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4062 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4082 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4084 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4104 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4106 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4132 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4134 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4160 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4162 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4182 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4184 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4204 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4206 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4229 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val) \ argument
4231 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4251 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4253 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4273 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val) \ argument
4275 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4295 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val) \ argument
4297 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4320 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val) \ argument
4322 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
4345 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val) \ argument
4347 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
4370 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val) \ argument
4372 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
4425 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4427 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4447 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4449 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4469 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4471 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4497 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4499 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4525 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4527 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4547 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4549 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4569 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4571 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4594 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val) \ argument
4596 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4616 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4618 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4638 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val) \ argument
4640 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4660 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val) \ argument
4662 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4685 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val) \ argument
4687 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
4710 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val) \ argument
4712 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
4735 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val) \ argument
4737 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
4790 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4792 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4812 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4814 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4834 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4836 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4862 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4864 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4890 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4892 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4912 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4914 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4934 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4936 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4959 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val) \ argument
4961 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4981 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4983 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5003 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val) \ argument
5005 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5025 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val) \ argument
5027 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5050 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val) \ argument
5052 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
5075 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val) \ argument
5077 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
5100 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val) \ argument
5102 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
5155 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5157 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5177 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5179 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5199 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5201 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5227 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5229 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5255 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5257 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5277 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5279 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5299 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5301 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5324 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val) \ argument
5326 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5346 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5348 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5368 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val) \ argument
5370 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5390 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val) \ argument
5392 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5415 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val) \ argument
5417 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
5440 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val) \ argument
5442 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
5465 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val) \ argument
5467 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
5520 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5522 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5542 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5544 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5564 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5566 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5592 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5594 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5620 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5622 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5642 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5644 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5664 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5666 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5689 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val) \ argument
5691 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5711 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5713 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5733 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val) \ argument
5735 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5755 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val) \ argument
5757 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5780 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val) \ argument
5782 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
5805 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val) \ argument
5807 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
5830 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val) \ argument
5832 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
5885 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5887 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5907 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5909 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5929 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5931 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5957 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5959 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5985 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5987 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
6007 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6009 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6029 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val) \ argument
6031 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
6051 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val) \ argument
6053 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
6076 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val) \ argument
6078 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
6101 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val) \ argument
6103 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
6126 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val) \ argument
6128 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
6181 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val) \ argument
6183 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
6203 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val) \ argument
6205 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
6225 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
6227 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
6253 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
6255 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
6281 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
6283 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
6303 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
6305 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
6325 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
6327 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
6350 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val) \ argument
6352 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6372 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6374 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6394 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val) \ argument
6396 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
6416 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val) \ argument
6418 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
6438 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val) \ argument
6440 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
6460 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val) \ argument
6462 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
6482 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val) \ argument
6484 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
6504 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val) \ argument
6506 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
6526 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val) \ argument
6528 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6548 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val) \ argument
6550 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6570 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val) \ argument
6572 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6592 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val) \ argument
6594 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6614 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val) \ argument
6616 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6636 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val) \ argument
6638 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6658 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val) \ argument
6660 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6680 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val) \ argument
6682 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6702 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val) \ argument
6704 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6724 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val) \ argument
6726 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6746 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val) \ argument
6748 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6768 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val) \ argument
6770 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6790 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val) \ argument
6792 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6812 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val) \ argument
6814 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6834 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val) \ argument
6836 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6856 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val) \ argument
6858 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6878 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val) \ argument
6880 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
6900 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val) \ argument
6902 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
6922 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val) \ argument
6924 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
6944 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val) \ argument
6946 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
6966 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val) \ argument
6968 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
6988 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val) \ argument
6990 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
7010 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val) \ argument
7012 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
7032 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val) \ argument
7034 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
7054 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val) \ argument
7056 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
7076 #define HWIO_REO_R0_MISC_CTL_OUT(x, val) \ argument
7078 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val) \ argument
7101 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val) \ argument
7103 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
7123 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val) \ argument
7125 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
7145 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val) \ argument
7147 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
7167 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val) \ argument
7169 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
7189 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val) \ argument
7191 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
7211 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val) \ argument
7213 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
7233 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val) \ argument
7235 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
7255 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val) \ argument
7257 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
7277 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val) \ argument
7279 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
7299 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val) \ argument
7301 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
7321 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val) \ argument
7323 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
7343 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val) \ argument
7345 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
7365 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val) \ argument
7367 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
7387 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val) \ argument
7389 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
7409 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val) \ argument
7411 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
7431 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val) \ argument
7433 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
7453 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val) \ argument
7455 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
7475 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val) \ argument
7477 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
7497 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val) \ argument
7499 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
7519 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val) \ argument
7521 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
7541 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val) \ argument
7543 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
7563 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val) \ argument
7565 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
7588 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ argument
7590 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
7610 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ argument
7612 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
7632 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ argument
7634 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
7660 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ argument
7662 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
7682 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ argument
7684 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
7740 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ argument
7742 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
7771 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ argument
7773 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
7799 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ argument
7801 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
7830 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ argument
7832 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
7861 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ argument
7863 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
7910 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ argument
7912 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
7935 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ argument
7937 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
7957 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ argument
7959 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
7982 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ argument
7984 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8010 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ argument
8012 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8038 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8040 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8060 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8062 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8082 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8084 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8104 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8106 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8126 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ argument
8128 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ argument
8157 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val) \ argument
8159 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
8206 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val) \ argument
8208 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
8231 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val) \ argument
8233 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val) \ argument
8259 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val) \ argument
8261 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val) \ argument
8281 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val) \ argument
8283 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
8330 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val) \ argument
8332 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
8352 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val) \ argument
8354 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
8374 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val) \ argument
8376 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
8396 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val) \ argument
8398 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
8418 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val) \ argument
8420 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8449 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val) \ argument
8451 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8474 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val) \ argument
8476 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
8505 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val) \ argument
8507 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
8527 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val) \ argument
8529 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
8549 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val) \ argument
8551 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
8571 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val) \ argument
8573 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
8593 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val) \ argument
8595 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
8615 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val) \ argument
8617 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
8640 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val) \ argument
8642 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val) \ argument
8665 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val) \ argument
8667 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val) \ argument
8690 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val) \ argument
8692 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val) \ argument
8715 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val) \ argument
8717 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \ argument
8737 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val) \ argument
8739 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \ argument
8759 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val) \ argument
8761 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \ argument
8784 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val) \ argument
8786 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8806 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val) \ argument
8808 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8828 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val) \ argument
8830 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
8856 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val) \ argument
8858 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
8878 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val) \ argument
8880 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
8900 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val) \ argument
8902 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
8922 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val) \ argument
8924 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
8944 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val) \ argument
8946 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
8966 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val) \ argument
8968 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
8988 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val) \ argument
8990 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
9010 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val) \ argument
9012 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
9032 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val) \ argument
9034 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
9054 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val) \ argument
9056 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
9076 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val) \ argument
9078 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
9098 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val) \ argument
9100 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
9123 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val) \ argument
9125 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
9145 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val) \ argument
9147 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
9167 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUT(x, val) \ argument
9169 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUTM(x, mask, val) \ argument
9189 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUT(x, val) \ argument
9191 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUTM(x, mask, val) \ argument
9211 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUT(x, val) \ argument
9213 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUTM(x, mask, val) \ argument
9233 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUT(x, val) \ argument
9235 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUTM(x, mask, val) \ argument
9255 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val) \ argument
9257 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
9277 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val) \ argument
9279 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
9299 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val) \ argument
9301 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
9321 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val) \ argument
9323 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
9343 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val) \ argument
9345 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
9365 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val) \ argument
9367 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
9387 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val) \ argument
9389 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val) \ argument
9409 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val) \ argument
9411 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val) \ argument
9431 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val) \ argument
9433 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
9453 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val) \ argument
9455 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
9475 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val) \ argument
9477 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
9497 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val) \ argument
9499 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
9519 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val) \ argument
9521 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
9541 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val) \ argument
9543 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
9563 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val) \ argument
9565 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
9585 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val) \ argument
9587 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
9607 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val) \ argument
9609 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
9629 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val) \ argument
9631 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
9651 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val) \ argument
9653 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
9673 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val) \ argument
9675 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
9695 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val) \ argument
9697 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
9717 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val) \ argument
9719 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
9739 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val) \ argument
9741 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
9761 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val) \ argument
9763 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument