46 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x)                           (x+0x00000000)  argument
47 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x)                           (x+0x00000000)  argument
50 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x)                             \  argument
51 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), HWIO_REO_R0_GENERAL_ENABLE_RMSK)
52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask)                      \  argument
53 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask) 
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val)                       \  argument
55 	out_dword( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), val)
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val)                \  argument
59 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
137 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x)               (x+0x00000004)  argument
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x)               (x+0x00000004)  argument
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x)                 \  argument
142 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
143 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask)          \  argument
144 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask) 
145 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val)           \  argument
146 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), val)
147 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val)    \  argument
150 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
180 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x)               (x+0x00000008)  argument
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x)               (x+0x00000008)  argument
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x)                 \  argument
185 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
186 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask)          \  argument
187 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask) 
188 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val)           \  argument
189 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), val)
190 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val)    \  argument
193 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
223 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x)               (x+0x0000000c)  argument
224 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x)               (x+0x0000000c)  argument
227 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x)                 \  argument
228 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
229 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask)          \  argument
230 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask) 
231 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val)           \  argument
232 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), val)
233 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val)    \  argument
236 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
266 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x)               (x+0x00000010)  argument
267 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x)               (x+0x00000010)  argument
270 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x)                 \  argument
271 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
272 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask)          \  argument
273 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask) 
274 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val)           \  argument
275 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), val)
276 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val)    \  argument
279 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
309 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x)           (x+0x00000014)  argument
310 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x)           (x+0x00000014)  argument
313 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x)             \  argument
314 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
315 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask)      \  argument
316 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask) 
317 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val)       \  argument
318 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), val)
319 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \  argument
322 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
352 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x)           (x+0x00000018)  argument
353 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x)           (x+0x00000018)  argument
356 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x)             \  argument
357 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
358 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask)      \  argument
359 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask) 
360 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val)       \  argument
361 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), val)
362 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \  argument
365 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
395 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x)           (x+0x0000001c)  argument
396 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x)           (x+0x0000001c)  argument
399 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x)             \  argument
400 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
401 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask)      \  argument
402 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask) 
403 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val)       \  argument
404 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), val)
405 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \  argument
408 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
438 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x)           (x+0x00000020)  argument
439 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x)           (x+0x00000020)  argument
442 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x)             \  argument
443 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
444 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask)      \  argument
445 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask) 
446 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val)       \  argument
447 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), val)
448 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \  argument
451 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
481 #define HWIO_REO_R0_TIMESTAMP_ADDR(x)                                (x+0x00000024)  argument
482 #define HWIO_REO_R0_TIMESTAMP_PHYS(x)                                (x+0x00000024)  argument
485 #define HWIO_REO_R0_TIMESTAMP_IN(x)                                  \  argument
486 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), HWIO_REO_R0_TIMESTAMP_RMSK)
487 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask)                           \  argument
488 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), mask) 
489 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val)                            \  argument
490 	out_dword( HWIO_REO_R0_TIMESTAMP_ADDR(x), val)
491 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val)                     \  argument
494 		out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
503 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x)           (x+0x00000028)  argument
504 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x)           (x+0x00000028)  argument
507 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x)             \  argument
508 …in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), HWIO_REO_R0_ERROR_DESTINATIO…
509 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask)      \  argument
510 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask) 
511 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val)       \  argument
512 	out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), val)
513 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \  argument
516 …O_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERROR_DESTINATION_MAPPING_…
546 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x)           (x+0x0000002c)  argument
547 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x)           (x+0x0000002c)  argument
550 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x)             \  argument
551 …in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), HWIO_REO_R0_ERROR_DESTINATIO…
552 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask)      \  argument
553 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask) 
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val)       \  argument
555 	out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), val)
556 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \  argument
559 …O_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERROR_DESTINATION_MAPPING_…
589 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x)                            (x+0x00000030)  argument
590 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x)                            (x+0x00000030)  argument
593 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x)                              \  argument
594 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), HWIO_REO_R0_IDLE_REQ_CTRL_RMSK)
595 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask)                       \  argument
596 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask) 
597 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val)                        \  argument
598 	out_dword( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), val)
599 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val)                 \  argument
602 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
614 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x)                 (x+0x00000034)  argument
615 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x)                 (x+0x00000034)  argument
618 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x)                   \  argument
619 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_BASE_L…
620 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask)            \  argument
621 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask) 
622 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val)             \  argument
623 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), val)
624 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
627 …ed_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_BASE_LS…
636 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x)                 (x+0x00000038)  argument
637 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x)                 (x+0x00000038)  argument
640 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x)                   \  argument
641 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_BASE_M…
642 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask)            \  argument
643 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask) 
644 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val)             \  argument
645 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), val)
646 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
649 …ed_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_BASE_MS…
661 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x)                       (x+0x0000003c)  argument
662 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x)                       (x+0x0000003c)  argument
665 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x)                         \  argument
666 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_ID_RMSK)
667 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask)                  \  argument
668 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask) 
669 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val)                   \  argument
670 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), val)
671 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val)            \  argument
674 …word_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_ID_I…
683 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x)                   (x+0x00000040)  argument
684 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x)                   (x+0x00000040)  argument
687 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x)                     \  argument
688 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_STATUS_R…
689 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask)              \  argument
690 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask) 
691 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val)               \  argument
692 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), val)
693 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val)        \  argument
696 …asked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_STATUS…
708 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x)                     (x+0x00000044)  argument
709 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x)                     (x+0x00000044)  argument
712 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x)                       \  argument
713 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_MISC_RMSK)
714 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask)                \  argument
715 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask) 
716 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val)                 \  argument
717 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), val)
718 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val)          \  argument
721 …d_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MISC_…
760 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x)              (x+0x00000050)  argument
761 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x)              (x+0x00000050)  argument
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x)                \  argument
765 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_TP_…
766 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
767 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask) 
768 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val)          \  argument
769 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), val)
770 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
773 …s(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_…
782 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x)              (x+0x00000054)  argument
783 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x)              (x+0x00000054)  argument
786 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x)                \  argument
787 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_TP_…
788 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
789 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask) 
790 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val)          \  argument
791 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), val)
792 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
795 …s(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_…
804 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)   (x+0x00000064)  argument
805 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)   (x+0x00000064)  argument
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x)     \  argument
809 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_RXDMA2RE…
810 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
811 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
812 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
813 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
814 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
817 …MA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_S…
832 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)   (x+0x00000068)  argument
833 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)   (x+0x00000068)  argument
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x)     \  argument
837 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_RXDMA2RE…
838 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
839 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
840 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
841 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
842 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
845 …MA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_S…
854 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x)      (x+0x0000006c)  argument
855 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x)      (x+0x0000006c)  argument
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x)        \  argument
859 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO0_…
860 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
861 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
862 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val)  \  argument
863 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), val)
864 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
867 …0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT…
882 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)   (x+0x00000070)  argument
883 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)   (x+0x00000070)  argument
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x)     \  argument
887 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_RXDMA2RE…
888 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
889 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
890 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
891 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
892 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
895 …MA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY…
904 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)  (x+0x00000074)  argument
905 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)  (x+0x00000074)  argument
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x)    \  argument
909 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_RXDMA2R…
910 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
911 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
912 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
913 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
914 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
917 …A2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFE…
926 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078)  argument
927 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078)  argument
930 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x)   \  argument
931 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2…
932 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
933 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
934 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
935 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
936 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
939 …REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFET…
951 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000007c)  argument
952 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000007c)  argument
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x)              \  argument
956 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_M…
957 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
958 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask) 
959 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
960 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), val)
961 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
964 …WIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE…
973 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000080)  argument
974 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000080)  argument
977 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x)              \  argument
978 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_M…
979 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
980 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask) 
981 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
982 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), val)
983 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
986 …WIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE…
998 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x)                (x+0x00000084)  argument
999 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x)                (x+0x00000084)  argument
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x)                  \  argument
1003 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_MSI1_…
1004 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask)           \  argument
1005 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask) 
1006 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val)            \  argument
1007 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), val)
1008 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1011 …d_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DA…
1020 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000088)  argument
1021 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000088)  argument
1024 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
1025 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING…
1026 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1027 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1028 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
1029 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1030 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1033 …_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_O…
1042 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x)               (x+0x0000008c)  argument
1043 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x)               (x+0x0000008c)  argument
1046 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x)                 \  argument
1047 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_BA…
1048 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask)          \  argument
1049 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask) 
1050 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val)           \  argument
1051 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), val)
1052 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val)    \  argument
1055 …ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_BASE_L…
1064 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x)               (x+0x00000090)  argument
1065 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x)               (x+0x00000090)  argument
1068 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x)                 \  argument
1069 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_BA…
1070 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask)          \  argument
1071 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask) 
1072 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val)           \  argument
1073 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), val)
1074 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val)    \  argument
1077 …ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_BASE_M…
1089 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x)                     (x+0x00000094)  argument
1090 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x)                     (x+0x00000094)  argument
1093 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x)                       \  argument
1094 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_ID_RMSK)
1095 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask)                \  argument
1096 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask) 
1097 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val)                 \  argument
1098 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), val)
1099 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val)          \  argument
1102 …d_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_ID_…
1111 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x)                 (x+0x00000098)  argument
1112 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x)                 (x+0x00000098)  argument
1115 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x)                   \  argument
1116 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_STAT…
1117 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask)            \  argument
1118 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask) 
1119 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val)             \  argument
1120 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), val)
1121 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val)      \  argument
1124 …ed_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_STATU…
1136 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x)                   (x+0x0000009c)  argument
1137 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x)                   (x+0x0000009c)  argument
1140 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x)                     \  argument
1141 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_MISC_R…
1142 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask)              \  argument
1143 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask) 
1144 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val)               \  argument
1145 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), val)
1146 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val)        \  argument
1149 …asked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MISC…
1188 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x)            (x+0x000000a8)  argument
1189 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x)            (x+0x000000a8)  argument
1192 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x)              \  argument
1193 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING…
1194 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask)       \  argument
1195 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask) 
1196 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val)        \  argument
1197 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), val)
1198 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \  argument
1201 …WIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR…
1210 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x)            (x+0x000000ac)  argument
1211 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x)            (x+0x000000ac)  argument
1214 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x)              \  argument
1215 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING…
1216 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask)       \  argument
1217 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask) 
1218 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val)        \  argument
1219 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), val)
1220 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \  argument
1223 …WIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR…
1232 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000000bc)  argument
1233 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000000bc)  argument
1236 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x)   \  argument
1237 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_WBM2RE…
1238 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1239 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1240 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
1241 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1242 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1245 …O_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_…
1260 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000000c0)  argument
1261 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000000c0)  argument
1264 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x)   \  argument
1265 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_WBM2RE…
1266 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1267 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1268 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
1269 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1270 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1273 …O_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_…
1282 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x)    (x+0x000000c4)  argument
1283 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x)    (x+0x000000c4)  argument
1286 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x)      \  argument
1287 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_WBM2REO_L…
1288 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1289 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1290 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \  argument
1291 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1292 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1295 …BM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_IN…
1310 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000000c8)  argument
1311 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000000c8)  argument
1314 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x)   \  argument
1315 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_WBM2RE…
1316 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1317 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1318 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
1319 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1320 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1323 …O_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPT…
1332 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000000cc)  argument
1333 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000000cc)  argument
1336 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x)  \  argument
1337 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_WBM2R…
1338 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1339 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1340 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
1341 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1342 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1345 …_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREF…
1354 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0)  argument
1355 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0)  argument
1358 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \  argument
1359 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_WBM2…
1360 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1361 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1362 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
1363 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1364 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1367 …INK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFE…
1379 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x)          (x+0x000000d4)  argument
1380 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_PHYS(x)          (x+0x000000d4)  argument
1383 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_IN(x)            \  argument
1384 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RI…
1385 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_INM(x, mask)     \  argument
1386 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1387 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUT(x, val)      \  argument
1388 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), val)
1389 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1392 …_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BAS…
1401 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x)          (x+0x000000d8)  argument
1402 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_PHYS(x)          (x+0x000000d8)  argument
1405 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_IN(x)            \  argument
1406 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RI…
1407 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_INM(x, mask)     \  argument
1408 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1409 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUT(x, val)      \  argument
1410 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), val)
1411 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1414 …_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BAS…
1426 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x)              (x+0x000000dc)  argument
1427 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_PHYS(x)              (x+0x000000dc)  argument
1430 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_IN(x)                \  argument
1431 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_M…
1432 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_INM(x, mask)         \  argument
1433 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask) 
1434 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUT(x, val)          \  argument
1435 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), val)
1436 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val)   \  argument
1439 …s(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_D…
1448 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x)        (x+0x000000e0)  argument
1449 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x)        (x+0x000000e0)  argument
1452 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x)          \  argument
1453 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_…
1454 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask)   \  argument
1455 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1456 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val)    \  argument
1457 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1458 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1461 …O_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_…
1470 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x)                    (x+0x000000e4)  argument
1471 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x)                    (x+0x000000e4)  argument
1474 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x)                      \  argument
1475 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_BASE_LSB_RMS…
1476 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask)               \  argument
1477 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask) 
1478 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val)                \  argument
1479 	out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), val)
1480 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
1483 …_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_BASE_LSB…
1492 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x)                    (x+0x000000e8)  argument
1493 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x)                    (x+0x000000e8)  argument
1496 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x)                      \  argument
1497 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_BASE_MSB_RMS…
1498 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask)               \  argument
1499 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask) 
1500 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val)                \  argument
1501 	out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), val)
1502 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
1505 …_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_BASE_MSB…
1517 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x)                          (x+0x000000ec)  argument
1518 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x)                          (x+0x000000ec)  argument
1521 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x)                            \  argument
1522 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), HWIO_REO_R0_REO_CMD_RING_ID_RMSK)
1523 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask)                     \  argument
1524 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask) 
1525 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val)                      \  argument
1526 	out_dword( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), val)
1527 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val)               \  argument
1530 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
1539 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x)                      (x+0x000000f0)  argument
1540 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x)                      (x+0x000000f0)  argument
1543 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x)                        \  argument
1544 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_RING_STATUS_RMSK)
1545 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask)                 \  argument
1546 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask) 
1547 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val)                  \  argument
1548 	out_dword( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), val)
1549 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val)           \  argument
1552 …ord_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_STATUS_…
1564 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x)                        (x+0x000000f4)  argument
1565 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x)                        (x+0x000000f4)  argument
1568 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x)                          \  argument
1569 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MISC_RMSK)
1570 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask)                   \  argument
1571 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask) 
1572 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val)                    \  argument
1573 	out_dword( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), val)
1574 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val)             \  argument
1577 …_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MISC_I…
1616 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x)                 (x+0x00000100)  argument
1617 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x)                 (x+0x00000100)  argument
1620 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x)                   \  argument
1621 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_TP_ADDR_L…
1622 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
1623 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask) 
1624 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val)             \  argument
1625 	out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), val)
1626 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
1629 …ed_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LS…
1638 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x)                 (x+0x00000104)  argument
1639 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x)                 (x+0x00000104)  argument
1642 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x)                   \  argument
1643 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_TP_ADDR_M…
1644 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
1645 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask) 
1646 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val)             \  argument
1647 	out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), val)
1648 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
1651 …ed_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MS…
1660 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)      (x+0x00000114)  argument
1661 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)      (x+0x00000114)  argument
1664 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x)        \  argument
1665 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
1666 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1667 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1668 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)  \  argument
1669 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1670 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1673 …0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SE…
1688 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)      (x+0x00000118)  argument
1689 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)      (x+0x00000118)  argument
1692 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x)        \  argument
1693 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
1694 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1695 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1696 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)  \  argument
1697 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1698 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1701 …0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SE…
1710 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x)         (x+0x0000011c)  argument
1711 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x)         (x+0x0000011c)  argument
1714 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x)           \  argument
1715 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_RING_C…
1716 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
1717 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1718 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val)     \  argument
1719 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1720 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1723 …EO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_S…
1738 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)      (x+0x00000120)  argument
1739 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)      (x+0x00000120)  argument
1742 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x)        \  argument
1743 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
1744 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1745 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1746 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)  \  argument
1747 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1748 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1751 …0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_…
1760 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)     (x+0x00000124)  argument
1761 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)     (x+0x00000124)  argument
1764 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x)       \  argument
1765 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_REO_CMD_RI…
1766 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1767 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1768 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
1769 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1770 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1773 …REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETC…
1782 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)    (x+0x00000128)  argument
1783 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)    (x+0x00000128)  argument
1786 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x)      \  argument
1787 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_R…
1788 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1789 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1790 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
1791 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1792 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1795 …EO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETC…
1807 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000012c)  argument
1808 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000012c)  argument
1811 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x)                 \  argument
1812 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_BA…
1813 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
1814 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1815 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
1816 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), val)
1817 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
1820 …ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_L…
1829 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000130)  argument
1830 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000130)  argument
1833 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x)                 \  argument
1834 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_BA…
1835 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
1836 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1837 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
1838 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), val)
1839 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
1842 …ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_M…
1854 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x)                   (x+0x00000134)  argument
1855 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x)                   (x+0x00000134)  argument
1858 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x)                     \  argument
1859 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_R…
1860 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask)              \  argument
1861 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask) 
1862 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val)               \  argument
1863 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), val)
1864 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
1867 …asked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_DATA…
1876 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000138)  argument
1877 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000138)  argument
1880 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
1881 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_CMD_RING_HP_TP…
1882 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
1883 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1884 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
1885 	out_dword( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1886 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
1889 …HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFF…
1898 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x)                     (x+0x0000013c)  argument
1899 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x)                     (x+0x0000013c)  argument
1902 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x)                       \  argument
1903 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_BASE_LSB_RMSK)
1904 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask)                \  argument
1905 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask) 
1906 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val)                 \  argument
1907 	out_dword( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), val)
1908 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
1911 …d_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_BASE_LSB_…
1920 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x)                     (x+0x00000140)  argument
1921 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x)                     (x+0x00000140)  argument
1924 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x)                       \  argument
1925 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_BASE_MSB_RMSK)
1926 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask)                \  argument
1927 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask) 
1928 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val)                 \  argument
1929 	out_dword( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), val)
1930 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
1933 …d_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_BASE_MSB_…
1945 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x)                           (x+0x00000144)  argument
1946 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x)                           (x+0x00000144)  argument
1949 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x)                             \  argument
1950 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), HWIO_REO_R0_SW2REO_RING_ID_RMSK)
1951 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask)                      \  argument
1952 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask) 
1953 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val)                       \  argument
1954 	out_dword( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), val)
1955 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val)                \  argument
1958 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
1967 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x)                       (x+0x00000148)  argument
1968 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x)                       (x+0x00000148)  argument
1971 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x)                         \  argument
1972 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RING_STATUS_RMSK)
1973 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask)                  \  argument
1974 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask) 
1975 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val)                   \  argument
1976 	out_dword( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), val)
1977 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val)            \  argument
1980 …word_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STATUS_I…
1992 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x)                         (x+0x0000014c)  argument
1993 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x)                         (x+0x0000014c)  argument
1996 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x)                           \  argument
1997 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), HWIO_REO_R0_SW2REO_RING_MISC_RMSK)
1998 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask)                    \  argument
1999 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask) 
2000 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val)                     \  argument
2001 	out_dword( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), val)
2002 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val)              \  argument
2005 …t_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_IN…
2044 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x)                  (x+0x00000158)  argument
2045 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x)                  (x+0x00000158)  argument
2048 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x)                    \  argument
2049 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB…
2050 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask)             \  argument
2051 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask) 
2052 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val)              \  argument
2053 	out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), val)
2054 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val)       \  argument
2057 …sked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_TP_ADDR_LS…
2066 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x)                  (x+0x0000015c)  argument
2067 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x)                  (x+0x0000015c)  argument
2070 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x)                    \  argument
2071 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB…
2072 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask)             \  argument
2073 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask) 
2074 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val)              \  argument
2075 	out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), val)
2076 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val)       \  argument
2079 …sked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_TP_ADDR_MS…
2088 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)       (x+0x0000016c)  argument
2089 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)       (x+0x0000016c)  argument
2092 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x)         \  argument
2093 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2094 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask)  \  argument
2095 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2096 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)   \  argument
2097 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2098 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2101 …R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SET…
2116 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)       (x+0x00000170)  argument
2117 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)       (x+0x00000170)  argument
2120 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x)         \  argument
2121 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2122 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask)  \  argument
2123 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2124 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)   \  argument
2125 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2126 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2129 …R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SET…
2138 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x)          (x+0x00000174)  argument
2139 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x)          (x+0x00000174)  argument
2142 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x)            \  argument
2143 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RING_CON…
2144 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask)     \  argument
2145 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2146 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val)      \  argument
2147 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2148 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2151 …_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_S…
2166 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)       (x+0x00000178)  argument
2167 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)       (x+0x00000178)  argument
2170 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x)         \  argument
2171 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2172 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask)  \  argument
2173 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2174 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)   \  argument
2175 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2176 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2179 …R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_C…
2188 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)      (x+0x0000017c)  argument
2189 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)      (x+0x0000017c)  argument
2192 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x)        \  argument
2193 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_SW2REO_RING…
2194 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2195 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2196 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val)  \  argument
2197 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2198 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2201 …0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETC…
2210 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)     (x+0x00000180)  argument
2211 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)     (x+0x00000180)  argument
2214 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x)       \  argument
2215 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RIN…
2216 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2217 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2218 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
2219 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2220 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2223 …SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH…
2235 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x)                (x+0x00000184)  argument
2236 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x)                (x+0x00000184)  argument
2239 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x)                  \  argument
2240 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_BASE…
2241 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
2242 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2243 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val)            \  argument
2244 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), val)
2245 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
2248 …d_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_BASE_L…
2257 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x)                (x+0x00000188)  argument
2258 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x)                (x+0x00000188)  argument
2261 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x)                  \  argument
2262 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_BASE…
2263 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
2264 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2265 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val)            \  argument
2266 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), val)
2267 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
2270 …d_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_BASE_M…
2282 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x)                    (x+0x0000018c)  argument
2283 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x)                    (x+0x0000018c)  argument
2286 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x)                      \  argument
2287 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_DATA_RMS…
2288 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask)               \  argument
2289 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask) 
2290 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val)                \  argument
2291 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), val)
2292 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
2295 …_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_DATA…
2304 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x)              (x+0x00000190)  argument
2305 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x)              (x+0x00000190)  argument
2308 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x)                \  argument
2309 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_SW2REO_RING_HP_TP_S…
2310 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
2311 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2312 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val)          \  argument
2313 	out_dword( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2314 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
2317 …s(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFF…
2326 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x)                    (x+0x00000194)  argument
2327 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_PHYS(x)                    (x+0x00000194)  argument
2330 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_IN(x)                      \  argument
2331 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_BASE_LSB_RMS…
2332 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask)               \  argument
2333 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask) 
2334 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val)                \  argument
2335 	out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), val)
2336 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2339 …_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_BASE_LSB…
2348 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x)                    (x+0x00000198)  argument
2349 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_PHYS(x)                    (x+0x00000198)  argument
2352 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_IN(x)                      \  argument
2353 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_BASE_MSB_RMS…
2354 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask)               \  argument
2355 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask) 
2356 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val)                \  argument
2357 	out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), val)
2358 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2361 …_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_BASE_MSB…
2373 #define HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x)                          (x+0x0000019c)  argument
2374 #define HWIO_REO_R0_SW2REO1_RING_ID_PHYS(x)                          (x+0x0000019c)  argument
2377 #define HWIO_REO_R0_SW2REO1_RING_ID_IN(x)                            \  argument
2378 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), HWIO_REO_R0_SW2REO1_RING_ID_RMSK)
2379 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask)                     \  argument
2380 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask) 
2381 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val)                      \  argument
2382 	out_dword( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), val)
2383 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val)               \  argument
2386 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
2395 #define HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x)                      (x+0x000001a0)  argument
2396 #define HWIO_REO_R0_SW2REO1_RING_STATUS_PHYS(x)                      (x+0x000001a0)  argument
2399 #define HWIO_REO_R0_SW2REO1_RING_STATUS_IN(x)                        \  argument
2400 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_RING_STATUS_RMSK)
2401 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask)                 \  argument
2402 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask) 
2403 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val)                  \  argument
2404 	out_dword( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), val)
2405 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val)           \  argument
2408 …ord_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_STATUS_…
2420 #define HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x)                        (x+0x000001a4)  argument
2421 #define HWIO_REO_R0_SW2REO1_RING_MISC_PHYS(x)                        (x+0x000001a4)  argument
2424 #define HWIO_REO_R0_SW2REO1_RING_MISC_IN(x)                          \  argument
2425 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MISC_RMSK)
2426 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask)                   \  argument
2427 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask) 
2428 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val)                    \  argument
2429 	out_dword( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), val)
2430 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val)             \  argument
2433 …_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MISC_I…
2472 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x)                 (x+0x000001b0)  argument
2473 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_PHYS(x)                 (x+0x000001b0)  argument
2476 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_IN(x)                   \  argument
2477 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_TP_ADDR_L…
2478 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
2479 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
2480 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val)             \  argument
2481 	out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), val)
2482 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2485 …ed_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LS…
2494 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x)                 (x+0x000001b4)  argument
2495 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_PHYS(x)                 (x+0x000001b4)  argument
2498 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_IN(x)                   \  argument
2499 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_TP_ADDR_M…
2500 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
2501 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
2502 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val)             \  argument
2503 	out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), val)
2504 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2507 …ed_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MS…
2516 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)      (x+0x000001c4)  argument
2517 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)      (x+0x000001c4)  argument
2520 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x)        \  argument
2521 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
2522 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2523 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2524 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)  \  argument
2525 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2526 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2529 …0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SE…
2544 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)      (x+0x000001c8)  argument
2545 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)      (x+0x000001c8)  argument
2548 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x)        \  argument
2549 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
2550 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2551 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2552 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)  \  argument
2553 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2554 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2557 …0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SE…
2566 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x)         (x+0x000001cc)  argument
2567 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_PHYS(x)         (x+0x000001cc)  argument
2570 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_IN(x)           \  argument
2571 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_RING_C…
2572 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
2573 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2574 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val)     \  argument
2575 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2576 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2579 …EO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_S…
2594 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)      (x+0x000001d0)  argument
2595 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)      (x+0x000001d0)  argument
2598 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x)        \  argument
2599 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
2600 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2601 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2602 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)  \  argument
2603 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2604 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2607 …0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_…
2616 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)     (x+0x000001d4)  argument
2617 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)     (x+0x000001d4)  argument
2620 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x)       \  argument
2621 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_SW2REO1_RI…
2622 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2623 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2624 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
2625 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2626 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2629 …SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETC…
2638 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)    (x+0x000001d8)  argument
2639 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)    (x+0x000001d8)  argument
2642 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x)      \  argument
2643 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_R…
2644 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2645 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2646 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
2647 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2648 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2651 …W2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETC…
2663 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000001dc)  argument
2664 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000001dc)  argument
2667 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_IN(x)                 \  argument
2668 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_BA…
2669 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
2670 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2671 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
2672 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), val)
2673 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
2676 …ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_L…
2685 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000001e0)  argument
2686 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000001e0)  argument
2689 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_IN(x)                 \  argument
2690 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_BA…
2691 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
2692 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2693 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
2694 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), val)
2695 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
2698 …ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_M…
2710 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x)                   (x+0x000001e4)  argument
2711 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_PHYS(x)                   (x+0x000001e4)  argument
2714 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_IN(x)                     \  argument
2715 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_R…
2716 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask)              \  argument
2717 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask) 
2718 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val)               \  argument
2719 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), val)
2720 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
2723 …asked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_DATA…
2732 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000001e8)  argument
2733 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000001e8)  argument
2736 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
2737 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_SW2REO1_RING_HP_TP…
2738 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
2739 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2740 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
2741 	out_dword( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2742 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
2745 …HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFF…
2754 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x)                    (x+0x000001ec)  argument
2755 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x)                    (x+0x000001ec)  argument
2758 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x)                      \  argument
2759 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_BASE_LSB_RMS…
2760 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask)               \  argument
2761 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask) 
2762 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val)                \  argument
2763 	out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), val)
2764 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2767 …_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_BASE_LSB…
2776 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x)                    (x+0x000001f0)  argument
2777 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x)                    (x+0x000001f0)  argument
2780 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x)                      \  argument
2781 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RMS…
2782 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask)               \  argument
2783 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask) 
2784 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val)                \  argument
2785 	out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), val)
2786 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2789 …_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_BASE_MSB…
2801 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x)                          (x+0x000001f4)  argument
2802 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x)                          (x+0x000001f4)  argument
2805 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x)                            \  argument
2806 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW1_RING_ID_RMSK)
2807 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask)                     \  argument
2808 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask) 
2809 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val)                      \  argument
2810 	out_dword( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), val)
2811 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val)               \  argument
2814 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
2826 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                      (x+0x000001f8)  argument
2827 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x)                      (x+0x000001f8)  argument
2830 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x)                        \  argument
2831 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW1_RING_STATUS_RMSK)
2832 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask)                 \  argument
2833 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask) 
2834 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val)                  \  argument
2835 	out_dword( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), val)
2836 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val)           \  argument
2839 …ord_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_STATUS_…
2851 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x)                        (x+0x000001fc)  argument
2852 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x)                        (x+0x000001fc)  argument
2855 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x)                          \  argument
2856 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MISC_RMSK)
2857 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask)                   \  argument
2858 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask) 
2859 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val)                    \  argument
2860 	out_dword( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), val)
2861 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val)             \  argument
2864 …_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MISC_I…
2906 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000200)  argument
2907 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000200)  argument
2910 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x)                   \  argument
2911 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_ADDR_L…
2912 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
2913 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask) 
2914 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
2915 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), val)
2916 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2919 …ed_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LS…
2928 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000204)  argument
2929 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000204)  argument
2932 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x)                   \  argument
2933 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_ADDR_M…
2934 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
2935 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask) 
2936 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
2937 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), val)
2938 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2941 …ed_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MS…
2950 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000210)  argument
2951 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000210)  argument
2954 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
2955 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW1_RING_PR…
2956 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
2957 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
2958 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
2959 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), val)
2960 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
2963 …_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_…
2978 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000214)  argument
2979 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000214)  argument
2982 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
2983 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW1_RING_P…
2984 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
2985 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
2986 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
2987 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), val)
2988 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
2991 …EO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_S…
3006 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000218)  argument
3007 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000218)  argument
3010 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3011 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW1_RING…
3012 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3013 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3014 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3015 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3016 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3019 …R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_C…
3028 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000234)  argument
3029 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000234)  argument
3032 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3033 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_BA…
3034 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3035 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3036 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3037 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), val)
3038 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3041 …ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_L…
3050 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000238)  argument
3051 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000238)  argument
3054 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3055 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_BA…
3056 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3057 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3058 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3059 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), val)
3060 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3063 …ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_M…
3075 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x)                   (x+0x0000023c)  argument
3076 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x)                   (x+0x0000023c)  argument
3079 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x)                     \  argument
3080 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_R…
3081 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask)              \  argument
3082 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask) 
3083 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val)               \  argument
3084 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), val)
3085 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3088 …asked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_DATA…
3097 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000240)  argument
3098 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000240)  argument
3101 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3102 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_TP…
3103 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3104 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3105 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3106 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3107 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3110 …HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFF…
3119 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x)                    (x+0x00000244)  argument
3120 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x)                    (x+0x00000244)  argument
3123 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x)                      \  argument
3124 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_BASE_LSB_RMS…
3125 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask)               \  argument
3126 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask) 
3127 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val)                \  argument
3128 	out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), val)
3129 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3132 …_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_BASE_LSB…
3141 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x)                    (x+0x00000248)  argument
3142 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x)                    (x+0x00000248)  argument
3145 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x)                      \  argument
3146 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_BASE_MSB_RMS…
3147 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask)               \  argument
3148 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask) 
3149 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val)                \  argument
3150 	out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), val)
3151 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3154 …_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_BASE_MSB…
3166 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x)                          (x+0x0000024c)  argument
3167 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x)                          (x+0x0000024c)  argument
3170 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x)                            \  argument
3171 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW2_RING_ID_RMSK)
3172 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask)                     \  argument
3173 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask) 
3174 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val)                      \  argument
3175 	out_dword( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), val)
3176 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val)               \  argument
3179 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3191 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x)                      (x+0x00000250)  argument
3192 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x)                      (x+0x00000250)  argument
3195 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x)                        \  argument
3196 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW2_RING_STATUS_RMSK)
3197 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask)                 \  argument
3198 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask) 
3199 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val)                  \  argument
3200 	out_dword( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), val)
3201 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val)           \  argument
3204 …ord_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_STATUS_…
3216 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x)                        (x+0x00000254)  argument
3217 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x)                        (x+0x00000254)  argument
3220 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x)                          \  argument
3221 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MISC_RMSK)
3222 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask)                   \  argument
3223 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask) 
3224 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val)                    \  argument
3225 	out_dword( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), val)
3226 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val)             \  argument
3229 …_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MISC_I…
3271 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000258)  argument
3272 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000258)  argument
3275 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x)                   \  argument
3276 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_ADDR_L…
3277 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3278 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask) 
3279 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
3280 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), val)
3281 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3284 …ed_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LS…
3293 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x0000025c)  argument
3294 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x0000025c)  argument
3297 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x)                   \  argument
3298 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_ADDR_M…
3299 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3300 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask) 
3301 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
3302 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), val)
3303 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3306 …ed_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MS…
3315 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000268)  argument
3316 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000268)  argument
3319 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
3320 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW2_RING_PR…
3321 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3322 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3323 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
3324 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3325 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3328 …_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_…
3343 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x0000026c)  argument
3344 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x0000026c)  argument
3347 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
3348 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW2_RING_P…
3349 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3350 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3351 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
3352 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3353 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3356 …EO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_S…
3371 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000270)  argument
3372 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000270)  argument
3375 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3376 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW2_RING…
3377 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3378 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3379 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3380 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3381 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3384 …R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_C…
3393 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000028c)  argument
3394 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000028c)  argument
3397 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3398 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_BA…
3399 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3400 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3401 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3402 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), val)
3403 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3406 …ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_L…
3415 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000290)  argument
3416 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000290)  argument
3419 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3420 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_BA…
3421 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3422 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3423 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3424 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), val)
3425 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3428 …ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_M…
3440 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x)                   (x+0x00000294)  argument
3441 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x)                   (x+0x00000294)  argument
3444 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x)                     \  argument
3445 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_R…
3446 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask)              \  argument
3447 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask) 
3448 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val)               \  argument
3449 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), val)
3450 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3453 …asked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_DATA…
3462 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000298)  argument
3463 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000298)  argument
3466 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3467 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_TP…
3468 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3469 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3470 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3471 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3472 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3475 …HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFF…
3484 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x)                    (x+0x0000029c)  argument
3485 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x)                    (x+0x0000029c)  argument
3488 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x)                      \  argument
3489 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_BASE_LSB_RMS…
3490 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask)               \  argument
3491 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask) 
3492 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val)                \  argument
3493 	out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), val)
3494 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3497 …_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_BASE_LSB…
3506 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x)                    (x+0x000002a0)  argument
3507 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x)                    (x+0x000002a0)  argument
3510 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x)                      \  argument
3511 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_BASE_MSB_RMS…
3512 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask)               \  argument
3513 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask) 
3514 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val)                \  argument
3515 	out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), val)
3516 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3519 …_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_BASE_MSB…
3531 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x)                          (x+0x000002a4)  argument
3532 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x)                          (x+0x000002a4)  argument
3535 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x)                            \  argument
3536 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW3_RING_ID_RMSK)
3537 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask)                     \  argument
3538 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask) 
3539 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val)                      \  argument
3540 	out_dword( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), val)
3541 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val)               \  argument
3544 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
3556 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x)                      (x+0x000002a8)  argument
3557 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x)                      (x+0x000002a8)  argument
3560 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x)                        \  argument
3561 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW3_RING_STATUS_RMSK)
3562 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask)                 \  argument
3563 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask) 
3564 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val)                  \  argument
3565 	out_dword( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), val)
3566 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val)           \  argument
3569 …ord_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_STATUS_…
3581 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x)                        (x+0x000002ac)  argument
3582 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x)                        (x+0x000002ac)  argument
3585 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x)                          \  argument
3586 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MISC_RMSK)
3587 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask)                   \  argument
3588 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask) 
3589 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val)                    \  argument
3590 	out_dword( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), val)
3591 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val)             \  argument
3594 …_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MISC_I…
3636 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x000002b0)  argument
3637 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x000002b0)  argument
3640 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x)                   \  argument
3641 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_ADDR_L…
3642 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3643 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask) 
3644 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
3645 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), val)
3646 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3649 …ed_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LS…
3658 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x000002b4)  argument
3659 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x000002b4)  argument
3662 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x)                   \  argument
3663 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_ADDR_M…
3664 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3665 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask) 
3666 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
3667 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), val)
3668 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3671 …ed_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MS…
3680 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x000002c0)  argument
3681 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x000002c0)  argument
3684 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
3685 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW3_RING_PR…
3686 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3687 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3688 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
3689 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3690 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3693 …_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_…
3708 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x000002c4)  argument
3709 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x000002c4)  argument
3712 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
3713 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW3_RING_P…
3714 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3715 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3716 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
3717 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3718 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3721 …EO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_S…
3736 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x000002c8)  argument
3737 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x000002c8)  argument
3740 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3741 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW3_RING…
3742 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3743 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3744 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3745 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3746 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3749 …R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_C…
3758 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000002e4)  argument
3759 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000002e4)  argument
3762 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3763 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_BA…
3764 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3765 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3766 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3767 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), val)
3768 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3771 …ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_L…
3780 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000002e8)  argument
3781 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000002e8)  argument
3784 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3785 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_BA…
3786 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3787 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3788 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3789 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), val)
3790 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3793 …ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_M…
3805 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x)                   (x+0x000002ec)  argument
3806 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x)                   (x+0x000002ec)  argument
3809 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x)                     \  argument
3810 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_R…
3811 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask)              \  argument
3812 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask) 
3813 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val)               \  argument
3814 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), val)
3815 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3818 …asked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_DATA…
3827 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000002f0)  argument
3828 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000002f0)  argument
3831 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3832 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_TP…
3833 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3834 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3835 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3836 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3837 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3840 …HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFF…
3849 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x)                    (x+0x000002f4)  argument
3850 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x)                    (x+0x000002f4)  argument
3853 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x)                      \  argument
3854 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_BASE_LSB_RMS…
3855 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask)               \  argument
3856 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask) 
3857 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val)                \  argument
3858 	out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), val)
3859 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3862 …_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_BASE_LSB…
3871 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x)                    (x+0x000002f8)  argument
3872 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x)                    (x+0x000002f8)  argument
3875 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x)                      \  argument
3876 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_BASE_MSB_RMS…
3877 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask)               \  argument
3878 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask) 
3879 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val)                \  argument
3880 	out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), val)
3881 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3884 …_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_BASE_MSB…
3896 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x)                          (x+0x000002fc)  argument
3897 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x)                          (x+0x000002fc)  argument
3900 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x)                            \  argument
3901 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW4_RING_ID_RMSK)
3902 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask)                     \  argument
3903 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask) 
3904 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val)                      \  argument
3905 	out_dword( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), val)
3906 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val)               \  argument
3909 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
3921 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x)                      (x+0x00000300)  argument
3922 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x)                      (x+0x00000300)  argument
3925 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x)                        \  argument
3926 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW4_RING_STATUS_RMSK)
3927 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask)                 \  argument
3928 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask) 
3929 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val)                  \  argument
3930 	out_dword( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), val)
3931 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val)           \  argument
3934 …ord_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_STATUS_…
3946 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x)                        (x+0x00000304)  argument
3947 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x)                        (x+0x00000304)  argument
3950 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x)                          \  argument
3951 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MISC_RMSK)
3952 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask)                   \  argument
3953 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask) 
3954 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val)                    \  argument
3955 	out_dword( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), val)
3956 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val)             \  argument
3959 …_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MISC_I…
4001 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000308)  argument
4002 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000308)  argument
4005 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x)                   \  argument
4006 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_ADDR_L…
4007 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4008 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask) 
4009 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4010 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), val)
4011 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4014 …ed_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LS…
4023 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x0000030c)  argument
4024 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x0000030c)  argument
4027 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x)                   \  argument
4028 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_ADDR_M…
4029 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4030 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask) 
4031 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4032 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), val)
4033 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4036 …ed_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MS…
4045 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000318)  argument
4046 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000318)  argument
4049 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4050 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW4_RING_PR…
4051 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4052 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4053 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4054 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4055 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4058 …_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_…
4073 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x0000031c)  argument
4074 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x0000031c)  argument
4077 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4078 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW4_RING_P…
4079 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4080 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4081 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4082 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4083 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4086 …EO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_S…
4101 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000320)  argument
4102 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000320)  argument
4105 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4106 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW4_RING…
4107 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4108 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4109 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4110 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4111 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4114 …R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_C…
4123 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000033c)  argument
4124 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000033c)  argument
4127 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4128 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_BA…
4129 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4130 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4131 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4132 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), val)
4133 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4136 …ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_L…
4145 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000340)  argument
4146 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000340)  argument
4149 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4150 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_BA…
4151 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4152 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4153 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4154 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), val)
4155 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4158 …ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_M…
4170 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x)                   (x+0x00000344)  argument
4171 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x)                   (x+0x00000344)  argument
4174 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x)                     \  argument
4175 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_R…
4176 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask)              \  argument
4177 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask) 
4178 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val)               \  argument
4179 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), val)
4180 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4183 …asked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_DATA…
4192 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000348)  argument
4193 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000348)  argument
4196 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4197 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_TP…
4198 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4199 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4200 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4201 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4202 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4205 …HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFF…
4214 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x)                    (x+0x0000034c)  argument
4215 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_PHYS(x)                    (x+0x0000034c)  argument
4218 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_IN(x)                      \  argument
4219 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW5_RING_BASE_LSB_RMS…
4220 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_INM(x, mask)               \  argument
4221 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), mask) 
4222 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUT(x, val)                \  argument
4223 	out_dword( HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), val)
4224 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4227 …_masked_ns(HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_BASE_LSB…
4236 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x)                    (x+0x00000350)  argument
4237 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_PHYS(x)                    (x+0x00000350)  argument
4240 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_IN(x)                      \  argument
4241 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW5_RING_BASE_MSB_RMS…
4242 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_INM(x, mask)               \  argument
4243 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), mask) 
4244 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUT(x, val)                \  argument
4245 	out_dword( HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), val)
4246 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4249 …_masked_ns(HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_BASE_MSB…
4261 #define HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x)                          (x+0x00000354)  argument
4262 #define HWIO_REO_R0_REO2SW5_RING_ID_PHYS(x)                          (x+0x00000354)  argument
4265 #define HWIO_REO_R0_REO2SW5_RING_ID_IN(x)                            \  argument
4266 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW5_RING_ID_RMSK)
4267 #define HWIO_REO_R0_REO2SW5_RING_ID_INM(x, mask)                     \  argument
4268 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), mask) 
4269 #define HWIO_REO_R0_REO2SW5_RING_ID_OUT(x, val)                      \  argument
4270 	out_dword( HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), val)
4271 #define HWIO_REO_R0_REO2SW5_RING_ID_OUTM(x, mask, val)               \  argument
4274 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_ID_IN…
4286 #define HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x)                      (x+0x00000358)  argument
4287 #define HWIO_REO_R0_REO2SW5_RING_STATUS_PHYS(x)                      (x+0x00000358)  argument
4290 #define HWIO_REO_R0_REO2SW5_RING_STATUS_IN(x)                        \  argument
4291 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW5_RING_STATUS_RMSK)
4292 #define HWIO_REO_R0_REO2SW5_RING_STATUS_INM(x, mask)                 \  argument
4293 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), mask) 
4294 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUT(x, val)                  \  argument
4295 	out_dword( HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), val)
4296 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUTM(x, mask, val)           \  argument
4299 …ord_masked_ns(HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_STATUS_…
4311 #define HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x)                        (x+0x0000035c)  argument
4312 #define HWIO_REO_R0_REO2SW5_RING_MISC_PHYS(x)                        (x+0x0000035c)  argument
4315 #define HWIO_REO_R0_REO2SW5_RING_MISC_IN(x)                          \  argument
4316 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW5_RING_MISC_RMSK)
4317 #define HWIO_REO_R0_REO2SW5_RING_MISC_INM(x, mask)                   \  argument
4318 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), mask) 
4319 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUT(x, val)                    \  argument
4320 	out_dword( HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), val)
4321 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUTM(x, mask, val)             \  argument
4324 …_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_MISC_I…
4366 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000360)  argument
4367 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000360)  argument
4370 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_IN(x)                   \  argument
4371 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW5_RING_HP_ADDR_L…
4372 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4373 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), mask) 
4374 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4375 	out_dword( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), val)
4376 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4379 …ed_ns(HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LS…
4388 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000364)  argument
4389 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000364)  argument
4392 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_IN(x)                   \  argument
4393 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW5_RING_HP_ADDR_M…
4394 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4395 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), mask) 
4396 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4397 	out_dword( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), val)
4398 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4401 …ed_ns(HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MS…
4410 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000370)  argument
4411 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000370)  argument
4414 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4415 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW5_RING_PR…
4416 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4417 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4418 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4419 	out_dword( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4420 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4423 …_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_…
4438 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000374)  argument
4439 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000374)  argument
4442 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4443 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW5_RING_P…
4444 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4445 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4446 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4447 	out_dword( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4448 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4451 …EO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_S…
4466 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000378)  argument
4467 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000378)  argument
4470 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4471 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW5_RING…
4472 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4473 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4474 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4475 	out_dword( HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4476 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4479 …R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_C…
4488 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000394)  argument
4489 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000394)  argument
4492 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4493 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW5_RING_MSI1_BA…
4494 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4495 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4496 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4497 	out_dword( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), val)
4498 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4501 …ns(HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_L…
4510 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000398)  argument
4511 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000398)  argument
4514 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4515 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW5_RING_MSI1_BA…
4516 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4517 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4518 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4519 	out_dword( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), val)
4520 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4523 …ns(HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_M…
4535 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x)                   (x+0x0000039c)  argument
4536 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_PHYS(x)                   (x+0x0000039c)  argument
4539 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_IN(x)                     \  argument
4540 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_R…
4541 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_INM(x, mask)              \  argument
4542 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), mask) 
4543 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUT(x, val)               \  argument
4544 	out_dword( HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), val)
4545 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4548 …asked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_MSI1_DATA…
4557 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000003a0)  argument
4558 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000003a0)  argument
4561 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4562 …in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW5_RING_HP_TP…
4563 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4564 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4565 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4566 	out_dword( HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4567 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4570 …HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFF…
4579 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x)                    (x+0x000003a4)  argument
4580 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_PHYS(x)                    (x+0x000003a4)  argument
4583 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_IN(x)                      \  argument
4584 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW6_RING_BASE_LSB_RMS…
4585 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_INM(x, mask)               \  argument
4586 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), mask) 
4587 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUT(x, val)                \  argument
4588 	out_dword( HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), val)
4589 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4592 …_masked_ns(HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_BASE_LSB…
4601 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x)                    (x+0x000003a8)  argument
4602 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_PHYS(x)                    (x+0x000003a8)  argument
4605 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_IN(x)                      \  argument
4606 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW6_RING_BASE_MSB_RMS…
4607 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_INM(x, mask)               \  argument
4608 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), mask) 
4609 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUT(x, val)                \  argument
4610 	out_dword( HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), val)
4611 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4614 …_masked_ns(HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_BASE_MSB…
4626 #define HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x)                          (x+0x000003ac)  argument
4627 #define HWIO_REO_R0_REO2SW6_RING_ID_PHYS(x)                          (x+0x000003ac)  argument
4630 #define HWIO_REO_R0_REO2SW6_RING_ID_IN(x)                            \  argument
4631 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW6_RING_ID_RMSK)
4632 #define HWIO_REO_R0_REO2SW6_RING_ID_INM(x, mask)                     \  argument
4633 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), mask) 
4634 #define HWIO_REO_R0_REO2SW6_RING_ID_OUT(x, val)                      \  argument
4635 	out_dword( HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), val)
4636 #define HWIO_REO_R0_REO2SW6_RING_ID_OUTM(x, mask, val)               \  argument
4639 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_ID_IN…
4651 #define HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x)                      (x+0x000003b0)  argument
4652 #define HWIO_REO_R0_REO2SW6_RING_STATUS_PHYS(x)                      (x+0x000003b0)  argument
4655 #define HWIO_REO_R0_REO2SW6_RING_STATUS_IN(x)                        \  argument
4656 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW6_RING_STATUS_RMSK)
4657 #define HWIO_REO_R0_REO2SW6_RING_STATUS_INM(x, mask)                 \  argument
4658 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), mask) 
4659 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUT(x, val)                  \  argument
4660 	out_dword( HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), val)
4661 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUTM(x, mask, val)           \  argument
4664 …ord_masked_ns(HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_STATUS_…
4676 #define HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x)                        (x+0x000003b4)  argument
4677 #define HWIO_REO_R0_REO2SW6_RING_MISC_PHYS(x)                        (x+0x000003b4)  argument
4680 #define HWIO_REO_R0_REO2SW6_RING_MISC_IN(x)                          \  argument
4681 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW6_RING_MISC_RMSK)
4682 #define HWIO_REO_R0_REO2SW6_RING_MISC_INM(x, mask)                   \  argument
4683 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), mask) 
4684 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUT(x, val)                    \  argument
4685 	out_dword( HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), val)
4686 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUTM(x, mask, val)             \  argument
4689 …_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_MISC_I…
4731 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x000003b8)  argument
4732 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x000003b8)  argument
4735 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_IN(x)                   \  argument
4736 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW6_RING_HP_ADDR_L…
4737 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4738 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), mask) 
4739 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4740 	out_dword( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), val)
4741 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4744 …ed_ns(HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LS…
4753 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x000003bc)  argument
4754 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x000003bc)  argument
4757 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_IN(x)                   \  argument
4758 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW6_RING_HP_ADDR_M…
4759 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4760 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), mask) 
4761 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4762 	out_dword( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), val)
4763 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4766 …ed_ns(HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MS…
4775 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x000003c8)  argument
4776 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x000003c8)  argument
4779 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4780 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW6_RING_PR…
4781 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4782 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4783 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4784 	out_dword( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4785 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4788 …_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_…
4803 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x000003cc)  argument
4804 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x000003cc)  argument
4807 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4808 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW6_RING_P…
4809 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4810 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4811 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4812 	out_dword( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4813 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4816 …EO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_S…
4831 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x000003d0)  argument
4832 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x000003d0)  argument
4835 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4836 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW6_RING…
4837 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4838 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4839 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4840 	out_dword( HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4841 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4844 …R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_C…
4853 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000003ec)  argument
4854 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000003ec)  argument
4857 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4858 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW6_RING_MSI1_BA…
4859 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4860 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4861 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4862 	out_dword( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), val)
4863 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4866 …ns(HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_L…
4875 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000003f0)  argument
4876 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000003f0)  argument
4879 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4880 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW6_RING_MSI1_BA…
4881 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4882 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4883 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4884 	out_dword( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), val)
4885 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4888 …ns(HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_M…
4900 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x)                   (x+0x000003f4)  argument
4901 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_PHYS(x)                   (x+0x000003f4)  argument
4904 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_IN(x)                     \  argument
4905 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_R…
4906 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_INM(x, mask)              \  argument
4907 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), mask) 
4908 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUT(x, val)               \  argument
4909 	out_dword( HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), val)
4910 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4913 …asked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_MSI1_DATA…
4922 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000003f8)  argument
4923 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000003f8)  argument
4926 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4927 …in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW6_RING_HP_TP…
4928 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4929 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4930 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4931 	out_dword( HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4932 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4935 …HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFF…
4944 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x)                    (x+0x000003fc)  argument
4945 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x)                    (x+0x000003fc)  argument
4948 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x)                      \  argument
4949 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_BASE_LSB_RMS…
4950 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask)               \  argument
4951 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask) 
4952 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val)                \  argument
4953 	out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), val)
4954 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4957 …_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_BASE_LSB…
4966 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x)                    (x+0x00000400)  argument
4967 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x)                    (x+0x00000400)  argument
4970 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x)                      \  argument
4971 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_BASE_MSB_RMS…
4972 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask)               \  argument
4973 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask) 
4974 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val)                \  argument
4975 	out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), val)
4976 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4979 …_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_BASE_MSB…
4991 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x)                          (x+0x00000404)  argument
4992 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x)                          (x+0x00000404)  argument
4995 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x)                            \  argument
4996 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), HWIO_REO_R0_REO2TCL_RING_ID_RMSK)
4997 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask)                     \  argument
4998 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask) 
4999 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val)                      \  argument
5000 	out_dword( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), val)
5001 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val)               \  argument
5004 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
5016 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x)                      (x+0x00000408)  argument
5017 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x)                      (x+0x00000408)  argument
5020 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x)                        \  argument
5021 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2TCL_RING_STATUS_RMSK)
5022 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask)                 \  argument
5023 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask) 
5024 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val)                  \  argument
5025 	out_dword( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), val)
5026 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val)           \  argument
5029 …ord_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_STATUS_…
5041 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x)                        (x+0x0000040c)  argument
5042 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x)                        (x+0x0000040c)  argument
5045 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x)                          \  argument
5046 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MISC_RMSK)
5047 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask)                   \  argument
5048 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask) 
5049 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val)                    \  argument
5050 	out_dword( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), val)
5051 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val)             \  argument
5054 …_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MISC_I…
5096 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000410)  argument
5097 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000410)  argument
5100 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x)                   \  argument
5101 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_ADDR_L…
5102 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
5103 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask) 
5104 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
5105 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), val)
5106 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
5109 …ed_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LS…
5118 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000414)  argument
5119 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000414)  argument
5122 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x)                   \  argument
5123 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_ADDR_M…
5124 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
5125 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask) 
5126 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
5127 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), val)
5128 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
5131 …ed_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MS…
5140 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000420)  argument
5141 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000420)  argument
5144 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
5145 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2TCL_RING_PR…
5146 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
5147 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5148 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
5149 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5150 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5153 …_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_…
5168 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000424)  argument
5169 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000424)  argument
5172 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
5173 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2TCL_RING_P…
5174 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
5175 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5176 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
5177 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5178 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5181 …EO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_S…
5196 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000428)  argument
5197 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000428)  argument
5200 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
5201 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2TCL_RING…
5202 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
5203 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5204 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
5205 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5206 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5209 …R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_C…
5218 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000444)  argument
5219 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000444)  argument
5222 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x)                 \  argument
5223 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_BA…
5224 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
5225 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5226 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
5227 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), val)
5228 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
5231 …ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_L…
5240 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000448)  argument
5241 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000448)  argument
5244 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x)                 \  argument
5245 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_BA…
5246 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
5247 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5248 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
5249 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), val)
5250 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
5253 …ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_M…
5265 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x)                   (x+0x0000044c)  argument
5266 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x)                   (x+0x0000044c)  argument
5269 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x)                     \  argument
5270 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_R…
5271 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask)              \  argument
5272 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask) 
5273 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val)               \  argument
5274 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), val)
5275 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
5278 …asked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_DATA…
5287 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000450)  argument
5288 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000450)  argument
5291 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
5292 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_TP…
5293 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
5294 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5295 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
5296 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5297 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
5300 …HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFF…
5309 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x)                     (x+0x00000454)  argument
5310 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x)                     (x+0x00000454)  argument
5313 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x)                       \  argument
5314 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_BASE_LSB_RMSK)
5315 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask)                \  argument
5316 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask) 
5317 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val)                 \  argument
5318 	out_dword( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), val)
5319 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
5322 …d_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_BASE_LSB_…
5331 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x)                     (x+0x00000458)  argument
5332 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x)                     (x+0x00000458)  argument
5335 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x)                       \  argument
5336 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_BASE_MSB_RMSK)
5337 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask)                \  argument
5338 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask) 
5339 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val)                 \  argument
5340 	out_dword( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), val)
5341 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
5344 …d_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_BASE_MSB_…
5356 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x)                           (x+0x0000045c)  argument
5357 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x)                           (x+0x0000045c)  argument
5360 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x)                             \  argument
5361 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), HWIO_REO_R0_REO2FW_RING_ID_RMSK)
5362 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask)                      \  argument
5363 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask) 
5364 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val)                       \  argument
5365 	out_dword( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), val)
5366 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val)                \  argument
5369 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
5381 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x)                       (x+0x00000460)  argument
5382 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x)                       (x+0x00000460)  argument
5385 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x)                         \  argument
5386 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2FW_RING_STATUS_RMSK)
5387 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask)                  \  argument
5388 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask) 
5389 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val)                   \  argument
5390 	out_dword( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), val)
5391 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val)            \  argument
5394 …word_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STATUS_I…
5406 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x)                         (x+0x00000464)  argument
5407 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x)                         (x+0x00000464)  argument
5410 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x)                           \  argument
5411 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), HWIO_REO_R0_REO2FW_RING_MISC_RMSK)
5412 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask)                    \  argument
5413 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask) 
5414 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val)                     \  argument
5415 	out_dword( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), val)
5416 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val)              \  argument
5419 …t_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_IN…
5461 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x)                  (x+0x00000468)  argument
5462 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x)                  (x+0x00000468)  argument
5465 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x)                    \  argument
5466 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB…
5467 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask)             \  argument
5468 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 
5469 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val)              \  argument
5470 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), val)
5471 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val)       \  argument
5474 …sked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_ADDR_LS…
5483 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x)                  (x+0x0000046c)  argument
5484 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x)                  (x+0x0000046c)  argument
5487 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x)                    \  argument
5488 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB…
5489 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask)             \  argument
5490 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 
5491 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val)              \  argument
5492 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), val)
5493 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val)       \  argument
5496 …sked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_ADDR_MS…
5505 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x)           (x+0x00000478)  argument
5506 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x)           (x+0x00000478)  argument
5509 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x)             \  argument
5510 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2FW_RING_PROD…
5511 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask)      \  argument
5512 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5513 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val)       \  argument
5514 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5515 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5518 …O_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_S…
5533 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x)          (x+0x0000047c)  argument
5534 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x)          (x+0x0000047c)  argument
5537 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x)            \  argument
5538 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2FW_RING_PRO…
5539 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask)     \  argument
5540 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5541 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val)      \  argument
5542 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5543 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5546 …_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_S…
5561 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x)        (x+0x00000480)  argument
5562 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x)        (x+0x00000480)  argument
5565 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x)          \  argument
5566 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2FW_RING_P…
5567 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask)   \  argument
5568 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5569 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val)    \  argument
5570 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5571 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5574 …O_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_C…
5583 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x)                (x+0x0000049c)  argument
5584 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x)                (x+0x0000049c)  argument
5587 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x)                  \  argument
5588 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_BASE…
5589 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
5590 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5591 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val)            \  argument
5592 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), val)
5593 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
5596 …d_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_BASE_L…
5605 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x)                (x+0x000004a0)  argument
5606 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x)                (x+0x000004a0)  argument
5609 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x)                  \  argument
5610 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_BASE…
5611 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
5612 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5613 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val)            \  argument
5614 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), val)
5615 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
5618 …d_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_BASE_M…
5630 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x)                    (x+0x000004a4)  argument
5631 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x)                    (x+0x000004a4)  argument
5634 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x)                      \  argument
5635 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_DATA_RMS…
5636 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask)               \  argument
5637 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask) 
5638 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val)                \  argument
5639 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), val)
5640 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
5643 …_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_DATA…
5652 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x)              (x+0x000004a8)  argument
5653 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x)              (x+0x000004a8)  argument
5656 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x)                \  argument
5657 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_TP_S…
5658 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
5659 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5660 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val)          \  argument
5661 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5662 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
5665 …s(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFF…
5674 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x)                (x+0x000004ac)  argument
5675 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x)                (x+0x000004ac)  argument
5678 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x)                  \  argument
5679 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_BASE…
5680 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask)           \  argument
5681 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask) 
5682 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val)            \  argument
5683 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), val)
5684 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val)     \  argument
5687 …d_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_BASE_L…
5696 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x)                (x+0x000004b0)  argument
5697 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x)                (x+0x000004b0)  argument
5700 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x)                  \  argument
5701 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_BASE…
5702 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask)           \  argument
5703 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask) 
5704 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val)            \  argument
5705 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), val)
5706 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val)     \  argument
5709 …d_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_BASE_M…
5721 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x)                      (x+0x000004b4)  argument
5722 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x)                      (x+0x000004b4)  argument
5725 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x)                        \  argument
5726 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_ID_RMSK)
5727 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask)                 \  argument
5728 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask) 
5729 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val)                  \  argument
5730 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), val)
5731 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val)           \  argument
5734 …ord_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_ID_…
5746 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x)                  (x+0x000004b8)  argument
5747 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x)                  (x+0x000004b8)  argument
5750 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x)                    \  argument
5751 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_STATUS…
5752 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask)             \  argument
5753 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask) 
5754 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val)              \  argument
5755 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), val)
5756 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val)       \  argument
5759 …sked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_STATU…
5771 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x)                    (x+0x000004bc)  argument
5772 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x)                    (x+0x000004bc)  argument
5775 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x)                      \  argument
5776 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_MISC_RMS…
5777 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask)               \  argument
5778 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask) 
5779 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val)                \  argument
5780 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), val)
5781 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val)         \  argument
5784 …_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MISC…
5826 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x)             (x+0x000004c0)  argument
5827 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x)             (x+0x000004c0)  argument
5830 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x)               \  argument
5831 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_H…
5832 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask)        \  argument
5833 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask) 
5834 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val)         \  argument
5835 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), val)
5836 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val)  \  argument
5839 …HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_…
5848 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x)             (x+0x000004c4)  argument
5849 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x)             (x+0x000004c4)  argument
5852 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x)               \  argument
5853 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_H…
5854 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask)        \  argument
5855 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask) 
5856 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val)         \  argument
5857 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), val)
5858 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val)  \  argument
5861 …HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_…
5870 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x)      (x+0x000004d0)  argument
5871 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x)      (x+0x000004d0)  argument
5874 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x)        \  argument
5875 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO_RELEASE…
5876 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \  argument
5877 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5878 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val)  \  argument
5879 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5880 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5883 …0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_IN…
5898 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x)     (x+0x000004d4)  argument
5899 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x)     (x+0x000004d4)  argument
5902 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x)       \  argument
5903 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_RELEAS…
5904 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
5905 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5906 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \  argument
5907 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5908 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5911 …REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT…
5926 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x)   (x+0x000004d8)  argument
5927 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x)   (x+0x000004d8)  argument
5930 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x)     \  argument
5931 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO_RELE…
5932 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
5933 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5934 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \  argument
5935 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5936 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5939 …_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL…
5948 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x)           (x+0x000004f4)  argument
5949 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_PHYS(x)           (x+0x000004f4)  argument
5952 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_IN(x)             \  argument
5953 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING…
5954 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_INM(x, mask)      \  argument
5955 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5956 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUT(x, val)       \  argument
5957 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), val)
5958 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
5961 …O_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE…
5970 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x)           (x+0x000004f8)  argument
5971 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_PHYS(x)           (x+0x000004f8)  argument
5974 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_IN(x)             \  argument
5975 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING…
5976 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_INM(x, mask)      \  argument
5977 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5978 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUT(x, val)       \  argument
5979 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), val)
5980 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
5983 …O_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE…
5995 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x)               (x+0x000004fc)  argument
5996 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_PHYS(x)               (x+0x000004fc)  argument
5999 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_IN(x)                 \  argument
6000 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_MSI…
6001 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_INM(x, mask)          \  argument
6002 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask) 
6003 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUT(x, val)           \  argument
6004 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), val)
6005 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val)    \  argument
6008 …ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MSI1_DA…
6017 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x)         (x+0x00000500)  argument
6018 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x)         (x+0x00000500)  argument
6021 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x)           \  argument
6022 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_RELEASE_RI…
6023 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask)    \  argument
6024 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6025 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val)     \  argument
6026 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), val)
6027 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6030 …EO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_O…
6039 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x)                 (x+0x00000504)  argument
6040 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x)                 (x+0x00000504)  argument
6043 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x)                   \  argument
6044 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_BASE_L…
6045 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask)            \  argument
6046 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask) 
6047 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val)             \  argument
6048 	out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), val)
6049 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
6052 …ed_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_BASE_LS…
6061 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x)                 (x+0x00000508)  argument
6062 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x)                 (x+0x00000508)  argument
6065 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x)                   \  argument
6066 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_BASE_M…
6067 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask)            \  argument
6068 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask) 
6069 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val)             \  argument
6070 	out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), val)
6071 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
6074 …ed_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_BASE_MS…
6086 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x)                       (x+0x0000050c)  argument
6087 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x)                       (x+0x0000050c)  argument
6090 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x)                         \  argument
6091 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_ID_RMSK)
6092 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask)                  \  argument
6093 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask) 
6094 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val)                   \  argument
6095 	out_dword( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), val)
6096 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val)            \  argument
6099 …word_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_ID_I…
6111 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x)                   (x+0x00000510)  argument
6112 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x)                   (x+0x00000510)  argument
6115 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x)                     \  argument
6116 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_STATUS_R…
6117 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask)              \  argument
6118 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask) 
6119 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val)               \  argument
6120 	out_dword( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), val)
6121 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val)        \  argument
6124 …asked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_STATUS…
6136 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x)                     (x+0x00000514)  argument
6137 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x)                     (x+0x00000514)  argument
6140 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x)                       \  argument
6141 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_MISC_RMSK)
6142 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask)                \  argument
6143 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask) 
6144 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val)                 \  argument
6145 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), val)
6146 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val)          \  argument
6149 …d_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MISC_…
6191 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x)              (x+0x00000518)  argument
6192 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x)              (x+0x00000518)  argument
6195 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x)                \  argument
6196 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_HP_…
6197 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask)         \  argument
6198 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask) 
6199 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val)          \  argument
6200 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), val)
6201 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val)   \  argument
6204 …s(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_…
6213 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x)              (x+0x0000051c)  argument
6214 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x)              (x+0x0000051c)  argument
6217 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x)                \  argument
6218 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_HP_…
6219 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask)         \  argument
6220 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask) 
6221 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val)          \  argument
6222 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), val)
6223 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val)   \  argument
6226 …s(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_…
6235 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x)       (x+0x00000528)  argument
6236 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x)       (x+0x00000528)  argument
6239 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x)         \  argument
6240 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO_STATUS_R…
6241 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask)  \  argument
6242 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
6243 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val)   \  argument
6244 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), val)
6245 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
6248 …R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT…
6263 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x)      (x+0x0000052c)  argument
6264 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x)      (x+0x0000052c)  argument
6267 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x)        \  argument
6268 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_STATUS_…
6269 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
6270 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
6271 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val)  \  argument
6272 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), val)
6273 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
6276 …0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT…
6291 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x)    (x+0x00000530)  argument
6292 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x)    (x+0x00000530)  argument
6295 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x)      \  argument
6296 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO_STATU…
6297 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
6298 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
6299 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \  argument
6300 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
6301 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
6304 …EO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL…
6313 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000054c)  argument
6314 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000054c)  argument
6317 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x)              \  argument
6318 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_M…
6319 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
6320 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask) 
6321 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
6322 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), val)
6323 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
6326 …WIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE…
6335 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000550)  argument
6336 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000550)  argument
6339 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x)              \  argument
6340 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_M…
6341 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
6342 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask) 
6343 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
6344 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), val)
6345 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
6348 …WIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE…
6360 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x)                (x+0x00000554)  argument
6361 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x)                (x+0x00000554)  argument
6364 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x)                  \  argument
6365 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_MSI1_…
6366 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask)           \  argument
6367 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask) 
6368 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val)            \  argument
6369 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), val)
6370 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
6373 …d_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_DA…
6382 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000558)  argument
6383 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000558)  argument
6386 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
6387 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_STATUS_RING…
6388 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
6389 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6390 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
6391 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), val)
6392 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6395 …_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_O…
6404 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x)                         (x+0x0000055c)  argument
6405 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x)                         (x+0x0000055c)  argument
6408 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x)                           \  argument
6409 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), HWIO_REO_R0_WATCHDOG_TIMEOUT_RMSK)
6410 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask)                    \  argument
6411 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask) 
6412 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val)                     \  argument
6413 	out_dword( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), val)
6414 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val)              \  argument
6417 …t_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_IN…
6429 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x)              (x+0x00000560)  argument
6430 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x)              (x+0x00000560)  argument
6433 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x)                \  argument
6434 …in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), HWIO_REO_R0_INTERRUPT_DATA_CAPT…
6435 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask)         \  argument
6436 	in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask) 
6437 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val)          \  argument
6438 	out_dword( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), val)
6439 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val)   \  argument
6442 …s(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_I…
6451 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x)                     (x+0x00000564)  argument
6452 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x)                     (x+0x00000564)  argument
6455 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x)                       \  argument
6456 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_0_RMSK)
6457 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask)                \  argument
6458 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask) 
6459 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val)                 \  argument
6460 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), val)
6461 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val)          \  argument
6464 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_0_…
6473 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x)                     (x+0x00000568)  argument
6474 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x)                     (x+0x00000568)  argument
6477 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x)                       \  argument
6478 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_1_RMSK)
6479 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask)                \  argument
6480 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask) 
6481 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val)                 \  argument
6482 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), val)
6483 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val)          \  argument
6486 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_1_…
6495 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x)                     (x+0x0000056c)  argument
6496 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x)                     (x+0x0000056c)  argument
6499 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x)                       \  argument
6500 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_2_RMSK)
6501 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask)                \  argument
6502 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask) 
6503 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val)                 \  argument
6504 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), val)
6505 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val)          \  argument
6508 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_2_…
6517 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x)                     (x+0x00000570)  argument
6518 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x)                     (x+0x00000570)  argument
6521 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x)                       \  argument
6522 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_3_RMSK)
6523 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask)                \  argument
6524 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask) 
6525 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val)                 \  argument
6526 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), val)
6527 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val)          \  argument
6530 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_3_…
6539 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x)               (x+0x00000574)  argument
6540 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x)               (x+0x00000574)  argument
6543 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x)                 \  argument
6544 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6545 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask)          \  argument
6546 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask) 
6547 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val)           \  argument
6548 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), val)
6549 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6552 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6561 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x)               (x+0x00000578)  argument
6562 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x)               (x+0x00000578)  argument
6565 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x)                 \  argument
6566 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6567 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask)          \  argument
6568 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask) 
6569 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val)           \  argument
6570 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), val)
6571 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6574 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6583 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x)               (x+0x0000057c)  argument
6584 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x)               (x+0x0000057c)  argument
6587 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x)                 \  argument
6588 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6589 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask)          \  argument
6590 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask) 
6591 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val)           \  argument
6592 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), val)
6593 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6596 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6605 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x)               (x+0x00000580)  argument
6606 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x)               (x+0x00000580)  argument
6609 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x)                 \  argument
6610 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6611 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask)          \  argument
6612 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask) 
6613 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val)           \  argument
6614 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), val)
6615 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6618 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6627 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x)               (x+0x00000584)  argument
6628 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x)               (x+0x00000584)  argument
6631 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x)                 \  argument
6632 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6633 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask)          \  argument
6634 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask) 
6635 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val)           \  argument
6636 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), val)
6637 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6640 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6649 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x)               (x+0x00000588)  argument
6650 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x)               (x+0x00000588)  argument
6653 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x)                 \  argument
6654 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6655 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask)          \  argument
6656 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask) 
6657 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val)           \  argument
6658 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), val)
6659 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6662 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6671 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x)               (x+0x0000058c)  argument
6672 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x)               (x+0x0000058c)  argument
6675 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x)                 \  argument
6676 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6677 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask)          \  argument
6678 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask) 
6679 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val)           \  argument
6680 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), val)
6681 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6684 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6693 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x)               (x+0x00000590)  argument
6694 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x)               (x+0x00000590)  argument
6697 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x)                 \  argument
6698 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6699 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask)          \  argument
6700 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask) 
6701 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val)           \  argument
6702 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), val)
6703 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6706 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6715 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x)               (x+0x00000594)  argument
6716 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x)               (x+0x00000594)  argument
6719 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x)                 \  argument
6720 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6721 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask)          \  argument
6722 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask) 
6723 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val)           \  argument
6724 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), val)
6725 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6728 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6737 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x)               (x+0x00000598)  argument
6738 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x)               (x+0x00000598)  argument
6741 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x)                 \  argument
6742 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6743 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask)          \  argument
6744 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask) 
6745 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val)           \  argument
6746 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), val)
6747 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6750 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6759 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x)               (x+0x0000059c)  argument
6760 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x)               (x+0x0000059c)  argument
6763 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x)                 \  argument
6764 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6765 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask)          \  argument
6766 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask) 
6767 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val)           \  argument
6768 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), val)
6769 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6772 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6781 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x)               (x+0x000005a0)  argument
6782 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x)               (x+0x000005a0)  argument
6785 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x)                 \  argument
6786 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6787 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask)          \  argument
6788 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask) 
6789 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val)           \  argument
6790 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), val)
6791 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6794 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6803 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x)               (x+0x000005a4)  argument
6804 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x)               (x+0x000005a4)  argument
6807 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x)                 \  argument
6808 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6809 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask)          \  argument
6810 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask) 
6811 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val)           \  argument
6812 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), val)
6813 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6816 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6825 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x)               (x+0x000005a8)  argument
6826 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x)               (x+0x000005a8)  argument
6829 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x)                 \  argument
6830 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6831 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask)          \  argument
6832 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask) 
6833 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val)           \  argument
6834 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), val)
6835 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6838 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6847 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x)               (x+0x000005ac)  argument
6848 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x)               (x+0x000005ac)  argument
6851 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x)                 \  argument
6852 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6853 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask)          \  argument
6854 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask) 
6855 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val)           \  argument
6856 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), val)
6857 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6860 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6869 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x)               (x+0x000005b0)  argument
6870 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x)               (x+0x000005b0)  argument
6873 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x)                 \  argument
6874 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6875 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask)          \  argument
6876 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask) 
6877 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val)           \  argument
6878 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), val)
6879 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6882 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6891 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x)                    (x+0x000005b4)  argument
6892 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x)                    (x+0x000005b4)  argument
6895 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x)                      \  argument
6896 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_RMS…
6897 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask)               \  argument
6898 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask) 
6899 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val)                \  argument
6900 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), val)
6901 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val)         \  argument
6904 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_0…
6913 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x)                    (x+0x000005b8)  argument
6914 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x)                    (x+0x000005b8)  argument
6917 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x)                      \  argument
6918 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_RMS…
6919 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask)               \  argument
6920 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask) 
6921 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val)                \  argument
6922 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), val)
6923 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val)         \  argument
6926 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_1…
6935 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x)                    (x+0x000005bc)  argument
6936 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x)                    (x+0x000005bc)  argument
6939 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x)                      \  argument
6940 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_RMS…
6941 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask)               \  argument
6942 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask) 
6943 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val)                \  argument
6944 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), val)
6945 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val)         \  argument
6948 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_2…
6957 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x)                    (x+0x000005c0)  argument
6958 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x)                    (x+0x000005c0)  argument
6961 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x)                      \  argument
6962 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_RMS…
6963 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask)               \  argument
6964 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask) 
6965 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val)                \  argument
6966 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), val)
6967 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val)         \  argument
6970 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_3…
6979 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x)                     (x+0x000005c4)  argument
6980 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x)                     (x+0x000005c4)  argument
6983 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x)                       \  argument
6984 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_0_RMSK)
6985 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask)                \  argument
6986 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask) 
6987 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val)                 \  argument
6988 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), val)
6989 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val)          \  argument
6992 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_0_…
7001 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x)                     (x+0x000005c8)  argument
7002 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x)                     (x+0x000005c8)  argument
7005 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x)                       \  argument
7006 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_1_RMSK)
7007 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask)                \  argument
7008 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask) 
7009 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val)                 \  argument
7010 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), val)
7011 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val)          \  argument
7014 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_1_…
7023 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x)                     (x+0x000005cc)  argument
7024 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x)                     (x+0x000005cc)  argument
7027 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x)                       \  argument
7028 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_2_RMSK)
7029 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask)                \  argument
7030 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask) 
7031 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val)                 \  argument
7032 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), val)
7033 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val)          \  argument
7036 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_2_…
7045 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x)                     (x+0x000005d0)  argument
7046 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x)                     (x+0x000005d0)  argument
7049 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x)                       \  argument
7050 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_3_RMSK)
7051 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask)                \  argument
7052 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask) 
7053 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val)                 \  argument
7054 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), val)
7055 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val)          \  argument
7058 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_3_…
7067 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x)                            (x+0x000005d4)  argument
7068 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x)                            (x+0x000005d4)  argument
7071 #define HWIO_REO_R0_AGING_CONTROL_IN(x)                              \  argument
7072 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), HWIO_REO_R0_AGING_CONTROL_RMSK)
7073 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask)                       \  argument
7074 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask) 
7075 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val)                        \  argument
7076 	out_dword( HWIO_REO_R0_AGING_CONTROL_ADDR(x), val)
7077 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val)                 \  argument
7080 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
7089 #define HWIO_REO_R0_MISC_CTL_ADDR(x)                                 (x+0x000005d8)  argument
7090 #define HWIO_REO_R0_MISC_CTL_PHYS(x)                                 (x+0x000005d8)  argument
7093 #define HWIO_REO_R0_MISC_CTL_IN(x)                                   \  argument
7094 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), HWIO_REO_R0_MISC_CTL_RMSK)
7095 #define HWIO_REO_R0_MISC_CTL_INM(x, mask)                            \  argument
7096 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), mask) 
7097 #define HWIO_REO_R0_MISC_CTL_OUT(x, val)                             \  argument
7098 	out_dword( HWIO_REO_R0_MISC_CTL_ADDR(x), val)
7099 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val)                      \  argument
7102 		out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
7120 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x)                    (x+0x000005dc)  argument
7121 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x)                    (x+0x000005dc)  argument
7124 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x)                      \  argument
7125 …in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_RMS…
7126 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask)               \  argument
7127 	in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask) 
7128 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val)                \  argument
7129 	out_dword( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), val)
7130 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val)         \  argument
7133 …_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_THRESHOLD…
7142 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x)                     (x+0x000005e0)  argument
7143 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x)                     (x+0x000005e0)  argument
7146 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x)                       \  argument
7147 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_0_RMSK)
7148 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask)                \  argument
7149 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask) 
7150 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val)                 \  argument
7151 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), val)
7152 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val)          \  argument
7155 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_0_…
7164 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x)                     (x+0x000005e4)  argument
7165 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x)                     (x+0x000005e4)  argument
7168 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x)                       \  argument
7169 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_1_RMSK)
7170 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask)                \  argument
7171 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask) 
7172 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val)                 \  argument
7173 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), val)
7174 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val)          \  argument
7177 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_1_…
7186 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x)                     (x+0x000005e8)  argument
7187 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x)                     (x+0x000005e8)  argument
7190 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x)                       \  argument
7191 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_2_RMSK)
7192 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask)                \  argument
7193 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask) 
7194 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val)                 \  argument
7195 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), val)
7196 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val)          \  argument
7199 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_2_…
7208 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x)                     (x+0x000005ec)  argument
7209 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x)                     (x+0x000005ec)  argument
7212 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x)                       \  argument
7213 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_3_RMSK)
7214 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask)                \  argument
7215 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask) 
7216 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val)                 \  argument
7217 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), val)
7218 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val)          \  argument
7221 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_3_…
7230 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x)       (x+0x000005f0)  argument
7231 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x)       (x+0x000005f0)  argument
7234 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x)         \  argument
7235 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
7236 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask)  \  argument
7237 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask) 
7238 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val)   \  argument
7239 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), val)
7240 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \  argument
7243 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7252 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x)       (x+0x000005f4)  argument
7253 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x)       (x+0x000005f4)  argument
7256 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x)         \  argument
7257 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
7258 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask)  \  argument
7259 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask) 
7260 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val)   \  argument
7261 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), val)
7262 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \  argument
7265 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7274 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x)       (x+0x000005f8)  argument
7275 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x)       (x+0x000005f8)  argument
7278 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x)         \  argument
7279 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
7280 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask)  \  argument
7281 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask) 
7282 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val)   \  argument
7283 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), val)
7284 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \  argument
7287 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7296 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x)      (x+0x000005fc)  argument
7297 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x)      (x+0x000005fc)  argument
7300 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x)        \  argument
7301 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), HWIO_REO_R0_GLOBAL_LINK…
7302 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \  argument
7303 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask) 
7304 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val)  \  argument
7305 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), val)
7306 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \  argument
7309 …0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7318 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x)              (x+0x00000600)  argument
7319 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x)              (x+0x00000600)  argument
7322 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x)                \  argument
7323 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7324 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask)         \  argument
7325 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask) 
7326 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val)          \  argument
7327 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), val)
7328 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val)   \  argument
7331 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
7340 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x)              (x+0x00000604)  argument
7341 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x)              (x+0x00000604)  argument
7344 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x)                \  argument
7345 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7346 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask)         \  argument
7347 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask) 
7348 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val)          \  argument
7349 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), val)
7350 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val)   \  argument
7353 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
7362 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x)              (x+0x00000608)  argument
7363 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x)              (x+0x00000608)  argument
7366 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x)                \  argument
7367 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7368 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask)         \  argument
7369 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask) 
7370 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val)          \  argument
7371 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), val)
7372 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val)   \  argument
7375 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
7384 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x)              (x+0x0000060c)  argument
7385 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x)              (x+0x0000060c)  argument
7388 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x)                \  argument
7389 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7390 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask)         \  argument
7391 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask) 
7392 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val)          \  argument
7393 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), val)
7394 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val)   \  argument
7397 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_C…
7406 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x)            (x+0x00000610)  argument
7407 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x)            (x+0x00000610)  argument
7410 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x)              \  argument
7411 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7412 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask)       \  argument
7413 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask) 
7414 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val)        \  argument
7415 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), val)
7416 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \  argument
7419 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7428 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x)            (x+0x00000614)  argument
7429 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x)            (x+0x00000614)  argument
7432 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x)              \  argument
7433 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7434 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask)       \  argument
7435 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask) 
7436 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val)        \  argument
7437 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), val)
7438 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \  argument
7441 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7450 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x)            (x+0x00000618)  argument
7451 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x)            (x+0x00000618)  argument
7454 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x)              \  argument
7455 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7456 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask)       \  argument
7457 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask) 
7458 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val)        \  argument
7459 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), val)
7460 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \  argument
7463 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7472 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x)            (x+0x0000061c)  argument
7473 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x)            (x+0x0000061c)  argument
7476 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x)              \  argument
7477 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7478 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask)       \  argument
7479 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask) 
7480 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val)        \  argument
7481 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), val)
7482 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \  argument
7485 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7494 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x)            (x+0x00000620)  argument
7495 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x)            (x+0x00000620)  argument
7498 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x)              \  argument
7499 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7500 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask)       \  argument
7501 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask) 
7502 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val)        \  argument
7503 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), val)
7504 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \  argument
7507 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7516 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x)            (x+0x00000624)  argument
7517 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x)            (x+0x00000624)  argument
7520 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x)              \  argument
7521 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7522 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask)       \  argument
7523 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask) 
7524 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val)        \  argument
7525 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), val)
7526 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \  argument
7529 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7538 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x)            (x+0x00000628)  argument
7539 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x)            (x+0x00000628)  argument
7542 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x)              \  argument
7543 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7544 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask)       \  argument
7545 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask) 
7546 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val)        \  argument
7547 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), val)
7548 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \  argument
7551 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7560 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x)            (x+0x0000062c)  argument
7561 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x)            (x+0x0000062c)  argument
7564 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x)              \  argument
7565 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7566 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask)       \  argument
7567 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask) 
7568 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val)        \  argument
7569 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), val)
7570 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \  argument
7573 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7582 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x)                    (x+0x00000630)  argument
7583 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x)                    (x+0x00000630)  argument
7586 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x)                      \  argument
7587 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_RMS…
7588 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask)               \  argument
7589 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask) 
7590 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val)                \  argument
7591 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), val)
7592 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val)         \  argument
7595 …_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO…
7607 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x00000634)  argument
7608 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x00000634)  argument
7611 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7612 …in_dword_masked ( HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2SW1_MSDU…
7613 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7614 	in_dword_masked ( HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7615 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7616 	out_dword( HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7617 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7620 …R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_…
7632 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x00000638)  argument
7633 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x00000638)  argument
7636 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7637 …in_dword_masked ( HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2SW2_MSDU…
7638 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7639 	in_dword_masked ( HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7640 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7641 	out_dword( HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7642 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7645 …R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_…
7657 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x0000063c)  argument
7658 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x0000063c)  argument
7661 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7662 …in_dword_masked ( HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2SW3_MSDU…
7663 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7664 	in_dword_masked ( HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7665 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7666 	out_dword( HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7667 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7670 …R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_…
7682 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x00000640)  argument
7683 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x00000640)  argument
7686 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7687 …in_dword_masked ( HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2SW4_MSDU…
7688 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7689 	in_dword_masked ( HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7690 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7691 	out_dword( HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7692 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7695 …R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_…
7707 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x00000644)  argument
7708 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x00000644)  argument
7711 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7712 …in_dword_masked ( HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2SW5_MSDU…
7713 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7714 	in_dword_masked ( HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7715 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7716 	out_dword( HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7717 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7720 …R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_…
7732 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x00000648)  argument
7733 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x00000648)  argument
7736 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7737 …in_dword_masked ( HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2SW6_MSDU…
7738 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7739 	in_dword_masked ( HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7740 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7741 	out_dword( HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7742 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7745 …R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_…
7757 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)        (x+0x0000064c)  argument
7758 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)        (x+0x0000064c)  argument
7761 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_IN(x)          \  argument
7762 …in_dword_masked ( HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2FW_MSDU_H…
7763 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)   \  argument
7764 	in_dword_masked ( HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7765 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)    \  argument
7766 	out_dword( HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7767 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7770 …O_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_…
7782 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x)       (x+0x00000650)  argument
7783 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x)       (x+0x00000650)  argument
7786 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_IN(x)         \  argument
7787 …in_dword_masked ( HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), HWIO_REO_R0_REO2TCL_MSDU…
7788 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7789 	in_dword_masked ( HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7790 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val)   \  argument
7791 	out_dword( HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7792 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7795 …R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_…
7807 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x)                        (x+0x00000654)  argument
7808 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x)                        (x+0x00000654)  argument
7811 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x)                          \  argument
7812 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_REO_R0_GXI_TESTBUS_LOWER_RMSK)
7813 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask)                   \  argument
7814 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 
7815 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val)                    \  argument
7816 	out_dword( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), val)
7817 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val)             \  argument
7820 …_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWER_I…
7829 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x)                        (x+0x00000658)  argument
7830 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x)                        (x+0x00000658)  argument
7833 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x)                          \  argument
7834 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_REO_R0_GXI_TESTBUS_UPPER_RMSK)
7835 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask)                   \  argument
7836 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 
7837 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val)                    \  argument
7838 	out_dword( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), val)
7839 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val)             \  argument
7842 …_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPER_I…
7851 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x)                       (x+0x0000065c)  argument
7852 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x)                       (x+0x0000065c)  argument
7855 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x)                         \  argument
7856 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_REO_R0_GXI_SM_STATES_IX_0_RMSK)
7857 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask)                  \  argument
7858 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 
7859 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val)                   \  argument
7860 	out_dword( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), val)
7861 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val)            \  argument
7864 …word_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_IX_0_I…
7879 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x)                    (x+0x00000660)  argument
7880 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x)                    (x+0x00000660)  argument
7883 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x)                      \  argument
7884 …in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R0_GXI_END_OF_TEST_CHECK_RMS…
7885 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask)               \  argument
7886 	in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 
7887 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val)                \  argument
7888 	out_dword( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val)
7889 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val)         \  argument
7892 …_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_TEST_CHECK…
7901 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x)                   (x+0x00000664)  argument
7902 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x)                   (x+0x00000664)  argument
7905 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x)                     \  argument
7906 …in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_R…
7907 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask)              \  argument
7908 	in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 
7909 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val)               \  argument
7910 	out_dword( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val)
7911 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val)        \  argument
7914 …asked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE…
7959 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x)                         (x+0x00000668)  argument
7960 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x)                         (x+0x00000668)  argument
7963 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x)                           \  argument
7964 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_REO_R0_GXI_GXI_ERR_INTS_RMSK)
7965 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask)                    \  argument
7966 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 
7967 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val)                     \  argument
7968 	out_dword( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), val)
7969 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val)              \  argument
7972 …t_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_IN…
7990 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x)                        (x+0x0000066c)  argument
7991 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x)                        (x+0x0000066c)  argument
7994 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x)                          \  argument
7995 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_REO_R0_GXI_GXI_ERR_STATS_RMSK)
7996 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask)                   \  argument
7997 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 
7998 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val)                    \  argument
7999 	out_dword( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), val)
8000 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val)             \  argument
8003 …_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STATS_I…
8018 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x)                  (x+0x00000670)  argument
8019 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x)                  (x+0x00000670)  argument
8022 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)                    \  argument
8023 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL…
8024 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask)             \  argument
8025 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 
8026 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val)              \  argument
8027 	out_dword( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val)
8028 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val)       \  argument
8031 …sked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DEFAULT_CONTRO…
8049 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x)                  (x+0x00000674)  argument
8050 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x)                  (x+0x00000674)  argument
8053 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x)                    \  argument
8054 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL…
8055 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask)             \  argument
8056 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 
8057 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val)              \  argument
8058 	out_dword( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val)
8059 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val)       \  argument
8062 …sked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_REDUCED_CONTRO…
8080 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x)                     (x+0x00000678)  argument
8081 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x)                     (x+0x00000678)  argument
8084 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x)                       \  argument
8085 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_MISC_CONTROL_RMSK)
8086 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask)                \  argument
8087 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 
8088 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val)                 \  argument
8089 	out_dword( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val)
8090 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val)          \  argument
8093 …d_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_CONTROL_…
8129 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x)                     (x+0x0000067c)  argument
8130 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x)                     (x+0x0000067c)  argument
8133 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x)                       \  argument
8134 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_RMSK)
8135 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask)                \  argument
8136 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 
8137 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val)                 \  argument
8138 	out_dword( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val)
8139 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val)          \  argument
8142 …d_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_…
8154 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x)                      (x+0x00000680)  argument
8155 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x)                      (x+0x00000680)  argument
8158 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x)                        \  argument
8159 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_REO_R0_GXI_GXI_WDOG_STATUS_RMSK)
8160 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask)                 \  argument
8161 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 
8162 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val)                  \  argument
8163 	out_dword( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val)
8164 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val)           \  argument
8167 …ord_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_STATUS_…
8176 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x)                    (x+0x00000684)  argument
8177 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x)                    (x+0x00000684)  argument
8180 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x)                      \  argument
8181 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_RMS…
8182 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask)               \  argument
8183 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 
8184 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val)                \  argument
8185 	out_dword( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val)
8186 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val)         \  argument
8189 …_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS…
8201 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x)                  (x+0x00000688)  argument
8202 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x)                  (x+0x00000688)  argument
8205 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)                    \  argument
8206 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL…
8207 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask)             \  argument
8208 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 
8209 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val)              \  argument
8210 	out_dword( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val)
8211 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
8214 …sked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTR…
8229 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x)                  (x+0x0000068c)  argument
8230 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x)                  (x+0x0000068c)  argument
8233 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)                    \  argument
8234 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL…
8235 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask)             \  argument
8236 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 
8237 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val)              \  argument
8238 	out_dword( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val)
8239 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
8242 …sked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTR…
8257 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x)        (x+0x00000690)  argument
8258 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x)        (x+0x00000690)  argument
8261 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)          \  argument
8262 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_ER…
8263 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
8264 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
8265 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val)    \  argument
8266 	out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
8267 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
8270 …O_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABL…
8279 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x)        (x+0x00000694)  argument
8280 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x)        (x+0x00000694)  argument
8283 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)          \  argument
8284 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_ER…
8285 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
8286 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
8287 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val)    \  argument
8288 	out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
8289 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
8292 …O_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABL…
8301 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x)        (x+0x00000698)  argument
8302 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x)        (x+0x00000698)  argument
8305 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)          \  argument
8306 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_ER…
8307 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
8308 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
8309 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val)    \  argument
8310 	out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
8311 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
8314 …O_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABL…
8323 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x)        (x+0x0000069c)  argument
8324 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x)        (x+0x0000069c)  argument
8327 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)          \  argument
8328 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_ER…
8329 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
8330 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
8331 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val)    \  argument
8332 	out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
8333 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
8336 …O_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABL…
8345 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x)               (x+0x000006a0)  argument
8346 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x)               (x+0x000006a0)  argument
8349 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x)                 \  argument
8350 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), HWIO_REO_R0_GXI_GXI_AXI_OUTSANDI…
8351 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask)          \  argument
8352 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 
8353 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val)           \  argument
8354 	out_dword( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val)
8355 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val)    \  argument
8358 …ns(HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_C…
8376 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x)                         (x+0x000006a4)  argument
8377 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x)                         (x+0x000006a4)  argument
8380 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x)                           \  argument
8381 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONFIG_RMSK)
8382 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask)                    \  argument
8383 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask) 
8384 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val)                     \  argument
8385 	out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), val)
8386 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val)              \  argument
8389 …t_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_IN…
8425 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x)                        (x+0x000006a8)  argument
8426 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x)                        (x+0x000006a8)  argument
8429 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x)                          \  argument
8430 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONTROL_RMSK)
8431 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask)                   \  argument
8432 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask) 
8433 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val)                    \  argument
8434 	out_dword( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), val)
8435 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val)             \  argument
8438 …_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTROL_I…
8450 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x)                     (x+0x000006ac)  argument
8451 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_PHYS(x)                     (x+0x000006ac)  argument
8454 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_IN(x)                       \  argument
8455 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONFIG_SET_RMSK)
8456 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask)                \  argument
8457 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask) 
8458 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val)                 \  argument
8459 	out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), val)
8460 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val)          \  argument
8463 …d_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_SET_…
8472 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x)                       (x+0x000006b0)  argument
8473 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_PHYS(x)                       (x+0x000006b0)  argument
8476 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_IN(x)                         \  argument
8477 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), HWIO_REO_R0_CACHE_CTL_SET_SIZE_RMSK)
8478 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask)                  \  argument
8479 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask) 
8480 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val)                   \  argument
8481 	out_dword( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), val)
8482 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val)            \  argument
8485 …word_masked_ns(HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_SET_SIZE_I…
8494 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x)                            (x+0x000006b4)  argument
8495 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x)                            (x+0x000006b4)  argument
8498 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x)                              \  argument
8499 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), HWIO_REO_R0_CLK_GATE_CTRL_RMSK)
8500 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask)                       \  argument
8501 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask) 
8502 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val)                        \  argument
8503 	out_dword( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), val)
8504 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val)                 \  argument
8507 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
8543 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x)                           (x+0x000006b8)  argument
8544 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x)                           (x+0x000006b8)  argument
8547 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x)                             \  argument
8548 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_0_RMSK)
8549 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask)                      \  argument
8550 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask) 
8551 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val)                       \  argument
8552 	out_dword( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), val)
8553 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val)                \  argument
8556 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
8565 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x)                           (x+0x000006bc)  argument
8566 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x)                           (x+0x000006bc)  argument
8569 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x)                             \  argument
8570 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_1_RMSK)
8571 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask)                      \  argument
8572 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask) 
8573 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val)                       \  argument
8574 	out_dword( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), val)
8575 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val)                \  argument
8578 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
8587 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x)                           (x+0x000006c0)  argument
8588 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x)                           (x+0x000006c0)  argument
8591 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x)                             \  argument
8592 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_2_RMSK)
8593 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask)                      \  argument
8594 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask) 
8595 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val)                       \  argument
8596 	out_dword( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), val)
8597 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val)                \  argument
8600 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
8609 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x)                           (x+0x000006c4)  argument
8610 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x)                           (x+0x000006c4)  argument
8613 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x)                             \  argument
8614 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_3_RMSK)
8615 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask)                      \  argument
8616 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask) 
8617 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val)                       \  argument
8618 	out_dword( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), val)
8619 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val)                \  argument
8622 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
8631 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x)                          (x+0x00002000)  argument
8632 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x)                          (x+0x00002000)  argument
8635 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x)                            \  argument
8636 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), HWIO_REO_R1_MISC_DEBUG_CTRL_RMSK)
8637 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask)                     \  argument
8638 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask) 
8639 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val)                      \  argument
8640 	out_dword( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), val)
8641 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val)               \  argument
8644 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
8665 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x)                     (x+0x00002004)  argument
8666 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x)                     (x+0x00002004)  argument
8669 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x)                       \  argument
8670 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_RMSK)
8671 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask)                \  argument
8672 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask) 
8673 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val)                 \  argument
8674 	out_dword( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), val)
8675 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val)          \  argument
8678 …d_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_…
8690 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x)                  (x+0x00002008)  argument
8691 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x)                  (x+0x00002008)  argument
8694 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x)                    \  argument
8695 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL…
8696 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask)             \  argument
8697 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask) 
8698 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val)              \  argument
8699 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), val)
8700 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val)       \  argument
8703 …sked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_CONTRO…
8721 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x)                (x+0x0000200c)  argument
8722 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x)                (x+0x0000200c)  argument
8725 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x)                  \  argument
8726 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_C…
8727 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask)           \  argument
8728 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask) 
8729 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val)            \  argument
8730 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), val)
8731 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val)     \  argument
8734 …d_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COU…
8743 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x)               (x+0x00002010)  argument
8744 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x)               (x+0x00002010)  argument
8747 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x)                 \  argument
8748 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_MISS…
8749 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask)          \  argument
8750 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask) 
8751 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val)           \  argument
8752 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), val)
8753 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val)    \  argument
8756 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COU…
8765 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x)            (x+0x00002014)  argument
8766 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x)            (x+0x00002014)  argument
8769 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x)              \  argument
8770 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_T…
8771 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask)       \  argument
8772 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask) 
8773 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val)        \  argument
8774 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), val)
8775 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \  argument
8778 …WIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE…
8787 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x)           (x+0x00002018)  argument
8788 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x)           (x+0x00002018)  argument
8791 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x)             \  argument
8792 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_…
8793 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask)      \  argument
8794 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask) 
8795 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val)       \  argument
8796 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), val)
8797 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \  argument
8800 …O_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_…
8809 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x)                      (x+0x0000201c)  argument
8810 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x)                      (x+0x0000201c)  argument
8813 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x)                        \  argument
8814 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_STM_RMSK)
8815 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask)                 \  argument
8816 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask) 
8817 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val)                  \  argument
8818 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), val)
8819 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val)           \  argument
8822 …ord_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_STM_…
8831 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x)                (x+0x00002020)  argument
8832 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x)                (x+0x00002020)  argument
8835 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x)                  \  argument
8836 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_…
8837 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask)           \  argument
8838 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask) 
8839 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val)            \  argument
8840 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), val)
8841 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val)     \  argument
8844 …d_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LI…
8856 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x)               (x+0x00002024)  argument
8857 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_PHYS(x)               (x+0x00002024)  argument
8860 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_IN(x)                 \  argument
8861 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
8862 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask)          \  argument
8863 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask) 
8864 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val)           \  argument
8865 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), val)
8866 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val)    \  argument
8869 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
8881 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x)               (x+0x00002028)  argument
8882 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_PHYS(x)               (x+0x00002028)  argument
8885 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_IN(x)                 \  argument
8886 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
8887 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask)          \  argument
8888 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask) 
8889 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val)           \  argument
8890 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), val)
8891 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val)    \  argument
8894 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
8906 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x)               (x+0x0000202c)  argument
8907 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_PHYS(x)               (x+0x0000202c)  argument
8910 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_IN(x)                 \  argument
8911 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
8912 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask)          \  argument
8913 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask) 
8914 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val)           \  argument
8915 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), val)
8916 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val)    \  argument
8919 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
8931 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x)          (x+0x00002030)  argument
8932 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_PHYS(x)          (x+0x00002030)  argument
8935 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_IN(x)            \  argument
8936 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG…
8937 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask)     \  argument
8938 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask) 
8939 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val)      \  argument
8940 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), val)
8941 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \  argument
8944 …_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INF…
8953 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x)         (x+0x00002034)  argument
8954 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_PHYS(x)         (x+0x00002034)  argument
8957 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_IN(x)           \  argument
8958 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBU…
8959 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask)    \  argument
8960 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask) 
8961 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val)     \  argument
8962 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), val)
8963 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \  argument
8966 …EO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO…
8975 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x)       (x+0x00002038)  argument
8976 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_PHYS(x)       (x+0x00002038)  argument
8979 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_IN(x)         \  argument
8980 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), HWIO_REO_R1_CACHE_CTL_DE…
8981 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask)  \  argument
8982 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask) 
8983 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val)   \  argument
8984 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), val)
8985 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \  argument
8988 …R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_C…
9000 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x)              (x+0x0000203c)  argument
9001 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x)              (x+0x0000203c)  argument
9004 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x)                \  argument
9005 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R1_CACHE_CTL_END_OF_TE…
9006 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask)         \  argument
9007 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask) 
9008 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val)          \  argument
9009 	out_dword( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), val)
9010 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val)   \  argument
9013 …s(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CH…
9022 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x)            (x+0x00002040)  argument
9023 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_PHYS(x)            (x+0x00002040)  argument
9026 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_IN(x)              \  argument
9027 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_F…
9028 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_INM(x, mask)       \  argument
9029 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask) 
9030 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUT(x, val)        \  argument
9031 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), val)
9032 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \  argument
9035 …WIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CON…
9053 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x)            (x+0x00002044)  argument
9054 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_PHYS(x)            (x+0x00002044)  argument
9057 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_IN(x)              \  argument
9058 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_F…
9059 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_INM(x, mask)       \  argument
9060 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask) 
9061 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUT(x, val)        \  argument
9062 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), val)
9063 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \  argument
9066 …WIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CON…
9075 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x)            (x+0x00002048)  argument
9076 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_PHYS(x)            (x+0x00002048)  argument
9079 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_IN(x)              \  argument
9080 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_F…
9081 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_INM(x, mask)       \  argument
9082 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask) 
9083 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUT(x, val)        \  argument
9084 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), val)
9085 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \  argument
9088 …WIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CON…
9097 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x)             (x+0x0000204c)  argument
9098 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_PHYS(x)             (x+0x0000204c)  argument
9101 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_IN(x)               \  argument
9102 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_FL…
9103 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_INM(x, mask)        \  argument
9104 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask) 
9105 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUT(x, val)         \  argument
9106 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), val)
9107 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val)  \  argument
9110 …HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STA…
9140 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x)                        (x+0x00002050)  argument
9141 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x)                        (x+0x00002050)  argument
9144 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x)                          \  argument
9145 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R1_END_OF_TEST_CHECK_RMSK)
9146 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask)                   \  argument
9147 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask) 
9148 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val)                    \  argument
9149 	out_dword( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), val)
9150 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val)             \  argument
9153 …_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHECK_I…
9162 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x)                              (x+0x00002054)  argument
9163 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x)                              (x+0x00002054)  argument
9166 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x)                                \  argument
9167 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), HWIO_REO_R1_SM_ALL_IDLE_RMSK)
9168 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask)                         \  argument
9169 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask) 
9170 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val)                          \  argument
9171 	out_dword( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), val)
9172 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val)                   \  argument
9175 		out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
9190 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x)                             (x+0x00002058)  argument
9191 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x)                             (x+0x00002058)  argument
9194 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x)                               \  argument
9195 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), HWIO_REO_R1_TESTBUS_CTRL_RMSK)
9196 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask)                        \  argument
9197 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask) 
9198 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val)                         \  argument
9199 	out_dword( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), val)
9200 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val)                  \  argument
9203 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
9212 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x)                            (x+0x0000205c)  argument
9213 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x)                            (x+0x0000205c)  argument
9216 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x)                              \  argument
9217 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), HWIO_REO_R1_TESTBUS_LOWER_RMSK)
9218 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask)                       \  argument
9219 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask) 
9220 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val)                        \  argument
9221 	out_dword( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), val)
9222 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val)                 \  argument
9225 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
9234 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x)                           (x+0x00002060)  argument
9235 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x)                           (x+0x00002060)  argument
9238 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x)                             \  argument
9239 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), HWIO_REO_R1_TESTBUS_HIGHER_RMSK)
9240 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask)                      \  argument
9241 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask) 
9242 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val)                       \  argument
9243 	out_dword( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), val)
9244 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val)                \  argument
9247 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
9256 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x)                           (x+0x00002064)  argument
9257 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x)                           (x+0x00002064)  argument
9260 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x)                             \  argument
9261 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), HWIO_REO_R1_SM_STATES_IX_0_RMSK)
9262 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask)                      \  argument
9263 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask) 
9264 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val)                       \  argument
9265 	out_dword( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), val)
9266 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val)                \  argument
9269 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
9278 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x)                           (x+0x00002068)  argument
9279 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x)                           (x+0x00002068)  argument
9282 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x)                             \  argument
9283 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), HWIO_REO_R1_SM_STATES_IX_1_RMSK)
9284 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask)                      \  argument
9285 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask) 
9286 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val)                       \  argument
9287 	out_dword( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), val)
9288 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val)                \  argument
9291 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
9300 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x)                           (x+0x0000206c)  argument
9301 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x)                           (x+0x0000206c)  argument
9304 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x)                             \  argument
9305 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), HWIO_REO_R1_SM_STATES_IX_2_RMSK)
9306 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask)                      \  argument
9307 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask) 
9308 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val)                       \  argument
9309 	out_dword( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), val)
9310 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val)                \  argument
9313 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
9322 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x)                           (x+0x00002070)  argument
9323 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x)                           (x+0x00002070)  argument
9326 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x)                             \  argument
9327 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), HWIO_REO_R1_SM_STATES_IX_3_RMSK)
9328 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask)                      \  argument
9329 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask) 
9330 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val)                       \  argument
9331 	out_dword( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), val)
9332 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val)                \  argument
9335 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
9344 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x)                           (x+0x00002074)  argument
9345 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x)                           (x+0x00002074)  argument
9348 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x)                             \  argument
9349 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), HWIO_REO_R1_SM_STATES_IX_4_RMSK)
9350 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask)                      \  argument
9351 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask) 
9352 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val)                       \  argument
9353 	out_dword( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), val)
9354 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val)                \  argument
9357 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
9366 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x)                           (x+0x00002078)  argument
9367 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x)                           (x+0x00002078)  argument
9370 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x)                             \  argument
9371 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), HWIO_REO_R1_SM_STATES_IX_5_RMSK)
9372 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask)                      \  argument
9373 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask) 
9374 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val)                       \  argument
9375 	out_dword( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), val)
9376 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val)                \  argument
9379 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
9388 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x)                           (x+0x0000207c)  argument
9389 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x)                           (x+0x0000207c)  argument
9392 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x)                             \  argument
9393 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), HWIO_REO_R1_SM_STATES_IX_6_RMSK)
9394 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask)                      \  argument
9395 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask) 
9396 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val)                       \  argument
9397 	out_dword( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), val)
9398 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val)                \  argument
9401 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
9410 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x)                         (x+0x00002080)  argument
9411 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x)                         (x+0x00002080)  argument
9414 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x)                           \  argument
9415 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), HWIO_REO_R1_IDLE_STATES_IX_0_RMSK)
9416 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask)                    \  argument
9417 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask) 
9418 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val)                     \  argument
9419 	out_dword( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), val)
9420 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val)              \  argument
9423 …t_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_IN…
9432 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x)                       (x+0x00002084)  argument
9433 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x)                       (x+0x00002084)  argument
9436 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x)                         \  argument
9437 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), HWIO_REO_R1_INVALID_APB_ACCESS_RMSK)
9438 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask)                  \  argument
9439 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask) 
9440 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val)                   \  argument
9441 	out_dword( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), val)
9442 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val)            \  argument
9445 …word_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACCESS_I…
9457 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x)                       (x+0x00003000)  argument
9458 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x)                       (x+0x00003000)  argument
9461 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x)                         \  argument
9462 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), HWIO_REO_R2_RXDMA2REO0_RING_HP_RMSK)
9463 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask)                  \  argument
9464 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask) 
9465 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val)                   \  argument
9466 	out_dword( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), val)
9467 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val)            \  argument
9470 …word_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING_HP_I…
9479 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x)                       (x+0x00003004)  argument
9480 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x)                       (x+0x00003004)  argument
9483 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x)                         \  argument
9484 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), HWIO_REO_R2_RXDMA2REO0_RING_TP_RMSK)
9485 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask)                  \  argument
9486 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask) 
9487 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val)                   \  argument
9488 	out_dword( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), val)
9489 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val)            \  argument
9492 …word_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING_TP_I…
9501 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x)                     (x+0x00003008)  argument
9502 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x)                     (x+0x00003008)  argument
9505 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x)                       \  argument
9506 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), HWIO_REO_R2_WBM2REO_LINK_RING_HP_RMSK)
9507 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask)                \  argument
9508 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask) 
9509 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val)                 \  argument
9510 	out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), val)
9511 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val)          \  argument
9514 …d_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_RING_HP_…
9523 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x)                     (x+0x0000300c)  argument
9524 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x)                     (x+0x0000300c)  argument
9527 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x)                       \  argument
9528 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), HWIO_REO_R2_WBM2REO_LINK_RING_TP_RMSK)
9529 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask)                \  argument
9530 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask) 
9531 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val)                 \  argument
9532 	out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), val)
9533 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val)          \  argument
9536 …d_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_RING_TP_…
9545 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x)                          (x+0x00003010)  argument
9546 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x)                          (x+0x00003010)  argument
9549 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x)                            \  argument
9550 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), HWIO_REO_R2_REO_CMD_RING_HP_RMSK)
9551 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask)                     \  argument
9552 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask) 
9553 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val)                      \  argument
9554 	out_dword( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), val)
9555 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val)               \  argument
9558 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
9567 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x)                          (x+0x00003014)  argument
9568 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x)                          (x+0x00003014)  argument
9571 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x)                            \  argument
9572 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), HWIO_REO_R2_REO_CMD_RING_TP_RMSK)
9573 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask)                     \  argument
9574 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask) 
9575 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val)                      \  argument
9576 	out_dword( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), val)
9577 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val)               \  argument
9580 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
9589 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x)                           (x+0x00003018)  argument
9590 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x)                           (x+0x00003018)  argument
9593 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x)                             \  argument
9594 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), HWIO_REO_R2_SW2REO_RING_HP_RMSK)
9595 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask)                      \  argument
9596 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask) 
9597 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val)                       \  argument
9598 	out_dword( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), val)
9599 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val)                \  argument
9602 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
9611 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x)                           (x+0x0000301c)  argument
9612 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x)                           (x+0x0000301c)  argument
9615 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x)                             \  argument
9616 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), HWIO_REO_R2_SW2REO_RING_TP_RMSK)
9617 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask)                      \  argument
9618 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask) 
9619 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val)                       \  argument
9620 	out_dword( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), val)
9621 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val)                \  argument
9624 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
9633 #define HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x)                          (x+0x00003020)  argument
9634 #define HWIO_REO_R2_SW2REO1_RING_HP_PHYS(x)                          (x+0x00003020)  argument
9637 #define HWIO_REO_R2_SW2REO1_RING_HP_IN(x)                            \  argument
9638 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), HWIO_REO_R2_SW2REO1_RING_HP_RMSK)
9639 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask)                     \  argument
9640 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask) 
9641 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val)                      \  argument
9642 	out_dword( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), val)
9643 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val)               \  argument
9646 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
9655 #define HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x)                          (x+0x00003024)  argument
9656 #define HWIO_REO_R2_SW2REO1_RING_TP_PHYS(x)                          (x+0x00003024)  argument
9659 #define HWIO_REO_R2_SW2REO1_RING_TP_IN(x)                            \  argument
9660 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), HWIO_REO_R2_SW2REO1_RING_TP_RMSK)
9661 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask)                     \  argument
9662 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask) 
9663 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val)                      \  argument
9664 	out_dword( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), val)
9665 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val)               \  argument
9668 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
9677 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x)                          (x+0x00003028)  argument
9678 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x)                          (x+0x00003028)  argument
9681 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x)                            \  argument
9682 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW1_RING_HP_RMSK)
9683 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask)                     \  argument
9684 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask) 
9685 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val)                      \  argument
9686 	out_dword( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), val)
9687 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val)               \  argument
9690 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
9699 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x)                          (x+0x0000302c)  argument
9700 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x)                          (x+0x0000302c)  argument
9703 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x)                            \  argument
9704 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW1_RING_TP_RMSK)
9705 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask)                     \  argument
9706 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask) 
9707 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val)                      \  argument
9708 	out_dword( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), val)
9709 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val)               \  argument
9712 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
9721 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x)                          (x+0x00003030)  argument
9722 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x)                          (x+0x00003030)  argument
9725 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x)                            \  argument
9726 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW2_RING_HP_RMSK)
9727 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask)                     \  argument
9728 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask) 
9729 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val)                      \  argument
9730 	out_dword( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), val)
9731 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val)               \  argument
9734 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
9743 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x)                          (x+0x00003034)  argument
9744 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x)                          (x+0x00003034)  argument
9747 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x)                            \  argument
9748 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW2_RING_TP_RMSK)
9749 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask)                     \  argument
9750 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask) 
9751 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val)                      \  argument
9752 	out_dword( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), val)
9753 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val)               \  argument
9756 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
9765 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x)                          (x+0x00003038)  argument
9766 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x)                          (x+0x00003038)  argument
9769 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x)                            \  argument
9770 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW3_RING_HP_RMSK)
9771 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask)                     \  argument
9772 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask) 
9773 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val)                      \  argument
9774 	out_dword( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), val)
9775 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val)               \  argument
9778 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
9787 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x)                          (x+0x0000303c)  argument
9788 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x)                          (x+0x0000303c)  argument
9791 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x)                            \  argument
9792 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW3_RING_TP_RMSK)
9793 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask)                     \  argument
9794 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask) 
9795 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val)                      \  argument
9796 	out_dword( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), val)
9797 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val)               \  argument
9800 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
9809 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x)                          (x+0x00003040)  argument
9810 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x)                          (x+0x00003040)  argument
9813 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x)                            \  argument
9814 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW4_RING_HP_RMSK)
9815 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask)                     \  argument
9816 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask) 
9817 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val)                      \  argument
9818 	out_dword( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), val)
9819 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val)               \  argument
9822 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
9831 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x)                          (x+0x00003044)  argument
9832 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x)                          (x+0x00003044)  argument
9835 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x)                            \  argument
9836 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW4_RING_TP_RMSK)
9837 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask)                     \  argument
9838 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask) 
9839 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val)                      \  argument
9840 	out_dword( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), val)
9841 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val)               \  argument
9844 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
9853 #define HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x)                          (x+0x00003048)  argument
9854 #define HWIO_REO_R2_REO2SW5_RING_HP_PHYS(x)                          (x+0x00003048)  argument
9857 #define HWIO_REO_R2_REO2SW5_RING_HP_IN(x)                            \  argument
9858 	in_dword_masked ( HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW5_RING_HP_RMSK)
9859 #define HWIO_REO_R2_REO2SW5_RING_HP_INM(x, mask)                     \  argument
9860 	in_dword_masked ( HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), mask) 
9861 #define HWIO_REO_R2_REO2SW5_RING_HP_OUT(x, val)                      \  argument
9862 	out_dword( HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), val)
9863 #define HWIO_REO_R2_REO2SW5_RING_HP_OUTM(x, mask, val)               \  argument
9866 …out_dword_masked_ns(HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW5_RING_HP_IN…
9875 #define HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x)                          (x+0x0000304c)  argument
9876 #define HWIO_REO_R2_REO2SW5_RING_TP_PHYS(x)                          (x+0x0000304c)  argument
9879 #define HWIO_REO_R2_REO2SW5_RING_TP_IN(x)                            \  argument
9880 	in_dword_masked ( HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW5_RING_TP_RMSK)
9881 #define HWIO_REO_R2_REO2SW5_RING_TP_INM(x, mask)                     \  argument
9882 	in_dword_masked ( HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), mask) 
9883 #define HWIO_REO_R2_REO2SW5_RING_TP_OUT(x, val)                      \  argument
9884 	out_dword( HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), val)
9885 #define HWIO_REO_R2_REO2SW5_RING_TP_OUTM(x, mask, val)               \  argument
9888 …out_dword_masked_ns(HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW5_RING_TP_IN…
9897 #define HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x)                          (x+0x00003050)  argument
9898 #define HWIO_REO_R2_REO2SW6_RING_HP_PHYS(x)                          (x+0x00003050)  argument
9901 #define HWIO_REO_R2_REO2SW6_RING_HP_IN(x)                            \  argument
9902 	in_dword_masked ( HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW6_RING_HP_RMSK)
9903 #define HWIO_REO_R2_REO2SW6_RING_HP_INM(x, mask)                     \  argument
9904 	in_dword_masked ( HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), mask) 
9905 #define HWIO_REO_R2_REO2SW6_RING_HP_OUT(x, val)                      \  argument
9906 	out_dword( HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), val)
9907 #define HWIO_REO_R2_REO2SW6_RING_HP_OUTM(x, mask, val)               \  argument
9910 …out_dword_masked_ns(HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW6_RING_HP_IN…
9919 #define HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x)                          (x+0x00003054)  argument
9920 #define HWIO_REO_R2_REO2SW6_RING_TP_PHYS(x)                          (x+0x00003054)  argument
9923 #define HWIO_REO_R2_REO2SW6_RING_TP_IN(x)                            \  argument
9924 	in_dword_masked ( HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW6_RING_TP_RMSK)
9925 #define HWIO_REO_R2_REO2SW6_RING_TP_INM(x, mask)                     \  argument
9926 	in_dword_masked ( HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), mask) 
9927 #define HWIO_REO_R2_REO2SW6_RING_TP_OUT(x, val)                      \  argument
9928 	out_dword( HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), val)
9929 #define HWIO_REO_R2_REO2SW6_RING_TP_OUTM(x, mask, val)               \  argument
9932 …out_dword_masked_ns(HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW6_RING_TP_IN…
9941 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x)                          (x+0x00003058)  argument
9942 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x)                          (x+0x00003058)  argument
9945 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x)                            \  argument
9946 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), HWIO_REO_R2_REO2TCL_RING_HP_RMSK)
9947 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask)                     \  argument
9948 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask) 
9949 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val)                      \  argument
9950 	out_dword( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), val)
9951 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val)               \  argument
9954 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
9963 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x)                          (x+0x0000305c)  argument
9964 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x)                          (x+0x0000305c)  argument
9967 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x)                            \  argument
9968 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), HWIO_REO_R2_REO2TCL_RING_TP_RMSK)
9969 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask)                     \  argument
9970 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask) 
9971 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val)                      \  argument
9972 	out_dword( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), val)
9973 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val)               \  argument
9976 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
9985 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x)                           (x+0x00003060)  argument
9986 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x)                           (x+0x00003060)  argument
9989 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x)                             \  argument
9990 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), HWIO_REO_R2_REO2FW_RING_HP_RMSK)
9991 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask)                      \  argument
9992 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask) 
9993 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val)                       \  argument
9994 	out_dword( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), val)
9995 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val)                \  argument
9998 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
10007 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x)                           (x+0x00003064)  argument
10008 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x)                           (x+0x00003064)  argument
10011 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x)                             \  argument
10012 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), HWIO_REO_R2_REO2FW_RING_TP_RMSK)
10013 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask)                      \  argument
10014 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask) 
10015 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val)                       \  argument
10016 	out_dword( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), val)
10017 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val)                \  argument
10020 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
10029 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x)                      (x+0x00003068)  argument
10030 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x)                      (x+0x00003068)  argument
10033 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x)                        \  argument
10034 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), HWIO_REO_R2_REO_RELEASE_RING_HP_RMSK)
10035 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask)                 \  argument
10036 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask) 
10037 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val)                  \  argument
10038 	out_dword( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), val)
10039 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val)           \  argument
10042 …ord_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RING_HP_…
10051 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x)                      (x+0x0000306c)  argument
10052 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x)                      (x+0x0000306c)  argument
10055 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x)                        \  argument
10056 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), HWIO_REO_R2_REO_RELEASE_RING_TP_RMSK)
10057 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask)                 \  argument
10058 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask) 
10059 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val)                  \  argument
10060 	out_dword( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), val)
10061 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val)           \  argument
10064 …ord_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RING_TP_…
10073 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x)                       (x+0x00003070)  argument
10074 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x)                       (x+0x00003070)  argument
10077 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x)                         \  argument
10078 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), HWIO_REO_R2_REO_STATUS_RING_HP_RMSK)
10079 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask)                  \  argument
10080 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask) 
10081 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val)                   \  argument
10082 	out_dword( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), val)
10083 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val)            \  argument
10086 …word_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING_HP_I…
10095 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x)                       (x+0x00003074)  argument
10096 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x)                       (x+0x00003074)  argument
10099 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x)                         \  argument
10100 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), HWIO_REO_R2_REO_STATUS_RING_TP_RMSK)
10101 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask)                  \  argument
10102 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask) 
10103 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val)                   \  argument
10104 	out_dword( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), val)
10105 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val)            \  argument
10108 …word_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING_TP_I…