Lines Matching refs:val
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val) \ argument
55 out_dword( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), val)
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
145 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val) \ argument
146 out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), val)
147 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
150 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
188 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val) \ argument
189 out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), val)
190 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
193 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
231 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val) \ argument
232 out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), val)
233 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
236 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
274 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val) \ argument
275 out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), val)
276 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
279 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
317 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val) \ argument
318 out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), val)
319 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
322 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DES…
360 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val) \ argument
361 out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), val)
362 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
365 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DES…
403 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val) \ argument
404 out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), val)
405 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
408 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DES…
446 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val) \ argument
447 out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), val)
448 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
451 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DES…
489 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val) \ argument
490 out_dword( HWIO_REO_R0_TIMESTAMP_ADDR(x), val)
491 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
494 out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
511 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val) \ argument
512 out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), val)
513 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
516 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERR…
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val) \ argument
555 out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), val)
556 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
559 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERR…
597 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val) \ argument
598 out_dword( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), val)
599 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
602 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
622 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val) \ argument
623 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), val)
624 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
627 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
644 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val) \ argument
645 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), val)
646 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
649 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
669 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val) \ argument
670 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), val)
671 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
674 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING…
691 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val) \ argument
692 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), val)
693 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
696 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_…
716 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val) \ argument
717 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), val)
718 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
721 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RI…
768 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val) \ argument
769 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), val)
770 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
773 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
790 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val) \ argument
791 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), val)
792 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
795 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
812 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
813 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
814 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
817 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_RE…
840 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
841 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
842 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
845 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_RE…
862 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
863 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), val)
864 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
867 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
890 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
891 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
892 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
895 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_RE…
912 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
913 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
914 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
917 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_R…
934 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
935 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
936 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
939 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_…
959 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
960 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), val)
961 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
964 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
981 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
982 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), val)
983 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
986 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
1006 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val) \ argument
1007 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), val)
1008 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1011 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2RE…
1028 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1029 out_dword( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1030 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1033 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RX…
1050 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val) \ argument
1051 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), val)
1052 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1055 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1072 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val) \ argument
1073 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), val)
1074 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1077 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1097 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val) \ argument
1098 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), val)
1099 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1102 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_…
1119 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val) \ argument
1120 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), val)
1121 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1124 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_L…
1144 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val) \ argument
1145 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), val)
1146 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
1149 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LIN…
1196 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1197 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), val)
1198 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1201 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
1218 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1219 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), val)
1220 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1223 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
1240 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1241 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1242 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1245 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_…
1268 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1269 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1270 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1273 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_…
1290 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1291 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1292 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1295 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO…
1318 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1319 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1320 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1323 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_…
1340 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1341 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1342 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1345 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO…
1362 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1363 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1364 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1367 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWI…
1387 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1388 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), val)
1389 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1392 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WB…
1409 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1410 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), val)
1411 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1414 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WB…
1434 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUT(x, val) \ argument
1435 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), val)
1436 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1439 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_WBM2RE…
1456 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1457 out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1458 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1461 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_…
1478 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val) \ argument
1479 out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), val)
1480 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1483 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
1500 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val) \ argument
1501 out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), val)
1502 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1505 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
1525 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val) \ argument
1526 out_dword( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), val)
1527 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
1530 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
1547 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val) \ argument
1548 out_dword( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), val)
1549 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
1552 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_S…
1572 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val) \ argument
1573 out_dword( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), val)
1574 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
1577 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MIS…
1624 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1625 out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), val)
1626 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1629 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
1646 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1647 out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), val)
1648 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1651 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
1668 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1669 out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1670 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1673 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
1696 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1697 out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1698 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1701 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
1718 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1719 out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1720 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1723 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
1746 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1747 out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1748 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1751 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
1768 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1769 out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1770 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1773 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
1790 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1791 out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1792 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1795 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
1815 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1816 out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), val)
1817 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1820 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
1837 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1838 out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), val)
1839 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1842 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
1862 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val) \ argument
1863 out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), val)
1864 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1867 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RIN…
1884 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1885 out_dword( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1886 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1889 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_C…
1906 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val) \ argument
1907 out_dword( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), val)
1908 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1911 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
1928 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val) \ argument
1929 out_dword( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), val)
1930 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1933 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
1953 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val) \ argument
1954 out_dword( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), val)
1955 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
1958 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
1975 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val) \ argument
1976 out_dword( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), val)
1977 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
1980 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STA…
2000 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val) \ argument
2001 out_dword( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), val)
2002 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
2005 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_…
2052 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2053 out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), val)
2054 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2057 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2074 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2075 out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), val)
2076 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2079 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2096 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2097 out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2098 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2101 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0…
2124 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2125 out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2126 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2129 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0…
2146 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2147 out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2148 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2151 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW…
2174 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2175 out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2176 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2179 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
2196 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2197 out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2198 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2201 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R…
2218 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2219 out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2220 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2223 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_…
2243 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2244 out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), val)
2245 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2248 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
2265 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2266 out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), val)
2267 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2270 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
2290 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val) \ argument
2291 out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), val)
2292 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2295 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_…
2312 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2313 out_dword( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2314 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2317 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO…
2334 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val) \ argument
2335 out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), val)
2336 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2339 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
2356 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val) \ argument
2357 out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), val)
2358 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2361 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
2381 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val) \ argument
2382 out_dword( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), val)
2383 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val) \ argument
2386 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
2403 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val) \ argument
2404 out_dword( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), val)
2405 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
2408 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_S…
2428 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val) \ argument
2429 out_dword( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), val)
2430 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val) \ argument
2433 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MIS…
2480 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2481 out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), val)
2482 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2485 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
2502 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2503 out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), val)
2504 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2507 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
2524 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2525 out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2526 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2529 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
2552 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2553 out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2554 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2557 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
2574 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2575 out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2576 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2579 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_S…
2602 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2603 out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2604 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2607 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
2624 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2625 out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2626 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2629 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
2646 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2647 out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2648 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2651 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
2671 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2672 out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), val)
2673 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2676 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
2693 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2694 out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), val)
2695 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2698 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
2718 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
2719 out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), val)
2720 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2723 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RIN…
2740 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2741 out_dword( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2742 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2745 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2RE…
2762 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val) \ argument
2763 out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), val)
2764 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2767 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
2784 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val) \ argument
2785 out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), val)
2786 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2789 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
2809 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val) \ argument
2810 out_dword( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), val)
2811 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
2814 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
2834 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val) \ argument
2835 out_dword( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), val)
2836 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
2839 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_S…
2859 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val) \ argument
2860 out_dword( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), val)
2861 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
2864 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MIS…
2914 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val) \ argument
2915 out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), val)
2916 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
2919 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
2936 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val) \ argument
2937 out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), val)
2938 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
2941 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
2958 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
2959 out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), val)
2960 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
2963 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
2986 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
2987 out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), val)
2988 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
2991 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3014 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3015 out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3016 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3019 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3036 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3037 out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), val)
3038 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3041 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3058 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3059 out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), val)
3060 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3063 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3083 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val) \ argument
3084 out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), val)
3085 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3088 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RIN…
3105 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3106 out_dword( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3107 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3110 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3127 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val) \ argument
3128 out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), val)
3129 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3132 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3149 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val) \ argument
3150 out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), val)
3151 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3154 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3174 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val) \ argument
3175 out_dword( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), val)
3176 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3179 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3199 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val) \ argument
3200 out_dword( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), val)
3201 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
3204 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_S…
3224 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val) \ argument
3225 out_dword( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), val)
3226 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
3229 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MIS…
3279 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3280 out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), val)
3281 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3284 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
3301 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3302 out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), val)
3303 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3306 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
3323 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3324 out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3325 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3328 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3351 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3352 out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3353 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3356 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3379 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3380 out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3381 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3384 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3401 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3402 out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), val)
3403 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3406 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
3423 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3424 out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), val)
3425 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3428 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
3448 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val) \ argument
3449 out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), val)
3450 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3453 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RIN…
3470 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3471 out_dword( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3472 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3475 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3492 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val) \ argument
3493 out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), val)
3494 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3497 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
3514 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val) \ argument
3515 out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), val)
3516 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3519 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
3539 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val) \ argument
3540 out_dword( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), val)
3541 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
3544 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
3564 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val) \ argument
3565 out_dword( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), val)
3566 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
3569 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_S…
3589 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val) \ argument
3590 out_dword( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), val)
3591 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
3594 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MIS…
3644 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3645 out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), val)
3646 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3649 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
3666 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3667 out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), val)
3668 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3671 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
3688 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3689 out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3690 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3693 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3716 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3717 out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3718 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3721 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3744 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3745 out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3746 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3749 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3766 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3767 out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), val)
3768 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3771 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
3788 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3789 out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), val)
3790 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3793 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
3813 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val) \ argument
3814 out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), val)
3815 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3818 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RIN…
3835 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3836 out_dword( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3837 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3840 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3857 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val) \ argument
3858 out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), val)
3859 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3862 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
3879 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val) \ argument
3880 out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), val)
3881 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3884 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
3904 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val) \ argument
3905 out_dword( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), val)
3906 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
3909 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
3929 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val) \ argument
3930 out_dword( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), val)
3931 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
3934 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_S…
3954 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val) \ argument
3955 out_dword( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), val)
3956 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
3959 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MIS…
4009 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4010 out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), val)
4011 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4014 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4031 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4032 out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), val)
4033 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4036 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4053 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4054 out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4055 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4058 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4081 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4082 out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4083 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4086 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4109 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4110 out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4111 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4114 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4131 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4132 out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), val)
4133 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4136 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4153 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4154 out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), val)
4155 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4158 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4178 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val) \ argument
4179 out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), val)
4180 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4183 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RIN…
4200 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4201 out_dword( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4202 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4205 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4222 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUT(x, val) \ argument
4223 out_dword( HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), val)
4224 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4227 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING…
4244 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUT(x, val) \ argument
4245 out_dword( HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), val)
4246 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4249 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING…
4269 #define HWIO_REO_R0_REO2SW5_RING_ID_OUT(x, val) \ argument
4270 out_dword( HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), val)
4271 #define HWIO_REO_R0_REO2SW5_RING_ID_OUTM(x, mask, val) \ argument
4274 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_ID_IN…
4294 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUT(x, val) \ argument
4295 out_dword( HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), val)
4296 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUTM(x, mask, val) \ argument
4299 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_S…
4319 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUT(x, val) \ argument
4320 out_dword( HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), val)
4321 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUTM(x, mask, val) \ argument
4324 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_MIS…
4374 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4375 out_dword( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), val)
4376 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4379 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_R…
4396 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4397 out_dword( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), val)
4398 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4401 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_R…
4418 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4419 out_dword( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4420 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4423 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4446 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4447 out_dword( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4448 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4451 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4474 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4475 out_dword( HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4476 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4479 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4496 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4497 out_dword( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), val)
4498 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4501 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5…
4518 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4519 out_dword( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), val)
4520 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4523 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5…
4543 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUT(x, val) \ argument
4544 out_dword( HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), val)
4545 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4548 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RIN…
4565 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4566 out_dword( HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4567 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4570 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4587 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUT(x, val) \ argument
4588 out_dword( HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), val)
4589 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4592 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING…
4609 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUT(x, val) \ argument
4610 out_dword( HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), val)
4611 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4614 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING…
4634 #define HWIO_REO_R0_REO2SW6_RING_ID_OUT(x, val) \ argument
4635 out_dword( HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), val)
4636 #define HWIO_REO_R0_REO2SW6_RING_ID_OUTM(x, mask, val) \ argument
4639 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_ID_IN…
4659 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUT(x, val) \ argument
4660 out_dword( HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), val)
4661 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUTM(x, mask, val) \ argument
4664 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_S…
4684 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUT(x, val) \ argument
4685 out_dword( HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), val)
4686 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUTM(x, mask, val) \ argument
4689 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_MIS…
4739 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4740 out_dword( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), val)
4741 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4744 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_R…
4761 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4762 out_dword( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), val)
4763 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4766 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_R…
4783 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4784 out_dword( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4785 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4788 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4811 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4812 out_dword( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4813 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4816 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4839 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4840 out_dword( HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4841 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4844 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4861 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4862 out_dword( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), val)
4863 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4866 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6…
4883 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4884 out_dword( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), val)
4885 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4888 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6…
4908 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUT(x, val) \ argument
4909 out_dword( HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), val)
4910 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4913 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RIN…
4930 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4931 out_dword( HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4932 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4935 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4952 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val) \ argument
4953 out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), val)
4954 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4957 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
4974 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val) \ argument
4975 out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), val)
4976 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4979 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
4999 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val) \ argument
5000 out_dword( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), val)
5001 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
5004 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
5024 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val) \ argument
5025 out_dword( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), val)
5026 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
5029 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_S…
5049 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val) \ argument
5050 out_dword( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), val)
5051 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
5054 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MIS…
5104 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5105 out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), val)
5106 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5109 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
5126 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5127 out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), val)
5128 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5131 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
5148 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5149 out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5150 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5153 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
5176 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5177 out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5178 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5181 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
5204 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5205 out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5206 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5209 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
5226 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5227 out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), val)
5228 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5231 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
5248 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5249 out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), val)
5250 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5253 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
5273 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val) \ argument
5274 out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), val)
5275 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5278 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RIN…
5295 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5296 out_dword( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5297 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5300 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2T…
5317 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val) \ argument
5318 out_dword( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), val)
5319 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5322 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
5339 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val) \ argument
5340 out_dword( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), val)
5341 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5344 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
5364 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val) \ argument
5365 out_dword( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), val)
5366 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
5369 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
5389 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val) \ argument
5390 out_dword( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), val)
5391 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
5394 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STA…
5414 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val) \ argument
5415 out_dword( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), val)
5416 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
5419 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_…
5469 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5470 out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), val)
5471 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5474 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
5491 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5492 out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), val)
5493 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5496 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
5513 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5514 out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5515 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5518 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO…
5541 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5542 out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5543 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5546 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RE…
5569 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5570 out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5571 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5574 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_…
5591 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5592 out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), val)
5593 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5596 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
5613 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5614 out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), val)
5615 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5618 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
5638 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val) \ argument
5639 out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), val)
5640 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5643 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_…
5660 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5661 out_dword( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5662 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5665 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW…
5682 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val) \ argument
5683 out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), val)
5684 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5687 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
5704 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val) \ argument
5705 out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), val)
5706 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5709 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
5729 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val) \ argument
5730 out_dword( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), val)
5731 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
5734 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RI…
5754 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val) \ argument
5755 out_dword( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), val)
5756 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
5759 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEAS…
5779 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val) \ argument
5780 out_dword( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), val)
5781 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
5784 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_…
5834 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5835 out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), val)
5836 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5839 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5856 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5857 out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), val)
5858 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5861 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5878 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5879 out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5880 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5883 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R…
5906 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5907 out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5908 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5911 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_…
5934 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5935 out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5936 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5939 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_RE…
5956 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5957 out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), val)
5958 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5961 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO…
5978 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5979 out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), val)
5980 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5983 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO…
6003 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUT(x, val) \ argument
6004 out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), val)
6005 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6008 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_REL…
6025 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6026 out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), val)
6027 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6030 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_R…
6047 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val) \ argument
6048 out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), val)
6049 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
6052 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
6069 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val) \ argument
6070 out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), val)
6071 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
6074 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
6094 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val) \ argument
6095 out_dword( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), val)
6096 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
6099 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING…
6119 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val) \ argument
6120 out_dword( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), val)
6121 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
6124 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_…
6144 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val) \ argument
6145 out_dword( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), val)
6146 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
6149 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RI…
6199 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val) \ argument
6200 out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), val)
6201 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
6204 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
6221 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val) \ argument
6222 out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), val)
6223 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
6226 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
6243 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
6244 out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), val)
6245 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
6248 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0…
6271 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
6272 out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), val)
6273 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
6276 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
6299 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
6300 out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
6301 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
6304 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO…
6321 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
6322 out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), val)
6323 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
6326 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
6343 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
6344 out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), val)
6345 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
6348 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
6368 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val) \ argument
6369 out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), val)
6370 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6373 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STAT…
6390 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6391 out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), val)
6392 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6395 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RE…
6412 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val) \ argument
6413 out_dword( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), val)
6414 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
6417 …out_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_…
6437 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val) \ argument
6438 out_dword( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), val)
6439 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
6442 …out_dword_masked_ns(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERR…
6459 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val) \ argument
6460 out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), val)
6461 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
6464 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6481 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val) \ argument
6482 out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), val)
6483 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
6486 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6503 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val) \ argument
6504 out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), val)
6505 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
6508 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6525 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val) \ argument
6526 out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), val)
6527 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
6530 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6547 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val) \ argument
6548 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), val)
6549 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6552 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6569 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val) \ argument
6570 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), val)
6571 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6574 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6591 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val) \ argument
6592 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), val)
6593 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6596 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6613 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val) \ argument
6614 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), val)
6615 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6618 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6635 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val) \ argument
6636 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), val)
6637 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6640 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6657 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val) \ argument
6658 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), val)
6659 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6662 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6679 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val) \ argument
6680 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), val)
6681 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6684 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6701 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val) \ argument
6702 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), val)
6703 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6706 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6723 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val) \ argument
6724 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), val)
6725 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6728 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6745 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val) \ argument
6746 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), val)
6747 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6750 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6767 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val) \ argument
6768 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), val)
6769 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6772 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6789 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val) \ argument
6790 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), val)
6791 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6794 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6811 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val) \ argument
6812 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), val)
6813 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6816 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6833 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val) \ argument
6834 out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), val)
6835 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6838 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6855 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val) \ argument
6856 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), val)
6857 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6860 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6877 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val) \ argument
6878 out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), val)
6879 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6882 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6899 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val) \ argument
6900 out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), val)
6901 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
6904 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6921 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val) \ argument
6922 out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), val)
6923 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
6926 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6943 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val) \ argument
6944 out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), val)
6945 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
6948 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6965 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val) \ argument
6966 out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), val)
6967 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
6970 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6987 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val) \ argument
6988 out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), val)
6989 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
6992 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7009 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val) \ argument
7010 out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), val)
7011 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
7014 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7031 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val) \ argument
7032 out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), val)
7033 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
7036 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7053 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val) \ argument
7054 out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), val)
7055 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
7058 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7075 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val) \ argument
7076 out_dword( HWIO_REO_R0_AGING_CONTROL_ADDR(x), val)
7077 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
7080 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
7097 #define HWIO_REO_R0_MISC_CTL_OUT(x, val) \ argument
7098 out_dword( HWIO_REO_R0_MISC_CTL_ADDR(x), val)
7099 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val) \ argument
7102 out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
7128 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val) \ argument
7129 out_dword( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), val)
7130 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
7133 …out_dword_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_…
7150 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val) \ argument
7151 out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), val)
7152 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
7155 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7172 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val) \ argument
7173 out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), val)
7174 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
7177 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7194 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val) \ argument
7195 out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), val)
7196 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
7199 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7216 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val) \ argument
7217 out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), val)
7218 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
7221 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7238 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val) \ argument
7239 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), val)
7240 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
7243 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0…
7260 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val) \ argument
7261 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), val)
7262 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
7265 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0…
7282 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val) \ argument
7283 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), val)
7284 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
7287 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0…
7304 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val) \ argument
7305 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), val)
7306 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
7309 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R…
7326 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val) \ argument
7327 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), val)
7328 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
7331 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7348 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val) \ argument
7349 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), val)
7350 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
7353 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7370 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val) \ argument
7371 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), val)
7372 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
7375 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7392 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val) \ argument
7393 out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), val)
7394 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
7397 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7414 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val) \ argument
7415 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), val)
7416 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
7419 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7436 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val) \ argument
7437 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), val)
7438 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
7441 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7458 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val) \ argument
7459 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), val)
7460 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
7463 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7480 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val) \ argument
7481 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), val)
7482 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
7485 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7502 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val) \ argument
7503 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), val)
7504 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
7507 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7524 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val) \ argument
7525 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), val)
7526 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
7529 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7546 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val) \ argument
7547 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), val)
7548 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
7551 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7568 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val) \ argument
7569 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), val)
7570 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
7573 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7590 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val) \ argument
7591 out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), val)
7592 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
7595 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_B…
7615 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7616 out_dword( HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7617 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7620 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7640 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7641 out_dword( HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7642 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7645 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7665 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7666 out_dword( HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7667 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7670 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7690 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7691 out_dword( HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7692 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7695 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7715 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7716 out_dword( HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7717 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7720 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7740 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7741 out_dword( HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7742 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7745 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7765 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7766 out_dword( HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7767 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7770 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_…
7790 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7791 out_dword( HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), val)
7792 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7795 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7815 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ argument
7816 out_dword( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), val)
7817 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
7820 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWE…
7837 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ argument
7838 out_dword( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), val)
7839 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
7842 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPE…
7859 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ argument
7860 out_dword( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), val)
7861 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
7864 …out_dword_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_I…
7887 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ argument
7888 out_dword( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val)
7889 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
7892 …out_dword_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_T…
7909 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ argument
7910 out_dword( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val)
7911 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
7914 …out_dword_masked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_G…
7967 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ argument
7968 out_dword( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), val)
7969 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
7972 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_…
7998 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ argument
7999 out_dword( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), val)
8000 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
8003 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STAT…
8026 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ argument
8027 out_dword( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val)
8028 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
8031 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DE…
8057 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ argument
8058 out_dword( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val)
8059 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
8062 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RE…
8088 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ argument
8089 out_dword( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val)
8090 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
8093 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_…
8137 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ argument
8138 out_dword( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val)
8139 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
8142 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_…
8162 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ argument
8163 out_dword( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val)
8164 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
8167 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_S…
8184 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ argument
8185 out_dword( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val)
8186 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
8189 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE…
8209 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ argument
8210 out_dword( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val)
8211 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8214 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD…
8237 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ argument
8238 out_dword( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val)
8239 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8242 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR…
8265 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8266 out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
8267 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8270 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_…
8287 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8288 out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
8289 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8292 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_…
8309 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8310 out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
8311 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8314 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_…
8331 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8332 out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
8333 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8336 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_…
8353 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ argument
8354 out_dword( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val)
8355 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ argument
8358 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI…
8384 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val) \ argument
8385 out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), val)
8386 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
8389 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_…
8433 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val) \ argument
8434 out_dword( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), val)
8435 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
8438 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTRO…
8458 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val) \ argument
8459 out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), val)
8460 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val) \ argument
8463 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CON…
8480 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val) \ argument
8481 out_dword( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), val)
8482 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val) \ argument
8485 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_SET_S…
8502 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val) \ argument
8503 out_dword( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), val)
8504 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
8507 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
8551 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val) \ argument
8552 out_dword( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), val)
8553 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
8556 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
8573 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val) \ argument
8574 out_dword( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), val)
8575 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
8578 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
8595 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val) \ argument
8596 out_dword( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), val)
8597 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
8600 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
8617 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val) \ argument
8618 out_dword( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), val)
8619 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
8622 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
8639 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val) \ argument
8640 out_dword( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), val)
8641 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8644 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
8673 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val) \ argument
8674 out_dword( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), val)
8675 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8678 …out_dword_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEB…
8698 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val) \ argument
8699 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), val)
8700 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
8703 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_…
8729 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val) \ argument
8730 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), val)
8731 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
8734 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
8751 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val) \ argument
8752 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), val)
8753 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
8756 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8773 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val) \ argument
8774 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), val)
8775 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
8778 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACH…
8795 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val) \ argument
8796 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), val)
8797 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
8800 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CAC…
8817 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val) \ argument
8818 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), val)
8819 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
8822 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBU…
8839 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val) \ argument
8840 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), val)
8841 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
8844 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
8864 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val) \ argument
8865 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), val)
8866 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val) \ argument
8869 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8889 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val) \ argument
8890 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), val)
8891 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val) \ argument
8894 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8914 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val) \ argument
8915 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), val)
8916 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val) \ argument
8919 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8939 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val) \ argument
8940 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), val)
8941 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \ argument
8944 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask, val, HWIO_REO_R1_CA…
8961 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val) \ argument
8962 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), val)
8963 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \ argument
8966 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask, val, HWIO_REO_R1_C…
8983 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val) \ argument
8984 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), val)
8985 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \ argument
8988 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask, val, HWIO_REO_R1…
9008 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val) \ argument
9009 out_dword( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), val)
9010 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
9013 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_…
9030 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUT(x, val) \ argument
9031 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), val)
9032 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \ argument
9035 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask, val, HWIO_REO_R1_CACH…
9061 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUT(x, val) \ argument
9062 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), val)
9063 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \ argument
9066 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask, val, HWIO_REO_R1_CACH…
9083 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUT(x, val) \ argument
9084 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), val)
9085 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \ argument
9088 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask, val, HWIO_REO_R1_CACH…
9105 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUT(x, val) \ argument
9106 out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), val)
9107 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val) \ argument
9110 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask, val, HWIO_REO_R1_CACHE…
9148 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val) \ argument
9149 out_dword( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), val)
9150 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
9153 …out_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHEC…
9170 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val) \ argument
9171 out_dword( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), val)
9172 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
9175 out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
9198 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val) \ argument
9199 out_dword( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), val)
9200 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
9203 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
9220 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val) \ argument
9221 out_dword( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), val)
9222 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
9225 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
9242 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val) \ argument
9243 out_dword( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), val)
9244 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
9247 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
9264 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val) \ argument
9265 out_dword( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), val)
9266 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
9269 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
9286 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val) \ argument
9287 out_dword( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), val)
9288 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
9291 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
9308 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val) \ argument
9309 out_dword( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), val)
9310 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
9313 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
9330 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val) \ argument
9331 out_dword( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), val)
9332 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
9335 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
9352 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val) \ argument
9353 out_dword( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), val)
9354 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
9357 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
9374 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val) \ argument
9375 out_dword( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), val)
9376 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
9379 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
9396 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val) \ argument
9397 out_dword( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), val)
9398 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
9401 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
9418 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val) \ argument
9419 out_dword( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), val)
9420 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
9423 …out_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_…
9440 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val) \ argument
9441 out_dword( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), val)
9442 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
9445 …out_dword_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACC…
9465 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val) \ argument
9466 out_dword( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), val)
9467 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
9470 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
9487 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val) \ argument
9488 out_dword( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), val)
9489 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
9492 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
9509 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val) \ argument
9510 out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), val)
9511 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
9514 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
9531 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val) \ argument
9532 out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), val)
9533 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
9536 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
9553 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val) \ argument
9554 out_dword( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), val)
9555 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
9558 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
9575 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val) \ argument
9576 out_dword( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), val)
9577 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
9580 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
9597 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val) \ argument
9598 out_dword( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), val)
9599 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
9602 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
9619 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val) \ argument
9620 out_dword( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), val)
9621 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
9624 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
9641 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val) \ argument
9642 out_dword( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), val)
9643 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val) \ argument
9646 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
9663 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val) \ argument
9664 out_dword( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), val)
9665 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val) \ argument
9668 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
9685 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val) \ argument
9686 out_dword( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), val)
9687 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
9690 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
9707 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val) \ argument
9708 out_dword( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), val)
9709 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
9712 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
9729 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val) \ argument
9730 out_dword( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), val)
9731 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
9734 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
9751 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val) \ argument
9752 out_dword( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), val)
9753 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
9756 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
9773 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val) \ argument
9774 out_dword( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), val)
9775 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
9778 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
9795 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val) \ argument
9796 out_dword( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), val)
9797 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
9800 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
9817 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val) \ argument
9818 out_dword( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), val)
9819 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
9822 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
9839 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val) \ argument
9840 out_dword( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), val)
9841 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
9844 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
9861 #define HWIO_REO_R2_REO2SW5_RING_HP_OUT(x, val) \ argument
9862 out_dword( HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), val)
9863 #define HWIO_REO_R2_REO2SW5_RING_HP_OUTM(x, mask, val) \ argument
9866 …out_dword_masked_ns(HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW5_RING_HP_IN…
9883 #define HWIO_REO_R2_REO2SW5_RING_TP_OUT(x, val) \ argument
9884 out_dword( HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), val)
9885 #define HWIO_REO_R2_REO2SW5_RING_TP_OUTM(x, mask, val) \ argument
9888 …out_dword_masked_ns(HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW5_RING_TP_IN…
9905 #define HWIO_REO_R2_REO2SW6_RING_HP_OUT(x, val) \ argument
9906 out_dword( HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), val)
9907 #define HWIO_REO_R2_REO2SW6_RING_HP_OUTM(x, mask, val) \ argument
9910 …out_dword_masked_ns(HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW6_RING_HP_IN…
9927 #define HWIO_REO_R2_REO2SW6_RING_TP_OUT(x, val) \ argument
9928 out_dword( HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), val)
9929 #define HWIO_REO_R2_REO2SW6_RING_TP_OUTM(x, mask, val) \ argument
9932 …out_dword_masked_ns(HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW6_RING_TP_IN…
9949 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val) \ argument
9950 out_dword( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), val)
9951 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
9954 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
9971 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val) \ argument
9972 out_dword( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), val)
9973 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
9976 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
9993 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val) \ argument
9994 out_dword( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), val)
9995 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
9998 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
10015 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val) \ argument
10016 out_dword( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), val)
10017 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
10020 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
10037 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val) \ argument
10038 out_dword( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), val)
10039 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
10042 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
10059 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val) \ argument
10060 out_dword( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), val)
10061 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
10064 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
10081 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val) \ argument
10082 out_dword( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), val)
10083 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
10086 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…
10103 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val) \ argument
10104 out_dword( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), val)
10105 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument
10108 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…