Lines Matching defs:x
46 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x) (x+0x00000000) argument
47 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x) (x+0x00000000) argument
50 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x) \ argument
52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val) \ argument
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
137 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x) (x+0x00000004) argument
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x) (x+0x00000004) argument
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x) \ argument
143 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
145 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val) \ argument
147 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
180 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x) (x+0x00000008) argument
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x) (x+0x00000008) argument
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x) \ argument
186 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
188 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val) \ argument
190 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
223 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x) (x+0x0000000c) argument
224 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x) (x+0x0000000c) argument
227 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x) \ argument
229 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask) \ argument
231 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val) \ argument
233 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
266 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x) (x+0x00000010) argument
267 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x) (x+0x00000010) argument
270 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x) \ argument
272 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask) \ argument
274 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val) \ argument
276 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
309 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x) (x+0x00000014) argument
310 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x) (x+0x00000014) argument
313 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x) \ argument
315 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask) \ argument
317 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val) \ argument
319 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
352 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x) (x+0x00000018) argument
353 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x) (x+0x00000018) argument
356 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x) \ argument
358 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask) \ argument
360 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val) \ argument
362 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
395 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x) (x+0x0000001c) argument
396 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x) (x+0x0000001c) argument
399 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x) \ argument
401 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask) \ argument
403 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val) \ argument
405 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
438 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x) (x+0x00000020) argument
439 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x) (x+0x00000020) argument
442 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x) \ argument
444 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask) \ argument
446 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val) \ argument
448 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
481 #define HWIO_REO_R0_TIMESTAMP_ADDR(x) (x+0x00000024) argument
482 #define HWIO_REO_R0_TIMESTAMP_PHYS(x) (x+0x00000024) argument
485 #define HWIO_REO_R0_TIMESTAMP_IN(x) \ argument
487 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask) \ argument
489 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val) \ argument
491 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
503 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x) (x+0x00000028) argument
504 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x) (x+0x00000028) argument
507 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x) \ argument
509 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask) \ argument
511 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val) \ argument
513 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
546 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x) (x+0x0000002c) argument
547 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x) (x+0x0000002c) argument
550 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x) \ argument
552 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask) \ argument
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val) \ argument
556 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
589 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x) (x+0x00000030) argument
590 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x) (x+0x00000030) argument
593 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x) \ argument
595 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask) \ argument
597 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val) \ argument
599 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
614 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x) (x+0x00000034) argument
615 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x) (x+0x00000034) argument
618 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x) \ argument
620 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask) \ argument
622 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val) \ argument
624 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
636 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x) (x+0x00000038) argument
637 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x) (x+0x00000038) argument
640 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x) \ argument
642 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask) \ argument
644 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val) \ argument
646 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
661 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x) (x+0x0000003c) argument
662 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x) (x+0x0000003c) argument
665 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x) \ argument
667 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask) \ argument
669 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val) \ argument
671 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
683 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x) (x+0x00000040) argument
684 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x) (x+0x00000040) argument
687 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x) \ argument
689 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask) \ argument
691 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val) \ argument
693 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
708 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x) (x+0x00000044) argument
709 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x) (x+0x00000044) argument
712 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x) \ argument
714 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask) \ argument
716 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val) \ argument
718 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
760 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000050) argument
761 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000050) argument
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x) \ argument
766 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask) \ argument
768 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val) \ argument
770 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
782 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000054) argument
783 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000054) argument
786 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x) \ argument
788 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask) \ argument
790 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val) \ argument
792 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
804 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000064) argument
805 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000064) argument
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
810 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
812 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
814 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
832 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000068) argument
833 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000068) argument
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
838 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
840 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
842 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
854 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000006c) argument
855 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000006c) argument
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x) \ argument
860 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
862 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
864 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
882 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000070) argument
883 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000070) argument
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
888 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
890 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
892 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
904 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000074) argument
905 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000074) argument
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
910 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
912 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
914 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
926 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078) argument
927 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078) argument
930 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
932 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
934 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
936 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
951 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000007c) argument
952 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000007c) argument
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x) \ argument
957 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
959 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
961 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
973 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000080) argument
974 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000080) argument
977 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x) \ argument
979 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
981 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
983 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
998 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x) (x+0x00000084) argument
999 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x) (x+0x00000084) argument
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x) \ argument
1004 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask) \ argument
1006 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val) \ argument
1008 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1020 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000088) argument
1021 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000088) argument
1024 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1026 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1028 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1030 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1042 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x) (x+0x0000008c) argument
1043 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x) (x+0x0000008c) argument
1046 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x) \ argument
1048 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask) \ argument
1050 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val) \ argument
1052 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1064 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x) (x+0x00000090) argument
1065 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x) (x+0x00000090) argument
1068 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x) \ argument
1070 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask) \ argument
1072 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val) \ argument
1074 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1089 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x) (x+0x00000094) argument
1090 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x) (x+0x00000094) argument
1093 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x) \ argument
1095 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask) \ argument
1097 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val) \ argument
1099 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1111 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x) (x+0x00000098) argument
1112 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x) (x+0x00000098) argument
1115 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x) \ argument
1117 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask) \ argument
1119 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val) \ argument
1121 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1136 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x) (x+0x0000009c) argument
1137 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x) (x+0x0000009c) argument
1140 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x) \ argument
1142 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask) \ argument
1144 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val) \ argument
1146 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
1188 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x) (x+0x000000a8) argument
1189 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x) (x+0x000000a8) argument
1192 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x) \ argument
1194 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1196 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1198 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1210 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x) (x+0x000000ac) argument
1211 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x) (x+0x000000ac) argument
1214 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x) \ argument
1216 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1218 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1220 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1232 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000000bc) argument
1233 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000000bc) argument
1236 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1238 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1240 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1242 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1260 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000000c0) argument
1261 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000000c0) argument
1264 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1266 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1268 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1270 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1282 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000000c4) argument
1283 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000000c4) argument
1286 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1288 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1290 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1292 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1310 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000000c8) argument
1311 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000000c8) argument
1314 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1316 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1318 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1320 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1332 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000000cc) argument
1333 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000000cc) argument
1336 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1338 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1340 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1342 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1354 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0) argument
1355 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0) argument
1358 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1360 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1362 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1364 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1379 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000000d4) argument
1380 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000000d4) argument
1383 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_IN(x) \ argument
1385 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1387 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1389 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1401 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000000d8) argument
1402 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000000d8) argument
1405 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_IN(x) \ argument
1407 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1409 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1411 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1426 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x) (x+0x000000dc) argument
1427 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_PHYS(x) (x+0x000000dc) argument
1430 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_IN(x) \ argument
1432 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_INM(x, mask) \ argument
1434 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUT(x, val) \ argument
1436 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1448 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000000e0) argument
1449 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000000e0) argument
1452 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1454 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1456 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1458 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1470 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x) (x+0x000000e4) argument
1471 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x) (x+0x000000e4) argument
1474 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x) \ argument
1476 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask) \ argument
1478 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val) \ argument
1480 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1492 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x) (x+0x000000e8) argument
1493 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x) (x+0x000000e8) argument
1496 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x) \ argument
1498 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask) \ argument
1500 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val) \ argument
1502 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1517 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x) (x+0x000000ec) argument
1518 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x) (x+0x000000ec) argument
1521 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x) \ argument
1523 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask) \ argument
1525 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val) \ argument
1527 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
1539 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x) (x+0x000000f0) argument
1540 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x) (x+0x000000f0) argument
1543 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x) \ argument
1545 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask) \ argument
1547 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val) \ argument
1549 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
1564 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x) (x+0x000000f4) argument
1565 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x) (x+0x000000f4) argument
1568 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x) \ argument
1570 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask) \ argument
1572 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val) \ argument
1574 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
1616 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000100) argument
1617 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000100) argument
1620 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x) \ argument
1622 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1624 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1626 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1638 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000104) argument
1639 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000104) argument
1642 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x) \ argument
1644 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1646 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1648 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1660 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000114) argument
1661 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000114) argument
1664 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1666 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1668 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1670 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1688 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000118) argument
1689 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000118) argument
1692 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1694 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1696 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1698 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1710 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000011c) argument
1711 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000011c) argument
1714 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1716 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1718 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1720 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1738 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000120) argument
1739 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000120) argument
1742 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1744 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1746 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1748 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1760 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000124) argument
1761 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000124) argument
1764 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1766 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1768 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1770 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1782 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000128) argument
1783 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000128) argument
1786 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1788 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1790 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1792 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1807 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000012c) argument
1808 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000012c) argument
1811 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x) \ argument
1813 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1815 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1817 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1829 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000130) argument
1830 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000130) argument
1833 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x) \ argument
1835 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1837 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1839 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1854 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x) (x+0x00000134) argument
1855 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x) (x+0x00000134) argument
1858 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x) \ argument
1860 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask) \ argument
1862 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val) \ argument
1864 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1876 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000138) argument
1877 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000138) argument
1880 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1882 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1884 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1886 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1898 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x) (x+0x0000013c) argument
1899 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x) (x+0x0000013c) argument
1902 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x) \ argument
1904 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask) \ argument
1906 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val) \ argument
1908 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1920 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x) (x+0x00000140) argument
1921 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x) (x+0x00000140) argument
1924 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x) \ argument
1926 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask) \ argument
1928 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val) \ argument
1930 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1945 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x) (x+0x00000144) argument
1946 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x) (x+0x00000144) argument
1949 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x) \ argument
1951 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask) \ argument
1953 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val) \ argument
1955 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
1967 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x) (x+0x00000148) argument
1968 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x) (x+0x00000148) argument
1971 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x) \ argument
1973 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask) \ argument
1975 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val) \ argument
1977 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
1992 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x) (x+0x0000014c) argument
1993 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x) (x+0x0000014c) argument
1996 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x) \ argument
1998 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask) \ argument
2000 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val) \ argument
2002 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
2044 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000158) argument
2045 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000158) argument
2048 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x) \ argument
2050 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2052 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2054 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2066 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000015c) argument
2067 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000015c) argument
2070 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x) \ argument
2072 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2074 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2076 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2088 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000016c) argument
2089 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000016c) argument
2092 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2094 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2096 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2098 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2116 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000170) argument
2117 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000170) argument
2120 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2122 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2124 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2126 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2138 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000174) argument
2139 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000174) argument
2142 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2144 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2146 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2148 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2166 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000178) argument
2167 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000178) argument
2170 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2172 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2174 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2176 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2188 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000017c) argument
2189 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000017c) argument
2192 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2194 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2196 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2198 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2210 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000180) argument
2211 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000180) argument
2214 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2216 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2218 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2220 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2235 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000184) argument
2236 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000184) argument
2239 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x) \ argument
2241 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2243 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2245 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2257 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000188) argument
2258 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000188) argument
2261 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x) \ argument
2263 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2265 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2267 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2282 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x) (x+0x0000018c) argument
2283 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x) (x+0x0000018c) argument
2286 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x) \ argument
2288 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask) \ argument
2290 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val) \ argument
2292 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2304 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000190) argument
2305 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000190) argument
2308 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2310 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2312 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2314 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2326 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x) (x+0x00000194) argument
2327 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_PHYS(x) (x+0x00000194) argument
2330 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_IN(x) \ argument
2332 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask) \ argument
2334 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val) \ argument
2336 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2348 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x) (x+0x00000198) argument
2349 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_PHYS(x) (x+0x00000198) argument
2352 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_IN(x) \ argument
2354 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask) \ argument
2356 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val) \ argument
2358 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2373 #define HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x) (x+0x0000019c) argument
2374 #define HWIO_REO_R0_SW2REO1_RING_ID_PHYS(x) (x+0x0000019c) argument
2377 #define HWIO_REO_R0_SW2REO1_RING_ID_IN(x) \ argument
2379 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask) \ argument
2381 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val) \ argument
2383 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val) \ argument
2395 #define HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x) (x+0x000001a0) argument
2396 #define HWIO_REO_R0_SW2REO1_RING_STATUS_PHYS(x) (x+0x000001a0) argument
2399 #define HWIO_REO_R0_SW2REO1_RING_STATUS_IN(x) \ argument
2401 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask) \ argument
2403 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val) \ argument
2405 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
2420 #define HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x) (x+0x000001a4) argument
2421 #define HWIO_REO_R0_SW2REO1_RING_MISC_PHYS(x) (x+0x000001a4) argument
2424 #define HWIO_REO_R0_SW2REO1_RING_MISC_IN(x) \ argument
2426 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask) \ argument
2428 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val) \ argument
2430 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val) \ argument
2472 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000001b0) argument
2473 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000001b0) argument
2476 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_IN(x) \ argument
2478 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2480 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2482 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2494 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000001b4) argument
2495 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000001b4) argument
2498 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_IN(x) \ argument
2500 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2502 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2504 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2516 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000001c4) argument
2517 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000001c4) argument
2520 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2522 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2524 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2526 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2544 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000001c8) argument
2545 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000001c8) argument
2548 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2550 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2552 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2554 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2566 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000001cc) argument
2567 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000001cc) argument
2570 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2572 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2574 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2576 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2594 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000001d0) argument
2595 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000001d0) argument
2598 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2600 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2602 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2604 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2616 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000001d4) argument
2617 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000001d4) argument
2620 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2622 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2624 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2626 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2638 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000001d8) argument
2639 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000001d8) argument
2642 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2644 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2646 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2648 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2663 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000001dc) argument
2664 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000001dc) argument
2667 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_IN(x) \ argument
2669 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2671 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2673 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2685 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000001e0) argument
2686 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000001e0) argument
2689 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_IN(x) \ argument
2691 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2693 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2695 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2710 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x) (x+0x000001e4) argument
2711 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_PHYS(x) (x+0x000001e4) argument
2714 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_IN(x) \ argument
2716 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask) \ argument
2718 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
2720 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2732 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000001e8) argument
2733 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000001e8) argument
2736 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2738 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2740 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2742 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2754 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x) (x+0x000001ec) argument
2755 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x) (x+0x000001ec) argument
2758 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x) \ argument
2760 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask) \ argument
2762 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val) \ argument
2764 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2776 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x) (x+0x000001f0) argument
2777 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x) (x+0x000001f0) argument
2780 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x) \ argument
2782 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask) \ argument
2784 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val) \ argument
2786 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2801 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x) (x+0x000001f4) argument
2802 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x) (x+0x000001f4) argument
2805 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x) \ argument
2807 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask) \ argument
2809 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val) \ argument
2811 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
2826 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) (x+0x000001f8) argument
2827 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x) (x+0x000001f8) argument
2830 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x) \ argument
2832 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask) \ argument
2834 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val) \ argument
2836 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
2851 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) (x+0x000001fc) argument
2852 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x) (x+0x000001fc) argument
2855 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x) \ argument
2857 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask) \ argument
2859 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val) \ argument
2861 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
2906 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000200) argument
2907 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000200) argument
2910 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x) \ argument
2912 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask) \ argument
2914 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val) \ argument
2916 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
2928 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000204) argument
2929 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000204) argument
2932 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x) \ argument
2934 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask) \ argument
2936 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val) \ argument
2938 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
2950 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000210) argument
2951 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000210) argument
2954 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x) \ argument
2956 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
2958 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
2960 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
2978 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000214) argument
2979 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000214) argument
2982 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x) \ argument
2984 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
2986 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
2988 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3006 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000218) argument
3007 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000218) argument
3010 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3012 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3014 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3016 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3028 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000234) argument
3029 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000234) argument
3032 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x) \ argument
3034 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3036 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3038 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3050 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000238) argument
3051 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000238) argument
3054 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x) \ argument
3056 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3058 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3060 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3075 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x) (x+0x0000023c) argument
3076 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x) (x+0x0000023c) argument
3079 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x) \ argument
3081 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask) \ argument
3083 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val) \ argument
3085 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3097 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000240) argument
3098 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000240) argument
3101 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3103 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3105 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3107 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3119 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x) (x+0x00000244) argument
3120 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x) (x+0x00000244) argument
3123 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x) \ argument
3125 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask) \ argument
3127 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val) \ argument
3129 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3141 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x) (x+0x00000248) argument
3142 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x) (x+0x00000248) argument
3145 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x) \ argument
3147 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask) \ argument
3149 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val) \ argument
3151 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3166 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x) (x+0x0000024c) argument
3167 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x) (x+0x0000024c) argument
3170 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x) \ argument
3172 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask) \ argument
3174 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val) \ argument
3176 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3191 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x) (x+0x00000250) argument
3192 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x) (x+0x00000250) argument
3195 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x) \ argument
3197 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask) \ argument
3199 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val) \ argument
3201 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
3216 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x) (x+0x00000254) argument
3217 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x) (x+0x00000254) argument
3220 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x) \ argument
3222 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask) \ argument
3224 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val) \ argument
3226 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
3271 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000258) argument
3272 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000258) argument
3275 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x) \ argument
3277 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3279 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3281 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3293 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000025c) argument
3294 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000025c) argument
3297 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x) \ argument
3299 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3301 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3303 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3315 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000268) argument
3316 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000268) argument
3319 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3321 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3323 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3325 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3343 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000026c) argument
3344 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000026c) argument
3347 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3349 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3351 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3353 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3371 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000270) argument
3372 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000270) argument
3375 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3377 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3379 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3381 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3393 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000028c) argument
3394 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000028c) argument
3397 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x) \ argument
3399 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3401 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3403 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3415 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000290) argument
3416 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000290) argument
3419 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x) \ argument
3421 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3423 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3425 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3440 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x) (x+0x00000294) argument
3441 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x) (x+0x00000294) argument
3444 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x) \ argument
3446 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask) \ argument
3448 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val) \ argument
3450 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3462 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000298) argument
3463 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000298) argument
3466 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3468 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3470 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3472 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3484 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x) (x+0x0000029c) argument
3485 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x) (x+0x0000029c) argument
3488 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x) \ argument
3490 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask) \ argument
3492 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val) \ argument
3494 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3506 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x) (x+0x000002a0) argument
3507 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x) (x+0x000002a0) argument
3510 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x) \ argument
3512 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask) \ argument
3514 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val) \ argument
3516 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3531 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x) (x+0x000002a4) argument
3532 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x) (x+0x000002a4) argument
3535 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x) \ argument
3537 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask) \ argument
3539 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val) \ argument
3541 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
3556 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x) (x+0x000002a8) argument
3557 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x) (x+0x000002a8) argument
3560 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x) \ argument
3562 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask) \ argument
3564 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val) \ argument
3566 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
3581 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x) (x+0x000002ac) argument
3582 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x) (x+0x000002ac) argument
3585 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x) \ argument
3587 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask) \ argument
3589 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val) \ argument
3591 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
3636 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x) (x+0x000002b0) argument
3637 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x) (x+0x000002b0) argument
3640 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x) \ argument
3642 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3644 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3646 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3658 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x) (x+0x000002b4) argument
3659 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x) (x+0x000002b4) argument
3662 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x) \ argument
3664 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3666 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3668 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3680 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000002c0) argument
3681 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000002c0) argument
3684 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3686 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3688 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3690 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3708 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000002c4) argument
3709 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000002c4) argument
3712 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3714 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3716 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3718 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3736 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000002c8) argument
3737 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000002c8) argument
3740 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3742 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3744 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3746 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3758 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000002e4) argument
3759 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000002e4) argument
3762 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x) \ argument
3764 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3766 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3768 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3780 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000002e8) argument
3781 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000002e8) argument
3784 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x) \ argument
3786 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3788 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3790 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3805 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x) (x+0x000002ec) argument
3806 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x) (x+0x000002ec) argument
3809 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x) \ argument
3811 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask) \ argument
3813 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val) \ argument
3815 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3827 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000002f0) argument
3828 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000002f0) argument
3831 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3833 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3835 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3837 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3849 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x) (x+0x000002f4) argument
3850 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x) (x+0x000002f4) argument
3853 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x) \ argument
3855 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask) \ argument
3857 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val) \ argument
3859 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3871 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x) (x+0x000002f8) argument
3872 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x) (x+0x000002f8) argument
3875 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x) \ argument
3877 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask) \ argument
3879 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val) \ argument
3881 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3896 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x) (x+0x000002fc) argument
3897 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x) (x+0x000002fc) argument
3900 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x) \ argument
3902 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask) \ argument
3904 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val) \ argument
3906 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
3921 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x) (x+0x00000300) argument
3922 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x) (x+0x00000300) argument
3925 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x) \ argument
3927 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask) \ argument
3929 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val) \ argument
3931 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
3946 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x) (x+0x00000304) argument
3947 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x) (x+0x00000304) argument
3950 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x) \ argument
3952 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask) \ argument
3954 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val) \ argument
3956 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
4001 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000308) argument
4002 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000308) argument
4005 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x) \ argument
4007 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4009 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4011 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4023 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000030c) argument
4024 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000030c) argument
4027 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x) \ argument
4029 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4031 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4033 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4045 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000318) argument
4046 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000318) argument
4049 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4051 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4053 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4055 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4073 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000031c) argument
4074 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000031c) argument
4077 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4079 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4081 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4083 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4101 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000320) argument
4102 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000320) argument
4105 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4107 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4109 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4111 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4123 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000033c) argument
4124 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000033c) argument
4127 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x) \ argument
4129 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4131 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4133 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4145 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000340) argument
4146 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000340) argument
4149 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x) \ argument
4151 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4153 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4155 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4170 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x) (x+0x00000344) argument
4171 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x) (x+0x00000344) argument
4174 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x) \ argument
4176 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask) \ argument
4178 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val) \ argument
4180 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4192 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000348) argument
4193 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000348) argument
4196 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4198 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4200 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4202 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4214 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x) (x+0x0000034c) argument
4215 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_PHYS(x) (x+0x0000034c) argument
4218 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_IN(x) \ argument
4220 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_INM(x, mask) \ argument
4222 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUT(x, val) \ argument
4224 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4236 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x) (x+0x00000350) argument
4237 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_PHYS(x) (x+0x00000350) argument
4240 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_IN(x) \ argument
4242 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_INM(x, mask) \ argument
4244 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUT(x, val) \ argument
4246 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4261 #define HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x) (x+0x00000354) argument
4262 #define HWIO_REO_R0_REO2SW5_RING_ID_PHYS(x) (x+0x00000354) argument
4265 #define HWIO_REO_R0_REO2SW5_RING_ID_IN(x) \ argument
4267 #define HWIO_REO_R0_REO2SW5_RING_ID_INM(x, mask) \ argument
4269 #define HWIO_REO_R0_REO2SW5_RING_ID_OUT(x, val) \ argument
4271 #define HWIO_REO_R0_REO2SW5_RING_ID_OUTM(x, mask, val) \ argument
4286 #define HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x) (x+0x00000358) argument
4287 #define HWIO_REO_R0_REO2SW5_RING_STATUS_PHYS(x) (x+0x00000358) argument
4290 #define HWIO_REO_R0_REO2SW5_RING_STATUS_IN(x) \ argument
4292 #define HWIO_REO_R0_REO2SW5_RING_STATUS_INM(x, mask) \ argument
4294 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUT(x, val) \ argument
4296 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUTM(x, mask, val) \ argument
4311 #define HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x) (x+0x0000035c) argument
4312 #define HWIO_REO_R0_REO2SW5_RING_MISC_PHYS(x) (x+0x0000035c) argument
4315 #define HWIO_REO_R0_REO2SW5_RING_MISC_IN(x) \ argument
4317 #define HWIO_REO_R0_REO2SW5_RING_MISC_INM(x, mask) \ argument
4319 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUT(x, val) \ argument
4321 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUTM(x, mask, val) \ argument
4366 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000360) argument
4367 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000360) argument
4370 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_IN(x) \ argument
4372 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4374 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4376 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4388 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000364) argument
4389 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000364) argument
4392 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_IN(x) \ argument
4394 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4396 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4398 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4410 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000370) argument
4411 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000370) argument
4414 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4416 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4418 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4420 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4438 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000374) argument
4439 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000374) argument
4442 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4444 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4446 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4448 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4466 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000378) argument
4467 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000378) argument
4470 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4472 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4474 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4476 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4488 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000394) argument
4489 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000394) argument
4492 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_IN(x) \ argument
4494 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4496 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4498 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4510 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000398) argument
4511 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000398) argument
4514 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_IN(x) \ argument
4516 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4518 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4520 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4535 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x) (x+0x0000039c) argument
4536 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_PHYS(x) (x+0x0000039c) argument
4539 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_IN(x) \ argument
4541 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_INM(x, mask) \ argument
4543 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUT(x, val) \ argument
4545 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4557 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000003a0) argument
4558 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000003a0) argument
4561 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4563 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4565 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4567 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4579 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x) (x+0x000003a4) argument
4580 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_PHYS(x) (x+0x000003a4) argument
4583 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_IN(x) \ argument
4585 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_INM(x, mask) \ argument
4587 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUT(x, val) \ argument
4589 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4601 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x) (x+0x000003a8) argument
4602 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_PHYS(x) (x+0x000003a8) argument
4605 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_IN(x) \ argument
4607 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_INM(x, mask) \ argument
4609 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUT(x, val) \ argument
4611 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4626 #define HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x) (x+0x000003ac) argument
4627 #define HWIO_REO_R0_REO2SW6_RING_ID_PHYS(x) (x+0x000003ac) argument
4630 #define HWIO_REO_R0_REO2SW6_RING_ID_IN(x) \ argument
4632 #define HWIO_REO_R0_REO2SW6_RING_ID_INM(x, mask) \ argument
4634 #define HWIO_REO_R0_REO2SW6_RING_ID_OUT(x, val) \ argument
4636 #define HWIO_REO_R0_REO2SW6_RING_ID_OUTM(x, mask, val) \ argument
4651 #define HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x) (x+0x000003b0) argument
4652 #define HWIO_REO_R0_REO2SW6_RING_STATUS_PHYS(x) (x+0x000003b0) argument
4655 #define HWIO_REO_R0_REO2SW6_RING_STATUS_IN(x) \ argument
4657 #define HWIO_REO_R0_REO2SW6_RING_STATUS_INM(x, mask) \ argument
4659 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUT(x, val) \ argument
4661 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUTM(x, mask, val) \ argument
4676 #define HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x) (x+0x000003b4) argument
4677 #define HWIO_REO_R0_REO2SW6_RING_MISC_PHYS(x) (x+0x000003b4) argument
4680 #define HWIO_REO_R0_REO2SW6_RING_MISC_IN(x) \ argument
4682 #define HWIO_REO_R0_REO2SW6_RING_MISC_INM(x, mask) \ argument
4684 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUT(x, val) \ argument
4686 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUTM(x, mask, val) \ argument
4731 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x) (x+0x000003b8) argument
4732 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_PHYS(x) (x+0x000003b8) argument
4735 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_IN(x) \ argument
4737 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4739 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4741 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4753 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x) (x+0x000003bc) argument
4754 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_PHYS(x) (x+0x000003bc) argument
4757 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_IN(x) \ argument
4759 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4761 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4763 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4775 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000003c8) argument
4776 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000003c8) argument
4779 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4781 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4783 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4785 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4803 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000003cc) argument
4804 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000003cc) argument
4807 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4809 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4811 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4813 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4831 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000003d0) argument
4832 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000003d0) argument
4835 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4837 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4839 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4841 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4853 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000003ec) argument
4854 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000003ec) argument
4857 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_IN(x) \ argument
4859 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4861 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4863 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4875 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000003f0) argument
4876 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000003f0) argument
4879 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_IN(x) \ argument
4881 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4883 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4885 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4900 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x) (x+0x000003f4) argument
4901 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_PHYS(x) (x+0x000003f4) argument
4904 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_IN(x) \ argument
4906 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_INM(x, mask) \ argument
4908 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUT(x, val) \ argument
4910 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4922 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000003f8) argument
4923 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000003f8) argument
4926 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4928 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4930 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4932 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4944 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x) (x+0x000003fc) argument
4945 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x) (x+0x000003fc) argument
4948 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x) \ argument
4950 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask) \ argument
4952 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val) \ argument
4954 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4966 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x) (x+0x00000400) argument
4967 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x) (x+0x00000400) argument
4970 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x) \ argument
4972 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask) \ argument
4974 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val) \ argument
4976 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4991 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x) (x+0x00000404) argument
4992 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x) (x+0x00000404) argument
4995 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x) \ argument
4997 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask) \ argument
4999 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val) \ argument
5001 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
5016 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x) (x+0x00000408) argument
5017 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x) (x+0x00000408) argument
5020 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x) \ argument
5022 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask) \ argument
5024 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val) \ argument
5026 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
5041 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x) (x+0x0000040c) argument
5042 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x) (x+0x0000040c) argument
5045 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x) \ argument
5047 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask) \ argument
5049 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val) \ argument
5051 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
5096 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000410) argument
5097 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000410) argument
5100 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x) \ argument
5102 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5104 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5106 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5118 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000414) argument
5119 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000414) argument
5122 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x) \ argument
5124 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5126 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5128 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5140 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000420) argument
5141 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000420) argument
5144 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5146 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5148 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5150 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5168 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000424) argument
5169 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000424) argument
5172 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5174 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5176 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5178 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5196 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000428) argument
5197 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000428) argument
5200 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5202 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5204 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5206 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5218 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000444) argument
5219 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000444) argument
5222 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x) \ argument
5224 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5226 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5228 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5240 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000448) argument
5241 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000448) argument
5244 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x) \ argument
5246 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5248 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5250 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5265 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x) (x+0x0000044c) argument
5266 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x) (x+0x0000044c) argument
5269 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x) \ argument
5271 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask) \ argument
5273 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val) \ argument
5275 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5287 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000450) argument
5288 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000450) argument
5291 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5293 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5295 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5297 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5309 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x) (x+0x00000454) argument
5310 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x) (x+0x00000454) argument
5313 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x) \ argument
5315 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask) \ argument
5317 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val) \ argument
5319 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5331 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x) (x+0x00000458) argument
5332 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x) (x+0x00000458) argument
5335 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x) \ argument
5337 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask) \ argument
5339 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val) \ argument
5341 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5356 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x) (x+0x0000045c) argument
5357 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x) (x+0x0000045c) argument
5360 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x) \ argument
5362 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask) \ argument
5364 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val) \ argument
5366 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
5381 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x) (x+0x00000460) argument
5382 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x) (x+0x00000460) argument
5385 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x) \ argument
5387 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask) \ argument
5389 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val) \ argument
5391 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
5406 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x) (x+0x00000464) argument
5407 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x) (x+0x00000464) argument
5410 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x) \ argument
5412 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask) \ argument
5414 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val) \ argument
5416 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
5461 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000468) argument
5462 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000468) argument
5465 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x) \ argument
5467 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5469 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5471 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5483 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000046c) argument
5484 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000046c) argument
5487 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x) \ argument
5489 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5491 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5493 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5505 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000478) argument
5506 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000478) argument
5509 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5511 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5513 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5515 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5533 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000047c) argument
5534 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000047c) argument
5537 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5539 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5541 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5543 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5561 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000480) argument
5562 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000480) argument
5565 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5567 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5569 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5571 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5583 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000049c) argument
5584 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000049c) argument
5587 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x) \ argument
5589 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5591 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5593 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5605 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004a0) argument
5606 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004a0) argument
5609 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x) \ argument
5611 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5613 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5615 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5630 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x) (x+0x000004a4) argument
5631 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x) (x+0x000004a4) argument
5634 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x) \ argument
5636 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask) \ argument
5638 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val) \ argument
5640 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5652 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000004a8) argument
5653 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000004a8) argument
5656 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5658 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5660 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5662 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5674 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x) (x+0x000004ac) argument
5675 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x) (x+0x000004ac) argument
5678 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x) \ argument
5680 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask) \ argument
5682 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val) \ argument
5684 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5696 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x) (x+0x000004b0) argument
5697 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x) (x+0x000004b0) argument
5700 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x) \ argument
5702 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask) \ argument
5704 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val) \ argument
5706 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5721 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x) (x+0x000004b4) argument
5722 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x) (x+0x000004b4) argument
5725 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x) \ argument
5727 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask) \ argument
5729 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val) \ argument
5731 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
5746 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x) (x+0x000004b8) argument
5747 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x) (x+0x000004b8) argument
5750 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x) \ argument
5752 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask) \ argument
5754 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val) \ argument
5756 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
5771 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x) (x+0x000004bc) argument
5772 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x) (x+0x000004bc) argument
5775 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x) \ argument
5777 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask) \ argument
5779 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val) \ argument
5781 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
5826 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x) (x+0x000004c0) argument
5827 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x) (x+0x000004c0) argument
5830 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x) \ argument
5832 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5834 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5836 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5848 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x) (x+0x000004c4) argument
5849 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x) (x+0x000004c4) argument
5852 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x) \ argument
5854 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5856 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5858 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5870 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000004d0) argument
5871 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000004d0) argument
5874 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5876 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5878 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5880 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5898 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000004d4) argument
5899 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000004d4) argument
5902 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5904 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5906 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5908 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5926 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000004d8) argument
5927 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000004d8) argument
5930 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5932 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5934 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5936 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5948 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000004f4) argument
5949 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000004f4) argument
5952 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_IN(x) \ argument
5954 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5956 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5958 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5970 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004f8) argument
5971 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004f8) argument
5974 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_IN(x) \ argument
5976 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5978 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5980 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5995 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x) (x+0x000004fc) argument
5996 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_PHYS(x) (x+0x000004fc) argument
5999 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_IN(x) \ argument
6001 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_INM(x, mask) \ argument
6003 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUT(x, val) \ argument
6005 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6017 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000500) argument
6018 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000500) argument
6021 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x) \ argument
6023 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
6025 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6027 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6039 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x) (x+0x00000504) argument
6040 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x) (x+0x00000504) argument
6043 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x) \ argument
6045 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask) \ argument
6047 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val) \ argument
6049 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
6061 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x) (x+0x00000508) argument
6062 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x) (x+0x00000508) argument
6065 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x) \ argument
6067 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask) \ argument
6069 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val) \ argument
6071 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
6086 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x) (x+0x0000050c) argument
6087 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x) (x+0x0000050c) argument
6090 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x) \ argument
6092 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask) \ argument
6094 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val) \ argument
6096 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
6111 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x) (x+0x00000510) argument
6112 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x) (x+0x00000510) argument
6115 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x) \ argument
6117 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask) \ argument
6119 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val) \ argument
6121 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
6136 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x) (x+0x00000514) argument
6137 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x) (x+0x00000514) argument
6140 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x) \ argument
6142 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask) \ argument
6144 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val) \ argument
6146 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
6191 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000518) argument
6192 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000518) argument
6195 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x) \ argument
6197 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask) \ argument
6199 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val) \ argument
6201 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
6213 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000051c) argument
6214 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000051c) argument
6217 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x) \ argument
6219 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask) \ argument
6221 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val) \ argument
6223 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
6235 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000528) argument
6236 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000528) argument
6239 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x) \ argument
6241 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
6243 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
6245 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
6263 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000052c) argument
6264 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000052c) argument
6267 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x) \ argument
6269 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
6271 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
6273 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
6291 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000530) argument
6292 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000530) argument
6295 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
6297 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
6299 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
6301 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
6313 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000054c) argument
6314 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000054c) argument
6317 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x) \ argument
6319 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
6321 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
6323 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
6335 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000550) argument
6336 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000550) argument
6339 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x) \ argument
6341 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
6343 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
6345 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
6360 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x) (x+0x00000554) argument
6361 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x) (x+0x00000554) argument
6364 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x) \ argument
6366 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask) \ argument
6368 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val) \ argument
6370 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6382 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000558) argument
6383 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000558) argument
6386 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x) \ argument
6388 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
6390 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6392 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6404 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x) (x+0x0000055c) argument
6405 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x) (x+0x0000055c) argument
6408 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x) \ argument
6410 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask) \ argument
6412 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val) \ argument
6414 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
6429 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x) (x+0x00000560) argument
6430 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x) (x+0x00000560) argument
6433 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x) \ argument
6435 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask) \ argument
6437 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val) \ argument
6439 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
6451 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x) (x+0x00000564) argument
6452 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x) (x+0x00000564) argument
6455 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x) \ argument
6457 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask) \ argument
6459 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val) \ argument
6461 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
6473 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x) (x+0x00000568) argument
6474 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x) (x+0x00000568) argument
6477 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x) \ argument
6479 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask) \ argument
6481 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val) \ argument
6483 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
6495 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x) (x+0x0000056c) argument
6496 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x) (x+0x0000056c) argument
6499 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x) \ argument
6501 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask) \ argument
6503 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val) \ argument
6505 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
6517 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x) (x+0x00000570) argument
6518 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x) (x+0x00000570) argument
6521 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x) \ argument
6523 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask) \ argument
6525 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val) \ argument
6527 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
6539 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x) (x+0x00000574) argument
6540 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x) (x+0x00000574) argument
6543 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x) \ argument
6545 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask) \ argument
6547 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val) \ argument
6549 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6561 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x) (x+0x00000578) argument
6562 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x) (x+0x00000578) argument
6565 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x) \ argument
6567 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask) \ argument
6569 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val) \ argument
6571 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6583 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x) (x+0x0000057c) argument
6584 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x) (x+0x0000057c) argument
6587 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x) \ argument
6589 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask) \ argument
6591 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val) \ argument
6593 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6605 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x) (x+0x00000580) argument
6606 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x) (x+0x00000580) argument
6609 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x) \ argument
6611 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask) \ argument
6613 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val) \ argument
6615 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6627 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x) (x+0x00000584) argument
6628 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x) (x+0x00000584) argument
6631 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x) \ argument
6633 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask) \ argument
6635 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val) \ argument
6637 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6649 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x) (x+0x00000588) argument
6650 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x) (x+0x00000588) argument
6653 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x) \ argument
6655 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask) \ argument
6657 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val) \ argument
6659 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6671 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x) (x+0x0000058c) argument
6672 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x) (x+0x0000058c) argument
6675 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x) \ argument
6677 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask) \ argument
6679 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val) \ argument
6681 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6693 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x) (x+0x00000590) argument
6694 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x) (x+0x00000590) argument
6697 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x) \ argument
6699 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask) \ argument
6701 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val) \ argument
6703 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6715 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x) (x+0x00000594) argument
6716 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x) (x+0x00000594) argument
6719 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x) \ argument
6721 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask) \ argument
6723 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val) \ argument
6725 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6737 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x) (x+0x00000598) argument
6738 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x) (x+0x00000598) argument
6741 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x) \ argument
6743 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask) \ argument
6745 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val) \ argument
6747 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6759 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x) (x+0x0000059c) argument
6760 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x) (x+0x0000059c) argument
6763 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x) \ argument
6765 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask) \ argument
6767 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val) \ argument
6769 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6781 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x) (x+0x000005a0) argument
6782 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x) (x+0x000005a0) argument
6785 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x) \ argument
6787 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask) \ argument
6789 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val) \ argument
6791 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6803 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x) (x+0x000005a4) argument
6804 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x) (x+0x000005a4) argument
6807 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x) \ argument
6809 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask) \ argument
6811 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val) \ argument
6813 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6825 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x) (x+0x000005a8) argument
6826 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x) (x+0x000005a8) argument
6829 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x) \ argument
6831 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask) \ argument
6833 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val) \ argument
6835 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6847 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x) (x+0x000005ac) argument
6848 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x) (x+0x000005ac) argument
6851 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x) \ argument
6853 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask) \ argument
6855 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val) \ argument
6857 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6869 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x) (x+0x000005b0) argument
6870 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x) (x+0x000005b0) argument
6873 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x) \ argument
6875 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask) \ argument
6877 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val) \ argument
6879 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6891 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x) (x+0x000005b4) argument
6892 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x) (x+0x000005b4) argument
6895 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x) \ argument
6897 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask) \ argument
6899 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val) \ argument
6901 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
6913 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x) (x+0x000005b8) argument
6914 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x) (x+0x000005b8) argument
6917 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x) \ argument
6919 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask) \ argument
6921 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val) \ argument
6923 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
6935 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x) (x+0x000005bc) argument
6936 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x) (x+0x000005bc) argument
6939 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x) \ argument
6941 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask) \ argument
6943 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val) \ argument
6945 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
6957 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x) (x+0x000005c0) argument
6958 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x) (x+0x000005c0) argument
6961 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x) \ argument
6963 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask) \ argument
6965 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val) \ argument
6967 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
6979 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x) (x+0x000005c4) argument
6980 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x) (x+0x000005c4) argument
6983 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x) \ argument
6985 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask) \ argument
6987 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val) \ argument
6989 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
7001 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x) (x+0x000005c8) argument
7002 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x) (x+0x000005c8) argument
7005 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x) \ argument
7007 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask) \ argument
7009 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val) \ argument
7011 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
7023 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x) (x+0x000005cc) argument
7024 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x) (x+0x000005cc) argument
7027 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x) \ argument
7029 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask) \ argument
7031 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val) \ argument
7033 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
7045 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x) (x+0x000005d0) argument
7046 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x) (x+0x000005d0) argument
7049 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x) \ argument
7051 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask) \ argument
7053 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val) \ argument
7055 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
7067 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x) (x+0x000005d4) argument
7068 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x) (x+0x000005d4) argument
7071 #define HWIO_REO_R0_AGING_CONTROL_IN(x) \ argument
7073 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask) \ argument
7075 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val) \ argument
7077 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
7089 #define HWIO_REO_R0_MISC_CTL_ADDR(x) (x+0x000005d8) argument
7090 #define HWIO_REO_R0_MISC_CTL_PHYS(x) (x+0x000005d8) argument
7093 #define HWIO_REO_R0_MISC_CTL_IN(x) \ argument
7095 #define HWIO_REO_R0_MISC_CTL_INM(x, mask) \ argument
7097 #define HWIO_REO_R0_MISC_CTL_OUT(x, val) \ argument
7099 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val) \ argument
7120 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x) (x+0x000005dc) argument
7121 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x) (x+0x000005dc) argument
7124 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x) \ argument
7126 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask) \ argument
7128 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val) \ argument
7130 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
7142 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x) (x+0x000005e0) argument
7143 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x) (x+0x000005e0) argument
7146 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x) \ argument
7148 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask) \ argument
7150 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val) \ argument
7152 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
7164 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x) (x+0x000005e4) argument
7165 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x) (x+0x000005e4) argument
7168 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x) \ argument
7170 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask) \ argument
7172 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val) \ argument
7174 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
7186 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x) (x+0x000005e8) argument
7187 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x) (x+0x000005e8) argument
7190 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x) \ argument
7192 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask) \ argument
7194 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val) \ argument
7196 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
7208 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x) (x+0x000005ec) argument
7209 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x) (x+0x000005ec) argument
7212 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x) \ argument
7214 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask) \ argument
7216 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val) \ argument
7218 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
7230 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x) (x+0x000005f0) argument
7231 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x) (x+0x000005f0) argument
7234 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x) \ argument
7236 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask) \ argument
7238 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val) \ argument
7240 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
7252 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x) (x+0x000005f4) argument
7253 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x) (x+0x000005f4) argument
7256 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x) \ argument
7258 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask) \ argument
7260 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val) \ argument
7262 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
7274 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x) (x+0x000005f8) argument
7275 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x) (x+0x000005f8) argument
7278 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x) \ argument
7280 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask) \ argument
7282 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val) \ argument
7284 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
7296 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x) (x+0x000005fc) argument
7297 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x) (x+0x000005fc) argument
7300 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x) \ argument
7302 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \ argument
7304 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val) \ argument
7306 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
7318 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x) (x+0x00000600) argument
7319 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x) (x+0x00000600) argument
7322 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x) \ argument
7324 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask) \ argument
7326 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val) \ argument
7328 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
7340 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x) (x+0x00000604) argument
7341 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x) (x+0x00000604) argument
7344 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x) \ argument
7346 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask) \ argument
7348 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val) \ argument
7350 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
7362 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x) (x+0x00000608) argument
7363 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x) (x+0x00000608) argument
7366 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x) \ argument
7368 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask) \ argument
7370 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val) \ argument
7372 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
7384 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x) (x+0x0000060c) argument
7385 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x) (x+0x0000060c) argument
7388 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x) \ argument
7390 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask) \ argument
7392 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val) \ argument
7394 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
7406 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x) (x+0x00000610) argument
7407 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x) (x+0x00000610) argument
7410 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x) \ argument
7412 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask) \ argument
7414 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val) \ argument
7416 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
7428 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x) (x+0x00000614) argument
7429 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x) (x+0x00000614) argument
7432 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x) \ argument
7434 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask) \ argument
7436 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val) \ argument
7438 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
7450 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x) (x+0x00000618) argument
7451 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x) (x+0x00000618) argument
7454 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x) \ argument
7456 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask) \ argument
7458 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val) \ argument
7460 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
7472 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x) (x+0x0000061c) argument
7473 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x) (x+0x0000061c) argument
7476 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x) \ argument
7478 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask) \ argument
7480 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val) \ argument
7482 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
7494 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x) (x+0x00000620) argument
7495 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x) (x+0x00000620) argument
7498 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x) \ argument
7500 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask) \ argument
7502 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val) \ argument
7504 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
7516 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x) (x+0x00000624) argument
7517 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x) (x+0x00000624) argument
7520 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x) \ argument
7522 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask) \ argument
7524 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val) \ argument
7526 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
7538 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x) (x+0x00000628) argument
7539 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x) (x+0x00000628) argument
7542 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x) \ argument
7544 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask) \ argument
7546 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val) \ argument
7548 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
7560 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x) (x+0x0000062c) argument
7561 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x) (x+0x0000062c) argument
7564 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x) \ argument
7566 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask) \ argument
7568 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val) \ argument
7570 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
7582 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x) (x+0x00000630) argument
7583 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x) (x+0x00000630) argument
7586 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x) \ argument
7588 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask) \ argument
7590 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val) \ argument
7592 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
7607 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000634) argument
7608 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000634) argument
7611 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7613 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7615 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7617 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7632 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000638) argument
7633 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000638) argument
7636 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7638 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7640 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7642 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7657 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x0000063c) argument
7658 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x0000063c) argument
7661 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7663 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7665 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7667 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7682 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000640) argument
7683 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000640) argument
7686 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7688 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7690 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7692 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7707 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000644) argument
7708 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000644) argument
7711 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7713 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7715 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7717 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7732 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000648) argument
7733 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000648) argument
7736 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7738 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7740 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7742 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7757 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x0000064c) argument
7758 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x0000064c) argument
7761 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7763 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7765 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7767 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7782 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000650) argument
7783 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000650) argument
7786 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7788 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7790 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7792 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7807 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x00000654) argument
7808 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x00000654) argument
7811 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x) \ argument
7813 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ argument
7815 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ argument
7817 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
7829 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x00000658) argument
7830 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x00000658) argument
7833 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x) \ argument
7835 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ argument
7837 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ argument
7839 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
7851 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x0000065c) argument
7852 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x0000065c) argument
7855 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x) \ argument
7857 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ argument
7859 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ argument
7861 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
7879 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x00000660) argument
7880 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x00000660) argument
7883 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x) \ argument
7885 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ argument
7887 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ argument
7889 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
7901 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x00000664) argument
7902 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x00000664) argument
7905 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ argument
7907 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ argument
7909 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ argument
7911 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
7959 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x00000668) argument
7960 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x00000668) argument
7963 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x) \ argument
7965 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ argument
7967 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ argument
7969 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
7990 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x0000066c) argument
7991 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x0000066c) argument
7994 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x) \ argument
7996 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ argument
7998 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ argument
8000 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
8018 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x00000670) argument
8019 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x00000670) argument
8022 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ argument
8024 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ argument
8026 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ argument
8028 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
8049 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x00000674) argument
8050 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x00000674) argument
8053 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ argument
8055 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ argument
8057 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ argument
8059 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
8080 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x00000678) argument
8081 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x00000678) argument
8084 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x) \ argument
8086 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ argument
8088 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ argument
8090 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
8129 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x0000067c) argument
8130 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x0000067c) argument
8133 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ argument
8135 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ argument
8137 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ argument
8139 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
8154 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x00000680) argument
8155 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x00000680) argument
8158 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x) \ argument
8160 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ argument
8162 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ argument
8164 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
8176 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x00000684) argument
8177 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x00000684) argument
8180 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ argument
8182 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ argument
8184 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ argument
8186 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
8201 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x00000688) argument
8202 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x00000688) argument
8205 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ argument
8207 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ argument
8209 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ argument
8211 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8229 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x0000068c) argument
8230 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x0000068c) argument
8233 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ argument
8235 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ argument
8237 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ argument
8239 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8257 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x00000690) argument
8258 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x00000690) argument
8261 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ argument
8263 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
8265 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8267 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8279 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x00000694) argument
8280 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x00000694) argument
8283 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ argument
8285 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
8287 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8289 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8301 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x00000698) argument
8302 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x00000698) argument
8305 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ argument
8307 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
8309 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8311 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8323 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x0000069c) argument
8324 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x0000069c) argument
8327 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ argument
8329 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
8331 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8333 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8345 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x) (x+0x000006a0) argument
8346 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x) (x+0x000006a0) argument
8349 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x) \ argument
8351 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask) \ argument
8353 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ argument
8355 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ argument
8376 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x) (x+0x000006a4) argument
8377 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x) (x+0x000006a4) argument
8380 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x) \ argument
8382 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask) \ argument
8384 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val) \ argument
8386 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
8425 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x) (x+0x000006a8) argument
8426 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x) (x+0x000006a8) argument
8429 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x) \ argument
8431 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask) \ argument
8433 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val) \ argument
8435 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
8450 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x) (x+0x000006ac) argument
8451 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_PHYS(x) (x+0x000006ac) argument
8454 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_IN(x) \ argument
8456 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask) \ argument
8458 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val) \ argument
8460 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val) \ argument
8472 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x) (x+0x000006b0) argument
8473 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_PHYS(x) (x+0x000006b0) argument
8476 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_IN(x) \ argument
8478 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask) \ argument
8480 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val) \ argument
8482 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val) \ argument
8494 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x) (x+0x000006b4) argument
8495 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x) (x+0x000006b4) argument
8498 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x) \ argument
8500 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask) \ argument
8502 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val) \ argument
8504 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
8543 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x) (x+0x000006b8) argument
8544 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x) (x+0x000006b8) argument
8547 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x) \ argument
8549 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask) \ argument
8551 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val) \ argument
8553 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
8565 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x) (x+0x000006bc) argument
8566 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x) (x+0x000006bc) argument
8569 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x) \ argument
8571 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask) \ argument
8573 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val) \ argument
8575 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
8587 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x) (x+0x000006c0) argument
8588 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x) (x+0x000006c0) argument
8591 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x) \ argument
8593 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask) \ argument
8595 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val) \ argument
8597 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
8609 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x) (x+0x000006c4) argument
8610 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x) (x+0x000006c4) argument
8613 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x) \ argument
8615 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask) \ argument
8617 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val) \ argument
8619 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
8631 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x) (x+0x00002000) argument
8632 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x) (x+0x00002000) argument
8635 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x) \ argument
8637 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask) \ argument
8639 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val) \ argument
8641 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8665 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x) (x+0x00002004) argument
8666 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x) (x+0x00002004) argument
8669 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x) \ argument
8671 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask) \ argument
8673 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val) \ argument
8675 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8690 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x) (x+0x00002008) argument
8691 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x) (x+0x00002008) argument
8694 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x) \ argument
8696 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask) \ argument
8698 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val) \ argument
8700 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
8721 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x) (x+0x0000200c) argument
8722 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x) (x+0x0000200c) argument
8725 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x) \ argument
8727 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask) \ argument
8729 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val) \ argument
8731 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
8743 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x) (x+0x00002010) argument
8744 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x) (x+0x00002010) argument
8747 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x) \ argument
8749 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask) \ argument
8751 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val) \ argument
8753 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
8765 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x) (x+0x00002014) argument
8766 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x) (x+0x00002014) argument
8769 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x) \ argument
8771 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask) \ argument
8773 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val) \ argument
8775 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
8787 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x) (x+0x00002018) argument
8788 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x) (x+0x00002018) argument
8791 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x) \ argument
8793 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask) \ argument
8795 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val) \ argument
8797 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
8809 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x) (x+0x0000201c) argument
8810 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x) (x+0x0000201c) argument
8813 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x) \ argument
8815 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask) \ argument
8817 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val) \ argument
8819 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
8831 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x) (x+0x00002020) argument
8832 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x) (x+0x00002020) argument
8835 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x) \ argument
8837 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask) \ argument
8839 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val) \ argument
8841 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
8856 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x) (x+0x00002024) argument
8857 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_PHYS(x) (x+0x00002024) argument
8860 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_IN(x) \ argument
8862 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask) \ argument
8864 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val) \ argument
8866 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val) \ argument
8881 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x) (x+0x00002028) argument
8882 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_PHYS(x) (x+0x00002028) argument
8885 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_IN(x) \ argument
8887 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask) \ argument
8889 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val) \ argument
8891 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val) \ argument
8906 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x) (x+0x0000202c) argument
8907 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_PHYS(x) (x+0x0000202c) argument
8910 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_IN(x) \ argument
8912 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask) \ argument
8914 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val) \ argument
8916 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val) \ argument
8931 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x) (x+0x00002030) argument
8932 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_PHYS(x) (x+0x00002030) argument
8935 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_IN(x) \ argument
8937 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask) \ argument
8939 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val) \ argument
8941 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \ argument
8953 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x) (x+0x00002034) argument
8954 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_PHYS(x) (x+0x00002034) argument
8957 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_IN(x) \ argument
8959 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask) \ argument
8961 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val) \ argument
8963 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \ argument
8975 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x) (x+0x00002038) argument
8976 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_PHYS(x) (x+0x00002038) argument
8979 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_IN(x) \ argument
8981 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask) \ argument
8983 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val) \ argument
8985 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \ argument
9000 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x) (x+0x0000203c) argument
9001 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x) (x+0x0000203c) argument
9004 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x) \ argument
9006 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask) \ argument
9008 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val) \ argument
9010 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
9022 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x) (x+0x00002040) argument
9023 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_PHYS(x) (x+0x00002040) argument
9026 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_IN(x) \ argument
9028 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_INM(x, mask) \ argument
9030 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUT(x, val) \ argument
9032 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \ argument
9053 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x) (x+0x00002044) argument
9054 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_PHYS(x) (x+0x00002044) argument
9057 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_IN(x) \ argument
9059 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_INM(x, mask) \ argument
9061 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUT(x, val) \ argument
9063 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \ argument
9075 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x) (x+0x00002048) argument
9076 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_PHYS(x) (x+0x00002048) argument
9079 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_IN(x) \ argument
9081 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_INM(x, mask) \ argument
9083 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUT(x, val) \ argument
9085 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \ argument
9097 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x) (x+0x0000204c) argument
9098 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_PHYS(x) (x+0x0000204c) argument
9101 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_IN(x) \ argument
9103 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_INM(x, mask) \ argument
9105 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUT(x, val) \ argument
9107 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val) \ argument
9140 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00002050) argument
9141 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00002050) argument
9144 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x) \ argument
9146 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask) \ argument
9148 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val) \ argument
9150 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
9162 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x) (x+0x00002054) argument
9163 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x) (x+0x00002054) argument
9166 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x) \ argument
9168 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask) \ argument
9170 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val) \ argument
9172 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
9190 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x) (x+0x00002058) argument
9191 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x) (x+0x00002058) argument
9194 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x) \ argument
9196 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask) \ argument
9198 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val) \ argument
9200 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
9212 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x) (x+0x0000205c) argument
9213 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x) (x+0x0000205c) argument
9216 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x) \ argument
9218 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask) \ argument
9220 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val) \ argument
9222 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
9234 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x) (x+0x00002060) argument
9235 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x) (x+0x00002060) argument
9238 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x) \ argument
9240 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask) \ argument
9242 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val) \ argument
9244 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
9256 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x) (x+0x00002064) argument
9257 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x) (x+0x00002064) argument
9260 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x) \ argument
9262 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask) \ argument
9264 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val) \ argument
9266 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
9278 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x) (x+0x00002068) argument
9279 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x) (x+0x00002068) argument
9282 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x) \ argument
9284 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask) \ argument
9286 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val) \ argument
9288 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
9300 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x) (x+0x0000206c) argument
9301 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x) (x+0x0000206c) argument
9304 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x) \ argument
9306 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask) \ argument
9308 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val) \ argument
9310 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
9322 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x) (x+0x00002070) argument
9323 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x) (x+0x00002070) argument
9326 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x) \ argument
9328 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask) \ argument
9330 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val) \ argument
9332 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
9344 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x) (x+0x00002074) argument
9345 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x) (x+0x00002074) argument
9348 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x) \ argument
9350 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask) \ argument
9352 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val) \ argument
9354 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
9366 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x) (x+0x00002078) argument
9367 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x) (x+0x00002078) argument
9370 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x) \ argument
9372 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask) \ argument
9374 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val) \ argument
9376 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
9388 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x) (x+0x0000207c) argument
9389 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x) (x+0x0000207c) argument
9392 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x) \ argument
9394 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask) \ argument
9396 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val) \ argument
9398 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
9410 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x) (x+0x00002080) argument
9411 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x) (x+0x00002080) argument
9414 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x) \ argument
9416 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask) \ argument
9418 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val) \ argument
9420 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
9432 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x) (x+0x00002084) argument
9433 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x) (x+0x00002084) argument
9436 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x) \ argument
9438 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask) \ argument
9440 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val) \ argument
9442 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
9457 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x) (x+0x00003000) argument
9458 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x) (x+0x00003000) argument
9461 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x) \ argument
9463 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask) \ argument
9465 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val) \ argument
9467 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
9479 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x) (x+0x00003004) argument
9480 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x) (x+0x00003004) argument
9483 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x) \ argument
9485 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask) \ argument
9487 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val) \ argument
9489 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
9501 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x) (x+0x00003008) argument
9502 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x) (x+0x00003008) argument
9505 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x) \ argument
9507 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask) \ argument
9509 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val) \ argument
9511 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
9523 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x) (x+0x0000300c) argument
9524 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x) (x+0x0000300c) argument
9527 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x) \ argument
9529 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask) \ argument
9531 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val) \ argument
9533 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
9545 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x) (x+0x00003010) argument
9546 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x) (x+0x00003010) argument
9549 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x) \ argument
9551 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask) \ argument
9553 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val) \ argument
9555 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
9567 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x) (x+0x00003014) argument
9568 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x) (x+0x00003014) argument
9571 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x) \ argument
9573 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask) \ argument
9575 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val) \ argument
9577 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
9589 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x) (x+0x00003018) argument
9590 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x) (x+0x00003018) argument
9593 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x) \ argument
9595 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask) \ argument
9597 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val) \ argument
9599 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
9611 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x) (x+0x0000301c) argument
9612 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x) (x+0x0000301c) argument
9615 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x) \ argument
9617 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask) \ argument
9619 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val) \ argument
9621 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
9633 #define HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x) (x+0x00003020) argument
9634 #define HWIO_REO_R2_SW2REO1_RING_HP_PHYS(x) (x+0x00003020) argument
9637 #define HWIO_REO_R2_SW2REO1_RING_HP_IN(x) \ argument
9639 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask) \ argument
9641 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val) \ argument
9643 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val) \ argument
9655 #define HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x) (x+0x00003024) argument
9656 #define HWIO_REO_R2_SW2REO1_RING_TP_PHYS(x) (x+0x00003024) argument
9659 #define HWIO_REO_R2_SW2REO1_RING_TP_IN(x) \ argument
9661 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask) \ argument
9663 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val) \ argument
9665 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val) \ argument
9677 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x) (x+0x00003028) argument
9678 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x) (x+0x00003028) argument
9681 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x) \ argument
9683 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask) \ argument
9685 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val) \ argument
9687 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
9699 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x) (x+0x0000302c) argument
9700 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x) (x+0x0000302c) argument
9703 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x) \ argument
9705 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask) \ argument
9707 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val) \ argument
9709 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
9721 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x) (x+0x00003030) argument
9722 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x) (x+0x00003030) argument
9725 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x) \ argument
9727 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask) \ argument
9729 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val) \ argument
9731 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
9743 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x) (x+0x00003034) argument
9744 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x) (x+0x00003034) argument
9747 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x) \ argument
9749 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask) \ argument
9751 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val) \ argument
9753 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
9765 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x) (x+0x00003038) argument
9766 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x) (x+0x00003038) argument
9769 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x) \ argument
9771 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask) \ argument
9773 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val) \ argument
9775 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
9787 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x) (x+0x0000303c) argument
9788 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x) (x+0x0000303c) argument
9791 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x) \ argument
9793 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask) \ argument
9795 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val) \ argument
9797 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
9809 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x) (x+0x00003040) argument
9810 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x) (x+0x00003040) argument
9813 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x) \ argument
9815 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask) \ argument
9817 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val) \ argument
9819 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
9831 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x) (x+0x00003044) argument
9832 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x) (x+0x00003044) argument
9835 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x) \ argument
9837 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask) \ argument
9839 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val) \ argument
9841 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
9853 #define HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x) (x+0x00003048) argument
9854 #define HWIO_REO_R2_REO2SW5_RING_HP_PHYS(x) (x+0x00003048) argument
9857 #define HWIO_REO_R2_REO2SW5_RING_HP_IN(x) \ argument
9859 #define HWIO_REO_R2_REO2SW5_RING_HP_INM(x, mask) \ argument
9861 #define HWIO_REO_R2_REO2SW5_RING_HP_OUT(x, val) \ argument
9863 #define HWIO_REO_R2_REO2SW5_RING_HP_OUTM(x, mask, val) \ argument
9875 #define HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x) (x+0x0000304c) argument
9876 #define HWIO_REO_R2_REO2SW5_RING_TP_PHYS(x) (x+0x0000304c) argument
9879 #define HWIO_REO_R2_REO2SW5_RING_TP_IN(x) \ argument
9881 #define HWIO_REO_R2_REO2SW5_RING_TP_INM(x, mask) \ argument
9883 #define HWIO_REO_R2_REO2SW5_RING_TP_OUT(x, val) \ argument
9885 #define HWIO_REO_R2_REO2SW5_RING_TP_OUTM(x, mask, val) \ argument
9897 #define HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x) (x+0x00003050) argument
9898 #define HWIO_REO_R2_REO2SW6_RING_HP_PHYS(x) (x+0x00003050) argument
9901 #define HWIO_REO_R2_REO2SW6_RING_HP_IN(x) \ argument
9903 #define HWIO_REO_R2_REO2SW6_RING_HP_INM(x, mask) \ argument
9905 #define HWIO_REO_R2_REO2SW6_RING_HP_OUT(x, val) \ argument
9907 #define HWIO_REO_R2_REO2SW6_RING_HP_OUTM(x, mask, val) \ argument
9919 #define HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x) (x+0x00003054) argument
9920 #define HWIO_REO_R2_REO2SW6_RING_TP_PHYS(x) (x+0x00003054) argument
9923 #define HWIO_REO_R2_REO2SW6_RING_TP_IN(x) \ argument
9925 #define HWIO_REO_R2_REO2SW6_RING_TP_INM(x, mask) \ argument
9927 #define HWIO_REO_R2_REO2SW6_RING_TP_OUT(x, val) \ argument
9929 #define HWIO_REO_R2_REO2SW6_RING_TP_OUTM(x, mask, val) \ argument
9941 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x) (x+0x00003058) argument
9942 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x) (x+0x00003058) argument
9945 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x) \ argument
9947 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask) \ argument
9949 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val) \ argument
9951 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
9963 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x) (x+0x0000305c) argument
9964 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x) (x+0x0000305c) argument
9967 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x) \ argument
9969 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask) \ argument
9971 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val) \ argument
9973 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
9985 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x) (x+0x00003060) argument
9986 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x) (x+0x00003060) argument
9989 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x) \ argument
9991 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask) \ argument
9993 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val) \ argument
9995 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
10007 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x) (x+0x00003064) argument
10008 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x) (x+0x00003064) argument
10011 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x) \ argument
10013 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask) \ argument
10015 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val) \ argument
10017 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
10029 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x) (x+0x00003068) argument
10030 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x) (x+0x00003068) argument
10033 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x) \ argument
10035 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask) \ argument
10037 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val) \ argument
10039 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
10051 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x) (x+0x0000306c) argument
10052 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x) (x+0x0000306c) argument
10055 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x) \ argument
10057 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask) \ argument
10059 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val) \ argument
10061 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
10073 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x) (x+0x00003070) argument
10074 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x) (x+0x00003070) argument
10077 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x) \ argument
10079 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask) \ argument
10081 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val) \ argument
10083 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
10095 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x) (x+0x00003074) argument
10096 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x) (x+0x00003074) argument
10099 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x) \ argument
10101 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask) \ argument
10103 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val) \ argument
10105 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument