Lines Matching defs:x
46 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x) (x+0x00000000) argument
47 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x) (x+0x00000000) argument
50 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x) \ argument
52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val) \ argument
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
128 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x) (x+0x00000004) argument
129 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x) (x+0x00000004) argument
132 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x) \ argument
134 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
136 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val) \ argument
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
171 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x) (x+0x00000008) argument
172 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x) (x+0x00000008) argument
175 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x) \ argument
177 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
179 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val) \ argument
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
214 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x) (x+0x0000000c) argument
215 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x) (x+0x0000000c) argument
218 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x) \ argument
220 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask) \ argument
222 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val) \ argument
224 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
257 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x) (x+0x00000010) argument
258 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x) (x+0x00000010) argument
261 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x) \ argument
263 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask) \ argument
265 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val) \ argument
267 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
300 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x) (x+0x00000014) argument
301 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x) (x+0x00000014) argument
304 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x) \ argument
306 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask) \ argument
308 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val) \ argument
310 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
343 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x) (x+0x00000018) argument
344 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x) (x+0x00000018) argument
347 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x) \ argument
349 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask) \ argument
351 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val) \ argument
353 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
386 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x) (x+0x0000001c) argument
387 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x) (x+0x0000001c) argument
390 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x) \ argument
392 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask) \ argument
394 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val) \ argument
396 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
429 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x) (x+0x00000020) argument
430 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x) (x+0x00000020) argument
433 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x) \ argument
435 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask) \ argument
437 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val) \ argument
439 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
472 #define HWIO_REO_R0_TIMESTAMP_ADDR(x) (x+0x00000024) argument
473 #define HWIO_REO_R0_TIMESTAMP_PHYS(x) (x+0x00000024) argument
476 #define HWIO_REO_R0_TIMESTAMP_IN(x) \ argument
478 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask) \ argument
480 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val) \ argument
482 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
494 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x) (x+0x00000028) argument
495 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x) (x+0x00000028) argument
498 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x) \ argument
500 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask) \ argument
502 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val) \ argument
504 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
543 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x) (x+0x0000002c) argument
544 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x) (x+0x0000002c) argument
547 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x) \ argument
549 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask) \ argument
551 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val) \ argument
553 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
580 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x) (x+0x00000030) argument
581 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x) (x+0x00000030) argument
584 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x) \ argument
586 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask) \ argument
588 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val) \ argument
590 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
605 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x) (x+0x00000034) argument
606 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x) (x+0x00000034) argument
609 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x) \ argument
611 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask) \ argument
613 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val) \ argument
615 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
627 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x) (x+0x00000038) argument
628 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x) (x+0x00000038) argument
631 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x) \ argument
633 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask) \ argument
635 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val) \ argument
637 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
652 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x) (x+0x0000003c) argument
653 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x) (x+0x0000003c) argument
656 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x) \ argument
658 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask) \ argument
660 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val) \ argument
662 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
674 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x) (x+0x00000040) argument
675 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x) (x+0x00000040) argument
678 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x) \ argument
680 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask) \ argument
682 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val) \ argument
684 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
699 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x) (x+0x00000044) argument
700 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x) (x+0x00000044) argument
703 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x) \ argument
705 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask) \ argument
707 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val) \ argument
709 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
736 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000050) argument
737 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000050) argument
740 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x) \ argument
742 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask) \ argument
744 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val) \ argument
746 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
758 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000054) argument
759 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000054) argument
762 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x) \ argument
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask) \ argument
766 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val) \ argument
768 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
780 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000064) argument
781 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000064) argument
784 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
786 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
788 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
790 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000068) argument
809 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000068) argument
812 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
814 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
816 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
818 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
830 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000006c) argument
831 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000006c) argument
834 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x) \ argument
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
838 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
840 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000070) argument
859 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000070) argument
862 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
864 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
866 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
868 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
880 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000074) argument
881 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000074) argument
884 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
888 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
890 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
902 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078) argument
903 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078) argument
906 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
910 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
912 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
927 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000007c) argument
928 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000007c) argument
931 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x) \ argument
933 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
935 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
937 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
949 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000080) argument
950 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000080) argument
953 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x) \ argument
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
957 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
959 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
974 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x) (x+0x00000084) argument
975 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x) (x+0x00000084) argument
978 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x) \ argument
980 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask) \ argument
982 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val) \ argument
984 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
996 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000088) argument
997 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000088) argument
1000 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1004 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1006 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1018 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x) (x+0x0000008c) argument
1019 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_PHYS(x) (x+0x0000008c) argument
1022 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_IN(x) \ argument
1024 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_INM(x, mask) \ argument
1026 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUT(x, val) \ argument
1028 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1040 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x) (x+0x00000090) argument
1041 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_PHYS(x) (x+0x00000090) argument
1044 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_IN(x) \ argument
1046 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_INM(x, mask) \ argument
1048 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUT(x, val) \ argument
1050 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1065 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x) (x+0x00000094) argument
1066 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_PHYS(x) (x+0x00000094) argument
1069 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_IN(x) \ argument
1071 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_INM(x, mask) \ argument
1073 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUT(x, val) \ argument
1075 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUTM(x, mask, val) \ argument
1087 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x) (x+0x00000098) argument
1088 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_PHYS(x) (x+0x00000098) argument
1091 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_IN(x) \ argument
1093 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_INM(x, mask) \ argument
1095 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUT(x, val) \ argument
1097 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
1112 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x) (x+0x0000009c) argument
1113 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_PHYS(x) (x+0x0000009c) argument
1116 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_IN(x) \ argument
1118 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_INM(x, mask) \ argument
1120 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUT(x, val) \ argument
1122 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUTM(x, mask, val) \ argument
1149 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000000a8) argument
1150 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000000a8) argument
1153 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_IN(x) \ argument
1155 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1157 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1159 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1171 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000000ac) argument
1172 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000000ac) argument
1175 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_IN(x) \ argument
1177 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1179 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1181 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1193 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000000bc) argument
1194 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000000bc) argument
1197 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1199 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1201 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1203 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1221 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000000c0) argument
1222 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000000c0) argument
1225 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1227 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1229 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1231 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1243 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000000c4) argument
1244 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000000c4) argument
1247 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1249 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1251 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1253 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1271 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000000c8) argument
1272 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000000c8) argument
1275 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1277 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1279 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1281 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1293 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000000cc) argument
1294 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000000cc) argument
1297 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1299 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1301 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1303 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1315 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0) argument
1316 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0) argument
1319 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1321 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1323 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1325 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1340 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000000d4) argument
1341 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000000d4) argument
1344 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_IN(x) \ argument
1346 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1348 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1350 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1362 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000000d8) argument
1363 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000000d8) argument
1366 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_IN(x) \ argument
1368 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1370 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1372 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1387 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x) (x+0x000000dc) argument
1388 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_PHYS(x) (x+0x000000dc) argument
1391 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_IN(x) \ argument
1393 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_INM(x, mask) \ argument
1395 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
1397 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1409 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000000e0) argument
1410 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000000e0) argument
1413 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1415 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1417 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1419 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1431 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x) (x+0x000000e4) argument
1432 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_PHYS(x) (x+0x000000e4) argument
1435 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_IN(x) \ argument
1437 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_INM(x, mask) \ argument
1439 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUT(x, val) \ argument
1441 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1453 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x) (x+0x000000e8) argument
1454 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_PHYS(x) (x+0x000000e8) argument
1457 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_IN(x) \ argument
1459 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_INM(x, mask) \ argument
1461 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUT(x, val) \ argument
1463 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1478 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x) (x+0x000000ec) argument
1479 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_PHYS(x) (x+0x000000ec) argument
1482 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_IN(x) \ argument
1484 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_INM(x, mask) \ argument
1486 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUT(x, val) \ argument
1488 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUTM(x, mask, val) \ argument
1500 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x) (x+0x000000f0) argument
1501 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_PHYS(x) (x+0x000000f0) argument
1504 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_IN(x) \ argument
1506 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_INM(x, mask) \ argument
1508 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUT(x, val) \ argument
1510 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUTM(x, mask, val) \ argument
1525 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x) (x+0x000000f4) argument
1526 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_PHYS(x) (x+0x000000f4) argument
1529 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_IN(x) \ argument
1531 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_INM(x, mask) \ argument
1533 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUT(x, val) \ argument
1535 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUTM(x, mask, val) \ argument
1562 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000100) argument
1563 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000100) argument
1566 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_IN(x) \ argument
1568 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1570 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1572 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1584 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000104) argument
1585 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000104) argument
1588 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_IN(x) \ argument
1590 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1592 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1594 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1606 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000114) argument
1607 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000114) argument
1610 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1612 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1614 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1616 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1634 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000118) argument
1635 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000118) argument
1638 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1640 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1642 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1644 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1656 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000011c) argument
1657 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000011c) argument
1660 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1662 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1664 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1666 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1684 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000120) argument
1685 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000120) argument
1688 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1690 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1692 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1694 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1706 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000124) argument
1707 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000124) argument
1710 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1712 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1714 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1716 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1728 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000128) argument
1729 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000128) argument
1732 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1734 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1736 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1738 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1753 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000012c) argument
1754 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000012c) argument
1757 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_IN(x) \ argument
1759 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1761 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1763 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1775 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000130) argument
1776 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000130) argument
1779 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_IN(x) \ argument
1781 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1783 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1785 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1800 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x) (x+0x00000134) argument
1801 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_PHYS(x) (x+0x00000134) argument
1804 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_IN(x) \ argument
1806 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_INM(x, mask) \ argument
1808 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUT(x, val) \ argument
1810 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1822 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000138) argument
1823 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000138) argument
1826 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1828 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1830 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1832 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1844 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x) (x+0x0000013c) argument
1845 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x) (x+0x0000013c) argument
1848 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x) \ argument
1850 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask) \ argument
1852 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val) \ argument
1854 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1866 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x) (x+0x00000140) argument
1867 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x) (x+0x00000140) argument
1870 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x) \ argument
1872 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask) \ argument
1874 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val) \ argument
1876 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1891 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x) (x+0x00000144) argument
1892 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x) (x+0x00000144) argument
1895 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x) \ argument
1897 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask) \ argument
1899 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val) \ argument
1901 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1913 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x) (x+0x00000148) argument
1914 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x) (x+0x00000148) argument
1917 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x) \ argument
1919 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask) \ argument
1921 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val) \ argument
1923 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1938 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x) (x+0x0000014c) argument
1939 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x) (x+0x0000014c) argument
1942 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x) \ argument
1944 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask) \ argument
1946 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val) \ argument
1948 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
1975 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000158) argument
1976 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000158) argument
1979 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x) \ argument
1981 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1983 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1985 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1997 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000015c) argument
1998 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000015c) argument
2001 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x) \ argument
2003 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2005 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2007 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2019 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000016c) argument
2020 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000016c) argument
2023 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2025 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2027 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2029 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2047 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000170) argument
2048 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000170) argument
2051 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2053 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2055 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2057 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2069 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000174) argument
2070 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000174) argument
2073 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2075 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2077 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2079 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2097 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000178) argument
2098 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000178) argument
2101 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2103 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2105 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2107 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2119 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000017c) argument
2120 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000017c) argument
2123 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2125 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2127 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2129 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2141 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000180) argument
2142 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000180) argument
2145 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2147 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2149 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2151 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2166 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000190) argument
2167 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000190) argument
2170 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2172 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2174 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2176 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2188 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x) (x+0x00000194) argument
2189 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x) (x+0x00000194) argument
2192 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x) \ argument
2194 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask) \ argument
2196 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val) \ argument
2198 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2210 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x) (x+0x00000198) argument
2211 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x) (x+0x00000198) argument
2214 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x) \ argument
2216 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask) \ argument
2218 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val) \ argument
2220 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2235 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x) (x+0x0000019c) argument
2236 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x) (x+0x0000019c) argument
2239 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x) \ argument
2241 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask) \ argument
2243 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val) \ argument
2245 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
2257 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x) (x+0x000001a0) argument
2258 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x) (x+0x000001a0) argument
2261 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x) \ argument
2263 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask) \ argument
2265 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val) \ argument
2267 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
2282 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x) (x+0x000001a4) argument
2283 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x) (x+0x000001a4) argument
2286 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x) \ argument
2288 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask) \ argument
2290 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val) \ argument
2292 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
2319 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x) (x+0x000001b0) argument
2320 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x) (x+0x000001b0) argument
2323 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x) \ argument
2325 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2327 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2329 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2341 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x) (x+0x000001b4) argument
2342 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x) (x+0x000001b4) argument
2345 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x) \ argument
2347 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2349 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2351 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2363 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000001c4) argument
2364 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000001c4) argument
2367 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2369 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2371 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2373 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2391 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000001c8) argument
2392 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000001c8) argument
2395 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2397 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2399 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2401 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2413 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000001cc) argument
2414 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000001cc) argument
2417 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2419 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2421 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2423 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2441 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000001d0) argument
2442 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000001d0) argument
2445 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2447 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2449 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2451 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2463 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000001d4) argument
2464 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000001d4) argument
2467 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2469 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2471 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2473 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2485 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000001d8) argument
2486 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000001d8) argument
2489 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2491 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2493 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2495 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2510 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000001dc) argument
2511 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000001dc) argument
2514 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x) \ argument
2516 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2518 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2520 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2532 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000001e0) argument
2533 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000001e0) argument
2536 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x) \ argument
2538 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2540 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2542 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2557 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x) (x+0x000001e4) argument
2558 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x) (x+0x000001e4) argument
2561 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x) \ argument
2563 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask) \ argument
2565 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val) \ argument
2567 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2579 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000001e8) argument
2580 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000001e8) argument
2583 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2585 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2587 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2589 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2601 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x) (x+0x000001ec) argument
2602 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x) (x+0x000001ec) argument
2605 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x) \ argument
2607 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask) \ argument
2609 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val) \ argument
2611 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2623 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x) (x+0x000001f0) argument
2624 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x) (x+0x000001f0) argument
2627 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x) \ argument
2629 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask) \ argument
2631 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val) \ argument
2633 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2648 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x) (x+0x000001f4) argument
2649 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x) (x+0x000001f4) argument
2652 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x) \ argument
2654 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask) \ argument
2656 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val) \ argument
2658 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
2670 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x) (x+0x000001f8) argument
2671 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x) (x+0x000001f8) argument
2674 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x) \ argument
2676 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask) \ argument
2678 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val) \ argument
2680 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
2695 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x) (x+0x000001fc) argument
2696 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x) (x+0x000001fc) argument
2699 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x) \ argument
2701 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask) \ argument
2703 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val) \ argument
2705 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
2732 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000208) argument
2733 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000208) argument
2736 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x) \ argument
2738 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2740 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2742 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2754 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000020c) argument
2755 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000020c) argument
2758 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x) \ argument
2760 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2762 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2764 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2776 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000021c) argument
2777 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000021c) argument
2780 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2782 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2784 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2786 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2804 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000220) argument
2805 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000220) argument
2808 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2810 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2812 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2814 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2826 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000224) argument
2827 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000224) argument
2830 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2832 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2834 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2836 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2854 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000228) argument
2855 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000228) argument
2858 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2860 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2862 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2864 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2876 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000022c) argument
2877 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000022c) argument
2880 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2882 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2884 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2886 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2898 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000230) argument
2899 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000230) argument
2902 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2904 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2906 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2908 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2923 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000234) argument
2924 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000234) argument
2927 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x) \ argument
2929 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2931 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2933 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2945 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000238) argument
2946 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000238) argument
2949 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x) \ argument
2951 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2953 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2955 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2970 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x) (x+0x0000023c) argument
2971 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x) (x+0x0000023c) argument
2974 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x) \ argument
2976 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask) \ argument
2978 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val) \ argument
2980 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2992 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000240) argument
2993 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000240) argument
2996 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2998 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3000 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3002 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3014 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x) (x+0x00000244) argument
3015 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x) (x+0x00000244) argument
3018 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x) \ argument
3020 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask) \ argument
3022 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val) \ argument
3024 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3036 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x) (x+0x00000248) argument
3037 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x) (x+0x00000248) argument
3040 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x) \ argument
3042 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask) \ argument
3044 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val) \ argument
3046 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3061 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x) (x+0x0000024c) argument
3062 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x) (x+0x0000024c) argument
3065 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x) \ argument
3067 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask) \ argument
3069 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val) \ argument
3071 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
3086 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) (x+0x00000250) argument
3087 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x) (x+0x00000250) argument
3090 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x) \ argument
3092 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask) \ argument
3094 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val) \ argument
3096 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
3111 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) (x+0x00000254) argument
3112 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x) (x+0x00000254) argument
3115 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x) \ argument
3117 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask) \ argument
3119 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val) \ argument
3121 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
3148 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000258) argument
3149 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000258) argument
3152 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x) \ argument
3154 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3156 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3158 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3170 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000025c) argument
3171 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000025c) argument
3174 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x) \ argument
3176 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3178 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3180 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3192 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000268) argument
3193 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000268) argument
3196 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3198 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3200 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3202 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3220 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000026c) argument
3221 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000026c) argument
3224 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3226 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3228 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3230 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3248 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000270) argument
3249 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000270) argument
3252 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3254 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3256 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3258 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3270 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000028c) argument
3271 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000028c) argument
3274 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x) \ argument
3276 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3278 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3280 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3292 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000290) argument
3293 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000290) argument
3296 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x) \ argument
3298 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3300 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3302 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3317 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x) (x+0x00000294) argument
3318 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x) (x+0x00000294) argument
3321 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x) \ argument
3323 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask) \ argument
3325 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val) \ argument
3327 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3339 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000298) argument
3340 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000298) argument
3343 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3345 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3347 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3349 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3361 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x) (x+0x0000029c) argument
3362 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x) (x+0x0000029c) argument
3365 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x) \ argument
3367 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask) \ argument
3369 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val) \ argument
3371 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3383 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x) (x+0x000002a0) argument
3384 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x) (x+0x000002a0) argument
3387 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x) \ argument
3389 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask) \ argument
3391 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val) \ argument
3393 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3408 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x) (x+0x000002a4) argument
3409 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x) (x+0x000002a4) argument
3412 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x) \ argument
3414 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask) \ argument
3416 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val) \ argument
3418 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3433 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x) (x+0x000002a8) argument
3434 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x) (x+0x000002a8) argument
3437 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x) \ argument
3439 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask) \ argument
3441 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val) \ argument
3443 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
3458 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x) (x+0x000002ac) argument
3459 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x) (x+0x000002ac) argument
3462 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x) \ argument
3464 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask) \ argument
3466 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val) \ argument
3468 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
3495 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x) (x+0x000002b0) argument
3496 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x) (x+0x000002b0) argument
3499 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x) \ argument
3501 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3503 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3505 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3517 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x) (x+0x000002b4) argument
3518 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x) (x+0x000002b4) argument
3521 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x) \ argument
3523 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3525 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3527 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3539 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000002c0) argument
3540 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000002c0) argument
3543 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3545 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3547 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3549 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3567 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000002c4) argument
3568 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000002c4) argument
3571 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3573 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3575 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3577 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3595 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000002c8) argument
3596 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000002c8) argument
3599 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3601 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3603 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3605 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3617 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000002e4) argument
3618 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000002e4) argument
3621 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x) \ argument
3623 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3625 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3627 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3639 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000002e8) argument
3640 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000002e8) argument
3643 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x) \ argument
3645 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3647 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3649 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3664 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x) (x+0x000002ec) argument
3665 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x) (x+0x000002ec) argument
3668 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x) \ argument
3670 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask) \ argument
3672 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val) \ argument
3674 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3686 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000002f0) argument
3687 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000002f0) argument
3690 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3692 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3694 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3696 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3708 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x) (x+0x000002f4) argument
3709 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x) (x+0x000002f4) argument
3712 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x) \ argument
3714 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask) \ argument
3716 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val) \ argument
3718 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3730 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x) (x+0x000002f8) argument
3731 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x) (x+0x000002f8) argument
3734 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x) \ argument
3736 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask) \ argument
3738 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val) \ argument
3740 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3755 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x) (x+0x000002fc) argument
3756 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x) (x+0x000002fc) argument
3759 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x) \ argument
3761 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask) \ argument
3763 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val) \ argument
3765 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
3780 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x) (x+0x00000300) argument
3781 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x) (x+0x00000300) argument
3784 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x) \ argument
3786 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask) \ argument
3788 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val) \ argument
3790 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
3805 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x) (x+0x00000304) argument
3806 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x) (x+0x00000304) argument
3809 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x) \ argument
3811 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask) \ argument
3813 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val) \ argument
3815 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
3842 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000308) argument
3843 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000308) argument
3846 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x) \ argument
3848 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3850 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3852 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3864 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000030c) argument
3865 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000030c) argument
3868 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x) \ argument
3870 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3872 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3874 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3886 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000318) argument
3887 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000318) argument
3890 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3892 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3894 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3896 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3914 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000031c) argument
3915 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000031c) argument
3918 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3920 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3922 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3924 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3942 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000320) argument
3943 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000320) argument
3946 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3948 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3950 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3952 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3964 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000033c) argument
3965 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000033c) argument
3968 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x) \ argument
3970 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3972 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3974 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3986 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000340) argument
3987 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000340) argument
3990 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x) \ argument
3992 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3994 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3996 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4011 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x) (x+0x00000344) argument
4012 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x) (x+0x00000344) argument
4015 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x) \ argument
4017 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask) \ argument
4019 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val) \ argument
4021 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4033 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000348) argument
4034 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000348) argument
4037 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4039 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4041 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4043 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4055 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x) (x+0x0000034c) argument
4056 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x) (x+0x0000034c) argument
4059 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x) \ argument
4061 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask) \ argument
4063 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val) \ argument
4065 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4077 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x) (x+0x00000350) argument
4078 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x) (x+0x00000350) argument
4081 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x) \ argument
4083 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask) \ argument
4085 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val) \ argument
4087 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4102 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x) (x+0x00000354) argument
4103 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x) (x+0x00000354) argument
4106 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x) \ argument
4108 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask) \ argument
4110 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val) \ argument
4112 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
4127 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x) (x+0x00000358) argument
4128 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x) (x+0x00000358) argument
4131 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x) \ argument
4133 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask) \ argument
4135 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val) \ argument
4137 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
4152 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x) (x+0x0000035c) argument
4153 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x) (x+0x0000035c) argument
4156 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x) \ argument
4158 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask) \ argument
4160 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val) \ argument
4162 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
4189 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000360) argument
4190 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000360) argument
4193 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x) \ argument
4195 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4197 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4199 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4211 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000364) argument
4212 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000364) argument
4215 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x) \ argument
4217 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4219 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4221 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4233 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000370) argument
4234 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000370) argument
4237 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4239 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4241 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4243 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4261 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000374) argument
4262 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000374) argument
4265 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4267 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4269 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4271 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4289 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000378) argument
4290 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000378) argument
4293 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4295 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4297 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4299 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4311 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000394) argument
4312 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000394) argument
4315 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x) \ argument
4317 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4319 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4321 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4333 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000398) argument
4334 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000398) argument
4337 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x) \ argument
4339 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4341 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4343 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4358 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x) (x+0x0000039c) argument
4359 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x) (x+0x0000039c) argument
4362 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x) \ argument
4364 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask) \ argument
4366 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val) \ argument
4368 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4380 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000003a0) argument
4381 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000003a0) argument
4384 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4386 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4388 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4390 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4402 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x) (x+0x000003a4) argument
4403 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x) (x+0x000003a4) argument
4406 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x) \ argument
4408 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask) \ argument
4410 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val) \ argument
4412 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4424 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x) (x+0x000003a8) argument
4425 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x) (x+0x000003a8) argument
4428 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x) \ argument
4430 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask) \ argument
4432 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val) \ argument
4434 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4449 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x) (x+0x000003ac) argument
4450 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x) (x+0x000003ac) argument
4453 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x) \ argument
4455 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask) \ argument
4457 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val) \ argument
4459 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
4474 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x) (x+0x000003b0) argument
4475 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x) (x+0x000003b0) argument
4478 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x) \ argument
4480 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask) \ argument
4482 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val) \ argument
4484 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
4499 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x) (x+0x000003b4) argument
4500 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x) (x+0x000003b4) argument
4503 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x) \ argument
4505 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask) \ argument
4507 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val) \ argument
4509 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
4536 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x) (x+0x000003b8) argument
4537 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x) (x+0x000003b8) argument
4540 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x) \ argument
4542 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4544 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4546 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4558 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x) (x+0x000003bc) argument
4559 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x) (x+0x000003bc) argument
4562 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x) \ argument
4564 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4566 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4568 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4580 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000003c8) argument
4581 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000003c8) argument
4584 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4586 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4588 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4590 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4608 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000003cc) argument
4609 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000003cc) argument
4612 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4614 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4616 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4618 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4636 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000003d0) argument
4637 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000003d0) argument
4640 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4642 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4644 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4646 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4658 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000003ec) argument
4659 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000003ec) argument
4662 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x) \ argument
4664 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4666 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4668 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4680 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000003f0) argument
4681 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000003f0) argument
4684 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x) \ argument
4686 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4688 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4690 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4705 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x) (x+0x000003f4) argument
4706 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x) (x+0x000003f4) argument
4709 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x) \ argument
4711 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask) \ argument
4713 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val) \ argument
4715 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4727 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000003f8) argument
4728 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000003f8) argument
4731 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4733 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4735 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4737 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4749 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x) (x+0x000003fc) argument
4750 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x) (x+0x000003fc) argument
4753 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x) \ argument
4755 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask) \ argument
4757 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val) \ argument
4759 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4771 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x) (x+0x00000400) argument
4772 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x) (x+0x00000400) argument
4775 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x) \ argument
4777 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask) \ argument
4779 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val) \ argument
4781 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4796 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x) (x+0x00000404) argument
4797 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x) (x+0x00000404) argument
4800 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x) \ argument
4802 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask) \ argument
4804 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val) \ argument
4806 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
4821 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x) (x+0x00000408) argument
4822 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x) (x+0x00000408) argument
4825 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x) \ argument
4827 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask) \ argument
4829 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val) \ argument
4831 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
4846 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x) (x+0x0000040c) argument
4847 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x) (x+0x0000040c) argument
4850 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x) \ argument
4852 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask) \ argument
4854 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val) \ argument
4856 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
4883 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000410) argument
4884 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000410) argument
4887 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x) \ argument
4889 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4891 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4893 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4905 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000414) argument
4906 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000414) argument
4909 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x) \ argument
4911 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4913 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4915 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4927 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000420) argument
4928 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000420) argument
4931 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4933 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4935 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4937 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4955 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000424) argument
4956 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000424) argument
4959 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4961 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4963 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4965 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4983 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000428) argument
4984 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000428) argument
4987 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4989 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4991 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4993 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5005 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000444) argument
5006 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000444) argument
5009 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x) \ argument
5011 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5013 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5015 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5027 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000448) argument
5028 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000448) argument
5031 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x) \ argument
5033 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5035 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5037 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5052 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x) (x+0x0000044c) argument
5053 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x) (x+0x0000044c) argument
5056 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x) \ argument
5058 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask) \ argument
5060 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val) \ argument
5062 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5074 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000450) argument
5075 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000450) argument
5078 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5080 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5082 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5084 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5096 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x) (x+0x00000454) argument
5097 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x) (x+0x00000454) argument
5100 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x) \ argument
5102 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask) \ argument
5104 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val) \ argument
5106 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5118 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x) (x+0x00000458) argument
5119 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x) (x+0x00000458) argument
5122 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x) \ argument
5124 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask) \ argument
5126 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val) \ argument
5128 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5143 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x) (x+0x0000045c) argument
5144 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x) (x+0x0000045c) argument
5147 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x) \ argument
5149 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask) \ argument
5151 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val) \ argument
5153 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
5168 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x) (x+0x00000460) argument
5169 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x) (x+0x00000460) argument
5172 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x) \ argument
5174 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask) \ argument
5176 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val) \ argument
5178 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
5193 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x) (x+0x00000464) argument
5194 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x) (x+0x00000464) argument
5197 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x) \ argument
5199 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask) \ argument
5201 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val) \ argument
5203 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
5230 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000468) argument
5231 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000468) argument
5234 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x) \ argument
5236 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5238 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5240 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5252 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000046c) argument
5253 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000046c) argument
5256 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x) \ argument
5258 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5260 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5262 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5274 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000478) argument
5275 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000478) argument
5278 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5280 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5282 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5284 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5302 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000047c) argument
5303 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000047c) argument
5306 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5308 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5310 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5312 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5330 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000480) argument
5331 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000480) argument
5334 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5336 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5338 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5340 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5352 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000004a8) argument
5353 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000004a8) argument
5356 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5358 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5360 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5362 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5374 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x) (x+0x000004ac) argument
5375 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x) (x+0x000004ac) argument
5378 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x) \ argument
5380 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask) \ argument
5382 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val) \ argument
5384 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5396 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x) (x+0x000004b0) argument
5397 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x) (x+0x000004b0) argument
5400 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x) \ argument
5402 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask) \ argument
5404 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val) \ argument
5406 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5421 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x) (x+0x000004b4) argument
5422 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x) (x+0x000004b4) argument
5425 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x) \ argument
5427 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask) \ argument
5429 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val) \ argument
5431 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
5446 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x) (x+0x000004b8) argument
5447 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x) (x+0x000004b8) argument
5450 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x) \ argument
5452 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask) \ argument
5454 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val) \ argument
5456 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
5471 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x) (x+0x000004bc) argument
5472 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x) (x+0x000004bc) argument
5475 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x) \ argument
5477 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask) \ argument
5479 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val) \ argument
5481 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
5508 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x) (x+0x000004c0) argument
5509 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x) (x+0x000004c0) argument
5512 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x) \ argument
5514 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5516 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5518 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5530 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x) (x+0x000004c4) argument
5531 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x) (x+0x000004c4) argument
5534 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x) \ argument
5536 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5538 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5540 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5552 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000004d0) argument
5553 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000004d0) argument
5556 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5558 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5560 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5562 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5580 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000004d4) argument
5581 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000004d4) argument
5584 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5586 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5588 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5590 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5608 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000004d8) argument
5609 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000004d8) argument
5612 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5614 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5616 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5618 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5630 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000004f4) argument
5631 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000004f4) argument
5634 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x) \ argument
5636 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5638 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5640 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5652 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004f8) argument
5653 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004f8) argument
5656 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x) \ argument
5658 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5660 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5662 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5677 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x) (x+0x000004fc) argument
5678 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x) (x+0x000004fc) argument
5681 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x) \ argument
5683 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask) \ argument
5685 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val) \ argument
5687 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5699 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000500) argument
5700 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000500) argument
5703 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5705 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5707 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5709 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5721 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x) (x+0x00000504) argument
5722 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x) (x+0x00000504) argument
5725 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x) \ argument
5727 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask) \ argument
5729 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val) \ argument
5731 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
5743 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x) (x+0x00000508) argument
5744 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x) (x+0x00000508) argument
5747 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x) \ argument
5749 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask) \ argument
5751 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val) \ argument
5753 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
5765 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x) (x+0x0000050c) argument
5766 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x) (x+0x0000050c) argument
5769 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x) \ argument
5771 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask) \ argument
5773 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val) \ argument
5775 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
5787 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x) (x+0x00000510) argument
5788 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x) (x+0x00000510) argument
5791 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x) \ argument
5793 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask) \ argument
5795 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val) \ argument
5797 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
5809 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x) (x+0x00000514) argument
5810 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x) (x+0x00000514) argument
5813 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x) \ argument
5815 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask) \ argument
5817 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val) \ argument
5819 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
5831 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x) (x+0x00000518) argument
5832 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x) (x+0x00000518) argument
5835 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x) \ argument
5837 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask) \ argument
5839 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val) \ argument
5841 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
5853 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x) (x+0x0000051c) argument
5854 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x) (x+0x0000051c) argument
5857 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x) \ argument
5859 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask) \ argument
5861 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val) \ argument
5863 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
5875 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x) (x+0x00000520) argument
5876 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x) (x+0x00000520) argument
5879 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x) \ argument
5881 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask) \ argument
5883 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val) \ argument
5885 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
5897 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x) (x+0x00000524) argument
5898 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x) (x+0x00000524) argument
5901 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x) \ argument
5903 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask) \ argument
5905 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val) \ argument
5907 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
5919 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x) (x+0x00000528) argument
5920 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x) (x+0x00000528) argument
5923 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x) \ argument
5925 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask) \ argument
5927 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val) \ argument
5929 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
5941 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x) (x+0x0000052c) argument
5942 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x) (x+0x0000052c) argument
5945 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x) \ argument
5947 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask) \ argument
5949 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val) \ argument
5951 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
5963 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x) (x+0x00000530) argument
5964 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x) (x+0x00000530) argument
5967 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x) \ argument
5969 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask) \ argument
5971 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val) \ argument
5973 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
5985 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x) (x+0x00000534) argument
5986 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x) (x+0x00000534) argument
5989 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x) \ argument
5991 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask) \ argument
5993 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val) \ argument
5995 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6007 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x) (x+0x00000538) argument
6008 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x) (x+0x00000538) argument
6011 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x) \ argument
6013 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask) \ argument
6015 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val) \ argument
6017 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6029 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x) (x+0x0000053c) argument
6030 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x) (x+0x0000053c) argument
6033 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x) \ argument
6035 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask) \ argument
6037 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val) \ argument
6039 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6051 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x) (x+0x00000540) argument
6052 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x) (x+0x00000540) argument
6055 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x) \ argument
6057 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask) \ argument
6059 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val) \ argument
6061 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6073 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x) (x+0x00000544) argument
6074 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x) (x+0x00000544) argument
6077 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x) \ argument
6079 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask) \ argument
6081 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val) \ argument
6083 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6095 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x) (x+0x00000548) argument
6096 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x) (x+0x00000548) argument
6099 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x) \ argument
6101 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask) \ argument
6103 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val) \ argument
6105 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6117 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x) (x+0x0000054c) argument
6118 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x) (x+0x0000054c) argument
6121 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x) \ argument
6123 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask) \ argument
6125 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val) \ argument
6127 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6139 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x) (x+0x00000550) argument
6140 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x) (x+0x00000550) argument
6143 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x) \ argument
6145 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask) \ argument
6147 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val) \ argument
6149 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6161 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x) (x+0x00000554) argument
6162 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x) (x+0x00000554) argument
6165 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x) \ argument
6167 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask) \ argument
6169 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val) \ argument
6171 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6183 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x) (x+0x00000558) argument
6184 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x) (x+0x00000558) argument
6187 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x) \ argument
6189 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask) \ argument
6191 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val) \ argument
6193 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6205 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x) (x+0x0000055c) argument
6206 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x) (x+0x0000055c) argument
6209 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x) \ argument
6211 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask) \ argument
6213 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val) \ argument
6215 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
6227 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x) (x+0x00000560) argument
6228 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x) (x+0x00000560) argument
6231 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x) \ argument
6233 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask) \ argument
6235 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val) \ argument
6237 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
6249 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x) (x+0x00000564) argument
6250 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x) (x+0x00000564) argument
6253 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x) \ argument
6255 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask) \ argument
6257 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val) \ argument
6259 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
6271 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x) (x+0x00000568) argument
6272 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x) (x+0x00000568) argument
6275 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x) \ argument
6277 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask) \ argument
6279 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val) \ argument
6281 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
6293 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x) (x+0x0000056c) argument
6294 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x) (x+0x0000056c) argument
6297 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x) \ argument
6299 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask) \ argument
6301 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val) \ argument
6303 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
6315 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x) (x+0x00000570) argument
6316 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x) (x+0x00000570) argument
6319 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x) \ argument
6321 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask) \ argument
6323 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val) \ argument
6325 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
6337 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x) (x+0x00000574) argument
6338 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x) (x+0x00000574) argument
6341 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x) \ argument
6343 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask) \ argument
6345 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val) \ argument
6347 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
6359 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x) (x+0x00000578) argument
6360 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x) (x+0x00000578) argument
6363 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x) \ argument
6365 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask) \ argument
6367 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val) \ argument
6369 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
6381 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x) (x+0x0000057c) argument
6382 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x) (x+0x0000057c) argument
6385 #define HWIO_REO_R0_AGING_CONTROL_IN(x) \ argument
6387 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask) \ argument
6389 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val) \ argument
6391 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
6403 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x) (x+0x00000580) argument
6404 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x) (x+0x00000580) argument
6407 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x) \ argument
6409 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask) \ argument
6411 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val) \ argument
6413 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
6425 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x) (x+0x00000584) argument
6426 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x) (x+0x00000584) argument
6429 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x) \ argument
6431 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask) \ argument
6433 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val) \ argument
6435 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
6447 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x) (x+0x00000588) argument
6448 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x) (x+0x00000588) argument
6451 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x) \ argument
6453 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask) \ argument
6455 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val) \ argument
6457 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
6469 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x) (x+0x0000058c) argument
6470 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x) (x+0x0000058c) argument
6473 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x) \ argument
6475 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask) \ argument
6477 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val) \ argument
6479 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
6491 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x) (x+0x00000590) argument
6492 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x) (x+0x00000590) argument
6495 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x) \ argument
6497 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask) \ argument
6499 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val) \ argument
6501 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
6513 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x) (x+0x00000594) argument
6514 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x) (x+0x00000594) argument
6517 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x) \ argument
6519 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask) \ argument
6521 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val) \ argument
6523 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
6535 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x) (x+0x00000598) argument
6536 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x) (x+0x00000598) argument
6539 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x) \ argument
6541 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask) \ argument
6543 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val) \ argument
6545 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
6557 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x) (x+0x0000059c) argument
6558 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x) (x+0x0000059c) argument
6561 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x) \ argument
6563 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask) \ argument
6565 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val) \ argument
6567 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
6579 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x) (x+0x000005a0) argument
6580 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x) (x+0x000005a0) argument
6583 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x) \ argument
6585 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \ argument
6587 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val) \ argument
6589 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
6601 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x) (x+0x000005a4) argument
6602 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x) (x+0x000005a4) argument
6605 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x) \ argument
6607 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask) \ argument
6609 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val) \ argument
6611 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
6623 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x) (x+0x000005a8) argument
6624 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x) (x+0x000005a8) argument
6627 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x) \ argument
6629 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask) \ argument
6631 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val) \ argument
6633 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
6645 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x) (x+0x000005ac) argument
6646 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x) (x+0x000005ac) argument
6649 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x) \ argument
6651 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask) \ argument
6653 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val) \ argument
6655 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
6667 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x) (x+0x000005b0) argument
6668 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x) (x+0x000005b0) argument
6671 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x) \ argument
6673 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask) \ argument
6675 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val) \ argument
6677 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
6689 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x) (x+0x000005b4) argument
6690 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x) (x+0x000005b4) argument
6693 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x) \ argument
6695 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask) \ argument
6697 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val) \ argument
6699 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
6711 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x) (x+0x000005b8) argument
6712 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x) (x+0x000005b8) argument
6715 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x) \ argument
6717 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask) \ argument
6719 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val) \ argument
6721 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
6733 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x) (x+0x000005bc) argument
6734 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x) (x+0x000005bc) argument
6737 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x) \ argument
6739 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask) \ argument
6741 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val) \ argument
6743 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
6755 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x) (x+0x000005c0) argument
6756 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x) (x+0x000005c0) argument
6759 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x) \ argument
6761 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask) \ argument
6763 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val) \ argument
6765 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
6777 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x) (x+0x000005c4) argument
6778 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x) (x+0x000005c4) argument
6781 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x) \ argument
6783 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask) \ argument
6785 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val) \ argument
6787 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
6799 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x) (x+0x000005c8) argument
6800 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x) (x+0x000005c8) argument
6803 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x) \ argument
6805 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask) \ argument
6807 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val) \ argument
6809 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
6821 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x) (x+0x000005cc) argument
6822 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x) (x+0x000005cc) argument
6825 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x) \ argument
6827 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask) \ argument
6829 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val) \ argument
6831 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
6843 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x) (x+0x000005d0) argument
6844 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x) (x+0x000005d0) argument
6847 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x) \ argument
6849 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask) \ argument
6851 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val) \ argument
6853 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
6865 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x) (x+0x000005d4) argument
6866 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x) (x+0x000005d4) argument
6869 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x) \ argument
6871 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask) \ argument
6873 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val) \ argument
6875 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
6890 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x000005d8) argument
6891 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x000005d8) argument
6894 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x) \ argument
6896 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ argument
6898 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ argument
6900 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
6912 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x000005dc) argument
6913 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x000005dc) argument
6916 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x) \ argument
6918 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ argument
6920 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ argument
6922 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
6934 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x000005e0) argument
6935 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x000005e0) argument
6938 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x) \ argument
6940 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ argument
6942 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ argument
6944 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
6962 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x000005e4) argument
6963 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x000005e4) argument
6966 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x) \ argument
6968 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ argument
6970 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ argument
6972 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
6984 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x000005e8) argument
6985 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x000005e8) argument
6988 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ argument
6990 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ argument
6992 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ argument
6994 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
7009 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x000005ec) argument
7010 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x000005ec) argument
7013 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x) \ argument
7015 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ argument
7017 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ argument
7019 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
7040 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x000005f0) argument
7041 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x000005f0) argument
7044 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x) \ argument
7046 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ argument
7048 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ argument
7050 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
7068 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x000005f4) argument
7069 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x000005f4) argument
7072 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ argument
7074 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ argument
7076 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ argument
7078 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
7099 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x000005f8) argument
7100 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x000005f8) argument
7103 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ argument
7105 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ argument
7107 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ argument
7109 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
7130 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x000005fc) argument
7131 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x000005fc) argument
7134 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x) \ argument
7136 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ argument
7138 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ argument
7140 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
7164 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x00000600) argument
7165 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x00000600) argument
7168 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ argument
7170 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ argument
7172 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ argument
7174 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
7189 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x00000604) argument
7190 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x00000604) argument
7193 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x) \ argument
7195 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ argument
7197 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ argument
7199 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
7211 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x00000608) argument
7212 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x00000608) argument
7215 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ argument
7217 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ argument
7219 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ argument
7221 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
7236 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x) (x+0x0000060c) argument
7237 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x) (x+0x0000060c) argument
7240 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x) \ argument
7242 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask) \ argument
7244 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val) \ argument
7246 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
7279 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x) (x+0x00000610) argument
7280 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x) (x+0x00000610) argument
7283 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x) \ argument
7285 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask) \ argument
7287 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val) \ argument
7289 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
7301 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x) (x+0x00000614) argument
7302 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x) (x+0x00000614) argument
7305 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x) \ argument
7307 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask) \ argument
7309 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val) \ argument
7311 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
7350 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x) (x+0x00000618) argument
7351 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x) (x+0x00000618) argument
7354 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x) \ argument
7356 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask) \ argument
7358 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val) \ argument
7360 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
7372 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x) (x+0x0000061c) argument
7373 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x) (x+0x0000061c) argument
7376 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x) \ argument
7378 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask) \ argument
7380 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val) \ argument
7382 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
7394 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x) (x+0x00000620) argument
7395 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x) (x+0x00000620) argument
7398 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x) \ argument
7400 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask) \ argument
7402 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val) \ argument
7404 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
7416 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x) (x+0x00000624) argument
7417 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x) (x+0x00000624) argument
7420 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x) \ argument
7422 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask) \ argument
7424 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val) \ argument
7426 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
7438 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x) (x+0x00002000) argument
7439 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x) (x+0x00002000) argument
7442 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x) \ argument
7444 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask) \ argument
7446 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val) \ argument
7448 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
7466 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x) (x+0x00002004) argument
7467 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x) (x+0x00002004) argument
7470 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x) \ argument
7472 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask) \ argument
7474 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val) \ argument
7476 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
7491 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x) (x+0x00002008) argument
7492 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x) (x+0x00002008) argument
7495 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x) \ argument
7497 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask) \ argument
7499 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val) \ argument
7501 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
7522 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x) (x+0x0000200c) argument
7523 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x) (x+0x0000200c) argument
7526 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x) \ argument
7528 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask) \ argument
7530 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val) \ argument
7532 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
7544 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x) (x+0x00002010) argument
7545 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x) (x+0x00002010) argument
7548 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x) \ argument
7550 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask) \ argument
7552 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val) \ argument
7554 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
7566 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x) (x+0x00002014) argument
7567 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x) (x+0x00002014) argument
7570 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x) \ argument
7572 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask) \ argument
7574 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val) \ argument
7576 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
7588 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x) (x+0x00002018) argument
7589 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x) (x+0x00002018) argument
7592 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x) \ argument
7594 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask) \ argument
7596 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val) \ argument
7598 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
7610 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x) (x+0x0000201c) argument
7611 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x) (x+0x0000201c) argument
7614 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x) \ argument
7616 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask) \ argument
7618 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val) \ argument
7620 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
7632 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x) (x+0x00002020) argument
7633 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x) (x+0x00002020) argument
7636 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x) \ argument
7638 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask) \ argument
7640 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val) \ argument
7642 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
7663 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x) (x+0x00002024) argument
7664 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x) (x+0x00002024) argument
7667 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x) \ argument
7669 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask) \ argument
7671 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val) \ argument
7673 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
7685 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00002028) argument
7686 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00002028) argument
7689 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x) \ argument
7691 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask) \ argument
7693 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val) \ argument
7695 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
7707 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x) (x+0x0000202c) argument
7708 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x) (x+0x0000202c) argument
7711 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x) \ argument
7713 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask) \ argument
7715 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val) \ argument
7717 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
7735 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x) (x+0x00002030) argument
7736 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x) (x+0x00002030) argument
7739 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x) \ argument
7741 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask) \ argument
7743 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val) \ argument
7745 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
7757 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x) (x+0x00002034) argument
7758 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x) (x+0x00002034) argument
7761 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x) \ argument
7763 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask) \ argument
7765 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val) \ argument
7767 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
7779 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x) (x+0x00002038) argument
7780 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x) (x+0x00002038) argument
7783 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x) \ argument
7785 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask) \ argument
7787 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val) \ argument
7789 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
7801 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x) (x+0x0000203c) argument
7802 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x) (x+0x0000203c) argument
7805 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x) \ argument
7807 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask) \ argument
7809 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val) \ argument
7811 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
7823 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x) (x+0x00002040) argument
7824 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x) (x+0x00002040) argument
7827 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x) \ argument
7829 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask) \ argument
7831 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val) \ argument
7833 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
7845 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x) (x+0x00002044) argument
7846 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x) (x+0x00002044) argument
7849 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x) \ argument
7851 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask) \ argument
7853 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val) \ argument
7855 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
7867 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x) (x+0x00002048) argument
7868 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x) (x+0x00002048) argument
7871 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x) \ argument
7873 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask) \ argument
7875 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val) \ argument
7877 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
7889 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x) (x+0x0000204c) argument
7890 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x) (x+0x0000204c) argument
7893 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x) \ argument
7895 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask) \ argument
7897 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val) \ argument
7899 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
7911 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x) (x+0x00002050) argument
7912 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x) (x+0x00002050) argument
7915 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x) \ argument
7917 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask) \ argument
7919 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val) \ argument
7921 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
7933 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x) (x+0x00002054) argument
7934 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x) (x+0x00002054) argument
7937 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x) \ argument
7939 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask) \ argument
7941 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val) \ argument
7943 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
7955 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x) (x+0x00002058) argument
7956 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x) (x+0x00002058) argument
7959 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x) \ argument
7961 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask) \ argument
7963 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val) \ argument
7965 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
7977 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x) (x+0x0000205c) argument
7978 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x) (x+0x0000205c) argument
7981 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x) \ argument
7983 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask) \ argument
7985 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val) \ argument
7987 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
8002 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x) (x+0x00003000) argument
8003 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x) (x+0x00003000) argument
8006 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x) \ argument
8008 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask) \ argument
8010 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val) \ argument
8012 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
8024 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x) (x+0x00003004) argument
8025 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x) (x+0x00003004) argument
8028 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x) \ argument
8030 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask) \ argument
8032 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val) \ argument
8034 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
8046 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x) (x+0x00003008) argument
8047 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_PHYS(x) (x+0x00003008) argument
8050 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_IN(x) \ argument
8052 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_INM(x, mask) \ argument
8054 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUT(x, val) \ argument
8056 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUTM(x, mask, val) \ argument
8068 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x) (x+0x0000300c) argument
8069 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_PHYS(x) (x+0x0000300c) argument
8072 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_IN(x) \ argument
8074 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_INM(x, mask) \ argument
8076 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUT(x, val) \ argument
8078 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUTM(x, mask, val) \ argument
8090 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x) (x+0x00003010) argument
8091 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_PHYS(x) (x+0x00003010) argument
8094 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_IN(x) \ argument
8096 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_INM(x, mask) \ argument
8098 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUT(x, val) \ argument
8100 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUTM(x, mask, val) \ argument
8112 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x) (x+0x00003014) argument
8113 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_PHYS(x) (x+0x00003014) argument
8116 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_IN(x) \ argument
8118 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_INM(x, mask) \ argument
8120 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUT(x, val) \ argument
8122 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUTM(x, mask, val) \ argument
8134 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x) (x+0x00003018) argument
8135 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x) (x+0x00003018) argument
8138 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x) \ argument
8140 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask) \ argument
8142 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val) \ argument
8144 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
8156 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x) (x+0x0000301c) argument
8157 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x) (x+0x0000301c) argument
8160 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x) \ argument
8162 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask) \ argument
8164 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val) \ argument
8166 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
8178 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x) (x+0x00003020) argument
8179 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x) (x+0x00003020) argument
8182 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x) \ argument
8184 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask) \ argument
8186 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val) \ argument
8188 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
8200 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x) (x+0x00003024) argument
8201 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x) (x+0x00003024) argument
8204 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x) \ argument
8206 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask) \ argument
8208 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val) \ argument
8210 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
8222 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x) (x+0x00003028) argument
8223 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x) (x+0x00003028) argument
8226 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x) \ argument
8228 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask) \ argument
8230 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val) \ argument
8232 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
8244 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x) (x+0x0000302c) argument
8245 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x) (x+0x0000302c) argument
8248 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x) \ argument
8250 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask) \ argument
8252 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val) \ argument
8254 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
8266 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x) (x+0x00003030) argument
8267 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x) (x+0x00003030) argument
8270 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x) \ argument
8272 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask) \ argument
8274 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val) \ argument
8276 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
8288 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x) (x+0x00003034) argument
8289 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x) (x+0x00003034) argument
8292 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x) \ argument
8294 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask) \ argument
8296 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val) \ argument
8298 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
8310 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x) (x+0x00003038) argument
8311 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x) (x+0x00003038) argument
8314 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x) \ argument
8316 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask) \ argument
8318 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val) \ argument
8320 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
8332 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x) (x+0x0000303c) argument
8333 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x) (x+0x0000303c) argument
8336 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x) \ argument
8338 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask) \ argument
8340 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val) \ argument
8342 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
8354 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x) (x+0x00003040) argument
8355 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x) (x+0x00003040) argument
8358 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x) \ argument
8360 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask) \ argument
8362 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val) \ argument
8364 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
8376 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x) (x+0x00003044) argument
8377 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x) (x+0x00003044) argument
8380 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x) \ argument
8382 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask) \ argument
8384 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val) \ argument
8386 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
8398 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x) (x+0x00003048) argument
8399 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x) (x+0x00003048) argument
8402 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x) \ argument
8404 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask) \ argument
8406 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val) \ argument
8408 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
8420 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x) (x+0x0000304c) argument
8421 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x) (x+0x0000304c) argument
8424 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x) \ argument
8426 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask) \ argument
8428 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val) \ argument
8430 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
8442 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x) (x+0x00003050) argument
8443 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x) (x+0x00003050) argument
8446 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x) \ argument
8448 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask) \ argument
8450 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val) \ argument
8452 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
8464 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x) (x+0x00003054) argument
8465 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x) (x+0x00003054) argument
8468 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x) \ argument
8470 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask) \ argument
8472 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val) \ argument
8474 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
8486 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x) (x+0x00003058) argument
8487 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x) (x+0x00003058) argument
8490 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x) \ argument
8492 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask) \ argument
8494 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val) \ argument
8496 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
8508 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x) (x+0x0000305c) argument
8509 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x) (x+0x0000305c) argument
8512 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x) \ argument
8514 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask) \ argument
8516 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val) \ argument
8518 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
8530 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x) (x+0x00003060) argument
8531 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x) (x+0x00003060) argument
8534 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x) \ argument
8536 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask) \ argument
8538 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val) \ argument
8540 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
8552 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x) (x+0x00003064) argument
8553 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x) (x+0x00003064) argument
8556 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x) \ argument
8558 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask) \ argument
8560 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val) \ argument
8562 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
8574 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x) (x+0x00003068) argument
8575 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x) (x+0x00003068) argument
8578 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x) \ argument
8580 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask) \ argument
8582 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val) \ argument
8584 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
8596 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x) (x+0x0000306c) argument
8597 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x) (x+0x0000306c) argument
8600 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x) \ argument
8602 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask) \ argument
8604 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val) \ argument
8606 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument