44 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x)                           (x+0x00000000)  argument
45 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x)                           (x+0x00000000)  argument
48 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x)                             \  argument
49 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), HWIO_REO_R0_GENERAL_ENABLE_RMSK)
50 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask)                      \  argument
51 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask) 
52 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val)                       \  argument
53 	out_dword( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), val)
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val)                \  argument
57 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
135 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x)               (x+0x00000004)  argument
136 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x)               (x+0x00000004)  argument
139 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x)                 \  argument
140 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask)          \  argument
142 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask) 
143 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val)           \  argument
144 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), val)
145 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val)    \  argument
148 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
178 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x)               (x+0x00000008)  argument
179 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x)               (x+0x00000008)  argument
182 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x)                 \  argument
183 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask)          \  argument
185 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask) 
186 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val)           \  argument
187 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), val)
188 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val)    \  argument
191 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
221 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x)               (x+0x0000000c)  argument
222 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x)               (x+0x0000000c)  argument
225 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x)                 \  argument
226 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
227 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask)          \  argument
228 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask) 
229 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val)           \  argument
230 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), val)
231 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val)    \  argument
234 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
264 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x)               (x+0x00000010)  argument
265 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x)               (x+0x00000010)  argument
268 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x)                 \  argument
269 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
270 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask)          \  argument
271 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask) 
272 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val)           \  argument
273 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), val)
274 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val)    \  argument
277 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
307 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x)           (x+0x00000014)  argument
308 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x)           (x+0x00000014)  argument
311 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x)             \  argument
312 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
313 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask)      \  argument
314 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask) 
315 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val)       \  argument
316 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), val)
317 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \  argument
320 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
350 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x)           (x+0x00000018)  argument
351 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x)           (x+0x00000018)  argument
354 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x)             \  argument
355 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
356 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask)      \  argument
357 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask) 
358 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val)       \  argument
359 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), val)
360 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \  argument
363 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
393 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x)           (x+0x0000001c)  argument
394 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x)           (x+0x0000001c)  argument
397 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x)             \  argument
398 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
399 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask)      \  argument
400 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask) 
401 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val)       \  argument
402 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), val)
403 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \  argument
406 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
436 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x)           (x+0x00000020)  argument
437 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x)           (x+0x00000020)  argument
440 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x)             \  argument
441 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
442 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask)      \  argument
443 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask) 
444 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val)       \  argument
445 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), val)
446 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \  argument
449 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
479 #define HWIO_REO_R0_TIMESTAMP_ADDR(x)                                (x+0x00000024)  argument
480 #define HWIO_REO_R0_TIMESTAMP_PHYS(x)                                (x+0x00000024)  argument
483 #define HWIO_REO_R0_TIMESTAMP_IN(x)                                  \  argument
484 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), HWIO_REO_R0_TIMESTAMP_RMSK)
485 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask)                           \  argument
486 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), mask) 
487 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val)                            \  argument
488 	out_dword( HWIO_REO_R0_TIMESTAMP_ADDR(x), val)
489 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val)                     \  argument
492 		out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
501 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x)           (x+0x00000028)  argument
502 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x)           (x+0x00000028)  argument
505 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x)             \  argument
506 …in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), HWIO_REO_R0_ERROR_DESTINATIO…
507 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask)      \  argument
508 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask) 
509 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val)       \  argument
510 	out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), val)
511 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \  argument
514 …O_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERROR_DESTINATION_MAPPING_…
544 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x)           (x+0x0000002c)  argument
545 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x)           (x+0x0000002c)  argument
548 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x)             \  argument
549 …in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), HWIO_REO_R0_ERROR_DESTINATIO…
550 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask)      \  argument
551 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask) 
552 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val)       \  argument
553 	out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), val)
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \  argument
557 …O_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERROR_DESTINATION_MAPPING_…
587 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x)                            (x+0x00000030)  argument
588 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x)                            (x+0x00000030)  argument
591 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x)                              \  argument
592 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), HWIO_REO_R0_IDLE_REQ_CTRL_RMSK)
593 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask)                       \  argument
594 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask) 
595 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val)                        \  argument
596 	out_dword( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), val)
597 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val)                 \  argument
600 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
612 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x)                 (x+0x00000034)  argument
613 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x)                 (x+0x00000034)  argument
616 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x)                   \  argument
617 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_BASE_L…
618 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask)            \  argument
619 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask) 
620 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val)             \  argument
621 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), val)
622 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
625 …ed_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_BASE_LS…
634 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x)                 (x+0x00000038)  argument
635 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x)                 (x+0x00000038)  argument
638 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x)                   \  argument
639 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_BASE_M…
640 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask)            \  argument
641 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask) 
642 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val)             \  argument
643 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), val)
644 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
647 …ed_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_BASE_MS…
659 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x)                       (x+0x0000003c)  argument
660 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x)                       (x+0x0000003c)  argument
663 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x)                         \  argument
664 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_ID_RMSK)
665 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask)                  \  argument
666 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask) 
667 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val)                   \  argument
668 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), val)
669 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val)            \  argument
672 …word_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_ID_I…
681 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x)                   (x+0x00000040)  argument
682 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x)                   (x+0x00000040)  argument
685 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x)                     \  argument
686 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_STATUS_R…
687 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask)              \  argument
688 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask) 
689 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val)               \  argument
690 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), val)
691 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val)        \  argument
694 …asked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_STATUS…
706 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x)                     (x+0x00000044)  argument
707 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x)                     (x+0x00000044)  argument
710 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x)                       \  argument
711 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_MISC_RMSK)
712 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask)                \  argument
713 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask) 
714 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val)                 \  argument
715 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), val)
716 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val)          \  argument
719 …d_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MISC_…
758 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x)              (x+0x00000050)  argument
759 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x)              (x+0x00000050)  argument
762 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x)                \  argument
763 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_TP_…
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
765 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask) 
766 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val)          \  argument
767 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), val)
768 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
771 …s(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_…
780 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x)              (x+0x00000054)  argument
781 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x)              (x+0x00000054)  argument
784 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x)                \  argument
785 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_TP_…
786 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
787 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask) 
788 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val)          \  argument
789 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), val)
790 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
793 …s(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_…
802 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)   (x+0x00000064)  argument
803 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)   (x+0x00000064)  argument
806 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x)     \  argument
807 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_RXDMA2RE…
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
809 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
810 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
811 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
812 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
815 …MA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_S…
830 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)   (x+0x00000068)  argument
831 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)   (x+0x00000068)  argument
834 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x)     \  argument
835 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_RXDMA2RE…
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
837 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
838 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
839 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
840 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
843 …MA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_S…
852 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x)      (x+0x0000006c)  argument
853 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x)      (x+0x0000006c)  argument
856 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x)        \  argument
857 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO0_…
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
859 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
860 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val)  \  argument
861 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), val)
862 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
865 …0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT…
880 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)   (x+0x00000070)  argument
881 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)   (x+0x00000070)  argument
884 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x)     \  argument
885 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_RXDMA2RE…
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
887 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
888 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
889 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
890 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
893 …MA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY…
902 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)  (x+0x00000074)  argument
903 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)  (x+0x00000074)  argument
906 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x)    \  argument
907 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_RXDMA2R…
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
909 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
910 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
911 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
912 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
915 …A2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFE…
924 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078)  argument
925 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078)  argument
928 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x)   \  argument
929 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2…
930 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
931 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
932 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
933 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
934 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
937 …REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFET…
949 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000007c)  argument
950 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000007c)  argument
953 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x)              \  argument
954 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_M…
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
956 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask) 
957 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
958 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), val)
959 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
962 …WIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE…
971 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000080)  argument
972 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000080)  argument
975 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x)              \  argument
976 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_M…
977 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
978 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask) 
979 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
980 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), val)
981 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
984 …WIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE…
996 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x)                (x+0x00000084)  argument
997 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x)                (x+0x00000084)  argument
1000 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x)                  \  argument
1001 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_MSI1_…
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask)           \  argument
1003 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask) 
1004 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val)            \  argument
1005 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), val)
1006 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1009 …d_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DA…
1018 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000088)  argument
1019 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000088)  argument
1022 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
1023 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING…
1024 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1025 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1026 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
1027 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1028 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1031 …_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_O…
1040 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x)               (x+0x0000008c)  argument
1041 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x)               (x+0x0000008c)  argument
1044 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x)                 \  argument
1045 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_BA…
1046 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask)          \  argument
1047 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask) 
1048 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val)           \  argument
1049 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), val)
1050 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val)    \  argument
1053 …ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_BASE_L…
1062 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x)               (x+0x00000090)  argument
1063 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x)               (x+0x00000090)  argument
1066 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x)                 \  argument
1067 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_BA…
1068 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask)          \  argument
1069 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask) 
1070 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val)           \  argument
1071 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), val)
1072 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val)    \  argument
1075 …ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_BASE_M…
1087 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x)                     (x+0x00000094)  argument
1088 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x)                     (x+0x00000094)  argument
1091 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x)                       \  argument
1092 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_ID_RMSK)
1093 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask)                \  argument
1094 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask) 
1095 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val)                 \  argument
1096 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), val)
1097 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val)          \  argument
1100 …d_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_ID_…
1109 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x)                 (x+0x00000098)  argument
1110 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x)                 (x+0x00000098)  argument
1113 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x)                   \  argument
1114 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_STAT…
1115 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask)            \  argument
1116 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask) 
1117 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val)             \  argument
1118 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), val)
1119 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val)      \  argument
1122 …ed_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_STATU…
1134 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x)                   (x+0x0000009c)  argument
1135 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x)                   (x+0x0000009c)  argument
1138 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x)                     \  argument
1139 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_MISC_R…
1140 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask)              \  argument
1141 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask) 
1142 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val)               \  argument
1143 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), val)
1144 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val)        \  argument
1147 …asked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MISC…
1186 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x)            (x+0x000000a8)  argument
1187 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x)            (x+0x000000a8)  argument
1190 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x)              \  argument
1191 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING…
1192 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask)       \  argument
1193 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask) 
1194 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val)        \  argument
1195 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), val)
1196 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \  argument
1199 …WIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR…
1208 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x)            (x+0x000000ac)  argument
1209 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x)            (x+0x000000ac)  argument
1212 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x)              \  argument
1213 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING…
1214 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask)       \  argument
1215 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask) 
1216 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val)        \  argument
1217 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), val)
1218 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \  argument
1221 …WIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR…
1230 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000000bc)  argument
1231 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000000bc)  argument
1234 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x)   \  argument
1235 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_WBM2RE…
1236 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1237 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1238 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
1239 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1240 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1243 …O_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_…
1258 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000000c0)  argument
1259 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000000c0)  argument
1262 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x)   \  argument
1263 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_WBM2RE…
1264 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1265 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1266 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
1267 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1268 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1271 …O_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_…
1280 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x)    (x+0x000000c4)  argument
1281 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x)    (x+0x000000c4)  argument
1284 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x)      \  argument
1285 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_WBM2REO_L…
1286 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1287 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1288 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \  argument
1289 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1290 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1293 …BM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_IN…
1308 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000000c8)  argument
1309 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000000c8)  argument
1312 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x)   \  argument
1313 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_WBM2RE…
1314 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1315 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1316 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
1317 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1318 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1321 …O_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPT…
1330 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000000cc)  argument
1331 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000000cc)  argument
1334 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x)  \  argument
1335 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_WBM2R…
1336 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1337 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1338 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
1339 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1340 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1343 …_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREF…
1352 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0)  argument
1353 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0)  argument
1356 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \  argument
1357 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_WBM2…
1358 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1359 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1360 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
1361 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1362 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1365 …INK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFE…
1377 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x)          (x+0x000000d4)  argument
1378 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_PHYS(x)          (x+0x000000d4)  argument
1381 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_IN(x)            \  argument
1382 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RI…
1383 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_INM(x, mask)     \  argument
1384 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1385 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUT(x, val)      \  argument
1386 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), val)
1387 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1390 …_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BAS…
1399 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x)          (x+0x000000d8)  argument
1400 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_PHYS(x)          (x+0x000000d8)  argument
1403 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_IN(x)            \  argument
1404 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RI…
1405 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_INM(x, mask)     \  argument
1406 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1407 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUT(x, val)      \  argument
1408 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), val)
1409 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1412 …_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BAS…
1424 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x)              (x+0x000000dc)  argument
1425 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_PHYS(x)              (x+0x000000dc)  argument
1428 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_IN(x)                \  argument
1429 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_M…
1430 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_INM(x, mask)         \  argument
1431 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask) 
1432 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUT(x, val)          \  argument
1433 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), val)
1434 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val)   \  argument
1437 …s(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_D…
1446 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x)        (x+0x000000e0)  argument
1447 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x)        (x+0x000000e0)  argument
1450 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x)          \  argument
1451 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_…
1452 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask)   \  argument
1453 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1454 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val)    \  argument
1455 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1456 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1459 …O_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_…
1468 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x)                    (x+0x000000e4)  argument
1469 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x)                    (x+0x000000e4)  argument
1472 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x)                      \  argument
1473 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_BASE_LSB_RMS…
1474 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask)               \  argument
1475 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask) 
1476 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val)                \  argument
1477 	out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), val)
1478 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
1481 …_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_BASE_LSB…
1490 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x)                    (x+0x000000e8)  argument
1491 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x)                    (x+0x000000e8)  argument
1494 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x)                      \  argument
1495 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_BASE_MSB_RMS…
1496 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask)               \  argument
1497 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask) 
1498 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val)                \  argument
1499 	out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), val)
1500 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
1503 …_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_BASE_MSB…
1515 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x)                          (x+0x000000ec)  argument
1516 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x)                          (x+0x000000ec)  argument
1519 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x)                            \  argument
1520 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), HWIO_REO_R0_REO_CMD_RING_ID_RMSK)
1521 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask)                     \  argument
1522 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask) 
1523 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val)                      \  argument
1524 	out_dword( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), val)
1525 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val)               \  argument
1528 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
1537 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x)                      (x+0x000000f0)  argument
1538 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x)                      (x+0x000000f0)  argument
1541 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x)                        \  argument
1542 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_RING_STATUS_RMSK)
1543 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask)                 \  argument
1544 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask) 
1545 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val)                  \  argument
1546 	out_dword( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), val)
1547 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val)           \  argument
1550 …ord_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_STATUS_…
1562 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x)                        (x+0x000000f4)  argument
1563 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x)                        (x+0x000000f4)  argument
1566 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x)                          \  argument
1567 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MISC_RMSK)
1568 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask)                   \  argument
1569 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask) 
1570 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val)                    \  argument
1571 	out_dword( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), val)
1572 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val)             \  argument
1575 …_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MISC_I…
1614 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x)                 (x+0x00000100)  argument
1615 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x)                 (x+0x00000100)  argument
1618 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x)                   \  argument
1619 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_TP_ADDR_L…
1620 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
1621 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask) 
1622 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val)             \  argument
1623 	out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), val)
1624 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
1627 …ed_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LS…
1636 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x)                 (x+0x00000104)  argument
1637 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x)                 (x+0x00000104)  argument
1640 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x)                   \  argument
1641 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_TP_ADDR_M…
1642 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
1643 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask) 
1644 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val)             \  argument
1645 	out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), val)
1646 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
1649 …ed_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MS…
1658 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)      (x+0x00000114)  argument
1659 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)      (x+0x00000114)  argument
1662 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x)        \  argument
1663 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
1664 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1665 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1666 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)  \  argument
1667 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1668 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1671 …0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SE…
1686 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)      (x+0x00000118)  argument
1687 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)      (x+0x00000118)  argument
1690 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x)        \  argument
1691 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
1692 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1693 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1694 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)  \  argument
1695 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1696 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1699 …0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SE…
1708 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x)         (x+0x0000011c)  argument
1709 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x)         (x+0x0000011c)  argument
1712 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x)           \  argument
1713 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_RING_C…
1714 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
1715 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1716 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val)     \  argument
1717 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1718 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1721 …EO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_S…
1736 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)      (x+0x00000120)  argument
1737 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)      (x+0x00000120)  argument
1740 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x)        \  argument
1741 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
1742 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1743 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1744 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)  \  argument
1745 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1746 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1749 …0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_…
1758 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)     (x+0x00000124)  argument
1759 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)     (x+0x00000124)  argument
1762 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x)       \  argument
1763 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_REO_CMD_RI…
1764 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1765 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1766 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
1767 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1768 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1771 …REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETC…
1780 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)    (x+0x00000128)  argument
1781 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)    (x+0x00000128)  argument
1784 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x)      \  argument
1785 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_R…
1786 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1787 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1788 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
1789 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1790 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1793 …EO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETC…
1805 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000012c)  argument
1806 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000012c)  argument
1809 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x)                 \  argument
1810 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_BA…
1811 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
1812 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1813 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
1814 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), val)
1815 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
1818 …ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_L…
1827 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000130)  argument
1828 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000130)  argument
1831 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x)                 \  argument
1832 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_BA…
1833 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
1834 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1835 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
1836 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), val)
1837 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
1840 …ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_M…
1852 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x)                   (x+0x00000134)  argument
1853 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x)                   (x+0x00000134)  argument
1856 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x)                     \  argument
1857 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_R…
1858 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask)              \  argument
1859 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask) 
1860 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val)               \  argument
1861 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), val)
1862 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
1865 …asked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_DATA…
1874 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000138)  argument
1875 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000138)  argument
1878 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
1879 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_CMD_RING_HP_TP…
1880 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
1881 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1882 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
1883 	out_dword( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1884 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
1887 …HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFF…
1896 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x)                     (x+0x0000013c)  argument
1897 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x)                     (x+0x0000013c)  argument
1900 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x)                       \  argument
1901 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_BASE_LSB_RMSK)
1902 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask)                \  argument
1903 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask) 
1904 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val)                 \  argument
1905 	out_dword( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), val)
1906 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
1909 …d_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_BASE_LSB_…
1918 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x)                     (x+0x00000140)  argument
1919 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x)                     (x+0x00000140)  argument
1922 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x)                       \  argument
1923 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_BASE_MSB_RMSK)
1924 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask)                \  argument
1925 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask) 
1926 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val)                 \  argument
1927 	out_dword( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), val)
1928 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
1931 …d_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_BASE_MSB_…
1943 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x)                           (x+0x00000144)  argument
1944 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x)                           (x+0x00000144)  argument
1947 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x)                             \  argument
1948 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), HWIO_REO_R0_SW2REO_RING_ID_RMSK)
1949 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask)                      \  argument
1950 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask) 
1951 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val)                       \  argument
1952 	out_dword( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), val)
1953 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val)                \  argument
1956 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
1965 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x)                       (x+0x00000148)  argument
1966 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x)                       (x+0x00000148)  argument
1969 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x)                         \  argument
1970 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RING_STATUS_RMSK)
1971 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask)                  \  argument
1972 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask) 
1973 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val)                   \  argument
1974 	out_dword( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), val)
1975 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val)            \  argument
1978 …word_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STATUS_I…
1990 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x)                         (x+0x0000014c)  argument
1991 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x)                         (x+0x0000014c)  argument
1994 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x)                           \  argument
1995 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), HWIO_REO_R0_SW2REO_RING_MISC_RMSK)
1996 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask)                    \  argument
1997 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask) 
1998 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val)                     \  argument
1999 	out_dword( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), val)
2000 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val)              \  argument
2003 …t_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_IN…
2042 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x)                  (x+0x00000158)  argument
2043 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x)                  (x+0x00000158)  argument
2046 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x)                    \  argument
2047 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB…
2048 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask)             \  argument
2049 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask) 
2050 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val)              \  argument
2051 	out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), val)
2052 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val)       \  argument
2055 …sked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_TP_ADDR_LS…
2064 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x)                  (x+0x0000015c)  argument
2065 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x)                  (x+0x0000015c)  argument
2068 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x)                    \  argument
2069 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB…
2070 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask)             \  argument
2071 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask) 
2072 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val)              \  argument
2073 	out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), val)
2074 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val)       \  argument
2077 …sked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_TP_ADDR_MS…
2086 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)       (x+0x0000016c)  argument
2087 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)       (x+0x0000016c)  argument
2090 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x)         \  argument
2091 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2092 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask)  \  argument
2093 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2094 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)   \  argument
2095 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2096 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2099 …R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SET…
2114 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)       (x+0x00000170)  argument
2115 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)       (x+0x00000170)  argument
2118 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x)         \  argument
2119 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2120 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask)  \  argument
2121 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2122 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)   \  argument
2123 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2124 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2127 …R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SET…
2136 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x)          (x+0x00000174)  argument
2137 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x)          (x+0x00000174)  argument
2140 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x)            \  argument
2141 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RING_CON…
2142 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask)     \  argument
2143 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2144 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val)      \  argument
2145 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2146 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2149 …_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_S…
2164 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)       (x+0x00000178)  argument
2165 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)       (x+0x00000178)  argument
2168 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x)         \  argument
2169 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2170 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask)  \  argument
2171 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2172 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)   \  argument
2173 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2174 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2177 …R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_C…
2186 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)      (x+0x0000017c)  argument
2187 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)      (x+0x0000017c)  argument
2190 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x)        \  argument
2191 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_SW2REO_RING…
2192 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2193 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2194 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val)  \  argument
2195 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2196 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2199 …0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETC…
2208 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)     (x+0x00000180)  argument
2209 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)     (x+0x00000180)  argument
2212 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x)       \  argument
2213 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RIN…
2214 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2215 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2216 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
2217 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2218 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2221 …SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH…
2233 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x)                (x+0x00000184)  argument
2234 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x)                (x+0x00000184)  argument
2237 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x)                  \  argument
2238 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_BASE…
2239 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
2240 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2241 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val)            \  argument
2242 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), val)
2243 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
2246 …d_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_BASE_L…
2255 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x)                (x+0x00000188)  argument
2256 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x)                (x+0x00000188)  argument
2259 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x)                  \  argument
2260 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_BASE…
2261 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
2262 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2263 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val)            \  argument
2264 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), val)
2265 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
2268 …d_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_BASE_M…
2280 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x)                    (x+0x0000018c)  argument
2281 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x)                    (x+0x0000018c)  argument
2284 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x)                      \  argument
2285 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_DATA_RMS…
2286 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask)               \  argument
2287 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask) 
2288 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val)                \  argument
2289 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), val)
2290 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
2293 …_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_DATA…
2302 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x)              (x+0x00000190)  argument
2303 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x)              (x+0x00000190)  argument
2306 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x)                \  argument
2307 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_SW2REO_RING_HP_TP_S…
2308 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
2309 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2310 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val)          \  argument
2311 	out_dword( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2312 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
2315 …s(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFF…
2324 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x)                    (x+0x00000194)  argument
2325 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_PHYS(x)                    (x+0x00000194)  argument
2328 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_IN(x)                      \  argument
2329 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_BASE_LSB_RMS…
2330 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask)               \  argument
2331 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask) 
2332 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val)                \  argument
2333 	out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), val)
2334 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2337 …_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_BASE_LSB…
2346 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x)                    (x+0x00000198)  argument
2347 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_PHYS(x)                    (x+0x00000198)  argument
2350 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_IN(x)                      \  argument
2351 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_BASE_MSB_RMS…
2352 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask)               \  argument
2353 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask) 
2354 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val)                \  argument
2355 	out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), val)
2356 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2359 …_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_BASE_MSB…
2371 #define HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x)                          (x+0x0000019c)  argument
2372 #define HWIO_REO_R0_SW2REO1_RING_ID_PHYS(x)                          (x+0x0000019c)  argument
2375 #define HWIO_REO_R0_SW2REO1_RING_ID_IN(x)                            \  argument
2376 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), HWIO_REO_R0_SW2REO1_RING_ID_RMSK)
2377 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask)                     \  argument
2378 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask) 
2379 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val)                      \  argument
2380 	out_dword( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), val)
2381 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val)               \  argument
2384 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
2393 #define HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x)                      (x+0x000001a0)  argument
2394 #define HWIO_REO_R0_SW2REO1_RING_STATUS_PHYS(x)                      (x+0x000001a0)  argument
2397 #define HWIO_REO_R0_SW2REO1_RING_STATUS_IN(x)                        \  argument
2398 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_RING_STATUS_RMSK)
2399 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask)                 \  argument
2400 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask) 
2401 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val)                  \  argument
2402 	out_dword( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), val)
2403 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val)           \  argument
2406 …ord_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_STATUS_…
2418 #define HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x)                        (x+0x000001a4)  argument
2419 #define HWIO_REO_R0_SW2REO1_RING_MISC_PHYS(x)                        (x+0x000001a4)  argument
2422 #define HWIO_REO_R0_SW2REO1_RING_MISC_IN(x)                          \  argument
2423 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MISC_RMSK)
2424 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask)                   \  argument
2425 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask) 
2426 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val)                    \  argument
2427 	out_dword( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), val)
2428 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val)             \  argument
2431 …_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MISC_I…
2470 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x)                 (x+0x000001b0)  argument
2471 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_PHYS(x)                 (x+0x000001b0)  argument
2474 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_IN(x)                   \  argument
2475 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_TP_ADDR_L…
2476 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
2477 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
2478 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val)             \  argument
2479 	out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), val)
2480 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2483 …ed_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LS…
2492 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x)                 (x+0x000001b4)  argument
2493 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_PHYS(x)                 (x+0x000001b4)  argument
2496 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_IN(x)                   \  argument
2497 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_TP_ADDR_M…
2498 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
2499 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
2500 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val)             \  argument
2501 	out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), val)
2502 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2505 …ed_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MS…
2514 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)      (x+0x000001c4)  argument
2515 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)      (x+0x000001c4)  argument
2518 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x)        \  argument
2519 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
2520 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2521 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2522 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)  \  argument
2523 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2524 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2527 …0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SE…
2542 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)      (x+0x000001c8)  argument
2543 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)      (x+0x000001c8)  argument
2546 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x)        \  argument
2547 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
2548 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2549 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2550 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)  \  argument
2551 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2552 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2555 …0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SE…
2564 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x)         (x+0x000001cc)  argument
2565 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_PHYS(x)         (x+0x000001cc)  argument
2568 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_IN(x)           \  argument
2569 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_RING_C…
2570 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
2571 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2572 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val)     \  argument
2573 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2574 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2577 …EO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_S…
2592 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)      (x+0x000001d0)  argument
2593 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)      (x+0x000001d0)  argument
2596 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x)        \  argument
2597 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
2598 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2599 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2600 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)  \  argument
2601 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2602 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2605 …0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_…
2614 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)     (x+0x000001d4)  argument
2615 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)     (x+0x000001d4)  argument
2618 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x)       \  argument
2619 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_SW2REO1_RI…
2620 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2621 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2622 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
2623 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2624 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2627 …SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETC…
2636 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)    (x+0x000001d8)  argument
2637 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)    (x+0x000001d8)  argument
2640 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x)      \  argument
2641 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_R…
2642 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2643 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2644 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
2645 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2646 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2649 …W2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETC…
2661 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000001dc)  argument
2662 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000001dc)  argument
2665 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_IN(x)                 \  argument
2666 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_BA…
2667 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
2668 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2669 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
2670 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), val)
2671 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
2674 …ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_L…
2683 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000001e0)  argument
2684 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000001e0)  argument
2687 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_IN(x)                 \  argument
2688 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_BA…
2689 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
2690 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2691 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
2692 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), val)
2693 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
2696 …ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_M…
2708 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x)                   (x+0x000001e4)  argument
2709 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_PHYS(x)                   (x+0x000001e4)  argument
2712 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_IN(x)                     \  argument
2713 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_R…
2714 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask)              \  argument
2715 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask) 
2716 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val)               \  argument
2717 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), val)
2718 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
2721 …asked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_DATA…
2730 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000001e8)  argument
2731 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000001e8)  argument
2734 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
2735 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_SW2REO1_RING_HP_TP…
2736 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
2737 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2738 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
2739 	out_dword( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2740 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
2743 …HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFF…
2752 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x)                    (x+0x000001ec)  argument
2753 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x)                    (x+0x000001ec)  argument
2756 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x)                      \  argument
2757 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_BASE_LSB_RMS…
2758 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask)               \  argument
2759 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask) 
2760 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val)                \  argument
2761 	out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), val)
2762 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2765 …_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_BASE_LSB…
2774 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x)                    (x+0x000001f0)  argument
2775 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x)                    (x+0x000001f0)  argument
2778 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x)                      \  argument
2779 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RMS…
2780 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask)               \  argument
2781 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask) 
2782 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val)                \  argument
2783 	out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), val)
2784 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2787 …_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_BASE_MSB…
2799 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x)                          (x+0x000001f4)  argument
2800 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x)                          (x+0x000001f4)  argument
2803 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x)                            \  argument
2804 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW1_RING_ID_RMSK)
2805 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask)                     \  argument
2806 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask) 
2807 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val)                      \  argument
2808 	out_dword( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), val)
2809 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val)               \  argument
2812 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
2824 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                      (x+0x000001f8)  argument
2825 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x)                      (x+0x000001f8)  argument
2828 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x)                        \  argument
2829 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW1_RING_STATUS_RMSK)
2830 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask)                 \  argument
2831 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask) 
2832 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val)                  \  argument
2833 	out_dword( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), val)
2834 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val)           \  argument
2837 …ord_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_STATUS_…
2849 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x)                        (x+0x000001fc)  argument
2850 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x)                        (x+0x000001fc)  argument
2853 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x)                          \  argument
2854 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MISC_RMSK)
2855 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask)                   \  argument
2856 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask) 
2857 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val)                    \  argument
2858 	out_dword( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), val)
2859 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val)             \  argument
2862 …_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MISC_I…
2904 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000200)  argument
2905 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000200)  argument
2908 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x)                   \  argument
2909 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_ADDR_L…
2910 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
2911 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask) 
2912 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
2913 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), val)
2914 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2917 …ed_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LS…
2926 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000204)  argument
2927 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000204)  argument
2930 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x)                   \  argument
2931 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_ADDR_M…
2932 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
2933 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask) 
2934 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
2935 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), val)
2936 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2939 …ed_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MS…
2948 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000210)  argument
2949 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000210)  argument
2952 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
2953 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW1_RING_PR…
2954 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
2955 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
2956 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
2957 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), val)
2958 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
2961 …_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_…
2976 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000214)  argument
2977 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000214)  argument
2980 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
2981 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW1_RING_P…
2982 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
2983 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
2984 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
2985 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), val)
2986 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
2989 …EO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_S…
3004 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000218)  argument
3005 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000218)  argument
3008 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3009 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW1_RING…
3010 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3011 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3012 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3013 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3014 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3017 …R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_C…
3026 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000234)  argument
3027 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000234)  argument
3030 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3031 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_BA…
3032 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3033 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3034 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3035 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), val)
3036 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3039 …ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_L…
3048 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000238)  argument
3049 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000238)  argument
3052 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3053 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_BA…
3054 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3055 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3056 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3057 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), val)
3058 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3061 …ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_M…
3073 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x)                   (x+0x0000023c)  argument
3074 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x)                   (x+0x0000023c)  argument
3077 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x)                     \  argument
3078 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_R…
3079 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask)              \  argument
3080 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask) 
3081 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val)               \  argument
3082 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), val)
3083 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3086 …asked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_DATA…
3095 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000240)  argument
3096 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000240)  argument
3099 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3100 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_TP…
3101 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3102 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3103 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3104 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3105 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3108 …HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFF…
3117 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x)                    (x+0x00000244)  argument
3118 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x)                    (x+0x00000244)  argument
3121 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x)                      \  argument
3122 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_BASE_LSB_RMS…
3123 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask)               \  argument
3124 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask) 
3125 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val)                \  argument
3126 	out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), val)
3127 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3130 …_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_BASE_LSB…
3139 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x)                    (x+0x00000248)  argument
3140 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x)                    (x+0x00000248)  argument
3143 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x)                      \  argument
3144 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_BASE_MSB_RMS…
3145 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask)               \  argument
3146 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask) 
3147 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val)                \  argument
3148 	out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), val)
3149 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3152 …_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_BASE_MSB…
3164 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x)                          (x+0x0000024c)  argument
3165 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x)                          (x+0x0000024c)  argument
3168 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x)                            \  argument
3169 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW2_RING_ID_RMSK)
3170 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask)                     \  argument
3171 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask) 
3172 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val)                      \  argument
3173 	out_dword( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), val)
3174 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val)               \  argument
3177 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3189 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x)                      (x+0x00000250)  argument
3190 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x)                      (x+0x00000250)  argument
3193 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x)                        \  argument
3194 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW2_RING_STATUS_RMSK)
3195 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask)                 \  argument
3196 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask) 
3197 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val)                  \  argument
3198 	out_dword( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), val)
3199 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val)           \  argument
3202 …ord_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_STATUS_…
3214 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x)                        (x+0x00000254)  argument
3215 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x)                        (x+0x00000254)  argument
3218 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x)                          \  argument
3219 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MISC_RMSK)
3220 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask)                   \  argument
3221 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask) 
3222 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val)                    \  argument
3223 	out_dword( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), val)
3224 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val)             \  argument
3227 …_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MISC_I…
3269 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000258)  argument
3270 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000258)  argument
3273 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x)                   \  argument
3274 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_ADDR_L…
3275 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3276 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask) 
3277 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
3278 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), val)
3279 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3282 …ed_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LS…
3291 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x0000025c)  argument
3292 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x0000025c)  argument
3295 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x)                   \  argument
3296 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_ADDR_M…
3297 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3298 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask) 
3299 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
3300 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), val)
3301 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3304 …ed_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MS…
3313 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000268)  argument
3314 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000268)  argument
3317 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
3318 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW2_RING_PR…
3319 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3320 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3321 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
3322 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3323 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3326 …_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_…
3341 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x0000026c)  argument
3342 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x0000026c)  argument
3345 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
3346 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW2_RING_P…
3347 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3348 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3349 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
3350 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3351 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3354 …EO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_S…
3369 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000270)  argument
3370 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000270)  argument
3373 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3374 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW2_RING…
3375 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3376 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3377 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3378 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3379 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3382 …R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_C…
3391 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000028c)  argument
3392 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000028c)  argument
3395 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3396 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_BA…
3397 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3398 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3399 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3400 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), val)
3401 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3404 …ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_L…
3413 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000290)  argument
3414 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000290)  argument
3417 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3418 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_BA…
3419 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3420 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3421 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3422 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), val)
3423 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3426 …ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_M…
3438 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x)                   (x+0x00000294)  argument
3439 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x)                   (x+0x00000294)  argument
3442 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x)                     \  argument
3443 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_R…
3444 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask)              \  argument
3445 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask) 
3446 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val)               \  argument
3447 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), val)
3448 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3451 …asked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_DATA…
3460 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000298)  argument
3461 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000298)  argument
3464 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3465 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_TP…
3466 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3467 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3468 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3469 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3470 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3473 …HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFF…
3482 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x)                    (x+0x0000029c)  argument
3483 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x)                    (x+0x0000029c)  argument
3486 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x)                      \  argument
3487 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_BASE_LSB_RMS…
3488 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask)               \  argument
3489 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask) 
3490 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val)                \  argument
3491 	out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), val)
3492 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3495 …_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_BASE_LSB…
3504 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x)                    (x+0x000002a0)  argument
3505 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x)                    (x+0x000002a0)  argument
3508 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x)                      \  argument
3509 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_BASE_MSB_RMS…
3510 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask)               \  argument
3511 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask) 
3512 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val)                \  argument
3513 	out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), val)
3514 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3517 …_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_BASE_MSB…
3529 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x)                          (x+0x000002a4)  argument
3530 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x)                          (x+0x000002a4)  argument
3533 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x)                            \  argument
3534 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW3_RING_ID_RMSK)
3535 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask)                     \  argument
3536 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask) 
3537 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val)                      \  argument
3538 	out_dword( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), val)
3539 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val)               \  argument
3542 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
3554 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x)                      (x+0x000002a8)  argument
3555 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x)                      (x+0x000002a8)  argument
3558 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x)                        \  argument
3559 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW3_RING_STATUS_RMSK)
3560 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask)                 \  argument
3561 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask) 
3562 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val)                  \  argument
3563 	out_dword( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), val)
3564 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val)           \  argument
3567 …ord_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_STATUS_…
3579 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x)                        (x+0x000002ac)  argument
3580 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x)                        (x+0x000002ac)  argument
3583 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x)                          \  argument
3584 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MISC_RMSK)
3585 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask)                   \  argument
3586 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask) 
3587 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val)                    \  argument
3588 	out_dword( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), val)
3589 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val)             \  argument
3592 …_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MISC_I…
3634 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x000002b0)  argument
3635 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x000002b0)  argument
3638 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x)                   \  argument
3639 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_ADDR_L…
3640 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3641 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask) 
3642 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
3643 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), val)
3644 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3647 …ed_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LS…
3656 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x000002b4)  argument
3657 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x000002b4)  argument
3660 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x)                   \  argument
3661 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_ADDR_M…
3662 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3663 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask) 
3664 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
3665 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), val)
3666 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3669 …ed_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MS…
3678 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x000002c0)  argument
3679 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x000002c0)  argument
3682 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
3683 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW3_RING_PR…
3684 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3685 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3686 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
3687 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3688 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3691 …_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_…
3706 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x000002c4)  argument
3707 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x000002c4)  argument
3710 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
3711 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW3_RING_P…
3712 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3713 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3714 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
3715 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3716 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3719 …EO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_S…
3734 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x000002c8)  argument
3735 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x000002c8)  argument
3738 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3739 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW3_RING…
3740 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3741 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3742 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3743 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3744 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3747 …R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_C…
3756 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000002e4)  argument
3757 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000002e4)  argument
3760 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3761 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_BA…
3762 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3763 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3764 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3765 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), val)
3766 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3769 …ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_L…
3778 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000002e8)  argument
3779 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000002e8)  argument
3782 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3783 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_BA…
3784 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3785 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3786 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3787 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), val)
3788 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3791 …ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_M…
3803 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x)                   (x+0x000002ec)  argument
3804 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x)                   (x+0x000002ec)  argument
3807 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x)                     \  argument
3808 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_R…
3809 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask)              \  argument
3810 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask) 
3811 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val)               \  argument
3812 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), val)
3813 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3816 …asked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_DATA…
3825 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000002f0)  argument
3826 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000002f0)  argument
3829 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3830 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_TP…
3831 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3832 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3833 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3834 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3835 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3838 …HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFF…
3847 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x)                    (x+0x000002f4)  argument
3848 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x)                    (x+0x000002f4)  argument
3851 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x)                      \  argument
3852 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_BASE_LSB_RMS…
3853 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask)               \  argument
3854 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask) 
3855 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val)                \  argument
3856 	out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), val)
3857 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3860 …_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_BASE_LSB…
3869 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x)                    (x+0x000002f8)  argument
3870 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x)                    (x+0x000002f8)  argument
3873 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x)                      \  argument
3874 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_BASE_MSB_RMS…
3875 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask)               \  argument
3876 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask) 
3877 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val)                \  argument
3878 	out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), val)
3879 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3882 …_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_BASE_MSB…
3894 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x)                          (x+0x000002fc)  argument
3895 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x)                          (x+0x000002fc)  argument
3898 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x)                            \  argument
3899 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW4_RING_ID_RMSK)
3900 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask)                     \  argument
3901 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask) 
3902 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val)                      \  argument
3903 	out_dword( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), val)
3904 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val)               \  argument
3907 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
3919 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x)                      (x+0x00000300)  argument
3920 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x)                      (x+0x00000300)  argument
3923 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x)                        \  argument
3924 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW4_RING_STATUS_RMSK)
3925 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask)                 \  argument
3926 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask) 
3927 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val)                  \  argument
3928 	out_dword( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), val)
3929 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val)           \  argument
3932 …ord_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_STATUS_…
3944 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x)                        (x+0x00000304)  argument
3945 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x)                        (x+0x00000304)  argument
3948 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x)                          \  argument
3949 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MISC_RMSK)
3950 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask)                   \  argument
3951 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask) 
3952 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val)                    \  argument
3953 	out_dword( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), val)
3954 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val)             \  argument
3957 …_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MISC_I…
3999 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000308)  argument
4000 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000308)  argument
4003 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x)                   \  argument
4004 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_ADDR_L…
4005 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4006 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask) 
4007 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4008 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), val)
4009 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4012 …ed_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LS…
4021 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x0000030c)  argument
4022 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x0000030c)  argument
4025 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x)                   \  argument
4026 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_ADDR_M…
4027 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4028 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask) 
4029 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4030 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), val)
4031 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4034 …ed_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MS…
4043 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000318)  argument
4044 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000318)  argument
4047 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4048 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW4_RING_PR…
4049 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4050 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4051 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4052 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4053 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4056 …_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_…
4071 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x0000031c)  argument
4072 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x0000031c)  argument
4075 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4076 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW4_RING_P…
4077 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4078 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4079 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4080 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4081 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4084 …EO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_S…
4099 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000320)  argument
4100 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000320)  argument
4103 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4104 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW4_RING…
4105 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4106 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4107 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4108 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4109 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4112 …R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_C…
4121 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000033c)  argument
4122 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000033c)  argument
4125 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4126 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_BA…
4127 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4128 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4129 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4130 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), val)
4131 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4134 …ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_L…
4143 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000340)  argument
4144 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000340)  argument
4147 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4148 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_BA…
4149 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4150 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4151 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4152 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), val)
4153 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4156 …ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_M…
4168 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x)                   (x+0x00000344)  argument
4169 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x)                   (x+0x00000344)  argument
4172 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x)                     \  argument
4173 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_R…
4174 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask)              \  argument
4175 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask) 
4176 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val)               \  argument
4177 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), val)
4178 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4181 …asked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_DATA…
4190 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000348)  argument
4191 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000348)  argument
4194 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4195 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_TP…
4196 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4197 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4198 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4199 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4200 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4203 …HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFF…
4212 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x)                    (x+0x000003fc)  argument
4213 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x)                    (x+0x000003fc)  argument
4216 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x)                      \  argument
4217 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_BASE_LSB_RMS…
4218 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask)               \  argument
4219 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask) 
4220 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val)                \  argument
4221 	out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), val)
4222 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4225 …_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_BASE_LSB…
4234 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x)                    (x+0x00000400)  argument
4235 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x)                    (x+0x00000400)  argument
4238 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x)                      \  argument
4239 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_BASE_MSB_RMS…
4240 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask)               \  argument
4241 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask) 
4242 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val)                \  argument
4243 	out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), val)
4244 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4247 …_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_BASE_MSB…
4259 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x)                          (x+0x00000404)  argument
4260 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x)                          (x+0x00000404)  argument
4263 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x)                            \  argument
4264 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), HWIO_REO_R0_REO2TCL_RING_ID_RMSK)
4265 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask)                     \  argument
4266 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask) 
4267 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val)                      \  argument
4268 	out_dword( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), val)
4269 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val)               \  argument
4272 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
4284 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x)                      (x+0x00000408)  argument
4285 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x)                      (x+0x00000408)  argument
4288 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x)                        \  argument
4289 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2TCL_RING_STATUS_RMSK)
4290 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask)                 \  argument
4291 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask) 
4292 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val)                  \  argument
4293 	out_dword( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), val)
4294 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val)           \  argument
4297 …ord_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_STATUS_…
4309 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x)                        (x+0x0000040c)  argument
4310 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x)                        (x+0x0000040c)  argument
4313 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x)                          \  argument
4314 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MISC_RMSK)
4315 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask)                   \  argument
4316 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask) 
4317 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val)                    \  argument
4318 	out_dword( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), val)
4319 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val)             \  argument
4322 …_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MISC_I…
4364 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000410)  argument
4365 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000410)  argument
4368 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x)                   \  argument
4369 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_ADDR_L…
4370 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4371 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask) 
4372 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4373 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), val)
4374 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4377 …ed_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LS…
4386 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000414)  argument
4387 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000414)  argument
4390 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x)                   \  argument
4391 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_ADDR_M…
4392 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4393 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask) 
4394 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4395 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), val)
4396 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4399 …ed_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MS…
4408 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000420)  argument
4409 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000420)  argument
4412 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4413 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2TCL_RING_PR…
4414 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4415 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4416 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4417 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4418 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4421 …_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_…
4436 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000424)  argument
4437 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000424)  argument
4440 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4441 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2TCL_RING_P…
4442 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4443 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4444 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4445 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4446 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4449 …EO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_S…
4464 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000428)  argument
4465 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000428)  argument
4468 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4469 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2TCL_RING…
4470 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4471 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4472 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4473 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4474 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4477 …R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_C…
4486 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000444)  argument
4487 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000444)  argument
4490 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4491 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_BA…
4492 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4493 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4494 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4495 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), val)
4496 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4499 …ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_L…
4508 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000448)  argument
4509 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000448)  argument
4512 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4513 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_BA…
4514 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4515 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4516 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4517 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), val)
4518 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4521 …ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_M…
4533 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x)                   (x+0x0000044c)  argument
4534 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x)                   (x+0x0000044c)  argument
4537 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x)                     \  argument
4538 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_R…
4539 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask)              \  argument
4540 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask) 
4541 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val)               \  argument
4542 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), val)
4543 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4546 …asked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_DATA…
4555 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000450)  argument
4556 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000450)  argument
4559 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4560 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_TP…
4561 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4562 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4563 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4564 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4565 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4568 …HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFF…
4577 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x)                     (x+0x00000454)  argument
4578 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x)                     (x+0x00000454)  argument
4581 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x)                       \  argument
4582 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_BASE_LSB_RMSK)
4583 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask)                \  argument
4584 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask) 
4585 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val)                 \  argument
4586 	out_dword( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), val)
4587 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
4590 …d_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_BASE_LSB_…
4599 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x)                     (x+0x00000458)  argument
4600 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x)                     (x+0x00000458)  argument
4603 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x)                       \  argument
4604 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_BASE_MSB_RMSK)
4605 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask)                \  argument
4606 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask) 
4607 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val)                 \  argument
4608 	out_dword( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), val)
4609 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
4612 …d_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_BASE_MSB_…
4624 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x)                           (x+0x0000045c)  argument
4625 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x)                           (x+0x0000045c)  argument
4628 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x)                             \  argument
4629 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), HWIO_REO_R0_REO2FW_RING_ID_RMSK)
4630 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask)                      \  argument
4631 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask) 
4632 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val)                       \  argument
4633 	out_dword( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), val)
4634 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val)                \  argument
4637 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
4649 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x)                       (x+0x00000460)  argument
4650 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x)                       (x+0x00000460)  argument
4653 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x)                         \  argument
4654 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2FW_RING_STATUS_RMSK)
4655 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask)                  \  argument
4656 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask) 
4657 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val)                   \  argument
4658 	out_dword( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), val)
4659 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val)            \  argument
4662 …word_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STATUS_I…
4674 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x)                         (x+0x00000464)  argument
4675 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x)                         (x+0x00000464)  argument
4678 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x)                           \  argument
4679 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), HWIO_REO_R0_REO2FW_RING_MISC_RMSK)
4680 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask)                    \  argument
4681 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask) 
4682 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val)                     \  argument
4683 	out_dword( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), val)
4684 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val)              \  argument
4687 …t_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_IN…
4729 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x)                  (x+0x00000468)  argument
4730 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x)                  (x+0x00000468)  argument
4733 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x)                    \  argument
4734 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB…
4735 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask)             \  argument
4736 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 
4737 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val)              \  argument
4738 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), val)
4739 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val)       \  argument
4742 …sked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_ADDR_LS…
4751 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x)                  (x+0x0000046c)  argument
4752 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x)                  (x+0x0000046c)  argument
4755 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x)                    \  argument
4756 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB…
4757 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask)             \  argument
4758 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 
4759 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val)              \  argument
4760 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), val)
4761 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val)       \  argument
4764 …sked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_ADDR_MS…
4773 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x)           (x+0x00000478)  argument
4774 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x)           (x+0x00000478)  argument
4777 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x)             \  argument
4778 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2FW_RING_PROD…
4779 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask)      \  argument
4780 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4781 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val)       \  argument
4782 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4783 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4786 …O_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_S…
4801 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x)          (x+0x0000047c)  argument
4802 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x)          (x+0x0000047c)  argument
4805 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x)            \  argument
4806 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2FW_RING_PRO…
4807 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask)     \  argument
4808 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4809 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val)      \  argument
4810 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4811 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4814 …_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_S…
4829 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x)        (x+0x00000480)  argument
4830 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x)        (x+0x00000480)  argument
4833 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x)          \  argument
4834 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2FW_RING_P…
4835 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask)   \  argument
4836 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4837 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val)    \  argument
4838 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4839 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4842 …O_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_C…
4851 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x)                (x+0x0000049c)  argument
4852 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x)                (x+0x0000049c)  argument
4855 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x)                  \  argument
4856 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_BASE…
4857 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
4858 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4859 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val)            \  argument
4860 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), val)
4861 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
4864 …d_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_BASE_L…
4873 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x)                (x+0x000004a0)  argument
4874 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x)                (x+0x000004a0)  argument
4877 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x)                  \  argument
4878 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_BASE…
4879 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
4880 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4881 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val)            \  argument
4882 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), val)
4883 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
4886 …d_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_BASE_M…
4898 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x)                    (x+0x000004a4)  argument
4899 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x)                    (x+0x000004a4)  argument
4902 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x)                      \  argument
4903 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_DATA_RMS…
4904 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask)               \  argument
4905 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask) 
4906 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val)                \  argument
4907 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), val)
4908 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
4911 …_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_DATA…
4920 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x)              (x+0x000004a8)  argument
4921 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x)              (x+0x000004a8)  argument
4924 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x)                \  argument
4925 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_TP_S…
4926 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
4927 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4928 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val)          \  argument
4929 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4930 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
4933 …s(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFF…
4942 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x)                (x+0x000004ac)  argument
4943 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x)                (x+0x000004ac)  argument
4946 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x)                  \  argument
4947 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_BASE…
4948 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask)           \  argument
4949 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask) 
4950 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val)            \  argument
4951 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), val)
4952 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val)     \  argument
4955 …d_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_BASE_L…
4964 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x)                (x+0x000004b0)  argument
4965 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x)                (x+0x000004b0)  argument
4968 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x)                  \  argument
4969 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_BASE…
4970 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask)           \  argument
4971 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask) 
4972 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val)            \  argument
4973 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), val)
4974 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val)     \  argument
4977 …d_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_BASE_M…
4989 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x)                      (x+0x000004b4)  argument
4990 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x)                      (x+0x000004b4)  argument
4993 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x)                        \  argument
4994 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_ID_RMSK)
4995 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask)                 \  argument
4996 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask) 
4997 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val)                  \  argument
4998 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), val)
4999 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val)           \  argument
5002 …ord_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_ID_…
5014 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x)                  (x+0x000004b8)  argument
5015 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x)                  (x+0x000004b8)  argument
5018 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x)                    \  argument
5019 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_STATUS…
5020 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask)             \  argument
5021 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask) 
5022 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val)              \  argument
5023 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), val)
5024 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val)       \  argument
5027 …sked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_STATU…
5039 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x)                    (x+0x000004bc)  argument
5040 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x)                    (x+0x000004bc)  argument
5043 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x)                      \  argument
5044 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_MISC_RMS…
5045 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask)               \  argument
5046 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask) 
5047 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val)                \  argument
5048 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), val)
5049 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val)         \  argument
5052 …_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MISC…
5094 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x)             (x+0x000004c0)  argument
5095 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x)             (x+0x000004c0)  argument
5098 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x)               \  argument
5099 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_H…
5100 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask)        \  argument
5101 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask) 
5102 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val)         \  argument
5103 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), val)
5104 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val)  \  argument
5107 …HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_…
5116 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x)             (x+0x000004c4)  argument
5117 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x)             (x+0x000004c4)  argument
5120 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x)               \  argument
5121 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_H…
5122 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask)        \  argument
5123 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask) 
5124 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val)         \  argument
5125 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), val)
5126 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val)  \  argument
5129 …HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_…
5138 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x)      (x+0x000004d0)  argument
5139 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x)      (x+0x000004d0)  argument
5142 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x)        \  argument
5143 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO_RELEASE…
5144 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \  argument
5145 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5146 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val)  \  argument
5147 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5148 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5151 …0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_IN…
5166 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x)     (x+0x000004d4)  argument
5167 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x)     (x+0x000004d4)  argument
5170 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x)       \  argument
5171 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_RELEAS…
5172 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
5173 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5174 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \  argument
5175 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5176 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5179 …REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT…
5194 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x)   (x+0x000004d8)  argument
5195 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x)   (x+0x000004d8)  argument
5198 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x)     \  argument
5199 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO_RELE…
5200 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
5201 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5202 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \  argument
5203 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5204 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5207 …_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL…
5216 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x)           (x+0x000004f4)  argument
5217 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_PHYS(x)           (x+0x000004f4)  argument
5220 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_IN(x)             \  argument
5221 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING…
5222 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_INM(x, mask)      \  argument
5223 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5224 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUT(x, val)       \  argument
5225 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), val)
5226 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
5229 …O_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE…
5238 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x)           (x+0x000004f8)  argument
5239 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_PHYS(x)           (x+0x000004f8)  argument
5242 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_IN(x)             \  argument
5243 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING…
5244 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_INM(x, mask)      \  argument
5245 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5246 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUT(x, val)       \  argument
5247 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), val)
5248 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
5251 …O_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE…
5263 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x)               (x+0x000004fc)  argument
5264 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_PHYS(x)               (x+0x000004fc)  argument
5267 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_IN(x)                 \  argument
5268 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_MSI…
5269 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_INM(x, mask)          \  argument
5270 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask) 
5271 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUT(x, val)           \  argument
5272 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), val)
5273 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val)    \  argument
5276 …ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MSI1_DA…
5285 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x)         (x+0x00000500)  argument
5286 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x)         (x+0x00000500)  argument
5289 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x)           \  argument
5290 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_RELEASE_RI…
5291 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask)    \  argument
5292 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5293 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val)     \  argument
5294 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5295 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
5298 …EO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_O…
5307 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x)                 (x+0x00000504)  argument
5308 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x)                 (x+0x00000504)  argument
5311 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x)                   \  argument
5312 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_BASE_L…
5313 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask)            \  argument
5314 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask) 
5315 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val)             \  argument
5316 	out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), val)
5317 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
5320 …ed_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_BASE_LS…
5329 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x)                 (x+0x00000508)  argument
5330 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x)                 (x+0x00000508)  argument
5333 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x)                   \  argument
5334 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_BASE_M…
5335 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask)            \  argument
5336 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask) 
5337 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val)             \  argument
5338 	out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), val)
5339 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
5342 …ed_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_BASE_MS…
5354 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x)                       (x+0x0000050c)  argument
5355 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x)                       (x+0x0000050c)  argument
5358 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x)                         \  argument
5359 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_ID_RMSK)
5360 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask)                  \  argument
5361 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask) 
5362 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val)                   \  argument
5363 	out_dword( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), val)
5364 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val)            \  argument
5367 …word_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_ID_I…
5379 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x)                   (x+0x00000510)  argument
5380 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x)                   (x+0x00000510)  argument
5383 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x)                     \  argument
5384 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_STATUS_R…
5385 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask)              \  argument
5386 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask) 
5387 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val)               \  argument
5388 	out_dword( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), val)
5389 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val)        \  argument
5392 …asked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_STATUS…
5404 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x)                     (x+0x00000514)  argument
5405 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x)                     (x+0x00000514)  argument
5408 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x)                       \  argument
5409 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_MISC_RMSK)
5410 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask)                \  argument
5411 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask) 
5412 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val)                 \  argument
5413 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), val)
5414 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val)          \  argument
5417 …d_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MISC_…
5459 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x)              (x+0x00000518)  argument
5460 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x)              (x+0x00000518)  argument
5463 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x)                \  argument
5464 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_HP_…
5465 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask)         \  argument
5466 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask) 
5467 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val)          \  argument
5468 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), val)
5469 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val)   \  argument
5472 …s(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_…
5481 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x)              (x+0x0000051c)  argument
5482 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x)              (x+0x0000051c)  argument
5485 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x)                \  argument
5486 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_HP_…
5487 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask)         \  argument
5488 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask) 
5489 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val)          \  argument
5490 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), val)
5491 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val)   \  argument
5494 …s(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_…
5503 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x)       (x+0x00000528)  argument
5504 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x)       (x+0x00000528)  argument
5507 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x)         \  argument
5508 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO_STATUS_R…
5509 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask)  \  argument
5510 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5511 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val)   \  argument
5512 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5513 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5516 …R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT…
5531 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x)      (x+0x0000052c)  argument
5532 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x)      (x+0x0000052c)  argument
5535 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x)        \  argument
5536 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_STATUS_…
5537 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
5538 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5539 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val)  \  argument
5540 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5541 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5544 …0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT…
5559 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x)    (x+0x00000530)  argument
5560 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x)    (x+0x00000530)  argument
5563 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x)      \  argument
5564 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO_STATU…
5565 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
5566 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5567 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \  argument
5568 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5569 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5572 …EO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL…
5581 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000054c)  argument
5582 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000054c)  argument
5585 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x)              \  argument
5586 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_M…
5587 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
5588 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5589 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
5590 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), val)
5591 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
5594 …WIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE…
5603 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000550)  argument
5604 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000550)  argument
5607 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x)              \  argument
5608 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_M…
5609 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
5610 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5611 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
5612 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), val)
5613 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
5616 …WIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE…
5628 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x)                (x+0x00000554)  argument
5629 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x)                (x+0x00000554)  argument
5632 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x)                  \  argument
5633 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_MSI1_…
5634 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask)           \  argument
5635 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask) 
5636 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val)            \  argument
5637 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), val)
5638 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
5641 …d_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_DA…
5650 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000558)  argument
5651 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000558)  argument
5654 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
5655 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_STATUS_RING…
5656 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
5657 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5658 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
5659 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5660 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
5663 …_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_O…
5672 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x)                         (x+0x0000055c)  argument
5673 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x)                         (x+0x0000055c)  argument
5676 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x)                           \  argument
5677 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), HWIO_REO_R0_WATCHDOG_TIMEOUT_RMSK)
5678 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask)                    \  argument
5679 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask) 
5680 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val)                     \  argument
5681 	out_dword( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), val)
5682 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val)              \  argument
5685 …t_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_IN…
5697 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x)              (x+0x00000560)  argument
5698 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x)              (x+0x00000560)  argument
5701 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x)                \  argument
5702 …in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), HWIO_REO_R0_INTERRUPT_DATA_CAPT…
5703 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask)         \  argument
5704 	in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask) 
5705 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val)          \  argument
5706 	out_dword( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), val)
5707 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val)   \  argument
5710 …s(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_I…
5719 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x)                     (x+0x00000564)  argument
5720 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x)                     (x+0x00000564)  argument
5723 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x)                       \  argument
5724 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_0_RMSK)
5725 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask)                \  argument
5726 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask) 
5727 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val)                 \  argument
5728 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), val)
5729 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val)          \  argument
5732 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_0_…
5741 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x)                     (x+0x00000568)  argument
5742 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x)                     (x+0x00000568)  argument
5745 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x)                       \  argument
5746 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_1_RMSK)
5747 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask)                \  argument
5748 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask) 
5749 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val)                 \  argument
5750 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), val)
5751 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val)          \  argument
5754 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_1_…
5763 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x)                     (x+0x0000056c)  argument
5764 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x)                     (x+0x0000056c)  argument
5767 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x)                       \  argument
5768 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_2_RMSK)
5769 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask)                \  argument
5770 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask) 
5771 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val)                 \  argument
5772 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), val)
5773 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val)          \  argument
5776 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_2_…
5785 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x)                     (x+0x00000570)  argument
5786 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x)                     (x+0x00000570)  argument
5789 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x)                       \  argument
5790 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_3_RMSK)
5791 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask)                \  argument
5792 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask) 
5793 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val)                 \  argument
5794 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), val)
5795 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val)          \  argument
5798 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_3_…
5807 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x)               (x+0x00000574)  argument
5808 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x)               (x+0x00000574)  argument
5811 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x)                 \  argument
5812 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
5813 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask)          \  argument
5814 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask) 
5815 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val)           \  argument
5816 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), val)
5817 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
5820 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
5829 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x)               (x+0x00000578)  argument
5830 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x)               (x+0x00000578)  argument
5833 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x)                 \  argument
5834 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
5835 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask)          \  argument
5836 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask) 
5837 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val)           \  argument
5838 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), val)
5839 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
5842 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
5851 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x)               (x+0x0000057c)  argument
5852 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x)               (x+0x0000057c)  argument
5855 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x)                 \  argument
5856 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
5857 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask)          \  argument
5858 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask) 
5859 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val)           \  argument
5860 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), val)
5861 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
5864 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
5873 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x)               (x+0x00000580)  argument
5874 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x)               (x+0x00000580)  argument
5877 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x)                 \  argument
5878 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
5879 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask)          \  argument
5880 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask) 
5881 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val)           \  argument
5882 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), val)
5883 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
5886 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
5895 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x)               (x+0x00000584)  argument
5896 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x)               (x+0x00000584)  argument
5899 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x)                 \  argument
5900 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
5901 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask)          \  argument
5902 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask) 
5903 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val)           \  argument
5904 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), val)
5905 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
5908 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
5917 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x)               (x+0x00000588)  argument
5918 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x)               (x+0x00000588)  argument
5921 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x)                 \  argument
5922 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
5923 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask)          \  argument
5924 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask) 
5925 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val)           \  argument
5926 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), val)
5927 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
5930 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
5939 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x)               (x+0x0000058c)  argument
5940 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x)               (x+0x0000058c)  argument
5943 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x)                 \  argument
5944 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
5945 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask)          \  argument
5946 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask) 
5947 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val)           \  argument
5948 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), val)
5949 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
5952 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
5961 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x)               (x+0x00000590)  argument
5962 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x)               (x+0x00000590)  argument
5965 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x)                 \  argument
5966 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
5967 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask)          \  argument
5968 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask) 
5969 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val)           \  argument
5970 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), val)
5971 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
5974 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
5983 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x)               (x+0x00000594)  argument
5984 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x)               (x+0x00000594)  argument
5987 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x)                 \  argument
5988 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
5989 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask)          \  argument
5990 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask) 
5991 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val)           \  argument
5992 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), val)
5993 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
5996 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6005 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x)               (x+0x00000598)  argument
6006 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x)               (x+0x00000598)  argument
6009 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x)                 \  argument
6010 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6011 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask)          \  argument
6012 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask) 
6013 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val)           \  argument
6014 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), val)
6015 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6018 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6027 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x)               (x+0x0000059c)  argument
6028 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x)               (x+0x0000059c)  argument
6031 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x)                 \  argument
6032 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6033 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask)          \  argument
6034 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask) 
6035 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val)           \  argument
6036 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), val)
6037 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6040 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6049 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x)               (x+0x000005a0)  argument
6050 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x)               (x+0x000005a0)  argument
6053 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x)                 \  argument
6054 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6055 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask)          \  argument
6056 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask) 
6057 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val)           \  argument
6058 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), val)
6059 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6062 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6071 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x)               (x+0x000005a4)  argument
6072 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x)               (x+0x000005a4)  argument
6075 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x)                 \  argument
6076 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6077 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask)          \  argument
6078 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask) 
6079 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val)           \  argument
6080 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), val)
6081 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6084 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6093 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x)               (x+0x000005a8)  argument
6094 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x)               (x+0x000005a8)  argument
6097 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x)                 \  argument
6098 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6099 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask)          \  argument
6100 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask) 
6101 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val)           \  argument
6102 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), val)
6103 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6106 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6115 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x)               (x+0x000005ac)  argument
6116 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x)               (x+0x000005ac)  argument
6119 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x)                 \  argument
6120 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6121 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask)          \  argument
6122 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask) 
6123 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val)           \  argument
6124 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), val)
6125 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6128 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6137 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x)               (x+0x000005b0)  argument
6138 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x)               (x+0x000005b0)  argument
6141 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x)                 \  argument
6142 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6143 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask)          \  argument
6144 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask) 
6145 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val)           \  argument
6146 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), val)
6147 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6150 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6159 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x)                    (x+0x000005b4)  argument
6160 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x)                    (x+0x000005b4)  argument
6163 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x)                      \  argument
6164 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_RMS…
6165 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask)               \  argument
6166 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask) 
6167 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val)                \  argument
6168 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), val)
6169 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val)         \  argument
6172 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_0…
6181 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x)                    (x+0x000005b8)  argument
6182 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x)                    (x+0x000005b8)  argument
6185 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x)                      \  argument
6186 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_RMS…
6187 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask)               \  argument
6188 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask) 
6189 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val)                \  argument
6190 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), val)
6191 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val)         \  argument
6194 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_1…
6203 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x)                    (x+0x000005bc)  argument
6204 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x)                    (x+0x000005bc)  argument
6207 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x)                      \  argument
6208 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_RMS…
6209 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask)               \  argument
6210 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask) 
6211 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val)                \  argument
6212 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), val)
6213 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val)         \  argument
6216 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_2…
6225 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x)                    (x+0x000005c0)  argument
6226 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x)                    (x+0x000005c0)  argument
6229 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x)                      \  argument
6230 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_RMS…
6231 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask)               \  argument
6232 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask) 
6233 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val)                \  argument
6234 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), val)
6235 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val)         \  argument
6238 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_3…
6247 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x)                     (x+0x000005c4)  argument
6248 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x)                     (x+0x000005c4)  argument
6251 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x)                       \  argument
6252 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_0_RMSK)
6253 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask)                \  argument
6254 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask) 
6255 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val)                 \  argument
6256 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), val)
6257 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val)          \  argument
6260 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_0_…
6269 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x)                     (x+0x000005c8)  argument
6270 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x)                     (x+0x000005c8)  argument
6273 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x)                       \  argument
6274 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_1_RMSK)
6275 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask)                \  argument
6276 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask) 
6277 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val)                 \  argument
6278 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), val)
6279 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val)          \  argument
6282 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_1_…
6291 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x)                     (x+0x000005cc)  argument
6292 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x)                     (x+0x000005cc)  argument
6295 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x)                       \  argument
6296 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_2_RMSK)
6297 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask)                \  argument
6298 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask) 
6299 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val)                 \  argument
6300 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), val)
6301 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val)          \  argument
6304 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_2_…
6313 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x)                     (x+0x000005d0)  argument
6314 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x)                     (x+0x000005d0)  argument
6317 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x)                       \  argument
6318 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_3_RMSK)
6319 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask)                \  argument
6320 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask) 
6321 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val)                 \  argument
6322 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), val)
6323 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val)          \  argument
6326 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_3_…
6335 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x)                            (x+0x000005d4)  argument
6336 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x)                            (x+0x000005d4)  argument
6339 #define HWIO_REO_R0_AGING_CONTROL_IN(x)                              \  argument
6340 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), HWIO_REO_R0_AGING_CONTROL_RMSK)
6341 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask)                       \  argument
6342 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask) 
6343 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val)                        \  argument
6344 	out_dword( HWIO_REO_R0_AGING_CONTROL_ADDR(x), val)
6345 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val)                 \  argument
6348 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
6357 #define HWIO_REO_R0_MISC_CTL_ADDR(x)                                 (x+0x000005d8)  argument
6358 #define HWIO_REO_R0_MISC_CTL_PHYS(x)                                 (x+0x000005d8)  argument
6361 #define HWIO_REO_R0_MISC_CTL_IN(x)                                   \  argument
6362 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), HWIO_REO_R0_MISC_CTL_RMSK)
6363 #define HWIO_REO_R0_MISC_CTL_INM(x, mask)                            \  argument
6364 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), mask) 
6365 #define HWIO_REO_R0_MISC_CTL_OUT(x, val)                             \  argument
6366 	out_dword( HWIO_REO_R0_MISC_CTL_ADDR(x), val)
6367 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val)                      \  argument
6370 		out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
6388 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x)                    (x+0x000005dc)  argument
6389 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x)                    (x+0x000005dc)  argument
6392 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x)                      \  argument
6393 …in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_RMS…
6394 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask)               \  argument
6395 	in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask) 
6396 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val)                \  argument
6397 	out_dword( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), val)
6398 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val)         \  argument
6401 …_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_THRESHOLD…
6410 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x)                     (x+0x000005e0)  argument
6411 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x)                     (x+0x000005e0)  argument
6414 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x)                       \  argument
6415 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_0_RMSK)
6416 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask)                \  argument
6417 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask) 
6418 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val)                 \  argument
6419 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), val)
6420 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val)          \  argument
6423 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_0_…
6432 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x)                     (x+0x000005e4)  argument
6433 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x)                     (x+0x000005e4)  argument
6436 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x)                       \  argument
6437 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_1_RMSK)
6438 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask)                \  argument
6439 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask) 
6440 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val)                 \  argument
6441 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), val)
6442 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val)          \  argument
6445 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_1_…
6454 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x)                     (x+0x000005e8)  argument
6455 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x)                     (x+0x000005e8)  argument
6458 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x)                       \  argument
6459 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_2_RMSK)
6460 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask)                \  argument
6461 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask) 
6462 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val)                 \  argument
6463 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), val)
6464 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val)          \  argument
6467 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_2_…
6476 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x)                     (x+0x000005ec)  argument
6477 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x)                     (x+0x000005ec)  argument
6480 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x)                       \  argument
6481 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_3_RMSK)
6482 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask)                \  argument
6483 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask) 
6484 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val)                 \  argument
6485 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), val)
6486 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val)          \  argument
6489 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_3_…
6498 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x)       (x+0x000005f0)  argument
6499 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x)       (x+0x000005f0)  argument
6502 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x)         \  argument
6503 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
6504 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask)  \  argument
6505 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask) 
6506 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val)   \  argument
6507 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), val)
6508 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \  argument
6511 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
6520 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x)       (x+0x000005f4)  argument
6521 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x)       (x+0x000005f4)  argument
6524 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x)         \  argument
6525 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
6526 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask)  \  argument
6527 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask) 
6528 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val)   \  argument
6529 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), val)
6530 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \  argument
6533 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
6542 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x)       (x+0x000005f8)  argument
6543 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x)       (x+0x000005f8)  argument
6546 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x)         \  argument
6547 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
6548 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask)  \  argument
6549 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask) 
6550 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val)   \  argument
6551 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), val)
6552 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \  argument
6555 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
6564 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x)      (x+0x000005fc)  argument
6565 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x)      (x+0x000005fc)  argument
6568 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x)        \  argument
6569 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), HWIO_REO_R0_GLOBAL_LINK…
6570 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \  argument
6571 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask) 
6572 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val)  \  argument
6573 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), val)
6574 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \  argument
6577 …0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
6586 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x)              (x+0x00000600)  argument
6587 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x)              (x+0x00000600)  argument
6590 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x)                \  argument
6591 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
6592 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask)         \  argument
6593 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask) 
6594 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val)          \  argument
6595 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), val)
6596 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val)   \  argument
6599 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
6608 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x)              (x+0x00000604)  argument
6609 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x)              (x+0x00000604)  argument
6612 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x)                \  argument
6613 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
6614 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask)         \  argument
6615 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask) 
6616 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val)          \  argument
6617 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), val)
6618 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val)   \  argument
6621 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
6630 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x)              (x+0x00000608)  argument
6631 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x)              (x+0x00000608)  argument
6634 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x)                \  argument
6635 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
6636 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask)         \  argument
6637 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask) 
6638 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val)          \  argument
6639 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), val)
6640 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val)   \  argument
6643 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
6652 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x)              (x+0x0000060c)  argument
6653 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x)              (x+0x0000060c)  argument
6656 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x)                \  argument
6657 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
6658 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask)         \  argument
6659 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask) 
6660 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val)          \  argument
6661 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), val)
6662 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val)   \  argument
6665 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_C…
6674 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x)            (x+0x00000610)  argument
6675 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x)            (x+0x00000610)  argument
6678 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x)              \  argument
6679 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6680 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask)       \  argument
6681 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask) 
6682 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val)        \  argument
6683 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), val)
6684 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \  argument
6687 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
6696 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x)            (x+0x00000614)  argument
6697 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x)            (x+0x00000614)  argument
6700 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x)              \  argument
6701 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6702 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask)       \  argument
6703 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask) 
6704 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val)        \  argument
6705 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), val)
6706 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \  argument
6709 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
6718 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x)            (x+0x00000618)  argument
6719 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x)            (x+0x00000618)  argument
6722 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x)              \  argument
6723 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6724 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask)       \  argument
6725 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask) 
6726 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val)        \  argument
6727 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), val)
6728 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \  argument
6731 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
6740 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x)            (x+0x0000061c)  argument
6741 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x)            (x+0x0000061c)  argument
6744 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x)              \  argument
6745 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6746 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask)       \  argument
6747 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask) 
6748 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val)        \  argument
6749 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), val)
6750 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \  argument
6753 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
6762 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x)            (x+0x00000620)  argument
6763 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x)            (x+0x00000620)  argument
6766 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x)              \  argument
6767 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6768 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask)       \  argument
6769 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask) 
6770 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val)        \  argument
6771 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), val)
6772 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \  argument
6775 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
6784 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x)            (x+0x00000624)  argument
6785 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x)            (x+0x00000624)  argument
6788 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x)              \  argument
6789 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6790 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask)       \  argument
6791 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask) 
6792 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val)        \  argument
6793 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), val)
6794 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \  argument
6797 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
6806 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x)            (x+0x00000628)  argument
6807 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x)            (x+0x00000628)  argument
6810 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x)              \  argument
6811 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6812 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask)       \  argument
6813 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask) 
6814 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val)        \  argument
6815 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), val)
6816 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \  argument
6819 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
6828 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x)            (x+0x0000062c)  argument
6829 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x)            (x+0x0000062c)  argument
6832 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x)              \  argument
6833 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
6834 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask)       \  argument
6835 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask) 
6836 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val)        \  argument
6837 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), val)
6838 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \  argument
6841 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
6850 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x)                    (x+0x00000630)  argument
6851 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x)                    (x+0x00000630)  argument
6854 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x)                      \  argument
6855 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_RMS…
6856 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask)               \  argument
6857 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask) 
6858 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val)                \  argument
6859 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), val)
6860 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val)         \  argument
6863 …_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO…
6875 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x)                        (x+0x00000654)  argument
6876 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x)                        (x+0x00000654)  argument
6879 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x)                          \  argument
6880 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_REO_R0_GXI_TESTBUS_LOWER_RMSK)
6881 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask)                   \  argument
6882 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 
6883 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val)                    \  argument
6884 	out_dword( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), val)
6885 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val)             \  argument
6888 …_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWER_I…
6897 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x)                        (x+0x00000658)  argument
6898 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x)                        (x+0x00000658)  argument
6901 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x)                          \  argument
6902 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_REO_R0_GXI_TESTBUS_UPPER_RMSK)
6903 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask)                   \  argument
6904 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 
6905 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val)                    \  argument
6906 	out_dword( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), val)
6907 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val)             \  argument
6910 …_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPER_I…
6919 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x)                       (x+0x0000065c)  argument
6920 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x)                       (x+0x0000065c)  argument
6923 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x)                         \  argument
6924 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_REO_R0_GXI_SM_STATES_IX_0_RMSK)
6925 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask)                  \  argument
6926 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 
6927 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val)                   \  argument
6928 	out_dword( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), val)
6929 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val)            \  argument
6932 …word_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_IX_0_I…
6947 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x)                    (x+0x00000660)  argument
6948 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x)                    (x+0x00000660)  argument
6951 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x)                      \  argument
6952 …in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R0_GXI_END_OF_TEST_CHECK_RMS…
6953 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask)               \  argument
6954 	in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 
6955 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val)                \  argument
6956 	out_dword( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val)
6957 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val)         \  argument
6960 …_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_TEST_CHECK…
6969 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x)                   (x+0x00000664)  argument
6970 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x)                   (x+0x00000664)  argument
6973 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x)                     \  argument
6974 …in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_R…
6975 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask)              \  argument
6976 	in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 
6977 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val)               \  argument
6978 	out_dword( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val)
6979 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val)        \  argument
6982 …asked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE…
7027 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x)                         (x+0x00000668)  argument
7028 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x)                         (x+0x00000668)  argument
7031 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x)                           \  argument
7032 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_REO_R0_GXI_GXI_ERR_INTS_RMSK)
7033 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask)                    \  argument
7034 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 
7035 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val)                     \  argument
7036 	out_dword( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), val)
7037 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val)              \  argument
7040 …t_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_IN…
7058 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x)                        (x+0x0000066c)  argument
7059 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x)                        (x+0x0000066c)  argument
7062 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x)                          \  argument
7063 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_REO_R0_GXI_GXI_ERR_STATS_RMSK)
7064 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask)                   \  argument
7065 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 
7066 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val)                    \  argument
7067 	out_dword( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), val)
7068 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val)             \  argument
7071 …_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STATS_I…
7086 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x)                  (x+0x00000670)  argument
7087 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x)                  (x+0x00000670)  argument
7090 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)                    \  argument
7091 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL…
7092 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask)             \  argument
7093 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 
7094 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val)              \  argument
7095 	out_dword( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val)
7096 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val)       \  argument
7099 …sked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DEFAULT_CONTRO…
7117 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x)                  (x+0x00000674)  argument
7118 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x)                  (x+0x00000674)  argument
7121 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x)                    \  argument
7122 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL…
7123 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask)             \  argument
7124 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 
7125 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val)              \  argument
7126 	out_dword( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val)
7127 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val)       \  argument
7130 …sked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_REDUCED_CONTRO…
7148 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x)                     (x+0x00000678)  argument
7149 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x)                     (x+0x00000678)  argument
7152 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x)                       \  argument
7153 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_MISC_CONTROL_RMSK)
7154 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask)                \  argument
7155 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 
7156 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val)                 \  argument
7157 	out_dword( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val)
7158 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val)          \  argument
7161 …d_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_CONTROL_…
7197 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x)                     (x+0x0000067c)  argument
7198 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x)                     (x+0x0000067c)  argument
7201 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x)                       \  argument
7202 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_RMSK)
7203 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask)                \  argument
7204 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 
7205 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val)                 \  argument
7206 	out_dword( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val)
7207 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val)          \  argument
7210 …d_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_…
7222 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x)                      (x+0x00000680)  argument
7223 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x)                      (x+0x00000680)  argument
7226 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x)                        \  argument
7227 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_REO_R0_GXI_GXI_WDOG_STATUS_RMSK)
7228 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask)                 \  argument
7229 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 
7230 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val)                  \  argument
7231 	out_dword( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val)
7232 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val)           \  argument
7235 …ord_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_STATUS_…
7244 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x)                    (x+0x00000684)  argument
7245 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x)                    (x+0x00000684)  argument
7248 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x)                      \  argument
7249 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_RMS…
7250 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask)               \  argument
7251 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 
7252 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val)                \  argument
7253 	out_dword( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val)
7254 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val)         \  argument
7257 …_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS…
7269 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x)                  (x+0x00000688)  argument
7270 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x)                  (x+0x00000688)  argument
7273 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)                    \  argument
7274 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL…
7275 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask)             \  argument
7276 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 
7277 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val)              \  argument
7278 	out_dword( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val)
7279 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
7282 …sked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTR…
7297 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x)                  (x+0x0000068c)  argument
7298 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x)                  (x+0x0000068c)  argument
7301 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)                    \  argument
7302 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL…
7303 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask)             \  argument
7304 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 
7305 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val)              \  argument
7306 	out_dword( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val)
7307 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
7310 …sked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTR…
7325 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x)        (x+0x00000690)  argument
7326 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x)        (x+0x00000690)  argument
7329 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)          \  argument
7330 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_ER…
7331 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
7332 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
7333 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val)    \  argument
7334 	out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
7335 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
7338 …O_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABL…
7347 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x)        (x+0x00000694)  argument
7348 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x)        (x+0x00000694)  argument
7351 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)          \  argument
7352 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_ER…
7353 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
7354 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
7355 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val)    \  argument
7356 	out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
7357 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
7360 …O_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABL…
7369 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x)        (x+0x00000698)  argument
7370 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x)        (x+0x00000698)  argument
7373 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)          \  argument
7374 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_ER…
7375 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
7376 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
7377 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val)    \  argument
7378 	out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
7379 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
7382 …O_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABL…
7391 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x)        (x+0x0000069c)  argument
7392 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x)        (x+0x0000069c)  argument
7395 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)          \  argument
7396 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_ER…
7397 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
7398 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
7399 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val)    \  argument
7400 	out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
7401 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
7404 …O_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABL…
7413 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x)               (x+0x000006a0)  argument
7414 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x)               (x+0x000006a0)  argument
7417 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x)                 \  argument
7418 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), HWIO_REO_R0_GXI_GXI_AXI_OUTSANDI…
7419 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask)          \  argument
7420 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 
7421 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val)           \  argument
7422 	out_dword( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val)
7423 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val)    \  argument
7426 …ns(HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_C…
7444 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x)                         (x+0x000006a4)  argument
7445 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x)                         (x+0x000006a4)  argument
7448 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x)                           \  argument
7449 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONFIG_RMSK)
7450 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask)                    \  argument
7451 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask) 
7452 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val)                     \  argument
7453 	out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), val)
7454 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val)              \  argument
7457 …t_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_IN…
7493 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x)                        (x+0x000006a8)  argument
7494 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x)                        (x+0x000006a8)  argument
7497 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x)                          \  argument
7498 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONTROL_RMSK)
7499 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask)                   \  argument
7500 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask) 
7501 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val)                    \  argument
7502 	out_dword( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), val)
7503 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val)             \  argument
7506 …_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTROL_I…
7518 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x)                     (x+0x000006ac)  argument
7519 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_PHYS(x)                     (x+0x000006ac)  argument
7522 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_IN(x)                       \  argument
7523 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONFIG_SET_RMSK)
7524 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask)                \  argument
7525 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask) 
7526 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val)                 \  argument
7527 	out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), val)
7528 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val)          \  argument
7531 …d_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_SET_…
7540 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x)                       (x+0x000006b0)  argument
7541 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_PHYS(x)                       (x+0x000006b0)  argument
7544 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_IN(x)                         \  argument
7545 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), HWIO_REO_R0_CACHE_CTL_SET_SIZE_RMSK)
7546 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask)                  \  argument
7547 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask) 
7548 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val)                   \  argument
7549 	out_dword( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), val)
7550 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val)            \  argument
7553 …word_masked_ns(HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_SET_SIZE_I…
7562 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x)                            (x+0x000006b4)  argument
7563 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x)                            (x+0x000006b4)  argument
7566 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x)                              \  argument
7567 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), HWIO_REO_R0_CLK_GATE_CTRL_RMSK)
7568 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask)                       \  argument
7569 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask) 
7570 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val)                        \  argument
7571 	out_dword( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), val)
7572 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val)                 \  argument
7575 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
7611 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x)                           (x+0x000006b8)  argument
7612 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x)                           (x+0x000006b8)  argument
7615 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x)                             \  argument
7616 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_0_RMSK)
7617 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask)                      \  argument
7618 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask) 
7619 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val)                       \  argument
7620 	out_dword( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), val)
7621 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val)                \  argument
7624 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
7633 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x)                           (x+0x000006bc)  argument
7634 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x)                           (x+0x000006bc)  argument
7637 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x)                             \  argument
7638 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_1_RMSK)
7639 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask)                      \  argument
7640 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask) 
7641 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val)                       \  argument
7642 	out_dword( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), val)
7643 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val)                \  argument
7646 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
7655 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x)                           (x+0x000006c0)  argument
7656 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x)                           (x+0x000006c0)  argument
7659 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x)                             \  argument
7660 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_2_RMSK)
7661 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask)                      \  argument
7662 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask) 
7663 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val)                       \  argument
7664 	out_dword( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), val)
7665 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val)                \  argument
7668 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
7677 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x)                           (x+0x000006c4)  argument
7678 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x)                           (x+0x000006c4)  argument
7681 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x)                             \  argument
7682 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_3_RMSK)
7683 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask)                      \  argument
7684 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask) 
7685 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val)                       \  argument
7686 	out_dword( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), val)
7687 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val)                \  argument
7690 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
7699 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x)                          (x+0x00002000)  argument
7700 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x)                          (x+0x00002000)  argument
7703 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x)                            \  argument
7704 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), HWIO_REO_R1_MISC_DEBUG_CTRL_RMSK)
7705 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask)                     \  argument
7706 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask) 
7707 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val)                      \  argument
7708 	out_dword( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), val)
7709 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val)               \  argument
7712 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
7733 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x)                     (x+0x00002004)  argument
7734 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x)                     (x+0x00002004)  argument
7737 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x)                       \  argument
7738 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_RMSK)
7739 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask)                \  argument
7740 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask) 
7741 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val)                 \  argument
7742 	out_dword( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), val)
7743 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val)          \  argument
7746 …d_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_…
7758 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x)                  (x+0x00002008)  argument
7759 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x)                  (x+0x00002008)  argument
7762 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x)                    \  argument
7763 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL…
7764 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask)             \  argument
7765 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask) 
7766 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val)              \  argument
7767 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), val)
7768 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val)       \  argument
7771 …sked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_CONTRO…
7789 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x)                (x+0x0000200c)  argument
7790 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x)                (x+0x0000200c)  argument
7793 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x)                  \  argument
7794 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_C…
7795 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask)           \  argument
7796 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask) 
7797 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val)            \  argument
7798 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), val)
7799 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val)     \  argument
7802 …d_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COU…
7811 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x)               (x+0x00002010)  argument
7812 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x)               (x+0x00002010)  argument
7815 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x)                 \  argument
7816 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_MISS…
7817 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask)          \  argument
7818 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask) 
7819 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val)           \  argument
7820 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), val)
7821 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val)    \  argument
7824 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COU…
7833 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x)            (x+0x00002014)  argument
7834 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x)            (x+0x00002014)  argument
7837 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x)              \  argument
7838 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_T…
7839 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask)       \  argument
7840 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask) 
7841 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val)        \  argument
7842 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), val)
7843 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \  argument
7846 …WIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE…
7855 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x)           (x+0x00002018)  argument
7856 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x)           (x+0x00002018)  argument
7859 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x)             \  argument
7860 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_…
7861 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask)      \  argument
7862 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask) 
7863 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val)       \  argument
7864 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), val)
7865 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \  argument
7868 …O_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_…
7877 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x)                      (x+0x0000201c)  argument
7878 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x)                      (x+0x0000201c)  argument
7881 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x)                        \  argument
7882 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_STM_RMSK)
7883 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask)                 \  argument
7884 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask) 
7885 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val)                  \  argument
7886 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), val)
7887 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val)           \  argument
7890 …ord_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_STM_…
7899 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x)                (x+0x00002020)  argument
7900 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x)                (x+0x00002020)  argument
7903 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x)                  \  argument
7904 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_…
7905 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask)           \  argument
7906 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask) 
7907 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val)            \  argument
7908 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), val)
7909 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val)     \  argument
7912 …d_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LI…
7924 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x)               (x+0x00002024)  argument
7925 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_PHYS(x)               (x+0x00002024)  argument
7928 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_IN(x)                 \  argument
7929 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
7930 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask)          \  argument
7931 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask) 
7932 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val)           \  argument
7933 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), val)
7934 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val)    \  argument
7937 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
7949 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x)               (x+0x00002028)  argument
7950 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_PHYS(x)               (x+0x00002028)  argument
7953 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_IN(x)                 \  argument
7954 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
7955 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask)          \  argument
7956 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask) 
7957 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val)           \  argument
7958 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), val)
7959 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val)    \  argument
7962 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
7974 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x)               (x+0x0000202c)  argument
7975 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_PHYS(x)               (x+0x0000202c)  argument
7978 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_IN(x)                 \  argument
7979 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
7980 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask)          \  argument
7981 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask) 
7982 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val)           \  argument
7983 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), val)
7984 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val)    \  argument
7987 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
7999 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x)          (x+0x00002030)  argument
8000 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_PHYS(x)          (x+0x00002030)  argument
8003 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_IN(x)            \  argument
8004 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG…
8005 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask)     \  argument
8006 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask) 
8007 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val)      \  argument
8008 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), val)
8009 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \  argument
8012 …_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INF…
8021 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x)         (x+0x00002034)  argument
8022 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_PHYS(x)         (x+0x00002034)  argument
8025 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_IN(x)           \  argument
8026 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBU…
8027 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask)    \  argument
8028 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask) 
8029 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val)     \  argument
8030 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), val)
8031 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \  argument
8034 …EO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO…
8043 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x)       (x+0x00002038)  argument
8044 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_PHYS(x)       (x+0x00002038)  argument
8047 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_IN(x)         \  argument
8048 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), HWIO_REO_R1_CACHE_CTL_DE…
8049 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask)  \  argument
8050 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask) 
8051 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val)   \  argument
8052 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), val)
8053 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \  argument
8056 …R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_C…
8068 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x)              (x+0x0000203c)  argument
8069 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x)              (x+0x0000203c)  argument
8072 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x)                \  argument
8073 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R1_CACHE_CTL_END_OF_TE…
8074 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask)         \  argument
8075 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask) 
8076 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val)          \  argument
8077 	out_dword( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), val)
8078 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val)   \  argument
8081 …s(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CH…
8090 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x)            (x+0x00002040)  argument
8091 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_PHYS(x)            (x+0x00002040)  argument
8094 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_IN(x)              \  argument
8095 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_F…
8096 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_INM(x, mask)       \  argument
8097 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask) 
8098 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUT(x, val)        \  argument
8099 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), val)
8100 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \  argument
8103 …WIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CON…
8121 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x)            (x+0x00002044)  argument
8122 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_PHYS(x)            (x+0x00002044)  argument
8125 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_IN(x)              \  argument
8126 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_F…
8127 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_INM(x, mask)       \  argument
8128 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask) 
8129 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUT(x, val)        \  argument
8130 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), val)
8131 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \  argument
8134 …WIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CON…
8143 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x)            (x+0x00002048)  argument
8144 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_PHYS(x)            (x+0x00002048)  argument
8147 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_IN(x)              \  argument
8148 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_F…
8149 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_INM(x, mask)       \  argument
8150 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask) 
8151 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUT(x, val)        \  argument
8152 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), val)
8153 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \  argument
8156 …WIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CON…
8165 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x)             (x+0x0000204c)  argument
8166 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_PHYS(x)             (x+0x0000204c)  argument
8169 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_IN(x)               \  argument
8170 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_FL…
8171 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_INM(x, mask)        \  argument
8172 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask) 
8173 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUT(x, val)         \  argument
8174 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), val)
8175 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val)  \  argument
8178 …HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STA…
8208 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x)                        (x+0x00002050)  argument
8209 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x)                        (x+0x00002050)  argument
8212 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x)                          \  argument
8213 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R1_END_OF_TEST_CHECK_RMSK)
8214 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask)                   \  argument
8215 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask) 
8216 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val)                    \  argument
8217 	out_dword( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), val)
8218 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val)             \  argument
8221 …_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHECK_I…
8230 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x)                              (x+0x00002054)  argument
8231 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x)                              (x+0x00002054)  argument
8234 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x)                                \  argument
8235 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), HWIO_REO_R1_SM_ALL_IDLE_RMSK)
8236 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask)                         \  argument
8237 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask) 
8238 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val)                          \  argument
8239 	out_dword( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), val)
8240 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val)                   \  argument
8243 		out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
8258 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x)                             (x+0x00002058)  argument
8259 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x)                             (x+0x00002058)  argument
8262 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x)                               \  argument
8263 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), HWIO_REO_R1_TESTBUS_CTRL_RMSK)
8264 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask)                        \  argument
8265 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask) 
8266 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val)                         \  argument
8267 	out_dword( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), val)
8268 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val)                  \  argument
8271 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
8280 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x)                            (x+0x0000205c)  argument
8281 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x)                            (x+0x0000205c)  argument
8284 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x)                              \  argument
8285 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), HWIO_REO_R1_TESTBUS_LOWER_RMSK)
8286 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask)                       \  argument
8287 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask) 
8288 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val)                        \  argument
8289 	out_dword( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), val)
8290 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val)                 \  argument
8293 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
8302 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x)                           (x+0x00002060)  argument
8303 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x)                           (x+0x00002060)  argument
8306 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x)                             \  argument
8307 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), HWIO_REO_R1_TESTBUS_HIGHER_RMSK)
8308 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask)                      \  argument
8309 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask) 
8310 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val)                       \  argument
8311 	out_dword( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), val)
8312 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val)                \  argument
8315 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
8324 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x)                           (x+0x00002064)  argument
8325 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x)                           (x+0x00002064)  argument
8328 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x)                             \  argument
8329 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), HWIO_REO_R1_SM_STATES_IX_0_RMSK)
8330 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask)                      \  argument
8331 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask) 
8332 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val)                       \  argument
8333 	out_dword( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), val)
8334 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val)                \  argument
8337 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
8346 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x)                           (x+0x00002068)  argument
8347 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x)                           (x+0x00002068)  argument
8350 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x)                             \  argument
8351 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), HWIO_REO_R1_SM_STATES_IX_1_RMSK)
8352 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask)                      \  argument
8353 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask) 
8354 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val)                       \  argument
8355 	out_dword( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), val)
8356 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val)                \  argument
8359 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
8368 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x)                           (x+0x0000206c)  argument
8369 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x)                           (x+0x0000206c)  argument
8372 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x)                             \  argument
8373 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), HWIO_REO_R1_SM_STATES_IX_2_RMSK)
8374 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask)                      \  argument
8375 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask) 
8376 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val)                       \  argument
8377 	out_dword( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), val)
8378 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val)                \  argument
8381 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
8390 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x)                           (x+0x00002070)  argument
8391 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x)                           (x+0x00002070)  argument
8394 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x)                             \  argument
8395 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), HWIO_REO_R1_SM_STATES_IX_3_RMSK)
8396 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask)                      \  argument
8397 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask) 
8398 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val)                       \  argument
8399 	out_dword( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), val)
8400 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val)                \  argument
8403 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
8412 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x)                           (x+0x00002074)  argument
8413 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x)                           (x+0x00002074)  argument
8416 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x)                             \  argument
8417 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), HWIO_REO_R1_SM_STATES_IX_4_RMSK)
8418 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask)                      \  argument
8419 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask) 
8420 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val)                       \  argument
8421 	out_dword( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), val)
8422 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val)                \  argument
8425 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
8434 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x)                           (x+0x00002078)  argument
8435 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x)                           (x+0x00002078)  argument
8438 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x)                             \  argument
8439 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), HWIO_REO_R1_SM_STATES_IX_5_RMSK)
8440 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask)                      \  argument
8441 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask) 
8442 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val)                       \  argument
8443 	out_dword( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), val)
8444 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val)                \  argument
8447 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
8456 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x)                           (x+0x0000207c)  argument
8457 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x)                           (x+0x0000207c)  argument
8460 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x)                             \  argument
8461 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), HWIO_REO_R1_SM_STATES_IX_6_RMSK)
8462 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask)                      \  argument
8463 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask) 
8464 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val)                       \  argument
8465 	out_dword( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), val)
8466 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val)                \  argument
8469 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
8478 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x)                         (x+0x00002080)  argument
8479 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x)                         (x+0x00002080)  argument
8482 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x)                           \  argument
8483 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), HWIO_REO_R1_IDLE_STATES_IX_0_RMSK)
8484 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask)                    \  argument
8485 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask) 
8486 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val)                     \  argument
8487 	out_dword( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), val)
8488 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val)              \  argument
8491 …t_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_IN…
8500 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x)                       (x+0x00002084)  argument
8501 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x)                       (x+0x00002084)  argument
8504 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x)                         \  argument
8505 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), HWIO_REO_R1_INVALID_APB_ACCESS_RMSK)
8506 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask)                  \  argument
8507 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask) 
8508 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val)                   \  argument
8509 	out_dword( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), val)
8510 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val)            \  argument
8513 …word_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACCESS_I…
8525 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x)                       (x+0x00003000)  argument
8526 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x)                       (x+0x00003000)  argument
8529 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x)                         \  argument
8530 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), HWIO_REO_R2_RXDMA2REO0_RING_HP_RMSK)
8531 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask)                  \  argument
8532 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask) 
8533 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val)                   \  argument
8534 	out_dword( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), val)
8535 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val)            \  argument
8538 …word_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING_HP_I…
8547 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x)                       (x+0x00003004)  argument
8548 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x)                       (x+0x00003004)  argument
8551 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x)                         \  argument
8552 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), HWIO_REO_R2_RXDMA2REO0_RING_TP_RMSK)
8553 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask)                  \  argument
8554 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask) 
8555 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val)                   \  argument
8556 	out_dword( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), val)
8557 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val)            \  argument
8560 …word_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING_TP_I…
8569 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x)                     (x+0x00003008)  argument
8570 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x)                     (x+0x00003008)  argument
8573 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x)                       \  argument
8574 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), HWIO_REO_R2_WBM2REO_LINK_RING_HP_RMSK)
8575 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask)                \  argument
8576 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask) 
8577 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val)                 \  argument
8578 	out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), val)
8579 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val)          \  argument
8582 …d_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_RING_HP_…
8591 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x)                     (x+0x0000300c)  argument
8592 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x)                     (x+0x0000300c)  argument
8595 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x)                       \  argument
8596 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), HWIO_REO_R2_WBM2REO_LINK_RING_TP_RMSK)
8597 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask)                \  argument
8598 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask) 
8599 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val)                 \  argument
8600 	out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), val)
8601 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val)          \  argument
8604 …d_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_RING_TP_…
8613 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x)                          (x+0x00003010)  argument
8614 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x)                          (x+0x00003010)  argument
8617 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x)                            \  argument
8618 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), HWIO_REO_R2_REO_CMD_RING_HP_RMSK)
8619 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask)                     \  argument
8620 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask) 
8621 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val)                      \  argument
8622 	out_dword( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), val)
8623 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val)               \  argument
8626 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
8635 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x)                          (x+0x00003014)  argument
8636 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x)                          (x+0x00003014)  argument
8639 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x)                            \  argument
8640 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), HWIO_REO_R2_REO_CMD_RING_TP_RMSK)
8641 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask)                     \  argument
8642 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask) 
8643 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val)                      \  argument
8644 	out_dword( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), val)
8645 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val)               \  argument
8648 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
8657 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x)                           (x+0x00003018)  argument
8658 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x)                           (x+0x00003018)  argument
8661 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x)                             \  argument
8662 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), HWIO_REO_R2_SW2REO_RING_HP_RMSK)
8663 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask)                      \  argument
8664 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask) 
8665 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val)                       \  argument
8666 	out_dword( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), val)
8667 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val)                \  argument
8670 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
8679 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x)                           (x+0x0000301c)  argument
8680 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x)                           (x+0x0000301c)  argument
8683 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x)                             \  argument
8684 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), HWIO_REO_R2_SW2REO_RING_TP_RMSK)
8685 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask)                      \  argument
8686 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask) 
8687 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val)                       \  argument
8688 	out_dword( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), val)
8689 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val)                \  argument
8692 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
8701 #define HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x)                          (x+0x00003020)  argument
8702 #define HWIO_REO_R2_SW2REO1_RING_HP_PHYS(x)                          (x+0x00003020)  argument
8705 #define HWIO_REO_R2_SW2REO1_RING_HP_IN(x)                            \  argument
8706 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), HWIO_REO_R2_SW2REO1_RING_HP_RMSK)
8707 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask)                     \  argument
8708 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask) 
8709 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val)                      \  argument
8710 	out_dword( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), val)
8711 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val)               \  argument
8714 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
8723 #define HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x)                          (x+0x00003024)  argument
8724 #define HWIO_REO_R2_SW2REO1_RING_TP_PHYS(x)                          (x+0x00003024)  argument
8727 #define HWIO_REO_R2_SW2REO1_RING_TP_IN(x)                            \  argument
8728 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), HWIO_REO_R2_SW2REO1_RING_TP_RMSK)
8729 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask)                     \  argument
8730 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask) 
8731 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val)                      \  argument
8732 	out_dword( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), val)
8733 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val)               \  argument
8736 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
8745 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x)                          (x+0x00003028)  argument
8746 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x)                          (x+0x00003028)  argument
8749 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x)                            \  argument
8750 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW1_RING_HP_RMSK)
8751 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask)                     \  argument
8752 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask) 
8753 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val)                      \  argument
8754 	out_dword( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), val)
8755 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val)               \  argument
8758 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
8767 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x)                          (x+0x0000302c)  argument
8768 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x)                          (x+0x0000302c)  argument
8771 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x)                            \  argument
8772 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW1_RING_TP_RMSK)
8773 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask)                     \  argument
8774 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask) 
8775 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val)                      \  argument
8776 	out_dword( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), val)
8777 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val)               \  argument
8780 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
8789 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x)                          (x+0x00003030)  argument
8790 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x)                          (x+0x00003030)  argument
8793 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x)                            \  argument
8794 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW2_RING_HP_RMSK)
8795 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask)                     \  argument
8796 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask) 
8797 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val)                      \  argument
8798 	out_dword( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), val)
8799 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val)               \  argument
8802 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
8811 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x)                          (x+0x00003034)  argument
8812 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x)                          (x+0x00003034)  argument
8815 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x)                            \  argument
8816 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW2_RING_TP_RMSK)
8817 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask)                     \  argument
8818 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask) 
8819 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val)                      \  argument
8820 	out_dword( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), val)
8821 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val)               \  argument
8824 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
8833 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x)                          (x+0x00003038)  argument
8834 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x)                          (x+0x00003038)  argument
8837 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x)                            \  argument
8838 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW3_RING_HP_RMSK)
8839 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask)                     \  argument
8840 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask) 
8841 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val)                      \  argument
8842 	out_dword( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), val)
8843 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val)               \  argument
8846 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
8855 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x)                          (x+0x0000303c)  argument
8856 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x)                          (x+0x0000303c)  argument
8859 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x)                            \  argument
8860 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW3_RING_TP_RMSK)
8861 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask)                     \  argument
8862 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask) 
8863 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val)                      \  argument
8864 	out_dword( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), val)
8865 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val)               \  argument
8868 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
8877 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x)                          (x+0x00003040)  argument
8878 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x)                          (x+0x00003040)  argument
8881 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x)                            \  argument
8882 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW4_RING_HP_RMSK)
8883 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask)                     \  argument
8884 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask) 
8885 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val)                      \  argument
8886 	out_dword( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), val)
8887 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val)               \  argument
8890 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
8899 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x)                          (x+0x00003044)  argument
8900 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x)                          (x+0x00003044)  argument
8903 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x)                            \  argument
8904 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW4_RING_TP_RMSK)
8905 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask)                     \  argument
8906 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask) 
8907 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val)                      \  argument
8908 	out_dword( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), val)
8909 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val)               \  argument
8912 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
8921 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x)                          (x+0x00003058)  argument
8922 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x)                          (x+0x00003058)  argument
8925 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x)                            \  argument
8926 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), HWIO_REO_R2_REO2TCL_RING_HP_RMSK)
8927 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask)                     \  argument
8928 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask) 
8929 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val)                      \  argument
8930 	out_dword( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), val)
8931 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val)               \  argument
8934 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
8943 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x)                          (x+0x0000305c)  argument
8944 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x)                          (x+0x0000305c)  argument
8947 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x)                            \  argument
8948 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), HWIO_REO_R2_REO2TCL_RING_TP_RMSK)
8949 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask)                     \  argument
8950 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask) 
8951 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val)                      \  argument
8952 	out_dword( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), val)
8953 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val)               \  argument
8956 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
8965 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x)                           (x+0x00003060)  argument
8966 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x)                           (x+0x00003060)  argument
8969 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x)                             \  argument
8970 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), HWIO_REO_R2_REO2FW_RING_HP_RMSK)
8971 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask)                      \  argument
8972 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask) 
8973 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val)                       \  argument
8974 	out_dword( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), val)
8975 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val)                \  argument
8978 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
8987 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x)                           (x+0x00003064)  argument
8988 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x)                           (x+0x00003064)  argument
8991 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x)                             \  argument
8992 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), HWIO_REO_R2_REO2FW_RING_TP_RMSK)
8993 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask)                      \  argument
8994 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask) 
8995 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val)                       \  argument
8996 	out_dword( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), val)
8997 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val)                \  argument
9000 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
9009 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x)                      (x+0x00003068)  argument
9010 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x)                      (x+0x00003068)  argument
9013 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x)                        \  argument
9014 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), HWIO_REO_R2_REO_RELEASE_RING_HP_RMSK)
9015 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask)                 \  argument
9016 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask) 
9017 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val)                  \  argument
9018 	out_dword( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), val)
9019 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val)           \  argument
9022 …ord_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RING_HP_…
9031 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x)                      (x+0x0000306c)  argument
9032 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x)                      (x+0x0000306c)  argument
9035 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x)                        \  argument
9036 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), HWIO_REO_R2_REO_RELEASE_RING_TP_RMSK)
9037 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask)                 \  argument
9038 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask) 
9039 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val)                  \  argument
9040 	out_dword( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), val)
9041 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val)           \  argument
9044 …ord_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RING_TP_…
9053 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x)                       (x+0x00003070)  argument
9054 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x)                       (x+0x00003070)  argument
9057 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x)                         \  argument
9058 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), HWIO_REO_R2_REO_STATUS_RING_HP_RMSK)
9059 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask)                  \  argument
9060 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask) 
9061 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val)                   \  argument
9062 	out_dword( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), val)
9063 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val)            \  argument
9066 …word_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING_HP_I…
9075 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x)                       (x+0x00003074)  argument
9076 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x)                       (x+0x00003074)  argument
9079 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x)                         \  argument
9080 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), HWIO_REO_R2_REO_STATUS_RING_TP_RMSK)
9081 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask)                  \  argument
9082 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask) 
9083 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val)                   \  argument
9084 	out_dword( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), val)
9085 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val)            \  argument
9088 …word_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING_TP_I…