Lines Matching defs:x
44 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x) (x+0x00000000) argument
45 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x) (x+0x00000000) argument
48 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x) \ argument
50 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
52 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val) \ argument
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
135 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x) (x+0x00000004) argument
136 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x) (x+0x00000004) argument
139 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x) \ argument
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
143 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val) \ argument
145 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
178 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x) (x+0x00000008) argument
179 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x) (x+0x00000008) argument
182 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x) \ argument
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
186 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val) \ argument
188 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
221 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x) (x+0x0000000c) argument
222 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x) (x+0x0000000c) argument
225 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x) \ argument
227 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask) \ argument
229 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val) \ argument
231 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
264 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x) (x+0x00000010) argument
265 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x) (x+0x00000010) argument
268 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x) \ argument
270 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask) \ argument
272 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val) \ argument
274 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
307 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x) (x+0x00000014) argument
308 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x) (x+0x00000014) argument
311 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x) \ argument
313 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask) \ argument
315 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val) \ argument
317 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
350 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x) (x+0x00000018) argument
351 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x) (x+0x00000018) argument
354 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x) \ argument
356 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask) \ argument
358 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val) \ argument
360 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
393 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x) (x+0x0000001c) argument
394 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x) (x+0x0000001c) argument
397 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x) \ argument
399 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask) \ argument
401 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val) \ argument
403 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
436 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x) (x+0x00000020) argument
437 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x) (x+0x00000020) argument
440 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x) \ argument
442 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask) \ argument
444 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val) \ argument
446 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
479 #define HWIO_REO_R0_TIMESTAMP_ADDR(x) (x+0x00000024) argument
480 #define HWIO_REO_R0_TIMESTAMP_PHYS(x) (x+0x00000024) argument
483 #define HWIO_REO_R0_TIMESTAMP_IN(x) \ argument
485 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask) \ argument
487 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val) \ argument
489 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
501 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x) (x+0x00000028) argument
502 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x) (x+0x00000028) argument
505 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x) \ argument
507 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask) \ argument
509 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val) \ argument
511 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
544 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x) (x+0x0000002c) argument
545 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x) (x+0x0000002c) argument
548 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x) \ argument
550 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask) \ argument
552 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val) \ argument
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
587 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x) (x+0x00000030) argument
588 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x) (x+0x00000030) argument
591 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x) \ argument
593 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask) \ argument
595 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val) \ argument
597 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
612 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x) (x+0x00000034) argument
613 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x) (x+0x00000034) argument
616 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x) \ argument
618 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask) \ argument
620 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val) \ argument
622 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
634 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x) (x+0x00000038) argument
635 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x) (x+0x00000038) argument
638 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x) \ argument
640 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask) \ argument
642 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val) \ argument
644 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
659 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x) (x+0x0000003c) argument
660 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x) (x+0x0000003c) argument
663 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x) \ argument
665 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask) \ argument
667 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val) \ argument
669 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
681 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x) (x+0x00000040) argument
682 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x) (x+0x00000040) argument
685 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x) \ argument
687 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask) \ argument
689 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val) \ argument
691 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
706 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x) (x+0x00000044) argument
707 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x) (x+0x00000044) argument
710 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x) \ argument
712 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask) \ argument
714 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val) \ argument
716 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
758 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000050) argument
759 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000050) argument
762 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x) \ argument
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask) \ argument
766 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val) \ argument
768 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
780 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000054) argument
781 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000054) argument
784 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x) \ argument
786 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask) \ argument
788 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val) \ argument
790 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
802 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000064) argument
803 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000064) argument
806 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
810 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
812 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
830 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000068) argument
831 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000068) argument
834 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
838 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
840 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
852 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000006c) argument
853 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000006c) argument
856 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x) \ argument
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
860 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
862 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
880 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000070) argument
881 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000070) argument
884 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
888 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
890 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
902 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000074) argument
903 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000074) argument
906 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
910 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
912 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
924 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078) argument
925 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078) argument
928 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
930 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
932 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
934 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
949 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000007c) argument
950 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000007c) argument
953 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x) \ argument
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
957 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
959 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
971 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000080) argument
972 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000080) argument
975 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x) \ argument
977 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
979 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
981 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
996 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x) (x+0x00000084) argument
997 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x) (x+0x00000084) argument
1000 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x) \ argument
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask) \ argument
1004 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val) \ argument
1006 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1018 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000088) argument
1019 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000088) argument
1022 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1024 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1026 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1028 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1040 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x) (x+0x0000008c) argument
1041 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x) (x+0x0000008c) argument
1044 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x) \ argument
1046 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask) \ argument
1048 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val) \ argument
1050 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1062 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x) (x+0x00000090) argument
1063 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x) (x+0x00000090) argument
1066 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x) \ argument
1068 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask) \ argument
1070 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val) \ argument
1072 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1087 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x) (x+0x00000094) argument
1088 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x) (x+0x00000094) argument
1091 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x) \ argument
1093 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask) \ argument
1095 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val) \ argument
1097 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1109 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x) (x+0x00000098) argument
1110 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x) (x+0x00000098) argument
1113 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x) \ argument
1115 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask) \ argument
1117 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val) \ argument
1119 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1134 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x) (x+0x0000009c) argument
1135 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x) (x+0x0000009c) argument
1138 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x) \ argument
1140 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask) \ argument
1142 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val) \ argument
1144 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
1186 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x) (x+0x000000a8) argument
1187 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x) (x+0x000000a8) argument
1190 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x) \ argument
1192 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1194 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1196 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1208 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x) (x+0x000000ac) argument
1209 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x) (x+0x000000ac) argument
1212 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x) \ argument
1214 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1216 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1218 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1230 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000000bc) argument
1231 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000000bc) argument
1234 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1236 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1238 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1240 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1258 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000000c0) argument
1259 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000000c0) argument
1262 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1264 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1266 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1268 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1280 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000000c4) argument
1281 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000000c4) argument
1284 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1286 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1288 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1290 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1308 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000000c8) argument
1309 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000000c8) argument
1312 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1314 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1316 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1318 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1330 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000000cc) argument
1331 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000000cc) argument
1334 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1336 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1338 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1340 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1352 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0) argument
1353 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0) argument
1356 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1358 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1360 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1362 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1377 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000000d4) argument
1378 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000000d4) argument
1381 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_IN(x) \ argument
1383 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1385 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1387 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1399 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000000d8) argument
1400 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000000d8) argument
1403 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_IN(x) \ argument
1405 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1407 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1409 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1424 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x) (x+0x000000dc) argument
1425 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_PHYS(x) (x+0x000000dc) argument
1428 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_IN(x) \ argument
1430 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_INM(x, mask) \ argument
1432 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUT(x, val) \ argument
1434 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1446 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000000e0) argument
1447 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000000e0) argument
1450 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1452 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1454 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1456 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1468 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x) (x+0x000000e4) argument
1469 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x) (x+0x000000e4) argument
1472 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x) \ argument
1474 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask) \ argument
1476 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val) \ argument
1478 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1490 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x) (x+0x000000e8) argument
1491 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x) (x+0x000000e8) argument
1494 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x) \ argument
1496 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask) \ argument
1498 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val) \ argument
1500 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1515 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x) (x+0x000000ec) argument
1516 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x) (x+0x000000ec) argument
1519 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x) \ argument
1521 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask) \ argument
1523 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val) \ argument
1525 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
1537 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x) (x+0x000000f0) argument
1538 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x) (x+0x000000f0) argument
1541 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x) \ argument
1543 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask) \ argument
1545 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val) \ argument
1547 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
1562 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x) (x+0x000000f4) argument
1563 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x) (x+0x000000f4) argument
1566 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x) \ argument
1568 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask) \ argument
1570 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val) \ argument
1572 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
1614 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000100) argument
1615 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000100) argument
1618 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x) \ argument
1620 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1622 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1624 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1636 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000104) argument
1637 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000104) argument
1640 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x) \ argument
1642 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1644 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1646 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1658 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000114) argument
1659 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000114) argument
1662 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1664 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1666 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1668 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1686 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000118) argument
1687 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000118) argument
1690 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1692 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1694 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1696 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1708 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000011c) argument
1709 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000011c) argument
1712 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1714 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1716 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1718 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1736 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000120) argument
1737 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000120) argument
1740 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1742 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1744 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1746 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1758 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000124) argument
1759 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000124) argument
1762 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1764 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1766 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1768 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1780 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000128) argument
1781 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000128) argument
1784 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1786 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1788 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1790 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1805 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000012c) argument
1806 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000012c) argument
1809 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x) \ argument
1811 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1813 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1815 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1827 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000130) argument
1828 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000130) argument
1831 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x) \ argument
1833 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1835 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1837 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1852 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x) (x+0x00000134) argument
1853 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x) (x+0x00000134) argument
1856 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x) \ argument
1858 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask) \ argument
1860 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val) \ argument
1862 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1874 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000138) argument
1875 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000138) argument
1878 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1880 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1882 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1884 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1896 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x) (x+0x0000013c) argument
1897 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x) (x+0x0000013c) argument
1900 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x) \ argument
1902 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask) \ argument
1904 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val) \ argument
1906 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1918 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x) (x+0x00000140) argument
1919 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x) (x+0x00000140) argument
1922 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x) \ argument
1924 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask) \ argument
1926 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val) \ argument
1928 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1943 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x) (x+0x00000144) argument
1944 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x) (x+0x00000144) argument
1947 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x) \ argument
1949 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask) \ argument
1951 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val) \ argument
1953 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
1965 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x) (x+0x00000148) argument
1966 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x) (x+0x00000148) argument
1969 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x) \ argument
1971 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask) \ argument
1973 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val) \ argument
1975 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
1990 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x) (x+0x0000014c) argument
1991 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x) (x+0x0000014c) argument
1994 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x) \ argument
1996 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask) \ argument
1998 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val) \ argument
2000 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
2042 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000158) argument
2043 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000158) argument
2046 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x) \ argument
2048 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2050 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2052 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2064 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000015c) argument
2065 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000015c) argument
2068 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x) \ argument
2070 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2072 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2074 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2086 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000016c) argument
2087 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000016c) argument
2090 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2092 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2094 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2096 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2114 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000170) argument
2115 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000170) argument
2118 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2120 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2122 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2124 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2136 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000174) argument
2137 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000174) argument
2140 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2142 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2144 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2146 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2164 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000178) argument
2165 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000178) argument
2168 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2170 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2172 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2174 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2186 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000017c) argument
2187 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000017c) argument
2190 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2192 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2194 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2196 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2208 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000180) argument
2209 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000180) argument
2212 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2214 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2216 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2218 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2233 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000184) argument
2234 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000184) argument
2237 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x) \ argument
2239 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2241 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2243 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2255 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000188) argument
2256 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000188) argument
2259 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x) \ argument
2261 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2263 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2265 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2280 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x) (x+0x0000018c) argument
2281 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x) (x+0x0000018c) argument
2284 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x) \ argument
2286 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask) \ argument
2288 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val) \ argument
2290 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2302 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000190) argument
2303 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000190) argument
2306 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2308 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2310 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2312 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2324 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x) (x+0x00000194) argument
2325 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_PHYS(x) (x+0x00000194) argument
2328 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_IN(x) \ argument
2330 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask) \ argument
2332 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val) \ argument
2334 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2346 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x) (x+0x00000198) argument
2347 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_PHYS(x) (x+0x00000198) argument
2350 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_IN(x) \ argument
2352 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask) \ argument
2354 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val) \ argument
2356 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2371 #define HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x) (x+0x0000019c) argument
2372 #define HWIO_REO_R0_SW2REO1_RING_ID_PHYS(x) (x+0x0000019c) argument
2375 #define HWIO_REO_R0_SW2REO1_RING_ID_IN(x) \ argument
2377 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask) \ argument
2379 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val) \ argument
2381 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val) \ argument
2393 #define HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x) (x+0x000001a0) argument
2394 #define HWIO_REO_R0_SW2REO1_RING_STATUS_PHYS(x) (x+0x000001a0) argument
2397 #define HWIO_REO_R0_SW2REO1_RING_STATUS_IN(x) \ argument
2399 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask) \ argument
2401 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val) \ argument
2403 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
2418 #define HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x) (x+0x000001a4) argument
2419 #define HWIO_REO_R0_SW2REO1_RING_MISC_PHYS(x) (x+0x000001a4) argument
2422 #define HWIO_REO_R0_SW2REO1_RING_MISC_IN(x) \ argument
2424 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask) \ argument
2426 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val) \ argument
2428 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val) \ argument
2470 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000001b0) argument
2471 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000001b0) argument
2474 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_IN(x) \ argument
2476 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2478 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2480 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2492 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000001b4) argument
2493 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000001b4) argument
2496 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_IN(x) \ argument
2498 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2500 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2502 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2514 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000001c4) argument
2515 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000001c4) argument
2518 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2520 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2522 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2524 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2542 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000001c8) argument
2543 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000001c8) argument
2546 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2548 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2550 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2552 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2564 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000001cc) argument
2565 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000001cc) argument
2568 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2570 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2572 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2574 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2592 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000001d0) argument
2593 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000001d0) argument
2596 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2598 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2600 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2602 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2614 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000001d4) argument
2615 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000001d4) argument
2618 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2620 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2622 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2624 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2636 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000001d8) argument
2637 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000001d8) argument
2640 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2642 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2644 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2646 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2661 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000001dc) argument
2662 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000001dc) argument
2665 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_IN(x) \ argument
2667 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2669 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2671 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2683 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000001e0) argument
2684 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000001e0) argument
2687 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_IN(x) \ argument
2689 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2691 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2693 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2708 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x) (x+0x000001e4) argument
2709 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_PHYS(x) (x+0x000001e4) argument
2712 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_IN(x) \ argument
2714 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask) \ argument
2716 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
2718 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2730 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000001e8) argument
2731 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000001e8) argument
2734 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2736 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2738 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2740 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2752 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x) (x+0x000001ec) argument
2753 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x) (x+0x000001ec) argument
2756 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x) \ argument
2758 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask) \ argument
2760 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val) \ argument
2762 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2774 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x) (x+0x000001f0) argument
2775 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x) (x+0x000001f0) argument
2778 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x) \ argument
2780 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask) \ argument
2782 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val) \ argument
2784 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2799 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x) (x+0x000001f4) argument
2800 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x) (x+0x000001f4) argument
2803 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x) \ argument
2805 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask) \ argument
2807 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val) \ argument
2809 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
2824 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) (x+0x000001f8) argument
2825 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x) (x+0x000001f8) argument
2828 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x) \ argument
2830 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask) \ argument
2832 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val) \ argument
2834 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
2849 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) (x+0x000001fc) argument
2850 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x) (x+0x000001fc) argument
2853 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x) \ argument
2855 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask) \ argument
2857 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val) \ argument
2859 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
2904 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000200) argument
2905 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000200) argument
2908 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x) \ argument
2910 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask) \ argument
2912 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val) \ argument
2914 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
2926 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000204) argument
2927 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000204) argument
2930 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x) \ argument
2932 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask) \ argument
2934 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val) \ argument
2936 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
2948 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000210) argument
2949 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000210) argument
2952 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x) \ argument
2954 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
2956 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
2958 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
2976 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000214) argument
2977 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000214) argument
2980 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x) \ argument
2982 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
2984 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
2986 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3004 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000218) argument
3005 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000218) argument
3008 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3010 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3012 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3014 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3026 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000234) argument
3027 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000234) argument
3030 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x) \ argument
3032 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3034 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3036 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3048 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000238) argument
3049 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000238) argument
3052 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x) \ argument
3054 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3056 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3058 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3073 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x) (x+0x0000023c) argument
3074 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x) (x+0x0000023c) argument
3077 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x) \ argument
3079 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask) \ argument
3081 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val) \ argument
3083 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3095 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000240) argument
3096 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000240) argument
3099 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3101 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3103 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3105 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3117 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x) (x+0x00000244) argument
3118 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x) (x+0x00000244) argument
3121 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x) \ argument
3123 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask) \ argument
3125 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val) \ argument
3127 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3139 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x) (x+0x00000248) argument
3140 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x) (x+0x00000248) argument
3143 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x) \ argument
3145 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask) \ argument
3147 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val) \ argument
3149 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3164 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x) (x+0x0000024c) argument
3165 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x) (x+0x0000024c) argument
3168 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x) \ argument
3170 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask) \ argument
3172 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val) \ argument
3174 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3189 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x) (x+0x00000250) argument
3190 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x) (x+0x00000250) argument
3193 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x) \ argument
3195 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask) \ argument
3197 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val) \ argument
3199 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
3214 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x) (x+0x00000254) argument
3215 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x) (x+0x00000254) argument
3218 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x) \ argument
3220 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask) \ argument
3222 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val) \ argument
3224 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
3269 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000258) argument
3270 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000258) argument
3273 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x) \ argument
3275 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3277 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3279 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3291 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000025c) argument
3292 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000025c) argument
3295 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x) \ argument
3297 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3299 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3301 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3313 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000268) argument
3314 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000268) argument
3317 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3319 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3321 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3323 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3341 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000026c) argument
3342 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000026c) argument
3345 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3347 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3349 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3351 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3369 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000270) argument
3370 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000270) argument
3373 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3375 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3377 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3379 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3391 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000028c) argument
3392 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000028c) argument
3395 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x) \ argument
3397 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3399 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3401 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3413 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000290) argument
3414 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000290) argument
3417 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x) \ argument
3419 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3421 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3423 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3438 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x) (x+0x00000294) argument
3439 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x) (x+0x00000294) argument
3442 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x) \ argument
3444 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask) \ argument
3446 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val) \ argument
3448 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3460 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000298) argument
3461 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000298) argument
3464 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3466 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3468 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3470 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3482 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x) (x+0x0000029c) argument
3483 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x) (x+0x0000029c) argument
3486 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x) \ argument
3488 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask) \ argument
3490 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val) \ argument
3492 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3504 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x) (x+0x000002a0) argument
3505 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x) (x+0x000002a0) argument
3508 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x) \ argument
3510 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask) \ argument
3512 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val) \ argument
3514 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3529 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x) (x+0x000002a4) argument
3530 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x) (x+0x000002a4) argument
3533 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x) \ argument
3535 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask) \ argument
3537 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val) \ argument
3539 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
3554 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x) (x+0x000002a8) argument
3555 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x) (x+0x000002a8) argument
3558 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x) \ argument
3560 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask) \ argument
3562 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val) \ argument
3564 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
3579 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x) (x+0x000002ac) argument
3580 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x) (x+0x000002ac) argument
3583 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x) \ argument
3585 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask) \ argument
3587 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val) \ argument
3589 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
3634 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x) (x+0x000002b0) argument
3635 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x) (x+0x000002b0) argument
3638 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x) \ argument
3640 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3642 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3644 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3656 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x) (x+0x000002b4) argument
3657 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x) (x+0x000002b4) argument
3660 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x) \ argument
3662 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3664 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3666 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3678 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000002c0) argument
3679 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000002c0) argument
3682 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3684 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3686 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3688 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3706 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000002c4) argument
3707 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000002c4) argument
3710 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3712 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3714 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3716 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3734 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000002c8) argument
3735 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000002c8) argument
3738 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3740 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3742 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3744 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3756 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000002e4) argument
3757 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000002e4) argument
3760 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x) \ argument
3762 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3764 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3766 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3778 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000002e8) argument
3779 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000002e8) argument
3782 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x) \ argument
3784 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3786 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3788 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3803 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x) (x+0x000002ec) argument
3804 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x) (x+0x000002ec) argument
3807 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x) \ argument
3809 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask) \ argument
3811 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val) \ argument
3813 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3825 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000002f0) argument
3826 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000002f0) argument
3829 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3831 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3833 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3835 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3847 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x) (x+0x000002f4) argument
3848 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x) (x+0x000002f4) argument
3851 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x) \ argument
3853 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask) \ argument
3855 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val) \ argument
3857 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3869 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x) (x+0x000002f8) argument
3870 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x) (x+0x000002f8) argument
3873 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x) \ argument
3875 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask) \ argument
3877 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val) \ argument
3879 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3894 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x) (x+0x000002fc) argument
3895 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x) (x+0x000002fc) argument
3898 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x) \ argument
3900 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask) \ argument
3902 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val) \ argument
3904 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
3919 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x) (x+0x00000300) argument
3920 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x) (x+0x00000300) argument
3923 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x) \ argument
3925 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask) \ argument
3927 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val) \ argument
3929 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
3944 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x) (x+0x00000304) argument
3945 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x) (x+0x00000304) argument
3948 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x) \ argument
3950 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask) \ argument
3952 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val) \ argument
3954 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
3999 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000308) argument
4000 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000308) argument
4003 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x) \ argument
4005 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4007 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4009 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4021 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000030c) argument
4022 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000030c) argument
4025 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x) \ argument
4027 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4029 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4031 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4043 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000318) argument
4044 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000318) argument
4047 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4049 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4051 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4053 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4071 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000031c) argument
4072 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000031c) argument
4075 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4077 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4079 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4081 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4099 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000320) argument
4100 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000320) argument
4103 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4105 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4107 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4109 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4121 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000033c) argument
4122 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000033c) argument
4125 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x) \ argument
4127 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4129 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4131 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4143 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000340) argument
4144 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000340) argument
4147 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x) \ argument
4149 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4151 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4153 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4168 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x) (x+0x00000344) argument
4169 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x) (x+0x00000344) argument
4172 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x) \ argument
4174 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask) \ argument
4176 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val) \ argument
4178 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4190 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000348) argument
4191 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000348) argument
4194 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4196 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4198 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4200 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4212 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x) (x+0x000003fc) argument
4213 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x) (x+0x000003fc) argument
4216 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x) \ argument
4218 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask) \ argument
4220 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val) \ argument
4222 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4234 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x) (x+0x00000400) argument
4235 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x) (x+0x00000400) argument
4238 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x) \ argument
4240 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask) \ argument
4242 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val) \ argument
4244 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4259 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x) (x+0x00000404) argument
4260 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x) (x+0x00000404) argument
4263 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x) \ argument
4265 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask) \ argument
4267 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val) \ argument
4269 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
4284 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x) (x+0x00000408) argument
4285 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x) (x+0x00000408) argument
4288 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x) \ argument
4290 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask) \ argument
4292 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val) \ argument
4294 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
4309 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x) (x+0x0000040c) argument
4310 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x) (x+0x0000040c) argument
4313 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x) \ argument
4315 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask) \ argument
4317 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val) \ argument
4319 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
4364 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000410) argument
4365 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000410) argument
4368 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x) \ argument
4370 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4372 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4374 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4386 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000414) argument
4387 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000414) argument
4390 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x) \ argument
4392 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4394 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4396 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4408 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000420) argument
4409 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000420) argument
4412 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4414 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4416 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4418 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4436 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000424) argument
4437 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000424) argument
4440 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4442 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4444 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4446 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4464 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000428) argument
4465 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000428) argument
4468 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4470 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4472 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4474 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4486 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000444) argument
4487 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000444) argument
4490 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x) \ argument
4492 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4494 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4496 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4508 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000448) argument
4509 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000448) argument
4512 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x) \ argument
4514 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4516 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4518 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4533 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x) (x+0x0000044c) argument
4534 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x) (x+0x0000044c) argument
4537 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x) \ argument
4539 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask) \ argument
4541 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val) \ argument
4543 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4555 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000450) argument
4556 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000450) argument
4559 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4561 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4563 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4565 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4577 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x) (x+0x00000454) argument
4578 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x) (x+0x00000454) argument
4581 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x) \ argument
4583 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask) \ argument
4585 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val) \ argument
4587 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4599 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x) (x+0x00000458) argument
4600 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x) (x+0x00000458) argument
4603 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x) \ argument
4605 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask) \ argument
4607 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val) \ argument
4609 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4624 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x) (x+0x0000045c) argument
4625 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x) (x+0x0000045c) argument
4628 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x) \ argument
4630 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask) \ argument
4632 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val) \ argument
4634 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
4649 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x) (x+0x00000460) argument
4650 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x) (x+0x00000460) argument
4653 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x) \ argument
4655 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask) \ argument
4657 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val) \ argument
4659 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
4674 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x) (x+0x00000464) argument
4675 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x) (x+0x00000464) argument
4678 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x) \ argument
4680 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask) \ argument
4682 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val) \ argument
4684 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
4729 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000468) argument
4730 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000468) argument
4733 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x) \ argument
4735 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4737 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4739 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4751 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000046c) argument
4752 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000046c) argument
4755 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x) \ argument
4757 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4759 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4761 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4773 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000478) argument
4774 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000478) argument
4777 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4779 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4781 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4783 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4801 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000047c) argument
4802 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000047c) argument
4805 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4807 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4809 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4811 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4829 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000480) argument
4830 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000480) argument
4833 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4835 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4837 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4839 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4851 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000049c) argument
4852 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000049c) argument
4855 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x) \ argument
4857 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4859 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4861 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4873 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004a0) argument
4874 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004a0) argument
4877 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x) \ argument
4879 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4881 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4883 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4898 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x) (x+0x000004a4) argument
4899 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x) (x+0x000004a4) argument
4902 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x) \ argument
4904 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask) \ argument
4906 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val) \ argument
4908 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4920 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000004a8) argument
4921 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000004a8) argument
4924 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4926 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4928 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4930 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4942 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x) (x+0x000004ac) argument
4943 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x) (x+0x000004ac) argument
4946 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x) \ argument
4948 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask) \ argument
4950 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val) \ argument
4952 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4964 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x) (x+0x000004b0) argument
4965 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x) (x+0x000004b0) argument
4968 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x) \ argument
4970 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask) \ argument
4972 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val) \ argument
4974 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4989 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x) (x+0x000004b4) argument
4990 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x) (x+0x000004b4) argument
4993 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x) \ argument
4995 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask) \ argument
4997 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val) \ argument
4999 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
5014 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x) (x+0x000004b8) argument
5015 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x) (x+0x000004b8) argument
5018 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x) \ argument
5020 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask) \ argument
5022 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val) \ argument
5024 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
5039 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x) (x+0x000004bc) argument
5040 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x) (x+0x000004bc) argument
5043 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x) \ argument
5045 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask) \ argument
5047 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val) \ argument
5049 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
5094 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x) (x+0x000004c0) argument
5095 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x) (x+0x000004c0) argument
5098 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x) \ argument
5100 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5102 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5104 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5116 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x) (x+0x000004c4) argument
5117 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x) (x+0x000004c4) argument
5120 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x) \ argument
5122 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5124 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5126 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5138 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000004d0) argument
5139 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000004d0) argument
5142 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5144 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5146 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5148 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5166 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000004d4) argument
5167 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000004d4) argument
5170 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5172 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5174 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5176 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5194 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000004d8) argument
5195 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000004d8) argument
5198 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5200 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5202 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5204 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5216 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000004f4) argument
5217 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000004f4) argument
5220 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_IN(x) \ argument
5222 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5224 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5226 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5238 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004f8) argument
5239 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004f8) argument
5242 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_IN(x) \ argument
5244 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5246 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5248 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5263 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x) (x+0x000004fc) argument
5264 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_PHYS(x) (x+0x000004fc) argument
5267 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_IN(x) \ argument
5269 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_INM(x, mask) \ argument
5271 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUT(x, val) \ argument
5273 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5285 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000500) argument
5286 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000500) argument
5289 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5291 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5293 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5295 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5307 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x) (x+0x00000504) argument
5308 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x) (x+0x00000504) argument
5311 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x) \ argument
5313 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask) \ argument
5315 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val) \ argument
5317 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5329 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x) (x+0x00000508) argument
5330 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x) (x+0x00000508) argument
5333 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x) \ argument
5335 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask) \ argument
5337 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val) \ argument
5339 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5354 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x) (x+0x0000050c) argument
5355 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x) (x+0x0000050c) argument
5358 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x) \ argument
5360 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask) \ argument
5362 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val) \ argument
5364 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
5379 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x) (x+0x00000510) argument
5380 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x) (x+0x00000510) argument
5383 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x) \ argument
5385 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask) \ argument
5387 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val) \ argument
5389 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
5404 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x) (x+0x00000514) argument
5405 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x) (x+0x00000514) argument
5408 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x) \ argument
5410 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask) \ argument
5412 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val) \ argument
5414 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
5459 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000518) argument
5460 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000518) argument
5463 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x) \ argument
5465 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5467 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5469 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5481 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000051c) argument
5482 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000051c) argument
5485 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x) \ argument
5487 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5489 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5491 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5503 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000528) argument
5504 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000528) argument
5507 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5509 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5511 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5513 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5531 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000052c) argument
5532 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000052c) argument
5535 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5537 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5539 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5541 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5559 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000530) argument
5560 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000530) argument
5563 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5565 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5567 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5569 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5581 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000054c) argument
5582 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000054c) argument
5585 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x) \ argument
5587 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5589 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5591 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5603 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000550) argument
5604 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000550) argument
5607 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x) \ argument
5609 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5611 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5613 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5628 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x) (x+0x00000554) argument
5629 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x) (x+0x00000554) argument
5632 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x) \ argument
5634 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask) \ argument
5636 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val) \ argument
5638 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5650 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000558) argument
5651 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000558) argument
5654 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5656 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5658 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5660 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5672 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x) (x+0x0000055c) argument
5673 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x) (x+0x0000055c) argument
5676 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x) \ argument
5678 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask) \ argument
5680 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val) \ argument
5682 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
5697 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x) (x+0x00000560) argument
5698 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x) (x+0x00000560) argument
5701 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x) \ argument
5703 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask) \ argument
5705 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val) \ argument
5707 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
5719 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x) (x+0x00000564) argument
5720 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x) (x+0x00000564) argument
5723 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x) \ argument
5725 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask) \ argument
5727 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val) \ argument
5729 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
5741 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x) (x+0x00000568) argument
5742 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x) (x+0x00000568) argument
5745 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x) \ argument
5747 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask) \ argument
5749 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val) \ argument
5751 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
5763 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x) (x+0x0000056c) argument
5764 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x) (x+0x0000056c) argument
5767 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x) \ argument
5769 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask) \ argument
5771 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val) \ argument
5773 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
5785 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x) (x+0x00000570) argument
5786 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x) (x+0x00000570) argument
5789 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x) \ argument
5791 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask) \ argument
5793 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val) \ argument
5795 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
5807 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x) (x+0x00000574) argument
5808 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x) (x+0x00000574) argument
5811 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x) \ argument
5813 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask) \ argument
5815 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val) \ argument
5817 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
5829 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x) (x+0x00000578) argument
5830 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x) (x+0x00000578) argument
5833 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x) \ argument
5835 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask) \ argument
5837 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val) \ argument
5839 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
5851 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x) (x+0x0000057c) argument
5852 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x) (x+0x0000057c) argument
5855 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x) \ argument
5857 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask) \ argument
5859 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val) \ argument
5861 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
5873 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x) (x+0x00000580) argument
5874 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x) (x+0x00000580) argument
5877 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x) \ argument
5879 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask) \ argument
5881 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val) \ argument
5883 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
5895 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x) (x+0x00000584) argument
5896 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x) (x+0x00000584) argument
5899 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x) \ argument
5901 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask) \ argument
5903 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val) \ argument
5905 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
5917 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x) (x+0x00000588) argument
5918 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x) (x+0x00000588) argument
5921 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x) \ argument
5923 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask) \ argument
5925 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val) \ argument
5927 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
5939 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x) (x+0x0000058c) argument
5940 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x) (x+0x0000058c) argument
5943 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x) \ argument
5945 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask) \ argument
5947 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val) \ argument
5949 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
5961 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x) (x+0x00000590) argument
5962 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x) (x+0x00000590) argument
5965 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x) \ argument
5967 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask) \ argument
5969 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val) \ argument
5971 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
5983 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x) (x+0x00000594) argument
5984 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x) (x+0x00000594) argument
5987 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x) \ argument
5989 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask) \ argument
5991 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val) \ argument
5993 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6005 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x) (x+0x00000598) argument
6006 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x) (x+0x00000598) argument
6009 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x) \ argument
6011 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask) \ argument
6013 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val) \ argument
6015 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6027 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x) (x+0x0000059c) argument
6028 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x) (x+0x0000059c) argument
6031 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x) \ argument
6033 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask) \ argument
6035 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val) \ argument
6037 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6049 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x) (x+0x000005a0) argument
6050 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x) (x+0x000005a0) argument
6053 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x) \ argument
6055 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask) \ argument
6057 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val) \ argument
6059 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6071 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x) (x+0x000005a4) argument
6072 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x) (x+0x000005a4) argument
6075 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x) \ argument
6077 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask) \ argument
6079 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val) \ argument
6081 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6093 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x) (x+0x000005a8) argument
6094 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x) (x+0x000005a8) argument
6097 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x) \ argument
6099 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask) \ argument
6101 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val) \ argument
6103 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6115 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x) (x+0x000005ac) argument
6116 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x) (x+0x000005ac) argument
6119 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x) \ argument
6121 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask) \ argument
6123 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val) \ argument
6125 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6137 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x) (x+0x000005b0) argument
6138 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x) (x+0x000005b0) argument
6141 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x) \ argument
6143 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask) \ argument
6145 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val) \ argument
6147 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6159 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x) (x+0x000005b4) argument
6160 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x) (x+0x000005b4) argument
6163 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x) \ argument
6165 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask) \ argument
6167 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val) \ argument
6169 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
6181 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x) (x+0x000005b8) argument
6182 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x) (x+0x000005b8) argument
6185 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x) \ argument
6187 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask) \ argument
6189 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val) \ argument
6191 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
6203 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x) (x+0x000005bc) argument
6204 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x) (x+0x000005bc) argument
6207 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x) \ argument
6209 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask) \ argument
6211 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val) \ argument
6213 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
6225 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x) (x+0x000005c0) argument
6226 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x) (x+0x000005c0) argument
6229 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x) \ argument
6231 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask) \ argument
6233 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val) \ argument
6235 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
6247 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x) (x+0x000005c4) argument
6248 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x) (x+0x000005c4) argument
6251 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x) \ argument
6253 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask) \ argument
6255 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val) \ argument
6257 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
6269 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x) (x+0x000005c8) argument
6270 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x) (x+0x000005c8) argument
6273 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x) \ argument
6275 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask) \ argument
6277 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val) \ argument
6279 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
6291 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x) (x+0x000005cc) argument
6292 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x) (x+0x000005cc) argument
6295 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x) \ argument
6297 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask) \ argument
6299 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val) \ argument
6301 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
6313 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x) (x+0x000005d0) argument
6314 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x) (x+0x000005d0) argument
6317 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x) \ argument
6319 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask) \ argument
6321 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val) \ argument
6323 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
6335 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x) (x+0x000005d4) argument
6336 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x) (x+0x000005d4) argument
6339 #define HWIO_REO_R0_AGING_CONTROL_IN(x) \ argument
6341 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask) \ argument
6343 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val) \ argument
6345 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
6357 #define HWIO_REO_R0_MISC_CTL_ADDR(x) (x+0x000005d8) argument
6358 #define HWIO_REO_R0_MISC_CTL_PHYS(x) (x+0x000005d8) argument
6361 #define HWIO_REO_R0_MISC_CTL_IN(x) \ argument
6363 #define HWIO_REO_R0_MISC_CTL_INM(x, mask) \ argument
6365 #define HWIO_REO_R0_MISC_CTL_OUT(x, val) \ argument
6367 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val) \ argument
6388 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x) (x+0x000005dc) argument
6389 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x) (x+0x000005dc) argument
6392 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x) \ argument
6394 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask) \ argument
6396 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val) \ argument
6398 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
6410 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x) (x+0x000005e0) argument
6411 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x) (x+0x000005e0) argument
6414 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x) \ argument
6416 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask) \ argument
6418 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val) \ argument
6420 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
6432 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x) (x+0x000005e4) argument
6433 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x) (x+0x000005e4) argument
6436 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x) \ argument
6438 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask) \ argument
6440 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val) \ argument
6442 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
6454 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x) (x+0x000005e8) argument
6455 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x) (x+0x000005e8) argument
6458 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x) \ argument
6460 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask) \ argument
6462 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val) \ argument
6464 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
6476 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x) (x+0x000005ec) argument
6477 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x) (x+0x000005ec) argument
6480 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x) \ argument
6482 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask) \ argument
6484 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val) \ argument
6486 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
6498 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x) (x+0x000005f0) argument
6499 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x) (x+0x000005f0) argument
6502 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x) \ argument
6504 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask) \ argument
6506 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val) \ argument
6508 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
6520 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x) (x+0x000005f4) argument
6521 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x) (x+0x000005f4) argument
6524 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x) \ argument
6526 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask) \ argument
6528 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val) \ argument
6530 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
6542 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x) (x+0x000005f8) argument
6543 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x) (x+0x000005f8) argument
6546 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x) \ argument
6548 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask) \ argument
6550 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val) \ argument
6552 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
6564 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x) (x+0x000005fc) argument
6565 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x) (x+0x000005fc) argument
6568 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x) \ argument
6570 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \ argument
6572 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val) \ argument
6574 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
6586 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x) (x+0x00000600) argument
6587 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x) (x+0x00000600) argument
6590 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x) \ argument
6592 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask) \ argument
6594 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val) \ argument
6596 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
6608 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x) (x+0x00000604) argument
6609 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x) (x+0x00000604) argument
6612 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x) \ argument
6614 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask) \ argument
6616 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val) \ argument
6618 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
6630 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x) (x+0x00000608) argument
6631 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x) (x+0x00000608) argument
6634 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x) \ argument
6636 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask) \ argument
6638 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val) \ argument
6640 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
6652 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x) (x+0x0000060c) argument
6653 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x) (x+0x0000060c) argument
6656 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x) \ argument
6658 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask) \ argument
6660 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val) \ argument
6662 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
6674 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x) (x+0x00000610) argument
6675 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x) (x+0x00000610) argument
6678 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x) \ argument
6680 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask) \ argument
6682 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val) \ argument
6684 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
6696 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x) (x+0x00000614) argument
6697 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x) (x+0x00000614) argument
6700 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x) \ argument
6702 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask) \ argument
6704 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val) \ argument
6706 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
6718 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x) (x+0x00000618) argument
6719 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x) (x+0x00000618) argument
6722 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x) \ argument
6724 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask) \ argument
6726 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val) \ argument
6728 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
6740 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x) (x+0x0000061c) argument
6741 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x) (x+0x0000061c) argument
6744 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x) \ argument
6746 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask) \ argument
6748 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val) \ argument
6750 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
6762 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x) (x+0x00000620) argument
6763 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x) (x+0x00000620) argument
6766 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x) \ argument
6768 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask) \ argument
6770 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val) \ argument
6772 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
6784 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x) (x+0x00000624) argument
6785 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x) (x+0x00000624) argument
6788 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x) \ argument
6790 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask) \ argument
6792 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val) \ argument
6794 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
6806 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x) (x+0x00000628) argument
6807 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x) (x+0x00000628) argument
6810 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x) \ argument
6812 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask) \ argument
6814 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val) \ argument
6816 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
6828 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x) (x+0x0000062c) argument
6829 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x) (x+0x0000062c) argument
6832 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x) \ argument
6834 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask) \ argument
6836 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val) \ argument
6838 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
6850 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x) (x+0x00000630) argument
6851 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x) (x+0x00000630) argument
6854 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x) \ argument
6856 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask) \ argument
6858 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val) \ argument
6860 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
6875 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x00000654) argument
6876 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x00000654) argument
6879 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x) \ argument
6881 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ argument
6883 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ argument
6885 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
6897 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x00000658) argument
6898 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x00000658) argument
6901 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x) \ argument
6903 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ argument
6905 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ argument
6907 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
6919 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x0000065c) argument
6920 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x0000065c) argument
6923 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x) \ argument
6925 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ argument
6927 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ argument
6929 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
6947 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x00000660) argument
6948 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x00000660) argument
6951 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x) \ argument
6953 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ argument
6955 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ argument
6957 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
6969 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x00000664) argument
6970 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x00000664) argument
6973 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ argument
6975 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ argument
6977 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ argument
6979 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
7027 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x00000668) argument
7028 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x00000668) argument
7031 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x) \ argument
7033 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ argument
7035 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ argument
7037 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
7058 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x0000066c) argument
7059 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x0000066c) argument
7062 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x) \ argument
7064 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ argument
7066 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ argument
7068 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
7086 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x00000670) argument
7087 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x00000670) argument
7090 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ argument
7092 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ argument
7094 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ argument
7096 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
7117 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x00000674) argument
7118 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x00000674) argument
7121 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ argument
7123 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ argument
7125 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ argument
7127 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
7148 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x00000678) argument
7149 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x00000678) argument
7152 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x) \ argument
7154 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ argument
7156 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ argument
7158 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
7197 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x0000067c) argument
7198 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x0000067c) argument
7201 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ argument
7203 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ argument
7205 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ argument
7207 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
7222 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x00000680) argument
7223 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x00000680) argument
7226 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x) \ argument
7228 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ argument
7230 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ argument
7232 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
7244 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x00000684) argument
7245 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x00000684) argument
7248 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ argument
7250 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ argument
7252 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ argument
7254 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
7269 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x00000688) argument
7270 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x00000688) argument
7273 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ argument
7275 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ argument
7277 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ argument
7279 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ argument
7297 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x0000068c) argument
7298 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x0000068c) argument
7301 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ argument
7303 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ argument
7305 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ argument
7307 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ argument
7325 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x00000690) argument
7326 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x00000690) argument
7329 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ argument
7331 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
7333 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
7335 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
7347 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x00000694) argument
7348 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x00000694) argument
7351 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ argument
7353 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
7355 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
7357 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
7369 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x00000698) argument
7370 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x00000698) argument
7373 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ argument
7375 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
7377 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
7379 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
7391 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x0000069c) argument
7392 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x0000069c) argument
7395 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ argument
7397 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
7399 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
7401 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
7413 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x) (x+0x000006a0) argument
7414 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x) (x+0x000006a0) argument
7417 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x) \ argument
7419 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask) \ argument
7421 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ argument
7423 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ argument
7444 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x) (x+0x000006a4) argument
7445 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x) (x+0x000006a4) argument
7448 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x) \ argument
7450 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask) \ argument
7452 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val) \ argument
7454 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
7493 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x) (x+0x000006a8) argument
7494 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x) (x+0x000006a8) argument
7497 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x) \ argument
7499 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask) \ argument
7501 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val) \ argument
7503 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
7518 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x) (x+0x000006ac) argument
7519 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_PHYS(x) (x+0x000006ac) argument
7522 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_IN(x) \ argument
7524 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask) \ argument
7526 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val) \ argument
7528 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val) \ argument
7540 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x) (x+0x000006b0) argument
7541 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_PHYS(x) (x+0x000006b0) argument
7544 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_IN(x) \ argument
7546 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask) \ argument
7548 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val) \ argument
7550 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val) \ argument
7562 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x) (x+0x000006b4) argument
7563 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x) (x+0x000006b4) argument
7566 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x) \ argument
7568 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask) \ argument
7570 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val) \ argument
7572 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
7611 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x) (x+0x000006b8) argument
7612 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x) (x+0x000006b8) argument
7615 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x) \ argument
7617 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask) \ argument
7619 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val) \ argument
7621 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
7633 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x) (x+0x000006bc) argument
7634 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x) (x+0x000006bc) argument
7637 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x) \ argument
7639 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask) \ argument
7641 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val) \ argument
7643 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
7655 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x) (x+0x000006c0) argument
7656 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x) (x+0x000006c0) argument
7659 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x) \ argument
7661 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask) \ argument
7663 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val) \ argument
7665 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
7677 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x) (x+0x000006c4) argument
7678 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x) (x+0x000006c4) argument
7681 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x) \ argument
7683 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask) \ argument
7685 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val) \ argument
7687 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
7699 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x) (x+0x00002000) argument
7700 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x) (x+0x00002000) argument
7703 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x) \ argument
7705 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask) \ argument
7707 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val) \ argument
7709 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
7733 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x) (x+0x00002004) argument
7734 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x) (x+0x00002004) argument
7737 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x) \ argument
7739 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask) \ argument
7741 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val) \ argument
7743 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
7758 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x) (x+0x00002008) argument
7759 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x) (x+0x00002008) argument
7762 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x) \ argument
7764 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask) \ argument
7766 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val) \ argument
7768 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
7789 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x) (x+0x0000200c) argument
7790 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x) (x+0x0000200c) argument
7793 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x) \ argument
7795 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask) \ argument
7797 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val) \ argument
7799 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
7811 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x) (x+0x00002010) argument
7812 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x) (x+0x00002010) argument
7815 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x) \ argument
7817 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask) \ argument
7819 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val) \ argument
7821 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
7833 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x) (x+0x00002014) argument
7834 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x) (x+0x00002014) argument
7837 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x) \ argument
7839 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask) \ argument
7841 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val) \ argument
7843 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
7855 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x) (x+0x00002018) argument
7856 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x) (x+0x00002018) argument
7859 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x) \ argument
7861 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask) \ argument
7863 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val) \ argument
7865 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
7877 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x) (x+0x0000201c) argument
7878 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x) (x+0x0000201c) argument
7881 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x) \ argument
7883 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask) \ argument
7885 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val) \ argument
7887 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
7899 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x) (x+0x00002020) argument
7900 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x) (x+0x00002020) argument
7903 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x) \ argument
7905 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask) \ argument
7907 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val) \ argument
7909 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
7924 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x) (x+0x00002024) argument
7925 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_PHYS(x) (x+0x00002024) argument
7928 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_IN(x) \ argument
7930 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask) \ argument
7932 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val) \ argument
7934 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val) \ argument
7949 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x) (x+0x00002028) argument
7950 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_PHYS(x) (x+0x00002028) argument
7953 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_IN(x) \ argument
7955 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask) \ argument
7957 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val) \ argument
7959 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val) \ argument
7974 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x) (x+0x0000202c) argument
7975 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_PHYS(x) (x+0x0000202c) argument
7978 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_IN(x) \ argument
7980 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask) \ argument
7982 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val) \ argument
7984 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val) \ argument
7999 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x) (x+0x00002030) argument
8000 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_PHYS(x) (x+0x00002030) argument
8003 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_IN(x) \ argument
8005 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask) \ argument
8007 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val) \ argument
8009 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \ argument
8021 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x) (x+0x00002034) argument
8022 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_PHYS(x) (x+0x00002034) argument
8025 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_IN(x) \ argument
8027 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask) \ argument
8029 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val) \ argument
8031 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \ argument
8043 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x) (x+0x00002038) argument
8044 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_PHYS(x) (x+0x00002038) argument
8047 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_IN(x) \ argument
8049 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask) \ argument
8051 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val) \ argument
8053 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \ argument
8068 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x) (x+0x0000203c) argument
8069 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x) (x+0x0000203c) argument
8072 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x) \ argument
8074 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask) \ argument
8076 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val) \ argument
8078 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8090 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x) (x+0x00002040) argument
8091 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_PHYS(x) (x+0x00002040) argument
8094 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_IN(x) \ argument
8096 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_INM(x, mask) \ argument
8098 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUT(x, val) \ argument
8100 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \ argument
8121 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x) (x+0x00002044) argument
8122 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_PHYS(x) (x+0x00002044) argument
8125 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_IN(x) \ argument
8127 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_INM(x, mask) \ argument
8129 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUT(x, val) \ argument
8131 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \ argument
8143 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x) (x+0x00002048) argument
8144 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_PHYS(x) (x+0x00002048) argument
8147 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_IN(x) \ argument
8149 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_INM(x, mask) \ argument
8151 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUT(x, val) \ argument
8153 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \ argument
8165 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x) (x+0x0000204c) argument
8166 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_PHYS(x) (x+0x0000204c) argument
8169 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_IN(x) \ argument
8171 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_INM(x, mask) \ argument
8173 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUT(x, val) \ argument
8175 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val) \ argument
8208 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00002050) argument
8209 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00002050) argument
8212 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x) \ argument
8214 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask) \ argument
8216 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val) \ argument
8218 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8230 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x) (x+0x00002054) argument
8231 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x) (x+0x00002054) argument
8234 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x) \ argument
8236 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask) \ argument
8238 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val) \ argument
8240 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
8258 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x) (x+0x00002058) argument
8259 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x) (x+0x00002058) argument
8262 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x) \ argument
8264 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask) \ argument
8266 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val) \ argument
8268 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
8280 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x) (x+0x0000205c) argument
8281 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x) (x+0x0000205c) argument
8284 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x) \ argument
8286 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask) \ argument
8288 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val) \ argument
8290 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
8302 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x) (x+0x00002060) argument
8303 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x) (x+0x00002060) argument
8306 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x) \ argument
8308 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask) \ argument
8310 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val) \ argument
8312 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
8324 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x) (x+0x00002064) argument
8325 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x) (x+0x00002064) argument
8328 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x) \ argument
8330 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask) \ argument
8332 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val) \ argument
8334 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
8346 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x) (x+0x00002068) argument
8347 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x) (x+0x00002068) argument
8350 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x) \ argument
8352 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask) \ argument
8354 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val) \ argument
8356 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
8368 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x) (x+0x0000206c) argument
8369 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x) (x+0x0000206c) argument
8372 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x) \ argument
8374 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask) \ argument
8376 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val) \ argument
8378 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
8390 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x) (x+0x00002070) argument
8391 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x) (x+0x00002070) argument
8394 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x) \ argument
8396 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask) \ argument
8398 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val) \ argument
8400 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
8412 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x) (x+0x00002074) argument
8413 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x) (x+0x00002074) argument
8416 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x) \ argument
8418 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask) \ argument
8420 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val) \ argument
8422 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
8434 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x) (x+0x00002078) argument
8435 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x) (x+0x00002078) argument
8438 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x) \ argument
8440 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask) \ argument
8442 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val) \ argument
8444 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
8456 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x) (x+0x0000207c) argument
8457 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x) (x+0x0000207c) argument
8460 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x) \ argument
8462 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask) \ argument
8464 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val) \ argument
8466 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
8478 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x) (x+0x00002080) argument
8479 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x) (x+0x00002080) argument
8482 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x) \ argument
8484 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask) \ argument
8486 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val) \ argument
8488 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
8500 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x) (x+0x00002084) argument
8501 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x) (x+0x00002084) argument
8504 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x) \ argument
8506 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask) \ argument
8508 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val) \ argument
8510 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
8525 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x) (x+0x00003000) argument
8526 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x) (x+0x00003000) argument
8529 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x) \ argument
8531 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask) \ argument
8533 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val) \ argument
8535 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
8547 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x) (x+0x00003004) argument
8548 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x) (x+0x00003004) argument
8551 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x) \ argument
8553 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask) \ argument
8555 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val) \ argument
8557 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
8569 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x) (x+0x00003008) argument
8570 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x) (x+0x00003008) argument
8573 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x) \ argument
8575 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask) \ argument
8577 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val) \ argument
8579 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
8591 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x) (x+0x0000300c) argument
8592 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x) (x+0x0000300c) argument
8595 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x) \ argument
8597 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask) \ argument
8599 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val) \ argument
8601 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
8613 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x) (x+0x00003010) argument
8614 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x) (x+0x00003010) argument
8617 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x) \ argument
8619 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask) \ argument
8621 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val) \ argument
8623 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
8635 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x) (x+0x00003014) argument
8636 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x) (x+0x00003014) argument
8639 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x) \ argument
8641 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask) \ argument
8643 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val) \ argument
8645 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
8657 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x) (x+0x00003018) argument
8658 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x) (x+0x00003018) argument
8661 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x) \ argument
8663 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask) \ argument
8665 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val) \ argument
8667 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
8679 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x) (x+0x0000301c) argument
8680 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x) (x+0x0000301c) argument
8683 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x) \ argument
8685 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask) \ argument
8687 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val) \ argument
8689 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
8701 #define HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x) (x+0x00003020) argument
8702 #define HWIO_REO_R2_SW2REO1_RING_HP_PHYS(x) (x+0x00003020) argument
8705 #define HWIO_REO_R2_SW2REO1_RING_HP_IN(x) \ argument
8707 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask) \ argument
8709 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val) \ argument
8711 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val) \ argument
8723 #define HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x) (x+0x00003024) argument
8724 #define HWIO_REO_R2_SW2REO1_RING_TP_PHYS(x) (x+0x00003024) argument
8727 #define HWIO_REO_R2_SW2REO1_RING_TP_IN(x) \ argument
8729 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask) \ argument
8731 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val) \ argument
8733 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val) \ argument
8745 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x) (x+0x00003028) argument
8746 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x) (x+0x00003028) argument
8749 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x) \ argument
8751 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask) \ argument
8753 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val) \ argument
8755 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
8767 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x) (x+0x0000302c) argument
8768 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x) (x+0x0000302c) argument
8771 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x) \ argument
8773 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask) \ argument
8775 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val) \ argument
8777 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
8789 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x) (x+0x00003030) argument
8790 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x) (x+0x00003030) argument
8793 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x) \ argument
8795 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask) \ argument
8797 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val) \ argument
8799 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
8811 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x) (x+0x00003034) argument
8812 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x) (x+0x00003034) argument
8815 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x) \ argument
8817 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask) \ argument
8819 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val) \ argument
8821 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
8833 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x) (x+0x00003038) argument
8834 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x) (x+0x00003038) argument
8837 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x) \ argument
8839 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask) \ argument
8841 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val) \ argument
8843 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
8855 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x) (x+0x0000303c) argument
8856 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x) (x+0x0000303c) argument
8859 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x) \ argument
8861 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask) \ argument
8863 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val) \ argument
8865 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
8877 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x) (x+0x00003040) argument
8878 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x) (x+0x00003040) argument
8881 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x) \ argument
8883 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask) \ argument
8885 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val) \ argument
8887 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
8899 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x) (x+0x00003044) argument
8900 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x) (x+0x00003044) argument
8903 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x) \ argument
8905 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask) \ argument
8907 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val) \ argument
8909 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
8921 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x) (x+0x00003058) argument
8922 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x) (x+0x00003058) argument
8925 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x) \ argument
8927 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask) \ argument
8929 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val) \ argument
8931 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
8943 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x) (x+0x0000305c) argument
8944 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x) (x+0x0000305c) argument
8947 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x) \ argument
8949 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask) \ argument
8951 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val) \ argument
8953 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
8965 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x) (x+0x00003060) argument
8966 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x) (x+0x00003060) argument
8969 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x) \ argument
8971 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask) \ argument
8973 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val) \ argument
8975 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
8987 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x) (x+0x00003064) argument
8988 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x) (x+0x00003064) argument
8991 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x) \ argument
8993 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask) \ argument
8995 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val) \ argument
8997 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
9009 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x) (x+0x00003068) argument
9010 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x) (x+0x00003068) argument
9013 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x) \ argument
9015 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask) \ argument
9017 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val) \ argument
9019 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
9031 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x) (x+0x0000306c) argument
9032 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x) (x+0x0000306c) argument
9035 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x) \ argument
9037 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask) \ argument
9039 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val) \ argument
9041 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
9053 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x) (x+0x00003070) argument
9054 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x) (x+0x00003070) argument
9057 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x) \ argument
9059 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask) \ argument
9061 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val) \ argument
9063 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
9075 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x) (x+0x00003074) argument
9076 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x) (x+0x00003074) argument
9079 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x) \ argument
9081 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask) \ argument
9083 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val) \ argument
9085 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument