108 		rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), 0x0);  in cpt_af_flt_intr_handler()
110 		rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val & ~1ULL);  in cpt_af_flt_intr_handler()
112 		rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), grp);  in cpt_af_flt_intr_handler()
113 		rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val | 1ULL);  in cpt_af_flt_intr_handler()
123 	rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(vec), reg);  in cpt_af_flt_intr_handler()
153 	rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT, reg);  in rvu_cpt_af_rvu_intr_handler()
167 	rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT, reg);  in rvu_cpt_af_ras_intr_handler()
205 		rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i),  in cpt_10k_unregister_interrupts()
209 	rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1);  in cpt_10k_unregister_interrupts()
210 	rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1);  in cpt_10k_unregister_interrupts()
240 		rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), ~0ULL);  in cpt_unregister_interrupts()
241 	rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1);  in cpt_unregister_interrupts()
242 	rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1);  in cpt_unregister_interrupts()
291 		rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i),  in cpt_10k_register_interrupts()
303 	rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1);  in cpt_10k_register_interrupts()
310 	rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1);  in cpt_10k_register_interrupts()
353 		rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), ~0ULL);  in cpt_register_interrupts()
361 	rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1);  in cpt_register_interrupts()
368 	rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1);  in cpt_register_interrupts()
499 		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);  in rvu_mbox_handler_cpt_lf_alloc()
508 		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);  in rvu_mbox_handler_cpt_lf_alloc()
587 	rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);  in cpt_inline_ipsec_cfg_inbound()
594 		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);  in cpt_inline_ipsec_cfg_inbound()
598 		rvu_write64(rvu, blkaddr, CPT_AF_ECO, 0x1);  in cpt_inline_ipsec_cfg_inbound()
607 		rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0), val);  in cpt_inline_ipsec_cfg_inbound()
608 		rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1), val);  in cpt_inline_ipsec_cfg_inbound()
640 	rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);  in cpt_inline_ipsec_cfg_outbound()
646 		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);  in cpt_inline_ipsec_cfg_outbound()
653 		rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);  in cpt_inline_ipsec_cfg_outbound()
787 		rvu_write64(rvu, blkaddr, offset, req->val);  in rvu_mbox_handler_cpt_rd_wr_register()
920 	rvu_write64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG, req->step);  in cpt_rxc_time_cfg()
921 	rvu_write64(rvu, blkaddr, CPT_AF_RXC_DFRG, dfrg_reg);  in cpt_rxc_time_cfg()
977 	rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), ctl);  in rvu_mbox_handler_cpt_lf_reset()
978 	rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2);  in rvu_mbox_handler_cpt_lf_reset()
1077 	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_CTL), 0x0);  in cpt_lf_disable_iqueue()
1082 	rvu_write64(rvu, blkaddr,  in cpt_lf_disable_iqueue()
1199 	rvu_write64(rvu, nix_blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),  in cpt_inline_inb_lf_cmd_send()
1279 			rvu_write64(rvu, blkaddr,  in rvu_cpt_ctx_flush()
1313 		rvu_write64(rvu, BLKADDR_CPT0, CPT_AF_RXC_CFG1, reg_val);  in rvu_cpt_init()