446 		return sysfs_show_str_val(buffer, offs, dev->node_props.name);  in node_show()
454 			      dev->node_props.cpu_cores_count);  in node_show()
456 			      dev->gpu ? dev->node_props.simd_count : 0);  in node_show()
458 			      dev->node_props.mem_banks_count);  in node_show()
460 			      dev->node_props.caches_count);  in node_show()
462 			      dev->node_props.io_links_count);  in node_show()
464 			      dev->node_props.p2p_links_count);  in node_show()
466 			      dev->node_props.cpu_core_id_base);  in node_show()
468 			      dev->node_props.simd_id_base);  in node_show()
470 			      dev->node_props.max_waves_per_simd);  in node_show()
472 			      dev->node_props.lds_size_in_kb);  in node_show()
474 			      dev->node_props.gds_size_in_kb);  in node_show()
476 			      dev->node_props.num_gws);  in node_show()
478 			      dev->node_props.wave_front_size);  in node_show()
480 			      dev->gpu ? (dev->node_props.array_count *  in node_show()
483 			      dev->node_props.simd_arrays_per_engine);  in node_show()
485 			      dev->node_props.cu_per_simd_array);  in node_show()
487 			      dev->node_props.simd_per_cu);  in node_show()
489 			      dev->node_props.max_slots_scratch_cu);  in node_show()
491 			      dev->node_props.gfx_target_version);  in node_show()
493 			      dev->node_props.vendor_id);  in node_show()
495 			      dev->node_props.device_id);  in node_show()
497 			      dev->node_props.location_id);  in node_show()
499 			      dev->node_props.domain);  in node_show()
501 			      dev->node_props.drm_render_minor);  in node_show()
503 			      dev->node_props.hive_id);  in node_show()
505 			      dev->node_props.num_sdma_engines);  in node_show()
507 			      dev->node_props.num_sdma_xgmi_engines);  in node_show()
509 			      dev->node_props.num_sdma_queues_per_engine);  in node_show()
511 			      dev->node_props.num_cp_queues);  in node_show()
518 			dev->node_props.capability |=  in node_show()
521 			dev->node_props.capability |=  in node_show()
528 			dev->node_props.capability |=  in node_show()
532 			dev->node_props.max_engine_clk_fcompute);  in node_show()
539 				      dev->node_props.capability);  in node_show()
541 				      dev->node_props.debug_prop);  in node_show()
938 		if (dev->node_props.cpu_cores_count &&  in kfd_debug_print_topology()
939 				dev->node_props.simd_count) {  in kfd_debug_print_topology()
941 				dev->node_props.device_id,  in kfd_debug_print_topology()
942 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
943 		} else if (dev->node_props.cpu_cores_count)  in kfd_debug_print_topology()
945 		else if (dev->node_props.simd_count)  in kfd_debug_print_topology()
947 				dev->node_props.device_id,  in kfd_debug_print_topology()
948 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
1167 		if (dev->node_props.cpu_cores_count)  in kfd_assign_gpu()
1170 		if (!dev->gpu && (dev->node_props.simd_count > 0)) {  in kfd_assign_gpu()
1343 			if (!dev->node_props.hive_id)  in kfd_fill_iolink_non_crat_info()
1344 				dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev);  in kfd_fill_iolink_non_crat_info()
1345 			peer_dev->node_props.hive_id = dev->node_props.hive_id;  in kfd_fill_iolink_non_crat_info()
1392 			dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1);  in kfd_build_p2p_node_entry()
1464 		kdev->node_props.p2p_links_count++;  in kfd_create_indirect_link_prop()
1481 			cpu_dev->node_props.p2p_links_count++;  in kfd_create_indirect_link_prop()
1553 	peer->node_props.p2p_links_count++;  in kfd_add_peer_prop()
1785 	gpu_processor_id = dev->node_props.simd_id_base;  in kfd_fill_cache_non_crat_info()
1850 	dev->node_props.caches_count += num_of_entries;  in kfd_fill_cache_non_crat_info()
1971 		dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED;  in kfd_topology_set_dbg_firmware_support()
1976 	dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<  in kfd_topology_set_capabilities()
1980 	dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT |  in kfd_topology_set_capabilities()
1985 		dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;  in kfd_topology_set_capabilities()
1990 			dev->node_props.debug_prop |=  in kfd_topology_set_capabilities()
1994 			dev->node_props.debug_prop |=  in kfd_topology_set_capabilities()
1999 			dev->node_props.capability |=  in kfd_topology_set_capabilities()
2002 		dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |  in kfd_topology_set_capabilities()
2006 			dev->node_props.capability |=  in kfd_topology_set_capabilities()
2010 			dev->node_props.capability |=  in kfd_topology_set_capabilities()
2063 		dev->node_props.name[i] = __tolower(asic_name[i]);  in kfd_topology_add_device()
2067 	dev->node_props.name[i] = '\0';  in kfd_topology_add_device()
2069 	dev->node_props.simd_arrays_per_engine =  in kfd_topology_add_device()
2072 	dev->node_props.gfx_target_version =  in kfd_topology_add_device()
2074 	dev->node_props.vendor_id = gpu->adev->pdev->vendor;  in kfd_topology_add_device()
2075 	dev->node_props.device_id = gpu->adev->pdev->device;  in kfd_topology_add_device()
2076 	dev->node_props.capability |=  in kfd_topology_add_device()
2080 	dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);  in kfd_topology_add_device()
2082 		dev->node_props.location_id |= dev->gpu->node_id;  in kfd_topology_add_device()
2084 	dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);  in kfd_topology_add_device()
2085 	dev->node_props.max_engine_clk_fcompute =  in kfd_topology_add_device()
2087 	dev->node_props.max_engine_clk_ccompute =  in kfd_topology_add_device()
2091 		dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index;  in kfd_topology_add_device()
2093 		dev->node_props.drm_render_minor =  in kfd_topology_add_device()
2096 	dev->node_props.hive_id = gpu->kfd->hive_id;  in kfd_topology_add_device()
2097 	dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu);  in kfd_topology_add_device()
2098 	dev->node_props.num_sdma_xgmi_engines =  in kfd_topology_add_device()
2100 	dev->node_props.num_sdma_queues_per_engine =  in kfd_topology_add_device()
2103 	dev->node_props.num_gws = (dev->gpu->gws &&  in kfd_topology_add_device()
2106 	dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm);  in kfd_topology_add_device()
2115 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 <<  in kfd_topology_add_device()
2126 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<  in kfd_topology_add_device()
2142 	dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;  in kfd_topology_add_device()
2150 		dev->node_props.simd_count =  in kfd_topology_add_device()
2152 		dev->node_props.max_waves_per_simd = 10;  in kfd_topology_add_device()
2156 	dev->node_props.capability |=  in kfd_topology_add_device()
2159 	dev->node_props.capability |=  in kfd_topology_add_device()
2164 		dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?  in kfd_topology_add_device()
2168 		dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED;  in kfd_topology_add_device()
2172 		dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS;  in kfd_topology_add_device()
2218 				dev->node_props.io_links_count--;  in kfd_topology_update_io_links()
2234 				dev->node_props.p2p_links_count--;  in kfd_topology_update_io_links()