41 static phys_addr_t cps_vec_pa;  variable
100 	cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN,  in allocate_cps_vecs()
103 	if (cps_vec_pa)  in allocate_cps_vecs()
104 		core_entry_reg = CKSEG1ADDR(cps_vec_pa) &  in allocate_cps_vecs()
107 	if (!cps_vec_pa && mips_cm_is64) {  in allocate_cps_vecs()
108 		cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN,  in allocate_cps_vecs()
110 		if (cps_vec_pa)  in allocate_cps_vecs()
111 			core_entry_reg = (cps_vec_pa & CM_GCR_Cx_RESET_BASE_BEVEXCBASE) |  in allocate_cps_vecs()
115 	if (!cps_vec_pa)  in allocate_cps_vecs()
125 	cps_vec = (void *)CKSEG1ADDR_OR_64BIT(cps_vec_pa);  in setup_cps_vecs()
136 …blast_inv_dcache_range(CKSEG0ADDR_OR_64BIT(cps_vec_pa), CKSEG0ADDR_OR_64BIT(cps_vec_pa) + BEV_VEC_…  in setup_cps_vecs()
137 	bc_inv(CKSEG0ADDR_OR_64BIT(cps_vec_pa), BEV_VEC_SIZE);  in setup_cps_vecs()