dts/qcom/msm8976.dtsi

31 		#address-cells = <1>;
45 		CPU1: cpu@1 {
173 			big_cpu_sleep_0: cpu-sleep-1-0 {
182 			big_cpu_sleep_1: cpu-sleep-1-1 {
213 			#reset-cells = <1>;
257 					#clock-cells = <1>;
262 					#power-domain-cells = <1>;
379 			#qcom,smem-state-cells = <1>;
396 		qcom,remote-pid = <1>;
402 			#qcom,smem-state-cells = <1>;
425 			#qcom,smem-state-cells = <1>;
439 		#address-cells = <1>;
446 			#qcom,smem-state-cells = <1>;
449 		hexagon_smsm: hexagon@1 {
450 			reg = <1>;
467 		#address-cells = <1>;
468 		#size-cells = <1>;
501 			#address-cells = <1>;
502 			#size-cells = <1>;
505 				reg = <0x218 1>;
550 				reg = <0x220 1>;
595 				reg = <0x228 1>;
606 				bits = <1 6>;
626 				bits = <1 6>;
663 			#thermal-sensor-cells = <1>;
818 			#clock-cells = <1>;
819 			#reset-cells = <1>;
820 			#power-domain-cells = <1>;
827 				 <&mdss_dsi0_phy 1>,
829 				 <&mdss_dsi1_phy 1>,
842 			#hwlock-cells = <1>;
850 		mdss: display-subsystem@1a00000 {
861 			#interrupt-cells = <1>;
872 			#address-cells = <1>;
873 			#size-cells = <1>;
878 			mdss_mdp: display-controller@1a01000 {
905 					#address-cells = <1>;
916 					port@1 {
917 						reg = <1>;
950 			mdss_dsi0: dsi@1a94000 {
974 							 <&mdss_dsi0_phy 1>;
981 				#address-cells = <1>;
987 					#address-cells = <1>;
998 					port@1 {
999 						reg = <1>;
1026 			mdss_dsi1: dsi@1a96000 {
1050 							 <&mdss_dsi1_phy 1>;
1057 				#address-cells = <1>;
1063 					#address-cells = <1>;
1074 					port@1 {
1075 						reg = <1>;
1083 			mdss_dsi0_phy: phy@1a94a00 {
1092 				#clock-cells = <1>;
1102 			mdss_dsi1_phy: phy@1a96a00 {
1111 				#clock-cells = <1>;
1122 		adreno_gpu: gpu@1c00000 {
1193 		apps_iommu: iommu@1ee0000 {
1204 			#address-cells = <1>;
1205 			#size-cells = <1>;
1206 			#iommu-cells = <1>;
1233 		gpu_iommu: iommu@1f08000 {
1245 			#address-cells = <1>;
1246 			#size-cells = <1>;
1247 			#iommu-cells = <1>;
1269 				qcom,ctx-asid = <1>;
1331 			#dma-cells = <1>;
1341 			dmas = <&blsp1_dma 0>, <&blsp1_dma 1>;
1367 			pinctrl-1 = <&spi1_sleep>;
1368 			#address-cells = <1>;
1384 			pinctrl-1 = <&blsp1_i2c2_default>;
1385 			#address-cells = <1>;
1401 			pinctrl-1 = <&blsp1_i2c4_sleep>;
1402 			#address-cells = <1>;
1425 			#reset-cells = <1>;
1451 			#dma-cells = <1>;
1461 			dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
1477 			pinctrl-1 = <&blsp2_i2c2_sleep>;
1478 			#address-cells = <1>;
1494 			pinctrl-1 = <&blsp2_i2c4_sleep>;
1495 			#address-cells = <1>;
1513 					      <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1586 			#mbox-cells = <1>;
1592 			#address-cells = <1>;
1593 			#size-cells = <1>;
1607 				frame-number = <1>;
1650 			#address-cells = <1>;
1651 			#size-cells = <1>;
1680 			thermal-sensors = <&tsens 1>;
1890 			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;