Lines Matching +full:0 +full:x140
19 pinctrl-0 = <&pinctrl_gpio_leds>;
21 led-0 {
39 #clock-cells = <0>;
46 pinctrl-0 = <&pinctrl_pps>;
54 pinctrl-0 = <&pinctrl_spi2>;
61 reg = <0x1>;
83 pinctrl-0 = <&pinctrl_i2c2>;
88 pinctrl-0 = <&pinctrl_accel>;
90 reg = <0x19>;
101 pinctrl-0 = <&pinctrl_i2c3>;
115 pinctrl-0 = <&pinctrl_pcie0>;
130 pinctrl-0 = <&pinctrl_uart1>;
137 pinctrl-0 = <&pinctrl_uart3>;
143 pinctrl-0 = <&pinctrl_usbotg1>;
157 pinctrl-0 = <&pinctrl_hog>;
161 MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
162 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
163 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
164 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
165 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
166 MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000041 /* DIO2 */
167 MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x40000041 /* DIO2 */
173 MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
179 MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
180 MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
186 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
187 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
193 MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x41
199 MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
205 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
206 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
207 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
208 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
209 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
215 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
216 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
222 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
223 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
229 MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141
230 MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41