Lines Matching +full:stmmac +full:- +full:axi +full:- +full:config
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
14 reg-names = "m_can", "message_ram";
17 interrupt-names = "int0", "int1";
19 clock-names = "hclk", "cclk";
20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
27 reg-names = "m_can", "message_ram";
30 interrupt-names = "int0", "int1";
32 clock-names = "hclk", "cclk";
33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
41 compatible = "st,stm32mp13-adc-core";
45 clock-names = "bus", "adc";
46 interrupt-controller;
47 #interrupt-cells = <1>;
48 #address-cells = <1>;
49 #size-cells = <0>;
50 access-controllers = <&etzpc 32>;
54 compatible = "st,stm32mp13-adc";
55 #io-channel-cells = <1>;
56 #address-cells = <1>;
57 #size-cells = <0>;
59 interrupt-parent = <&adc_1>;
62 dma-names = "rx";
73 compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
75 reg-names = "stmmaceth";
76 interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
77 interrupt-names = "macirq";
78 clock-names = "stmmaceth",
79 "mac-clk-tx",
80 "mac-clk-rx",
82 "eth-ck";
89 snps,mixed-burst;
91 snps,axi-config = <&stmmac_axi_config_2>;
93 access-controllers = <&etzpc 49>;
96 stmmac_axi_config_2: stmmac-axi-config {