qcacmn: Clean up global desc pool during Umac reset

Make sure that the global dp tx desc pools are cleaned
up only once during MLO umac reset.

Change-Id: Id6e0ac6532b11ffb9ea190b6ab4d481fb486d853
C

qcacmn: Clean up global desc pool during Umac reset

Make sure that the global dp tx desc pools are cleaned
up only once during MLO umac reset.

Change-Id: Id6e0ac6532b11ffb9ea190b6ab4d481fb486d853
CRs-Fixed: 3647660

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qcacmn: Handle special tx descriptor pool cases

Fix the missing special tx descriptor pool cases

Change-Id: Ie6a7539e77b805483c32cb7bcfbc3143f9ef8034
CRs-Fixed: 3610126

qcacmn: Add TX global desc pool per arch type

As cookie format is different between LI and BE have
different global descriptor pool for Lithium and
Beryllium

Change-Id: Idd222f4009c017a1bc4bc4b1404

qcacmn: Add TX global desc pool per arch type

As cookie format is different between LI and BE have
different global descriptor pool for Lithium and
Beryllium

Change-Id: Idd222f4009c017a1bc4bc4b14043b36d927a9e27
CRs-Fixed: 3608792

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qcacmn: Handle special descriptor cases for global tx pool

Handle special descriptor cases for global tx desc pool

Change-Id: I33253b726b1b8a2e7438b3bc1dddcac43ad8fb25
CRs-Fixed: 3592887

qcacmn: Move Tx desc pool to global context level

Move Tx descriptor pool to global context level.

Change-Id: Iff13a41f3bebbaa93e559c38842a596d47f4e534
CRs-Fixed: 3534184

qcacmn: Fix dp_tx_tso_num_seg_pool_init_by_id() stub

The dp_tx_tso_num_seg_pool_init_by_id() stub implementation has an
incorrect semicolon, so remove it.

Change-Id: Ie70aafdb83116e3e3fb7bd96223b0c

qcacmn: Fix dp_tx_tso_num_seg_pool_init_by_id() stub

The dp_tx_tso_num_seg_pool_init_by_id() stub implementation has an
incorrect semicolon, so remove it.

Change-Id: Ie70aafdb83116e3e3fb7bd96223b0c770e80eb7f
CRs-Fixed: 3500205

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qcacmn: Featurization of DP_TX_DESC_POOL_OPTIMIZE

1. In lowmem profiles the number of tx_desc in 4th pool is reduced to
quarter for memory optimizations.
Added new API dp_get_updated_tx_desc which w

qcacmn: Featurization of DP_TX_DESC_POOL_OPTIMIZE

1. In lowmem profiles the number of tx_desc in 4th pool is reduced to
quarter for memory optimizations.
Added new API dp_get_updated_tx_desc which will return the desc value
from INI based on the flag DP_TX_DESC_POOL_OPTIMIZE.

2. Changes to introduce new INI to get reduced desc value for 4th tx
desc pool.

This helps optimize 0.75M per SOC in lowmem profiles.

Change-Id: I033fcaeb843019fb03bb77e0d05a3ebf60fa806a
CRs-Fixed: 3557483

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qcacmn: Fix for qdf spinlock destroyed twice or never created

Fix for qdf_spinlock_destroy being destroyed twice or never created.

Change-Id: Ib45843ecd1c859be112fb75d218aa3d01e6ccdcf
CRs-Fixed: 34

qcacmn: Fix for qdf spinlock destroyed twice or never created

Fix for qdf_spinlock_destroy being destroyed twice or never created.

Change-Id: Ib45843ecd1c859be112fb75d218aa3d01e6ccdcf
CRs-Fixed: 3471529

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qcacmn: Move prealloc DP descriptor types to QDF

Move prealloc DP descriptor types to QDF so that
the macros can be used in HIF layer.

Change-Id: I3de60876735e5aa37d80e9e698a86503b18574c1
CRs-Fixed

qcacmn: Move prealloc DP descriptor types to QDF

Move prealloc DP descriptor types to QDF so that
the macros can be used in HIF layer.

Change-Id: I3de60876735e5aa37d80e9e698a86503b18574c1
CRs-Fixed: 3502615

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qcacmn: Account for global tx desc count during pool flush

Make sure global tx desc count is decremented during
tx desc pool flush

Change-Id: I5ba21cd9a4b1dbd3dbaf55e56a5852fe7703e36c
CRs-Fixed: 35

qcacmn: Account for global tx desc count during pool flush

Make sure global tx desc count is decremented during
tx desc pool flush

Change-Id: I5ba21cd9a4b1dbd3dbaf55e56a5852fe7703e36c
CRs-Fixed: 3501063

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qcacmn: Add TX descriptor changes for WCN6450

WCN6450 is a chip based on Rhine architecture. Unlike LI/BE targets,
chipsets based on Rhine (RH) do not have host facing UMAC HW blocks.
Their correspo

qcacmn: Add TX descriptor changes for WCN6450

WCN6450 is a chip based on Rhine architecture. Unlike LI/BE targets,
chipsets based on Rhine (RH) do not have host facing UMAC HW blocks.
Their corresponding SRNG interfaces are also removed. The functionality
of these UMAC HW blocks is replaced with a software implementation in
the firmware. Communication between the driver and firmware will happen
over copy engine (CE).

Although there are no host facing UMAC HW blocks, the CE hardware used
in WCN6450 expects the host driver to use the TX descriptor (HW) format
of LI targets during TX packet enqueue. Therefore it is required to
create a new pool of TX descriptors (HW) pool for WCN6450 that is used
during TX.

The logic to create/free/init/deinit these descriptors is specific
to WCN6450/Rhine, therefore it is implemented in architecture specific
Rhine code.

Introduce new APIs in struct dp_arch_ops {} to allocate and free
arch specific TX descriptors. These ops will be no-op for LI/BE
architectures.

Also for Rhine targets, allocate/free other TX descriptors like TX EXT &
TSO descriptors as part of the arch APIs.

Change-Id: I452ac69143395881ab8580355a0f75571dc3e929
CRs-Fixed: 3381711

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qcacmn: Refactor TX descriptor alloc/free/init/deinit logic

Currently, memory for all kinds of TX descriptors (TX EXT,
TSO etc) are allocated/initialised at once during the driver
init and freed/dei

qcacmn: Refactor TX descriptor alloc/free/init/deinit logic

Currently, memory for all kinds of TX descriptors (TX EXT,
TSO etc) are allocated/initialised at once during the driver
init and freed/deinitialised during the driver deinit.
This logic is not suitable for WCN6450.

In the case of WCN6450, the size of the TX descriptor pool is
not known to the driver during load time; Firmware provides
the size of the descriptor pool via HTT_T2H_MSG_TYPE_FLOW_POOL_MAP
message post VDEV creation.

In order to add the support of WCN6450, it is required to
refactor the TX descriptor alloc/free/init/deinit logic.

Changes will not have any impact on the other supported hardware.

Change-Id: Iaa66fd5e118f0486bd618394fad070502bac34a0
CRs-Fixed: 3381705

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qcacmn: Fix dp/wifi3.0/dp_tx_desc.* documentation

The kernel-doc script identified a large number of documentation
issues in dp/wifi3.0/dp_tx_desc.[ch], so fix those issues. In
addition, there are a

qcacmn: Fix dp/wifi3.0/dp_tx_desc.* documentation

The kernel-doc script identified a large number of documentation
issues in dp/wifi3.0/dp_tx_desc.[ch], so fix those issues. In
addition, there are a number of instances where public functions have
their implementation documented instead of having their interface
documented, so move that documentation.

Change-Id: I349f0e9d9336ae632fb31e88ddc34ecacc4a1f68
CRs-Fixed: 3373161

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qcacmn: Make dp_tx_desc_clean_up() static

The function dp_tx_desc_clean_up() is currently a public function.
However this function is only called from within the file where it is
defined, so make it

qcacmn: Make dp_tx_desc_clean_up() static

The function dp_tx_desc_clean_up() is currently a public function.
However this function is only called from within the file where it is
defined, so make it static.

Change-Id: I23d55584453218776703101e9a5abaf9805efb03
CRs-Fixed: 3371794

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qcacmn: Cleanup the tx desc cleanup logic

Cleanup the tx desc clean up logic used in
direct switch and umac reset cases.
The excess code being removed tries to
get the next descriptor address in bou

qcacmn: Cleanup the tx desc cleanup logic

Cleanup the tx desc clean up logic used in
direct switch and umac reset cases.
The excess code being removed tries to
get the next descriptor address in boundary
conditions is not useful, as the descriptor
extracted this way will be overwritten
immediately in the beginning of next iteration
of the loop.

Change-Id: Ibcd873719929b94147152ff48205774d3ed4f452
CRs-Fixed: 3371831

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qcacmn: dp: Fix misspellings

Fix misspellings in dp/...

Change-Id: I6ef7a19ee03104ae38a8a77e229b90aa80329592
CRs-Fixed: 3304682

qcacmn: Handle Umac post reset at host

Handle Umac post reset and post reset complete
events from firmware.

Change-Id: I76ac1b96f01f026535d31edcbd245b3643ecf6ee
CRs-Fixed: 3267222

qcacmn: Support none 4k page size kernel

DP uses multi page allocation for tx/rx descriptor.
ID and offset mask of decriptor is based on 4096 which
couples with Kernel's MMU PAGE_SIZE. This cause tr

qcacmn: Support none 4k page size kernel

DP uses multi page allocation for tx/rx descriptor.
ID and offset mask of decriptor is based on 4096 which
couples with Kernel's MMU PAGE_SIZE. This cause trouble
when deploy driver on none-4K page size kernel.
Set qdf_dp_blockmem_size to 4096 so that DP won't
depend on kernel page size.

Change-Id: I17f5c10b394e8709e6b4b153f3dd094cf792787f
CRs-Fixed: 3235246

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qcacmn: Add provision to set desc to higher value

Add support to change the tx_desc value to 65536. Some changes
to make the function argument as u32 type us made

Change-Id: I7cbde1b7ed4ab4e278c25c

qcacmn: Add provision to set desc to higher value

Add support to change the tx_desc value to 65536. Some changes
to make the function argument as u32 type us made

Change-Id: I7cbde1b7ed4ab4e278c25c1ecfa94b7f673197f2
CRs-Fixed: 3130833

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qcacmn: Add support for HW cookie conversion

Support HW cookie conversion for BE platform.

Change-Id: I39058fbf256266557f5e734ba376db4db0731b24
CRs-Fixed: 2929533

qcacmn: Fix loop index for freeing desc memory

Fix the index used for looping over descriptors
to free the memory that was already allocated, in the
event of an allocation failure.

Change-Id: I791c

qcacmn: Fix loop index for freeing desc memory

Fix the index used for looping over descriptors
to free the memory that was already allocated, in the
event of an allocation failure.

Change-Id: I791cdf0b040664a5d39bb52f416d7aab7f3b6bf4

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qcacmn: support multiple pages prealloc for descriptor

Support multiple pages prealloc for DP descriptor

Change-Id: I66d4cef3acf69acf4b6fc8e5a6d01c3d67921dca
CRs-Fixed: 2751338

qcacmn: Datapath init-deinit changes

Do a logical split of dp_soc_attach and
dp_pdev_attach into Allocation and initialization
and dp_soc_detach and dp_pdev_detach into
de-initialization and free ro

qcacmn: Datapath init-deinit changes

Do a logical split of dp_soc_attach and
dp_pdev_attach into Allocation and initialization
and dp_soc_detach and dp_pdev_detach into
de-initialization and free routines

Change-Id: I23bdca0ca86db42a4d0b2554cd60d99bb207a647

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qcacmn: Add debug log in dp_tx_delete_flow_pool

Add debug log in dp_tx_delete_flow_pool() to know if
all available tx descriptors have been released to the
pool or not

Change-Id: Id0684effd5c5c0b53

qcacmn: Add debug log in dp_tx_delete_flow_pool

Add debug log in dp_tx_delete_flow_pool() to know if
all available tx descriptors have been released to the
pool or not

Change-Id: Id0684effd5c5c0b531bb2d4b3f08d929aaa85b5c
CRs-Fixed: 2463632

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qcacmn: Allocate multi page memory for dp_rx_desc_pool_alloc

Allocate memory in multiple smaller chunks for dp_rx_desc_pool_alloc,
and link the pages instead of allocating one big contiguous memory

qcacmn: Allocate multi page memory for dp_rx_desc_pool_alloc

Allocate memory in multiple smaller chunks for dp_rx_desc_pool_alloc,
and link the pages instead of allocating one big contiguous memory to
avoid memory allocation failures.

Change-Id: Id81de10727555c4ca78963a6f01ed3b992ce9924
CRs-Fixed: 2443999

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