1 /* 2 * Copyright (c) 2013-2016 The Linux Foundation. All rights reserved. 3 * 4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc. 5 * 6 * 7 * Permission to use, copy, modify, and/or distribute this software for 8 * any purpose with or without fee is hereby granted, provided that the 9 * above copyright notice and this permission notice appear in all 10 * copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 19 * PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /* 23 * This file was originally distributed by Qualcomm Atheros, Inc. 24 * under proprietary terms before Copyright ownership was assigned 25 * to the Linux Foundation. 26 */ 27 28 #ifndef WMA_H 29 #define WMA_H 30 31 #include "a_types.h" 32 #include "qdf_types.h" 33 #include "osapi_linux.h" 34 #include "htc_packet.h" 35 #include "i_qdf_event.h" 36 #include "wmi_services.h" 37 #include "wmi_unified.h" 38 #include "wmi_version.h" 39 #include "qdf_types.h" 40 #include "cfg_api.h" 41 #include "qdf_status.h" 42 #include "cds_sched.h" 43 #include "sir_mac_prot_def.h" 44 #include "wma_types.h" 45 #include <linux/workqueue.h> 46 #include "utils_api.h" 47 #include "lim_types.h" 48 #include "wmi_unified_api.h" 49 #include "cdp_txrx_cmn.h" 50 #include "dbglog.h" 51 #include "cds_ieee80211_common.h" 52 /* Platform specific configuration for max. no. of fragments */ 53 #define QCA_OL_11AC_TX_MAX_FRAGS 2 54 55 /* Private */ 56 57 #define WMA_READY_EVENTID_TIMEOUT 6000 58 #define WMA_SERVICE_READY_EXT_TIMEOUT 6000 59 #define WMA_TGT_SUSPEND_COMPLETE_TIMEOUT 6000 60 #define WMA_WAKE_LOCK_TIMEOUT 1000 61 #define WMA_RESUME_TIMEOUT 25000 62 #define MAX_MEM_CHUNKS 32 63 64 #define WMA_CRASH_INJECT_TIMEOUT 5000 65 66 /* MAC ID to PDEV ID mapping is as given below 67 * MAC_ID PDEV_ID 68 * 0 1 69 * 1 2 70 * SOC Level WMI_PDEV_ID_SOC 71 */ 72 #define WMA_MAC_TO_PDEV_MAP(x) ((x) + (1)) 73 #define WMA_PDEV_TO_MAC_MAP(x) ((x) - (1)) 74 75 /* In prima 12 HW stations are supported including BCAST STA(staId 0) 76 * and SELF STA(staId 1) so total ASSOC stations which can connect to Prima 77 * SoftAP = 12 - 1(Self STa) - 1(Bcast Sta) = 10 Stations. 78 */ 79 80 #ifdef WLAN_SOFTAP_VSTA_FEATURE 81 #define WMA_MAX_SUPPORTED_STAS 38 82 #else 83 #define WMA_MAX_SUPPORTED_STAS 12 84 #endif 85 #define WMA_MAX_SUPPORTED_BSS 5 86 87 #define FRAGMENT_SIZE 3072 88 89 #define WMA_INVALID_VDEV_ID 0xFF 90 #define MAX_MEM_CHUNKS 32 91 #define WMA_MAX_VDEV_SIZE 20 92 #define WMA_VDEV_TBL_ENTRY_ADD 1 93 #define WMA_VDEV_TBL_ENTRY_DEL 0 94 95 /* 11A/G channel boundary */ 96 #define WMA_11A_CHANNEL_BEGIN 34 97 #define WMA_11A_CHANNEL_END 165 98 #define WMA_11G_CHANNEL_BEGIN 1 99 #define WMA_11G_CHANNEL_END 14 100 101 #define WMA_11P_CHANNEL_BEGIN (170) 102 #define WMA_11P_CHANNEL_END (184) 103 104 #define WMA_LOGD(args ...) \ 105 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_DEBUG, ## args) 106 #define WMA_LOGI(args ...) \ 107 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_INFO, ## args) 108 #define WMA_LOGW(args ...) \ 109 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_WARN, ## args) 110 #define WMA_LOGE(args ...) \ 111 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_ERROR, ## args) 112 #define WMA_LOGP(args ...) \ 113 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args) 114 115 #define WMA_DEBUG_ALWAYS 116 117 #ifdef WMA_DEBUG_ALWAYS 118 #define WMA_LOGA(args ...) \ 119 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args) 120 #else 121 #define WMA_LOGA(args ...) 122 #endif 123 124 #define ALIGNED_WORD_SIZE 4 125 #define WLAN_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF 126 #define WMA_WILDCARD_PDEV_ID 0x0 127 128 /* Prefix used by scan req ids generated on the host */ 129 #define WMA_HOST_SCAN_REQID_PREFIX 0xA000 130 /* Prefix used by roam scan req ids generated on the host */ 131 #define WMA_HOST_ROAM_SCAN_REQID_PREFIX 0xA800 132 /* Prefix used by scan requestor id on host */ 133 #define WMA_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 134 135 #define WMA_HW_DEF_SCAN_MAX_DURATION 30000 /* 30 secs */ 136 137 /* Max offchannel duration */ 138 #define WMA_BURST_SCAN_MAX_NUM_OFFCHANNELS (3) 139 #define WMA_SCAN_NPROBES_DEFAULT (2) 140 #define WMA_SCAN_IDLE_TIME_DEFAULT (25) 141 #define WMA_P2P_SCAN_MAX_BURST_DURATION (180) 142 #define WMA_CTS_DURATION_MS_MAX (32) 143 #define WMA_GO_MIN_ACTIVE_SCAN_BURST_DURATION (40) 144 #define WMA_GO_MAX_ACTIVE_SCAN_BURST_DURATION (120) 145 #define WMA_DWELL_TIME_PASSIVE_DEFAULT (110) 146 #define WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE (11) 147 #define WMA_3PORT_CONC_SCAN_MAX_BURST_DURATION (25) 148 149 #define WMA_SEC_TO_USEC (1000000) 150 151 #define BEACON_TX_BUFFER_SIZE (512) 152 153 /* WMA_ETHER_TYPE_OFFSET = sa(6) + da(6) */ 154 #define WMA_ETHER_TYPE_OFFSET (6 + 6) 155 /* WMA_ICMP_V6_HEADER_OFFSET = sa(6) + da(6) + eth_type(2) + icmp_v6_hdr(6)*/ 156 #define WMA_ICMP_V6_HEADER_OFFSET (6 + 6 + 2 + 6) 157 /* WMA_ICMP_V6_TYPE_OFFSET = sa(6) + da(6) + eth_type(2) + 40 */ 158 #define WMA_ICMP_V6_TYPE_OFFSET (6 + 6 + 2 + 40) 159 /* WMA_IPV4_PROTOCOL = sa(6) + da(6) + eth_type(2) + 9 */ 160 #define WMA_IPV4_PROTOCOL (6 + 6 + 2 + 9) 161 #define WMA_ICMP_V6_HEADER_TYPE (0x3A) 162 #define WMA_ICMP_V6_RA_TYPE (0x86) 163 #define WMA_ICMP_V6_NS_TYPE (0x87) 164 #define WMA_ICMP_V6_NA_TYPE (0x88) 165 #define WMA_BCAST_MAC_ADDR (0xFF) 166 #define WMA_MCAST_IPV4_MAC_ADDR (0x01) 167 #define WMA_MCAST_IPV6_MAC_ADDR (0x33) 168 #define WMA_ICMP_PROTOCOL (0x01) 169 170 #define WMA_IS_EAPOL_GET_MIN_LEN 14 171 #define WMA_EAPOL_SUBTYPE_GET_MIN_LEN 21 172 #define WMA_EAPOL_INFO_GET_MIN_LEN 23 173 #define WMA_IS_DHCP_GET_MIN_LEN 38 174 #define WMA_DHCP_SUBTYPE_GET_MIN_LEN 0x11D 175 #define WMA_DHCP_INFO_GET_MIN_LEN 50 176 #define WMA_IS_ARP_GET_MIN_LEN 14 177 #define WMA_ARP_SUBTYPE_GET_MIN_LEN 22 178 #define WMA_IPV4_PROTO_GET_MIN_LEN 24 179 #define WMA_IPV4_PKT_INFO_GET_MIN_LEN 42 180 #define WMA_ICMP_SUBTYPE_GET_MIN_LEN 35 181 #define WMA_IPV6_PROTO_GET_MIN_LEN 21 182 #define WMA_IPV6_PKT_INFO_GET_MIN_LEN 62 183 #define WMA_ICMPV6_SUBTYPE_GET_MIN_LEN 55 184 /** 185 * ds_mode: distribution system mode 186 * @IEEE80211_NO_DS: NO DS at either side 187 * @IEEE80211_TO_DS: DS at receiver side 188 * @IEEE80211_FROM_DS: DS at sender side 189 * @IEEE80211_DS_TO_DS: DS at both sender and revceiver side 190 */ 191 enum ds_mode { 192 IEEE80211_NO_DS, 193 IEEE80211_TO_DS, 194 IEEE80211_FROM_DS, 195 IEEE80211_DS_TO_DS 196 }; 197 198 /* Roaming default values 199 * All time and period values are in milliseconds. 200 * All rssi values are in dB except for WMA_NOISE_FLOOR_DBM_DEFAULT. 201 */ 202 203 #define WMA_ROAM_SCAN_CHANNEL_SWITCH_TIME (4) 204 #define WMA_NOISE_FLOOR_DBM_DEFAULT (-96) 205 #define WMA_ROAM_RSSI_DIFF_DEFAULT (5) 206 #define WMA_ROAM_DWELL_TIME_ACTIVE_DEFAULT (100) 207 #define WMA_ROAM_DWELL_TIME_PASSIVE_DEFAULT (110) 208 #define WMA_ROAM_MIN_REST_TIME_DEFAULT (50) 209 #define WMA_ROAM_MAX_REST_TIME_DEFAULT (500) 210 #define WMA_ROAM_LOW_RSSI_TRIGGER_DEFAULT (20) 211 #define WMA_ROAM_LOW_RSSI_TRIGGER_VERYLOW (10) 212 #define WMA_ROAM_BEACON_WEIGHT_DEFAULT (14) 213 #define WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT (120000) 214 #define WMA_ROAM_OPP_SCAN_AGING_PERIOD_DEFAULT (WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT * 5) 215 #define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT (10) 216 #define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT (10) 217 #define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT_P2P (15) 218 #define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT_P2P (45) 219 220 #define WMA_INVALID_KEY_IDX 0xff 221 #define WMA_DFS_RADAR_FOUND 1 222 223 #define WMA_MAX_RF_CHAINS(x) ((1 << x) - 1) 224 #define WMA_MIN_RF_CHAINS (1) 225 226 #ifdef FEATURE_WLAN_EXTSCAN 227 #define WMA_MAX_EXTSCAN_MSG_SIZE 1536 228 #define WMA_EXTSCAN_REST_TIME 100 229 #define WMA_EXTSCAN_MAX_SCAN_TIME 50000 230 #define WMA_EXTSCAN_BURST_DURATION 150 231 #endif 232 233 #define WMA_BCN_BUF_MAX_SIZE 2500 234 #define WMA_NOA_IE_SIZE(num_desc) (2 + (13 * (num_desc))) 235 #define WMA_MAX_NOA_DESCRIPTORS 4 236 237 #define WMA_TIM_SUPPORTED_PVB_LENGTH ((HAL_NUM_STA / 8) + 1) 238 239 #define WMA_WOW_PTRN_MASK_VALID 0xFF 240 #define WMA_NUM_BITS_IN_BYTE 8 241 242 #define WMA_AP_WOW_DEFAULT_PTRN_MAX 4 243 #define WMA_STA_WOW_DEFAULT_PTRN_MAX 5 244 245 #define WMA_BSS_STATUS_STARTED 0x1 246 #define WMA_BSS_STATUS_STOPPED 0x2 247 248 #define WMA_TARGET_REQ_TYPE_VDEV_START 0x1 249 #define WMA_TARGET_REQ_TYPE_VDEV_STOP 0x2 250 #define WMA_TARGET_REQ_TYPE_VDEV_DEL 0x3 251 252 #define WMA_PEER_ASSOC_CNF_START 0x01 253 #define WMA_PEER_ASSOC_TIMEOUT (6000) /* 6 seconds */ 254 255 #define WMA_DELETE_STA_RSP_START 0x02 256 #define WMA_DELETE_STA_TIMEOUT (6000) /* 6 seconds */ 257 258 #define WMA_DEL_P2P_SELF_STA_RSP_START 0x03 259 260 #define WMA_VDEV_START_REQUEST_TIMEOUT (6000) /* 6 seconds */ 261 #define WMA_VDEV_STOP_REQUEST_TIMEOUT (6000) /* 6 seconds */ 262 263 #define WMA_TGT_INVALID_SNR 0x127 264 265 #define WMA_TX_Q_RECHECK_TIMER_WAIT 2 /* 2 ms */ 266 #define WMA_TX_Q_RECHECK_TIMER_MAX_WAIT 20 /* 20 ms */ 267 #define WMA_MAX_NUM_ARGS 8 268 269 #define WMA_SMPS_MASK_LOWER_16BITS 0xFF 270 #define WMA_SMPS_MASK_UPPER_3BITS 0x7 271 #define WMA_SMPS_PARAM_VALUE_S 29 272 273 #define WMA_MAX_SCAN_ID 0x00FF 274 275 /* 276 * Setting the Tx Comp Timeout to 1 secs. 277 * TODO: Need to Revist the Timing 278 */ 279 #define WMA_TX_FRAME_COMPLETE_TIMEOUT 1000 280 #define WMA_TX_FRAME_BUFFER_NO_FREE 0 281 #define WMA_TX_FRAME_BUFFER_FREE 1 282 283 /* Default InActivity Time is 200 ms */ 284 #define POWERSAVE_DEFAULT_INACTIVITY_TIME 200 285 286 /* Default Listen Interval */ 287 #define POWERSAVE_DEFAULT_LISTEN_INTERVAL 1 288 289 /* 290 * TODO: Add WMI_CMD_ID_MAX as part of WMI_CMD_ID 291 * instead of assigning it to the last valid wmi 292 * cmd+1 to avoid updating this when a command is 293 * added/deleted. 294 */ 295 #define WMI_CMDID_MAX (WMI_TXBF_CMDID + 1) 296 297 #define WMA_NLO_FREQ_THRESH 1000 /* in MHz */ 298 #define WMA_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */ 299 #define WMA_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */ 300 301 /* Default rssi threshold defined in CFG80211 */ 302 #define WMA_RSSI_THOLD_DEFAULT -300 303 304 #ifdef FEATURE_WLAN_SCAN_PNO 305 #define WMA_PNO_MATCH_WAKE_LOCK_TIMEOUT (5 * 1000) /* in msec */ 306 #define WMA_PNO_SCAN_COMPLETE_WAKE_LOCK_TIMEOUT (2 * 1000) /* in msec */ 307 #endif 308 #define WMA_AUTH_REQ_RECV_WAKE_LOCK_TIMEOUT (5 * 1000) /* in msec */ 309 #define WMA_ASSOC_REQ_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */ 310 #define WMA_DEAUTH_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */ 311 #define WMA_DISASSOC_RECV_WAKE_LOCK_DURATION (5 * 1000) /* in msec */ 312 #ifdef FEATURE_WLAN_AUTO_SHUTDOWN 313 #define WMA_AUTO_SHUTDOWN_WAKE_LOCK_DURATION (5 * 1000) /* in msec */ 314 #endif 315 #define WMA_BMISS_EVENT_WAKE_LOCK_DURATION (4 * 1000) /* in msec */ 316 #define WMA_FW_RSP_EVENT_WAKE_LOCK_DURATION (3 * 1000) /* in msec */ 317 318 #define WMA_TXMIC_LEN 8 319 #define WMA_RXMIC_LEN 8 320 321 /* 322 * Length = (2 octets for Index and CTWin/Opp PS) and 323 * (13 octets for each NOA Descriptors) 324 */ 325 326 #define WMA_P2P_NOA_IE_OPP_PS_SET (0x80) 327 #define WMA_P2P_NOA_IE_CTWIN_MASK (0x7F) 328 329 #define WMA_P2P_IE_ID 0xdd 330 #define WMA_P2P_WFA_OUI { 0x50, 0x6f, 0x9a } 331 #define WMA_P2P_WFA_VER 0x09 /* ver 1.0 */ 332 #define WMA_WSC_OUI { 0x00, 0x50, 0xF2 } /* Microsoft WSC OUI byte */ 333 334 /* P2P Sub element defintions (according to table 5 of Wifi's P2P spec) */ 335 #define WMA_P2P_SUB_ELEMENT_STATUS 0 336 #define WMA_P2P_SUB_ELEMENT_MINOR_REASON 1 337 #define WMA_P2P_SUB_ELEMENT_CAPABILITY 2 338 #define WMA_P2P_SUB_ELEMENT_DEVICE_ID 3 339 #define WMA_P2P_SUB_ELEMENT_GO_INTENT 4 340 #define WMA_P2P_SUB_ELEMENT_CONFIGURATION_TIMEOUT 5 341 #define WMA_P2P_SUB_ELEMENT_LISTEN_CHANNEL 6 342 #define WMA_P2P_SUB_ELEMENT_GROUP_BSSID 7 343 #define WMA_P2P_SUB_ELEMENT_EXTENDED_LISTEN_TIMING 8 344 #define WMA_P2P_SUB_ELEMENT_INTENDED_INTERFACE_ADDR 9 345 #define WMA_P2P_SUB_ELEMENT_MANAGEABILITY 10 346 #define WMA_P2P_SUB_ELEMENT_CHANNEL_LIST 11 347 #define WMA_P2P_SUB_ELEMENT_NOA 12 348 #define WMA_P2P_SUB_ELEMENT_DEVICE_INFO 13 349 #define WMA_P2P_SUB_ELEMENT_GROUP_INFO 14 350 #define WMA_P2P_SUB_ELEMENT_GROUP_ID 15 351 #define WMA_P2P_SUB_ELEMENT_INTERFACE 16 352 #define WMA_P2P_SUB_ELEMENT_OP_CHANNEL 17 353 #define WMA_P2P_SUB_ELEMENT_INVITATION_FLAGS 18 354 #define WMA_P2P_SUB_ELEMENT_VENDOR 221 355 356 /* Macros for handling unaligned memory accesses */ 357 #define P2PIE_PUT_LE16(a, val) \ 358 do { \ 359 (a)[1] = ((u16) (val)) >> 8; \ 360 (a)[0] = ((u16) (val)) & 0xff; \ 361 } while (0) 362 363 #define P2PIE_PUT_LE32(a, val) \ 364 do { \ 365 (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ 366 (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ 367 (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ 368 (a)[0] = (u8) (((u32) (val)) & 0xff); \ 369 } while (0) 370 371 372 #define WMA_DEFAULT_MAX_PSPOLL_BEFORE_WAKE 1 373 374 #define WMA_DEFAULT_QPOWER_MAX_PSPOLL_BEFORE_WAKE 1 375 #define WMA_DEFAULT_QPOWER_TX_WAKE_THRESHOLD 2 376 #define WMA_DEFAULT_SIFS_BURST_DURATION 8160 377 378 #define WMA_VHT_PPS_PAID_MATCH 1 379 #define WMA_VHT_PPS_GID_MATCH 2 380 #define WMA_VHT_PPS_DELIM_CRC_FAIL 3 381 382 #define WMA_DFS_MAX_20M_SUB_CH 8 383 #define WMA_80MHZ_START_CENTER_CH_DIFF 6 384 #define WMA_160MHZ_START_CENTER_CH_DIFF 14 385 #define WMA_NEXT_20MHZ_START_CH_DIFF 4 386 387 #define WMA_DEFAULT_HW_MODE_INDEX 0xFFFF 388 #define TWO_THIRD (2/3) 389 390 /** 391 * WMA hardware mode list bit-mask definitions. 392 * Bits 4:0, 31:29 are unused. 393 * 394 * The below definitions are added corresponding to WMI DBS HW mode 395 * list to make it independent of firmware changes for WMI definitions. 396 * Currently these definitions have dependency with BIT positions of 397 * the existing WMI macros. Thus, if the BIT positions are changed for 398 * WMI macros, then these macros' BIT definitions are also need to be 399 * changed. 400 */ 401 #define WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS (28) 402 #define WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS (24) 403 #define WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS (20) 404 #define WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS (16) 405 #define WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS (12) 406 #define WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS (8) 407 #define WMA_HW_MODE_DBS_MODE_BITPOS (7) 408 #define WMA_HW_MODE_AGILE_DFS_MODE_BITPOS (6) 409 #define WMA_HW_MODE_SBS_MODE_BITPOS (5) 410 411 #define WMA_HW_MODE_MAC0_TX_STREAMS_MASK \ 412 (0xf << WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS) 413 #define WMA_HW_MODE_MAC0_RX_STREAMS_MASK \ 414 (0xf << WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS) 415 #define WMA_HW_MODE_MAC1_TX_STREAMS_MASK \ 416 (0xf << WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS) 417 #define WMA_HW_MODE_MAC1_RX_STREAMS_MASK \ 418 (0xf << WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS) 419 #define WMA_HW_MODE_MAC0_BANDWIDTH_MASK \ 420 (0xf << WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS) 421 #define WMA_HW_MODE_MAC1_BANDWIDTH_MASK \ 422 (0xf << WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS) 423 #define WMA_HW_MODE_DBS_MODE_MASK \ 424 (0x1 << WMA_HW_MODE_DBS_MODE_BITPOS) 425 #define WMA_HW_MODE_AGILE_DFS_MODE_MASK \ 426 (0x1 << WMA_HW_MODE_AGILE_DFS_MODE_BITPOS) 427 #define WMA_HW_MODE_SBS_MODE_MASK \ 428 (0x1 << WMA_HW_MODE_SBS_MODE_BITPOS) 429 430 #define WMA_HW_MODE_MAC0_TX_STREAMS_SET(hw_mode, value) \ 431 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS, 4, value) 432 #define WMA_HW_MODE_MAC0_RX_STREAMS_SET(hw_mode, value) \ 433 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS, 4, value) 434 #define WMA_HW_MODE_MAC1_TX_STREAMS_SET(hw_mode, value) \ 435 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS, 4, value) 436 #define WMA_HW_MODE_MAC1_RX_STREAMS_SET(hw_mode, value) \ 437 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS, 4, value) 438 #define WMA_HW_MODE_MAC0_BANDWIDTH_SET(hw_mode, value) \ 439 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS, 4, value) 440 #define WMA_HW_MODE_MAC1_BANDWIDTH_SET(hw_mode, value) \ 441 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS, 4, value) 442 #define WMA_HW_MODE_DBS_MODE_SET(hw_mode, value) \ 443 WMI_SET_BITS(hw_mode, WMA_HW_MODE_DBS_MODE_BITPOS, 1, value) 444 #define WMA_HW_MODE_AGILE_DFS_SET(hw_mode, value) \ 445 WMI_SET_BITS(hw_mode, WMA_HW_MODE_AGILE_DFS_MODE_BITPOS, 1, value) 446 #define WMA_HW_MODE_SBS_MODE_SET(hw_mode, value) \ 447 WMI_SET_BITS(hw_mode, WMA_HW_MODE_SBS_MODE_BITPOS, 1, value) 448 449 #define WMA_HW_MODE_MAC0_TX_STREAMS_GET(hw_mode) \ 450 ((hw_mode & WMA_HW_MODE_MAC0_TX_STREAMS_MASK) >> \ 451 WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS) 452 #define WMA_HW_MODE_MAC0_RX_STREAMS_GET(hw_mode) \ 453 ((hw_mode & WMA_HW_MODE_MAC0_RX_STREAMS_MASK) >> \ 454 WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS) 455 #define WMA_HW_MODE_MAC1_TX_STREAMS_GET(hw_mode) \ 456 ((hw_mode & WMA_HW_MODE_MAC1_TX_STREAMS_MASK) >> \ 457 WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS) 458 #define WMA_HW_MODE_MAC1_RX_STREAMS_GET(hw_mode) \ 459 ((hw_mode & WMA_HW_MODE_MAC1_RX_STREAMS_MASK) >> \ 460 WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS) 461 #define WMA_HW_MODE_MAC0_BANDWIDTH_GET(hw_mode) \ 462 ((hw_mode & WMA_HW_MODE_MAC0_BANDWIDTH_MASK) >> \ 463 WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS) 464 #define WMA_HW_MODE_MAC1_BANDWIDTH_GET(hw_mode) \ 465 ((hw_mode & WMA_HW_MODE_MAC1_BANDWIDTH_MASK) >> \ 466 WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS) 467 #define WMA_HW_MODE_DBS_MODE_GET(hw_mode) \ 468 ((hw_mode & WMA_HW_MODE_DBS_MODE_MASK) >> \ 469 WMA_HW_MODE_DBS_MODE_BITPOS) 470 #define WMA_HW_MODE_AGILE_DFS_GET(hw_mode) \ 471 ((hw_mode & WMA_HW_MODE_AGILE_DFS_MODE_MASK) >> \ 472 WMA_HW_MODE_AGILE_DFS_MODE_BITPOS) 473 #define WMA_HW_MODE_SBS_MODE_GET(hw_mode) \ 474 ((hw_mode & WMA_HW_MODE_SBS_MODE_MASK) >> \ 475 WMA_HW_MODE_SBS_MODE_BITPOS) 476 477 478 #define WMA_SCAN_END_EVENT (WMI_SCAN_EVENT_COMPLETED | \ 479 WMI_SCAN_EVENT_DEQUEUED | \ 480 WMI_SCAN_EVENT_START_FAILED) 481 482 /** 483 * struct probeTime_dwellTime - probe time, dwell time map 484 * @dwell_time: dwell time 485 * @probe_time: repeat probe time 486 */ 487 typedef struct probeTime_dwellTime { 488 uint8_t dwell_time; 489 uint8_t probe_time; 490 } t_probeTime_dwellTime; 491 492 static const t_probeTime_dwellTime 493 probe_time_dwell_time_map[WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE] = { 494 {28, 11}, /* 0 SSID */ 495 {28, 20}, /* 1 SSID */ 496 {28, 20}, /* 2 SSID */ 497 {28, 20}, /* 3 SSID */ 498 {28, 20}, /* 4 SSID */ 499 {28, 20}, /* 5 SSID */ 500 {28, 20}, /* 6 SSID */ 501 {28, 11}, /* 7 SSID */ 502 {28, 11}, /* 8 SSID */ 503 {28, 11}, /* 9 SSID */ 504 {28, 8} /* 10 SSID */ 505 }; 506 507 typedef void (*txFailIndCallback)(uint8_t *peer_mac, uint8_t seqNo); 508 typedef void (*encrypt_decrypt_cb)(struct sir_encrypt_decrypt_rsp_params 509 *encrypt_decrypt_rsp_params); 510 511 512 typedef void (*tp_wma_packetdump_cb)(qdf_nbuf_t netbuf, 513 uint8_t status, uint8_t vdev_id, uint8_t type); 514 515 /** 516 * enum t_wma_drv_type - wma driver type 517 * @WMA_DRIVER_TYPE_PRODUCTION: production driver type 518 * @WMA_DRIVER_TYPE_MFG: manufacture driver type 519 * @WMA_DRIVER_TYPE_INVALID: invalid driver type 520 */ 521 typedef enum { 522 WMA_DRIVER_TYPE_PRODUCTION = 0, 523 WMA_DRIVER_TYPE_MFG = 1, 524 WMA_DRIVER_TYPE_INVALID = 0x7FFFFFFF 525 } t_wma_drv_type; 526 527 #ifdef FEATURE_WLAN_TDLS 528 /** 529 * enum t_wma_tdls_mode - TDLS mode 530 * @WMA_TDLS_SUPPORT_NOT_ENABLED: tdls is disable 531 * @WMA_TDLS_SUPPORT_DISABLED: suppress implicit trigger and not respond to peer 532 * @WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY: suppress implicit trigger, 533 * but respond to the peer 534 * @WMA_TDLS_SUPPORT_ENABLED: implicit trigger 535 * @WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL: External control means 536 * implicit trigger but only to a peer mac configured by user space. 537 */ 538 typedef enum { 539 WMA_TDLS_SUPPORT_NOT_ENABLED = 0, 540 WMA_TDLS_SUPPORT_DISABLED, 541 WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY, 542 WMA_TDLS_SUPPORT_ENABLED, 543 WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL, 544 } t_wma_tdls_mode; 545 546 /** 547 * enum wma_tdls_peer_notification - TDLS events 548 * @WMA_TDLS_SHOULD_DISCOVER: tdls discovery recommended for peer (always based 549 * on tx bytes per second > tx_discover threshold 550 * NB: notification will be re-sent after 551 * discovery_request_interval_ms 552 * @WMA_TDLS_SHOULD_TEARDOWN: tdls link tear down recommended for peer 553 * due to tx bytes per second below 554 * tx_teardown_threshold 555 * NB: this notification sent once 556 * @WMA_TDLS_PEER_DISCONNECTED: tx peer TDLS link tear down complete 557 */ 558 enum wma_tdls_peer_notification { 559 WMA_TDLS_SHOULD_DISCOVER, 560 WMA_TDLS_SHOULD_TEARDOWN, 561 WMA_TDLS_PEER_DISCONNECTED, 562 }; 563 564 /** 565 * enum wma_tdls_peer_reason - TDLS peer reason 566 * @WMA_TDLS_TEARDOWN_REASON_TX: tdls teardown recommended due to low transmits 567 * @WMA_TDLS_TEARDOWN_REASON_RATE: tdls tear down recommended due to 568 * packet rates < AP rates 569 * @WMA_TDLS_TEARDOWN_REASON_RSSI: tdls link tear down recommended 570 * due to poor RSSI 571 * @WMA_TDLS_TEARDOWN_REASON_SCAN: tdls link tear down recommended 572 * due to offchannel scan 573 * @WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE: tdls peer disconnected 574 * due to peer deletion 575 */ 576 enum wma_tdls_peer_reason { 577 WMA_TDLS_TEARDOWN_REASON_TX, 578 WMA_TDLS_TEARDOWN_REASON_RATE, 579 WMA_TDLS_TEARDOWN_REASON_RSSI, 580 WMA_TDLS_TEARDOWN_REASON_SCAN, 581 WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE, 582 }; 583 #endif /* FEATURE_WLAN_TDLS */ 584 585 /** 586 * enum wma_rx_exec_ctx - wma rx execution context 587 * @WMA_RX_WORK_CTX: work queue context execution 588 * @WMA_RX_TASKLET_CTX: tasklet context execution 589 * @WMA_RX_SERIALIZER_CTX: MC thread context execution 590 * 591 */ 592 enum wma_rx_exec_ctx { 593 WMA_RX_WORK_CTX, 594 WMA_RX_TASKLET_CTX, 595 WMA_RX_SERIALIZER_CTX 596 }; 597 598 /** 599 * enum wma_phy_idx 600 * @PHY1: to notify caller that PHY1 specific param needed 601 * @PHY2: to notify caller that PHY2 specific param needed 602 * @PHY1_PHY2: to notify caller that both PHY's param needed 603 * Note: Firmware sends phy map in terms of bitmask, so enum 604 * also needs to be defined that way. 605 * 606 * For example, 0x3 = 0011 = BIT0 corresponds to one phy and 607 * BIT1 coresponds to another phy. There is no direct relation between 608 * each bit to particular PHY (ex. PHYA or PHYB). 609 * 610 * In simple terms, 3 means referring both PHYs & 1 or 2 means 611 * referring to either PHYA or PHYB. 612 */ 613 enum wma_phy_idx { 614 PHY1 = 0x1, /* 0x1 */ 615 PHY2, /* 0x2 */ 616 PHY1_PHY2, /* 0x3 */ 617 }; 618 619 /** 620 * struct wma_mem_chunk - memory chunks 621 * @vaddr: virtual address 622 * @paddr: physical address 623 * @memctx: dma mapped memory 624 * @len: length of data 625 * @req_id: request id 626 * 627 * memory chunck allocated by Host to be managed by FW 628 * used only for low latency interfaces like pcie 629 */ 630 struct wma_mem_chunk { 631 uint32_t *vaddr; 632 uint32_t paddr; 633 qdf_dma_mem_context(memctx); 634 uint32_t len; 635 uint32_t req_id; 636 }; 637 638 /** 639 * struct p2p_scan_param - p2p scan listen parameters 640 * @scan_id: scan id 641 * @p2p_scan_type: p2p scan type 642 */ 643 struct p2p_scan_param { 644 uint32_t scan_id; 645 tSirP2pScanType p2p_scan_type; 646 }; 647 648 /** 649 * struct scan_param - scan parameters 650 * @scan_id: scan id 651 * @scan_requestor_id: scan requestor id 652 * @p2p_scan_type: p2p scan type 653 */ 654 struct scan_param { 655 uint32_t scan_id; 656 uint32_t scan_requestor_id; 657 tSirP2pScanType p2p_scan_type; 658 uint32_t chan_freq; 659 }; 660 661 /** 662 * struct beacon_info - structure to store beacon template 663 * @buf: skb ptr 664 * @len: length 665 * @dma_mapped: is it dma mapped or not 666 * @tim_ie_offset: TIM IE offset 667 * @dtim_count: DTIM count 668 * @seq_no: sequence no 669 * @noa_sub_ie: NOA sub IE 670 * @noa_sub_ie_len: NOA sub IE length 671 * @noa_ie: NOA IE 672 * @p2p_ie_offset: p2p IE offset 673 * @lock: lock 674 */ 675 struct beacon_info { 676 qdf_nbuf_t buf; 677 uint32_t len; 678 uint8_t dma_mapped; 679 uint32_t tim_ie_offset; 680 uint8_t dtim_count; 681 uint16_t seq_no; 682 uint8_t noa_sub_ie[2 + WMA_NOA_IE_SIZE(WMA_MAX_NOA_DESCRIPTORS)]; 683 uint16_t noa_sub_ie_len; 684 uint8_t *noa_ie; 685 uint16_t p2p_ie_offset; 686 qdf_spinlock_t lock; 687 }; 688 689 /** 690 * struct beacon_tim_ie - structure to store TIM IE of beacon 691 * @tim_ie: tim ie 692 * @tim_len: tim ie length 693 * @dtim_count: dtim count 694 * @dtim_period: dtim period 695 * @tim_bitctl: tim bit control 696 * @tim_bitmap: tim bitmap 697 */ 698 struct beacon_tim_ie { 699 uint8_t tim_ie; 700 uint8_t tim_len; 701 uint8_t dtim_count; 702 uint8_t dtim_period; 703 uint8_t tim_bitctl; 704 uint8_t tim_bitmap[1]; 705 } __ATTRIB_PACK; 706 707 /** 708 * struct pps - packet power save parameter 709 * @paid_match_enable: paid match enable 710 * @gid_match_enable: gid match enable 711 * @tim_clear: time clear 712 * @dtim_clear: dtim clear 713 * @eof_delim: eof delim 714 * @mac_match: mac match 715 * @delim_fail: delim fail 716 * @nsts_zero: nsts zero 717 * @rssi_chk: RSSI check 718 * @ebt_5g: ebt 5GHz 719 */ 720 struct pps { 721 bool paid_match_enable; 722 bool gid_match_enable; 723 bool tim_clear; 724 bool dtim_clear; 725 bool eof_delim; 726 bool mac_match; 727 bool delim_fail; 728 bool nsts_zero; 729 bool rssi_chk; 730 bool ebt_5g; 731 }; 732 733 /** 734 * struct qpower_params - qpower related parameters 735 * @max_ps_poll_cnt: max ps poll count 736 * @max_tx_before_wake: max tx before wake 737 * @spec_ps_poll_wake_interval: ps poll wake interval 738 * @max_spec_nodata_ps_poll: no data ps poll 739 */ 740 struct qpower_params { 741 uint32_t max_ps_poll_cnt; 742 uint32_t max_tx_before_wake; 743 uint32_t spec_ps_poll_wake_interval; 744 uint32_t max_spec_nodata_ps_poll; 745 }; 746 747 748 /** 749 * struct gtx_config_t - GTX config 750 * @gtxRTMask: for HT and VHT rate masks 751 * @gtxUsrcfg: host request for GTX mask 752 * @gtxPERThreshold: PER Threshold (default: 10%) 753 * @gtxPERMargin: PER margin (default: 2%) 754 * @gtxTPCstep: TCP step (default: 1) 755 * @gtxTPCMin: TCP min (default: 5) 756 * @gtxBWMask: BW mask (20/40/80/160 Mhz) 757 */ 758 typedef struct { 759 uint32_t gtxRTMask[2]; 760 uint32_t gtxUsrcfg; 761 uint32_t gtxPERThreshold; 762 uint32_t gtxPERMargin; 763 uint32_t gtxTPCstep; 764 uint32_t gtxTPCMin; 765 uint32_t gtxBWMask; 766 } gtx_config_t; 767 768 /** 769 * struct pdev_cli_config_t - store pdev parameters 770 * @ani_enable: ANI is enabled/disable on target 771 * @ani_poll_len: store ANI polling period 772 * @ani_listen_len: store ANI listening period 773 * @ani_ofdm_level: store ANI OFDM immunity level 774 * @ani_cck_level: store ANI CCK immunity level 775 * @cwmenable: Dynamic bw is enable/disable in fw 776 * @txchainmask: tx chain mask 777 * @rxchainmask: rx chain mask 778 * @txpow2g: tx power limit for 2GHz 779 * @txpow5g: tx power limit for 5GHz 780 * @burst_enable: is burst enable/disable 781 * @burst_dur: burst duration 782 * 783 * This structure stores pdev parameters. 784 * Some of these parameters are set in fw and some 785 * parameters are only maintained in host. 786 */ 787 typedef struct { 788 uint32_t ani_enable; 789 uint32_t ani_poll_len; 790 uint32_t ani_listen_len; 791 uint32_t ani_ofdm_level; 792 uint32_t ani_cck_level; 793 uint32_t cwmenable; 794 uint32_t cts_cbw; 795 uint32_t txchainmask; 796 uint32_t rxchainmask; 797 uint32_t txpow2g; 798 uint32_t txpow5g; 799 uint32_t burst_enable; 800 uint32_t burst_dur; 801 } pdev_cli_config_t; 802 803 /** 804 * struct vdev_cli_config_t - store vdev parameters 805 * @nss: nss width 806 * @ldpc: is ldpc is enable/disable 807 * @tx_stbc: TX STBC is enable/disable 808 * @rx_stbc: RX STBC is enable/disable 809 * @shortgi: short gi is enable/disable 810 * @rtscts_en: RTS/CTS is enable/disable 811 * @chwidth: channel width 812 * @tx_rate: tx rate 813 * @ampdu: ampdu size 814 * @amsdu: amsdu size 815 * @erx_adjust: enable/disable early rx enable 816 * @erx_bmiss_num: target bmiss number per sample 817 * @erx_bmiss_cycle: sample cycle 818 * @erx_slop_step: slop_step value 819 * @erx_init_slop: init slop 820 * @erx_adj_pause: pause adjust enable/disable 821 * @erx_dri_sample: enable/disable drift sample 822 * @pps_params: packet power save parameters 823 * @qpower_params: qpower parameters 824 * @gtx_info: GTX offload info 825 * 826 * This structure stores vdev parameters. 827 * Some of these parameters are set in fw and some 828 * parameters are only maintained in host. 829 */ 830 typedef struct { 831 uint32_t nss; 832 uint32_t ldpc; 833 uint32_t tx_stbc; 834 uint32_t rx_stbc; 835 uint32_t shortgi; 836 uint32_t rtscts_en; 837 uint32_t chwidth; 838 uint32_t tx_rate; 839 uint32_t ampdu; 840 uint32_t amsdu; 841 uint32_t erx_adjust; 842 uint32_t erx_bmiss_num; 843 uint32_t erx_bmiss_cycle; 844 uint32_t erx_slop_step; 845 uint32_t erx_init_slop; 846 uint32_t erx_adj_pause; 847 uint32_t erx_dri_sample; 848 struct pps pps_params; 849 struct qpower_params qpower_params; 850 gtx_config_t gtx_info; 851 } vdev_cli_config_t; 852 853 /** 854 * struct wma_version_info - Store wmi version info 855 * @major: wmi major version 856 * @minor: wmi minor version 857 * @revision: wmi revision number 858 */ 859 struct wma_version_info { 860 u_int32_t major; 861 u_int32_t minor; 862 u_int32_t revision; 863 }; 864 865 /** 866 * struct wma_wow - store wow patterns 867 * @magic_ptrn_enable: magic pattern enable/disable 868 * @wow_enable: wow enable/disable 869 * @wow_enable_cmd_sent: is wow enable command sent to fw 870 * @deauth_enable: is deauth wakeup enable/disable 871 * @disassoc_enable: is disassoc wakeup enable/disable 872 * @bmiss_enable: is bmiss wakeup enable/disable 873 * @gtk_pdev_enable: is GTK based wakeup enable/disable 874 * @gtk_err_enable: is GTK error wakeup enable/disable 875 * @lphb_cache: lphb cache 876 * 877 * This structure stores wow patterns and 878 * wow related parameters in host. 879 */ 880 struct wma_wow { 881 bool magic_ptrn_enable; 882 bool wow_enable; 883 bool wow_enable_cmd_sent; 884 bool deauth_enable; 885 bool disassoc_enable; 886 bool bmiss_enable; 887 bool gtk_err_enable[WMA_MAX_SUPPORTED_BSS]; 888 #ifdef FEATURE_WLAN_LPHB 889 /* currently supports only vdev 0. 890 * cache has two entries: one for TCP and one for UDP. 891 */ 892 tSirLPHBReq lphb_cache[2]; 893 #endif 894 }; 895 896 #ifdef WLAN_FEATURE_11W 897 #define CMAC_IPN_LEN (6) 898 #define WMA_IGTK_KEY_INDEX_4 (4) 899 #define WMA_IGTK_KEY_INDEX_5 (5) 900 901 /** 902 * struct wma_igtk_ipn_t - GTK IPN info 903 * @ipn: IPN info 904 */ 905 typedef struct { 906 uint8_t ipn[CMAC_IPN_LEN]; 907 } wma_igtk_ipn_t; 908 909 /** 910 * struct wma_igtk_key_t - GTK key 911 * @key_length: key length 912 * @key: key 913 * @key_id: key id 914 */ 915 typedef struct { 916 uint16_t key_length; 917 uint8_t key[CSR_AES_KEY_LEN]; 918 919 /* IPN is maintained per iGTK keyID 920 * 0th index for iGTK keyID = 4; 921 * 1st index for iGTK KeyID = 5 922 */ 923 wma_igtk_ipn_t key_id[2]; 924 } wma_igtk_key_t; 925 #endif 926 927 /** 928 * struct vdev_restart_params_t - vdev restart parameters 929 * @vdev_id: vdev id 930 * @ssid: ssid 931 * @flags: flags 932 * @requestor_id: requestor id 933 * @chan: channel 934 * @hidden_ssid_restart_in_progress: hidden ssid restart flag 935 * @ssidHidden: is ssid hidden or not 936 */ 937 typedef struct { 938 A_UINT32 vdev_id; 939 wmi_ssid ssid; 940 A_UINT32 flags; 941 A_UINT32 requestor_id; 942 A_UINT32 disable_hw_ack; 943 wmi_channel chan; 944 qdf_atomic_t hidden_ssid_restart_in_progress; 945 uint8_t ssidHidden; 946 } vdev_restart_params_t; 947 948 /** 949 * struct wma_txrx_node - txrx node 950 * @addr: mac address 951 * @bssid: bssid 952 * @handle: wma handle 953 * @beacon: beacon info 954 * @vdev_restart_params: vdev restart parameters 955 * @config: per vdev config parameters 956 * @scan_info: scan info 957 * @type: type 958 * @sub_type: sub type 959 * @nlo_match_evt_received: is nlo match event received or not 960 * @pno_in_progress: is pno in progress or not 961 * @plm_in_progress: is plm in progress or not 962 * @ptrn_match_enable: is pattern match is enable or not 963 * @num_wow_default_patterns: number of default wow patterns configured for vdev 964 * @num_wow_user_patterns: number of user wow patterns configured for vdev 965 * @conn_state: connection state 966 * @beaconInterval: beacon interval 967 * @llbCoexist: 11b coexist 968 * @shortSlotTimeSupported: is short slot time supported or not 969 * @dtimPeriod: DTIM period 970 * @chanmode: channel mode 971 * @vht_capable: VHT capablity flag 972 * @ht_capable: HT capablity flag 973 * @mhz: channel frequency in KHz 974 * @chan_width: channel bandwidth 975 * @vdev_up: is vdev up or not 976 * @tsfadjust: TSF adjust 977 * @addBssStaContext: add bss context 978 * @aid: association id 979 * @rmfEnabled: Robust Management Frame (RMF) enabled/disabled 980 * @key: GTK key 981 * @uapsd_cached_val: uapsd cached value 982 * @stats_rsp: stats response 983 * @fw_stats_set: fw stats value 984 * @del_staself_req: delete sta self request 985 * @bss_status: bss status 986 * @rate_flags: rate flags 987 * @nss: nss value 988 * @is_channel_switch: is channel switch 989 * @pause_bitmap: pause bitmap 990 * @tx_power: tx power in dbm 991 * @max_tx_power: max tx power in dbm 992 * @nwType: network type (802.11a/b/g/n/ac) 993 * @staKeyParams: sta key parameters 994 * @ps_enabled: is powersave enable/disable 995 * @dtim_policy: DTIM policy 996 * @peer_count: peer count 997 * @roam_synch_in_progress: flag is in progress or not 998 * @plink_status_req: link status request 999 * @psnr_req: snr request 1000 * @delay_before_vdev_stop: delay 1001 * @tx_streams: number of tx streams can be used by the vdev 1002 * @rx_streams: number of rx streams can be used by the vdev 1003 * @chain_mask: chain mask can be used by the vdev 1004 * @mac_id: the mac on which vdev is on 1005 * @wep_default_key_idx: wep default index for group key 1006 * @arp_offload_req: cached arp offload request 1007 * @ns_offload_req: cached ns offload request 1008 * It stores parameters per vdev in wma. 1009 */ 1010 struct wma_txrx_node { 1011 uint8_t addr[IEEE80211_ADDR_LEN]; 1012 uint8_t bssid[IEEE80211_ADDR_LEN]; 1013 void *handle; 1014 struct beacon_info *beacon; 1015 vdev_restart_params_t vdev_restart_params; 1016 vdev_cli_config_t config; 1017 struct scan_param scan_info; 1018 uint32_t type; 1019 uint32_t sub_type; 1020 #ifdef FEATURE_WLAN_SCAN_PNO 1021 bool nlo_match_evt_received; 1022 bool pno_in_progress; 1023 #endif 1024 #ifdef FEATURE_WLAN_ESE 1025 bool plm_in_progress; 1026 #endif 1027 bool ptrn_match_enable; 1028 uint8_t num_wow_default_patterns; 1029 uint8_t num_wow_user_patterns; 1030 bool conn_state; 1031 tSirMacBeaconInterval beaconInterval; 1032 uint8_t llbCoexist; 1033 uint8_t shortSlotTimeSupported; 1034 uint8_t dtimPeriod; 1035 WLAN_PHY_MODE chanmode; 1036 uint8_t vht_capable; 1037 uint8_t ht_capable; 1038 A_UINT32 mhz; 1039 enum phy_ch_width chan_width; 1040 bool vdev_active; 1041 bool vdev_up; 1042 uint64_t tsfadjust; 1043 void *addBssStaContext; 1044 uint8_t aid; 1045 uint8_t rmfEnabled; 1046 #ifdef WLAN_FEATURE_11W 1047 wma_igtk_key_t key; 1048 #endif /* WLAN_FEATURE_11W */ 1049 uint32_t uapsd_cached_val; 1050 tAniGetPEStatsRsp *stats_rsp; 1051 uint8_t fw_stats_set; 1052 void *del_staself_req; 1053 qdf_atomic_t bss_status; 1054 uint8_t rate_flags; 1055 uint8_t nss; 1056 bool is_channel_switch; 1057 uint16_t pause_bitmap; 1058 int8_t tx_power; 1059 int8_t max_tx_power; 1060 uint32_t nwType; 1061 void *staKeyParams; 1062 uint32_t dtim_policy; 1063 uint32_t peer_count; 1064 bool roam_synch_in_progress; 1065 void *plink_status_req; 1066 void *psnr_req; 1067 uint8_t delay_before_vdev_stop; 1068 #ifdef FEATURE_WLAN_EXTSCAN 1069 bool extscan_in_progress; 1070 #endif 1071 uint32_t alt_modulated_dtim; 1072 bool alt_modulated_dtim_enabled; 1073 uint32_t tx_streams; 1074 uint32_t rx_streams; 1075 uint32_t chain_mask; 1076 uint32_t mac_id; 1077 bool roaming_in_progress; 1078 int32_t roam_synch_delay; 1079 uint8_t nss_2g; 1080 uint8_t nss_5g; 1081 bool p2p_lo_in_progress; 1082 uint8_t wep_default_key_idx; 1083 tSirHostOffloadReq arp_offload_req; 1084 tSirHostOffloadReq ns_offload_req; 1085 bool is_vdev_valid; 1086 }; 1087 1088 #if defined(QCA_WIFI_FTM) 1089 #define MAX_UTF_EVENT_LENGTH 2048 1090 #define MAX_WMI_UTF_LEN 252 1091 1092 /** 1093 * struct SEG_HDR_INFO_STRUCT - header info 1094 * @len: length 1095 * @msgref: message refrence 1096 * @segmentInfo: segment info 1097 * @pad: padding 1098 */ 1099 typedef struct { 1100 A_UINT32 len; 1101 A_UINT32 msgref; 1102 A_UINT32 segmentInfo; 1103 A_UINT32 pad; 1104 } SEG_HDR_INFO_STRUCT; 1105 1106 /** 1107 * struct utf_event_info - UTF event info 1108 * @data: data ptr 1109 * @length: length 1110 * @offset: offset 1111 * @currentSeq: curent squence 1112 * @expectedSeq: expected sequence 1113 */ 1114 struct utf_event_info { 1115 uint8_t *data; 1116 uint32_t length; 1117 qdf_size_t offset; 1118 uint8_t currentSeq; 1119 uint8_t expectedSeq; 1120 }; 1121 #endif 1122 1123 /** 1124 * struct scan_timer_info - scan timer info 1125 * @vdev_id: vdev id 1126 * @scan_id: scan id 1127 */ 1128 typedef struct { 1129 uint8_t vdev_id; 1130 uint32_t scan_id; 1131 } scan_timer_info; 1132 1133 /** 1134 * struct ibss_power_save_params - IBSS power save parameters 1135 * @atimWindowLength: ATIM window length 1136 * @isPowerSaveAllowed: is power save allowed 1137 * @isPowerCollapseAllowed: is power collapsed allowed 1138 * @isAwakeonTxRxEnabled: is awake on tx/rx enabled 1139 * @inactivityCount: inactivity count 1140 * @txSPEndInactivityTime: tx SP end inactivity time 1141 * @ibssPsWarmupTime: IBSS power save warm up time 1142 * @ibssPs1RxChainInAtimEnable: IBSS power save rx chain in ATIM enable 1143 */ 1144 typedef struct { 1145 uint32_t atimWindowLength; 1146 uint32_t isPowerSaveAllowed; 1147 uint32_t isPowerCollapseAllowed; 1148 uint32_t isAwakeonTxRxEnabled; 1149 uint32_t inactivityCount; 1150 uint32_t txSPEndInactivityTime; 1151 uint32_t ibssPsWarmupTime; 1152 uint32_t ibssPs1RxChainInAtimEnable; 1153 } ibss_power_save_params; 1154 1155 /** 1156 * struct dbs_hw_mode_info - WLAN_DBS_HW_MODES_TLV Format 1157 * @tlv_header: TLV header, TLV tag and len; tag equals WMITLV_TAG_ARRAY_UINT32 1158 * @hw_mode_list: WLAN_DBS_HW_MODE_LIST entries 1159 */ 1160 struct dbs_hw_mode_info { 1161 uint32_t tlv_header; 1162 uint32_t *hw_mode_list; 1163 }; 1164 1165 /** 1166 * struct mac_ss_bw_info - hw_mode_list PHY/MAC params for each MAC 1167 * @mac_tx_stream: Max TX stream 1168 * @mac_rx_stream: Max RX stream 1169 * @mac_bw: Max bandwidth 1170 */ 1171 struct mac_ss_bw_info { 1172 uint32_t mac_tx_stream; 1173 uint32_t mac_rx_stream; 1174 uint32_t mac_bw; 1175 }; 1176 1177 /* Current HTC credit is 2, pool size of 50 is sufficient */ 1178 #define WMI_DESC_POOL_MAX 50 1179 1180 /** 1181 * struct wmi_desc_t - wmi management Tx descriptor. 1182 * @tx_cmpl_cb_func: completion callback function, when DL completion and 1183 * OTA done. 1184 * @ota_post_proc_func: Post process callback function registered. 1185 * @nbuf: Network buffer to be freed. 1186 * @desc_id: WMI descriptor. 1187 */ 1188 1189 struct wmi_desc_t { 1190 pWMATxRxCompFunc tx_cmpl_cb; 1191 pWMAAckFnTxComp ota_post_proc_cb; 1192 qdf_nbuf_t nbuf; 1193 uint32_t desc_id; 1194 uint8_t vdev_id; 1195 }; 1196 1197 /** 1198 * union wmi_desc_elem_t - linked list wmi desc pool. 1199 * @next: Pointer next descritor in the pool. 1200 * @wmi_desc: wmi descriptor element. 1201 */ 1202 union wmi_desc_elem_t { 1203 union wmi_desc_elem_t *next; 1204 struct wmi_desc_t wmi_desc; 1205 }; 1206 1207 /** 1208 * struct dual_mac_config - Dual MAC configurations 1209 * @prev_scan_config: Previous scan configuration 1210 * @prev_fw_mode_config: Previous FW mode configuration 1211 * @cur_scan_config: Current scan configuration 1212 * @cur_fw_mode_config: Current FW mode configuration 1213 * @req_scan_config: Requested scan configuration 1214 * @req_fw_mode_config: Requested FW mode configuration 1215 */ 1216 struct dual_mac_config { 1217 uint32_t prev_scan_config; 1218 uint32_t prev_fw_mode_config; 1219 uint32_t cur_scan_config; 1220 uint32_t cur_fw_mode_config; 1221 uint32_t req_scan_config; 1222 uint32_t req_fw_mode_config; 1223 1224 }; 1225 1226 1227 /** 1228 * struct wma_ini_config - Structure to hold wma ini configuration 1229 * @max_no_of_peers: Max Number of supported 1230 * 1231 * Placeholder for WMA ini parameters. 1232 */ 1233 struct wma_ini_config { 1234 uint8_t max_no_of_peers; 1235 }; 1236 1237 /** 1238 * struct wmi_valid_channels - Channel details part of WMI_SCAN_CHAN_LIST_CMDID 1239 * @num_channels: Number of channels 1240 * @channel_list: Channel list 1241 */ 1242 struct wma_valid_channels { 1243 uint8_t num_channels; 1244 uint8_t channel_list[MAX_NUM_CHAN]; 1245 }; 1246 1247 /** 1248 * struct hw_mode_idx_to_mac_cap_idx - map between hw_mode to capabilities 1249 * @num_of_macs: number of macs/PHYs for given hw_mode through hw_mode_id 1250 * @mac_cap_idx: index of the mac/PHY for given hw_mode through hw_mode_id 1251 * @hw_mode_id: given hw_mode id 1252 */ 1253 struct hw_mode_idx_to_mac_cap_idx { 1254 uint8_t num_of_macs; 1255 uint8_t mac_cap_idx; 1256 uint8_t hw_mode_id; 1257 }; 1258 1259 /** 1260 * struct extended_caps - new extended caps given by firmware 1261 * @num_hw_modes: number of hardware modes for current SOC 1262 * @each_hw_mode_cap: hw mode id to phy id mapping 1263 * @each_phy_cap_per_hwmode: PHY's caps for each hw mode 1264 * @num_phy_for_hal_reg_cap: number of phy for hal reg cap 1265 * @hw_mode_to_mac_cap_map: map between hw_mode to capabilities 1266 */ 1267 struct extended_caps { 1268 WMI_SOC_MAC_PHY_HW_MODE_CAPS num_hw_modes; 1269 WMI_HW_MODE_CAPABILITIES *each_hw_mode_cap; 1270 WMI_MAC_PHY_CAPABILITIES *each_phy_cap_per_hwmode; 1271 WMI_SOC_HAL_REG_CAPABILITIES num_phy_for_hal_reg_cap; 1272 WMI_HAL_REG_CAPABILITIES_EXT *each_phy_hal_reg_cap; 1273 struct hw_mode_idx_to_mac_cap_idx *hw_mode_to_mac_cap_map; 1274 }; 1275 1276 /** 1277 * struct t_wma_handle - wma context 1278 * @wmi_handle: wmi handle 1279 * @htc_handle: htc handle 1280 * @cds_context: cds handle 1281 * @mac_context: mac context 1282 * @wma_ready_event: wma rx ready event 1283 * @wma_resume_event: wma resume event 1284 * @target_suspend: target suspend event 1285 * @recovery_event: wma FW recovery event 1286 * @max_station: max stations 1287 * @max_bssid: max bssid 1288 * @frame_xln_reqd: frame transmission required 1289 * @driver_type: driver type 1290 * @myaddr: current mac address 1291 * @hwaddr: mac address from EEPROM 1292 * @target_abi_vers: target firmware version 1293 * @final_abi_vers: The final ABI version to be used for communicating 1294 * @target_fw_version: Target f/w build version 1295 * @target_fw_vers_ext: Target f/w build version sub id 1296 * @lpss_support: LPSS feature is supported in target or not 1297 * @egap_support: Enhanced Green AP support flag 1298 * @wmi_ready: wmi status flag 1299 * @wlan_init_status: wlan init status 1300 * @qdf_dev: qdf device 1301 * @phy_capability: PHY Capability from Target 1302 * @max_frag_entry: Max number of Fragment entry 1303 * @wmi_service_bitmap: wmi services bitmap received from Target 1304 * @wlan_resource_config: resource config 1305 * @frameTransRequired: frame transmission required 1306 * @wmaGlobalSystemRole: global system role 1307 * @tx_frm_download_comp_cb: Tx Frame Compl Cb registered by umac 1308 * @tx_frm_download_comp_event: Event to wait for tx download completion 1309 * @tx_queue_empty_event: wait for tx queue to get flushed 1310 * @umac_ota_ack_cb: Ack Complete Callback registered by umac 1311 * @umac_data_ota_ack_cb: ack complete callback 1312 * @last_umac_data_ota_timestamp: timestamp when OTA of last umac data was done 1313 * @last_umac_data_nbuf: cache nbuf ptr for the last umac data buf 1314 * @needShutdown: is shutdown needed or not 1315 * @num_mem_chunks: number of memory chunk 1316 * @mem_chunks: memory chunks 1317 * @tgt_cfg_update_cb: configuration update callback 1318 * @dfs_radar_indication_cb: Callback to indicate radar to HDD 1319 * @reg_cap: regulatory capablities 1320 * @scan_id: scan id 1321 * @interfaces: txrx nodes(per vdev) 1322 * @pdevconfig: pdev related configrations 1323 * @vdev_resp_queue: vdev response queue 1324 * @vdev_respq_lock: vdev response queue lock 1325 * @ht_cap_info: HT capablity info 1326 * @vht_cap_info: VHT capablity info 1327 * @vht_supp_mcs: VHT supported MCS 1328 * @num_rf_chains: number of RF chains 1329 * @utf_event_info: UTF event information 1330 * @is_fw_assert: is fw asserted 1331 * @wow: wow related patterns & parameters 1332 * @no_of_suspend_ind: number of suspend indications 1333 * @no_of_resume_ind: number of resume indications 1334 * @mArpInfo: arp info 1335 * @powersave_mode: power save mode 1336 * @ptrn_match_enable_all_vdev: is pattern match is enable/disable 1337 * @pGetRssiReq: get RSSI request 1338 * @thermal_mgmt_info: Thermal mitigation related info 1339 * @roam_offload_enabled: is roam offload enable/disable 1340 * @ol_ini_info: store ini status of arp offload, ns offload 1341 * @ssdp: ssdp flag 1342 * @enable_mc_list : To Check if Multicast list filtering is enabled in FW 1343 * @ibss_started: is IBSS started or not 1344 * @ibsskey_info: IBSS key info 1345 * @dfs_ic: DFS umac interface information 1346 * @hddTxFailCb: tx fail indication callback 1347 * @pno_wake_lock: PNO wake lock 1348 * @extscan_wake_lock: extscan wake lock 1349 * @wow_wake_lock: wow wake lock 1350 * @wow_nack: wow negative ack flag 1351 * @ap_client_cnt: ap client count 1352 * @is_wow_bus_suspended: is wow bus suspended flag 1353 * @wma_scan_comp_timer: scan completion timer 1354 * @dfs_phyerr_filter_offload: dfs phy error filter is offloaded or not 1355 * @suitable_ap_hb_failure: better ap found 1356 * @wma_ibss_power_save_params: IBSS Power Save config Parameters 1357 * @IsRArateLimitEnabled: RA rate limiti s enabled or not 1358 * @RArateLimitInterval: RA rate limit interval 1359 * @is_lpass_enabled: Flag to indicate if LPASS feature is enabled or not 1360 * @is_nan_enabled: Flag to indicate if NaN feature is enabled or not 1361 * @staMaxLIModDtim: station max listen interval 1362 * @staModDtim: station mode DTIM 1363 * @staDynamicDtim: station dynamic DTIM 1364 * @enable_mhf_offload: is MHF offload enable/disable 1365 * @last_mhf_entries_timestamp: timestamp when last entries where set 1366 * @dfs_pri_multiplier: DFS multiplier 1367 * @hw_bd_id: hardware board id 1368 * @hw_bd_info: hardware board info 1369 * @in_d0wow: D0WOW is enable/disable 1370 * @miracast_value: miracast value 1371 * @log_completion_timer: log completion timer 1372 * @mgmt_rx: management rx callback 1373 * @num_dbs_hw_modes: Number of HW modes supported by the FW 1374 * @dbs_mode: DBS HW mode list 1375 * @old_hw_mode_index: Previous configured HW mode index 1376 * @new_hw_mode_index: Current configured HW mode index 1377 * @extended_caps phy_caps: extended caps per hw mode 1378 * @peer_authorized_cb: peer authorized hdd callback 1379 * @ocb_callback: callback to OCB commands 1380 * @ocb_resp: response to OCB commands 1381 * @wow_pno_match_wake_up_count: PNO match wake up count 1382 * @wow_pno_complete_wake_up_count: PNO complete wake up count 1383 * @wow_gscan_wake_up_count: Gscan wake up count 1384 * @wow_low_rssi_wake_up_count: Low rssi wake up count 1385 * @wow_rssi_breach_wake_up_count: RSSI breach wake up count 1386 * @wow_ucast_wake_up_count: WoW unicast packet wake up count 1387 * @wow_bcast_wake_up_count: WoW brodcast packet wake up count 1388 * @wow_ipv4_mcast_wake_up_count: WoW IPV4 mcast packet wake up count 1389 * @wow_ipv6_mcast_wake_up_count: WoW IPV6 mcast packet wake up count 1390 * @wow_ipv6_mcast_ra_stats: WoW IPV6 mcast RA packet wake up count 1391 * @wow_ipv6_mcast_ns_stats: WoW IPV6 mcast NS packet wake up count 1392 * @wow_ipv6_mcast_na_stats: WoW IPV6 mcast NA packet wake up count 1393 * @wow_icmpv4_count: WoW ipv4 icmp packet wake up count 1394 * @wow_icmpv6_count: WoW ipv6 icmp packet wake up count 1395 * @dual_mac_cfg: Dual mac configuration params for scan and fw mode 1396 * 1397 * @max_scan: maximum scan requests than can be queued 1398 * This structure is global wma context 1399 * It contains global wma module parameters and 1400 * handle of other modules. 1401 * @saved_wmi_init_cmd: Saved WMI INIT command 1402 * @bool bpf_packet_filter_enable: BPF filter enabled or not 1403 * @service_ready_ext_evt: Wait event for service ready ext 1404 * @wmi_cmd_rsp_wake_lock: wmi command response wake lock 1405 * @wmi_cmd_rsp_runtime_lock: wmi command response bus lock 1406 * @saved_chan: saved channel list sent as part of WMI_SCAN_CHAN_LIST_CMDID 1407 */ 1408 typedef struct { 1409 void *wmi_handle; 1410 void *htc_handle; 1411 void *cds_context; 1412 void *mac_context; 1413 qdf_event_t wma_ready_event; 1414 qdf_event_t wma_resume_event; 1415 qdf_event_t target_suspend; 1416 qdf_event_t runtime_suspend; 1417 qdf_event_t recovery_event; 1418 uint16_t max_station; 1419 uint16_t max_bssid; 1420 uint32_t frame_xln_reqd; 1421 t_wma_drv_type driver_type; 1422 uint8_t myaddr[IEEE80211_ADDR_LEN]; 1423 uint8_t hwaddr[IEEE80211_ADDR_LEN]; 1424 wmi_abi_version target_abi_vers; 1425 wmi_abi_version final_abi_vers; 1426 uint32_t target_fw_version; 1427 uint32_t target_fw_vers_ext; 1428 #ifdef WLAN_FEATURE_LPSS 1429 uint8_t lpss_support; 1430 #endif 1431 uint8_t ap_arpns_support; 1432 #ifdef FEATURE_GREEN_AP 1433 bool egap_support; 1434 #endif 1435 bool wmi_ready; 1436 uint32_t wlan_init_status; 1437 qdf_device_t qdf_dev; 1438 uint32_t phy_capability; 1439 uint32_t max_frag_entry; 1440 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE]; 1441 wmi_resource_config wlan_resource_config; 1442 uint32_t frameTransRequired; 1443 tBssSystemRole wmaGlobalSystemRole; 1444 pWMATxRxCompFunc tx_frm_download_comp_cb; 1445 qdf_event_t tx_frm_download_comp_event; 1446 /* 1447 * Dummy event to wait for draining MSDUs left in hardware tx 1448 * queue and before requesting VDEV_STOP. Nobody will set this 1449 * and wait will timeout, and code will poll the pending tx 1450 * descriptors number to be zero. 1451 */ 1452 qdf_event_t tx_queue_empty_event; 1453 pWMAAckFnTxComp umac_ota_ack_cb[SIR_MAC_MGMT_RESERVED15]; 1454 pWMAAckFnTxComp umac_data_ota_ack_cb; 1455 unsigned long last_umac_data_ota_timestamp; 1456 qdf_nbuf_t last_umac_data_nbuf; 1457 bool needShutdown; 1458 uint32_t num_mem_chunks; 1459 struct wmi_host_mem_chunk mem_chunks[MAX_MEM_CHUNKS]; 1460 wma_tgt_cfg_cb tgt_cfg_update_cb; 1461 wma_dfs_radar_indication_cb dfs_radar_indication_cb; 1462 HAL_REG_CAPABILITIES reg_cap; 1463 uint32_t scan_id; 1464 struct wma_txrx_node *interfaces; 1465 pdev_cli_config_t pdevconfig; 1466 qdf_list_t vdev_resp_queue; 1467 qdf_spinlock_t vdev_respq_lock; 1468 qdf_list_t wma_hold_req_queue; 1469 qdf_spinlock_t wma_hold_req_q_lock; 1470 uint32_t ht_cap_info; 1471 uint32_t vht_cap_info; 1472 uint32_t vht_supp_mcs; 1473 uint32_t num_rf_chains; 1474 #if defined(QCA_WIFI_FTM) 1475 struct utf_event_info utf_event_info; 1476 #endif 1477 uint8_t is_fw_assert; 1478 struct wma_wow wow; 1479 uint8_t no_of_suspend_ind; 1480 uint8_t no_of_resume_ind; 1481 /* Have a back up of arp info to send along 1482 * with ns info suppose if ns also enabled 1483 */ 1484 tSirHostOffloadReq mArpInfo; 1485 struct wma_tx_ack_work_ctx *ack_work_ctx; 1486 uint8_t powersave_mode; 1487 bool ptrn_match_enable_all_vdev; 1488 void *pGetRssiReq; 1489 t_thermal_mgmt thermal_mgmt_info; 1490 bool roam_offload_enabled; 1491 /* Here ol_ini_info is used to store ini 1492 * status of arp offload, ns offload 1493 * and others. Currently 1st bit is used 1494 * for arp off load and 2nd bit for ns 1495 * offload currently, rest bits are unused 1496 */ 1497 uint8_t ol_ini_info; 1498 bool ssdp; 1499 bool enable_mc_list; 1500 uint8_t ibss_started; 1501 tSetBssKeyParams ibsskey_info; 1502 struct ieee80211com *dfs_ic; 1503 txFailIndCallback hddTxFailCb; 1504 #ifdef FEATURE_WLAN_SCAN_PNO 1505 qdf_wake_lock_t pno_wake_lock; 1506 #endif 1507 #ifdef FEATURE_WLAN_EXTSCAN 1508 qdf_wake_lock_t extscan_wake_lock; 1509 #endif 1510 qdf_wake_lock_t wow_wake_lock; 1511 int wow_nack; 1512 bool wow_initial_wake_up; 1513 qdf_atomic_t is_wow_bus_suspended; 1514 qdf_mc_timer_t wma_scan_comp_timer; 1515 uint8_t dfs_phyerr_filter_offload; 1516 bool suitable_ap_hb_failure; 1517 ibss_power_save_params wma_ibss_power_save_params; 1518 #ifdef FEATURE_WLAN_RA_FILTERING 1519 bool IsRArateLimitEnabled; 1520 uint16_t RArateLimitInterval; 1521 #endif 1522 #ifdef WLAN_FEATURE_LPSS 1523 bool is_lpass_enabled; 1524 #endif 1525 #ifdef WLAN_FEATURE_NAN 1526 bool is_nan_enabled; 1527 #endif 1528 uint8_t staMaxLIModDtim; 1529 uint8_t staModDtim; 1530 uint8_t staDynamicDtim; 1531 uint8_t enable_mhf_offload; 1532 unsigned long last_mhf_entries_timestamp; 1533 int32_t dfs_pri_multiplier; 1534 uint32_t hw_bd_id; 1535 uint32_t hw_bd_info[HW_BD_INFO_SIZE]; 1536 uint32_t miracast_value; 1537 qdf_mc_timer_t log_completion_timer; 1538 wma_mgmt_frame_rx_callback mgmt_rx; 1539 uint32_t num_dbs_hw_modes; 1540 struct dbs_hw_mode_info hw_mode; 1541 uint32_t old_hw_mode_index; 1542 uint32_t new_hw_mode_index; 1543 struct extended_caps phy_caps; 1544 qdf_atomic_t scan_id_counter; 1545 qdf_atomic_t num_pending_scans; 1546 wma_peer_authorized_fp peer_authorized_cb; 1547 uint32_t wow_pno_match_wake_up_count; 1548 uint32_t wow_pno_complete_wake_up_count; 1549 uint32_t wow_gscan_wake_up_count; 1550 uint32_t wow_low_rssi_wake_up_count; 1551 uint32_t wow_rssi_breach_wake_up_count; 1552 uint32_t wow_ucast_wake_up_count; 1553 uint32_t wow_bcast_wake_up_count; 1554 uint32_t wow_ipv4_mcast_wake_up_count; 1555 uint32_t wow_ipv6_mcast_wake_up_count; 1556 uint32_t wow_ipv6_mcast_ra_stats; 1557 uint32_t wow_ipv6_mcast_ns_stats; 1558 uint32_t wow_ipv6_mcast_na_stats; 1559 uint32_t wow_icmpv4_count; 1560 uint32_t wow_icmpv6_count; 1561 uint32_t wow_oem_response_wake_up_count; 1562 1563 /* OCB request contexts */ 1564 struct sir_ocb_config *ocb_config_req; 1565 struct dual_mac_config dual_mac_cfg; 1566 struct { 1567 uint16_t pool_size; 1568 uint16_t num_free; 1569 union wmi_desc_elem_t *array; 1570 union wmi_desc_elem_t *freelist; 1571 qdf_spinlock_t wmi_desc_pool_lock; 1572 } wmi_desc_pool; 1573 uint8_t max_scan; 1574 uint16_t self_gen_frm_pwr; 1575 bool tx_chain_mask_cck; 1576 /* Going with a timer instead of wait event because on receiving the 1577 * service ready event, we will be waiting on the MC thread for the 1578 * service extended ready event which is also processed in MC thread. 1579 * This leads to MC thread being stuck. Alternative was to process 1580 * these events in tasklet/workqueue context. But, this leads to 1581 * race conditions when the events are processed in two different 1582 * context. So, processing ready event and extended ready event in 1583 * the serialized MC thread context with a timer. 1584 */ 1585 qdf_mc_timer_t service_ready_ext_timer; 1586 void (*csr_roam_synch_cb)(tpAniSirGlobal mac, 1587 roam_offload_synch_ind *roam_synch_data, 1588 tpSirBssDescription bss_desc_ptr, 1589 enum sir_roam_op_code reason); 1590 QDF_STATUS (*pe_roam_synch_cb)(tpAniSirGlobal mac, 1591 roam_offload_synch_ind *roam_synch_data, 1592 tpSirBssDescription bss_desc_ptr); 1593 qdf_wake_lock_t wmi_cmd_rsp_wake_lock; 1594 qdf_runtime_lock_t wmi_cmd_rsp_runtime_lock; 1595 qdf_runtime_lock_t wma_runtime_resume_lock; 1596 uint32_t fine_time_measurement_cap; 1597 bool bpf_enabled; 1598 bool bpf_packet_filter_enable; 1599 struct wma_ini_config ini_config; 1600 struct wma_valid_channels saved_chan; 1601 /* NAN datapath support enabled in firmware */ 1602 bool nan_datapath_enabled; 1603 QDF_STATUS (*pe_ndp_event_handler)(tpAniSirGlobal mac_ctx, 1604 cds_msg_t *msg); 1605 bool fw_timeout_crash; 1606 bool sub_20_support; 1607 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb; 1608 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb; 1609 tSirLLStatsResults *link_stats_results; 1610 } t_wma_handle, *tp_wma_handle; 1611 1612 /** 1613 * struct wma_target_cap - target capabality 1614 * @wmi_service_bitmap: wmi services bitmap 1615 * @wlan_resource_config: resource config 1616 */ 1617 struct wma_target_cap { 1618 /* wmi services bitmap received from Target */ 1619 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE]; 1620 /* default resource config,the os shim can overwrite it */ 1621 wmi_resource_config wlan_resource_config; 1622 }; 1623 1624 /** 1625 * struct t_wma_start_req - wma start request parameters 1626 * @pConfigBuffer: config buffer 1627 * @usConfigBufferLen: Length of the config buffer above 1628 * @driver_type: Production or FTM driver 1629 * @pUserData: user data 1630 * @pIndUserData: indication function pointer to send to UMAC 1631 * 1632 * The shared memory between WDI and HAL is 4K so maximum data can be 1633 * transferred from WDI to HAL is 4K 1634 */ 1635 typedef struct { 1636 void *pConfigBuffer; 1637 uint16_t usConfigBufferLen; 1638 t_wma_drv_type driver_type; 1639 void *pUserData; 1640 void *pIndUserData; 1641 } t_wma_start_req; 1642 1643 /* Enumeration for Version */ 1644 typedef enum { 1645 WLAN_HAL_MSG_VERSION0 = 0, 1646 WLAN_HAL_MSG_VERSION1 = 1, 1647 WLAN_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF, /*define as 2 bytes data */ 1648 WLAN_HAL_MSG_VERSION_MAX_FIELD = WLAN_HAL_MSG_WCNSS_CTRL_VERSION 1649 } tHalHostMsgVersion; 1650 1651 /** 1652 * struct sHalMacStartParameter - mac start request parameters 1653 * @driverType: driver type (production/FTM) 1654 * @uConfigBufferLen: length of config buffer 1655 */ 1656 typedef struct qdf_packed sHalMacStartParameter { 1657 tDriverType driverType; 1658 uint32_t uConfigBufferLen; 1659 1660 /* Following this there is a TLV formatted buffer of length 1661 * "uConfigBufferLen" bytes containing all config values. 1662 * The TLV is expected to be formatted like this: 1663 * 0 15 31 31+CFG_LEN-1 length-1 1664 * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......| 1665 */ 1666 } tHalMacStartParameter, *tpHalMacStartParameter; 1667 1668 extern void cds_wma_complete_cback(void *p_cds_context); 1669 extern void wma_send_regdomain_info_to_fw(uint32_t reg_dmn, uint16_t regdmn2G, 1670 uint16_t regdmn5G, int8_t ctl2G, 1671 int8_t ctl5G); 1672 /** 1673 * enum frame_index - Frame index 1674 * @GENERIC_NODOWNLD_NOACK_COMP_INDEX: Frame index for no download comp no ack 1675 * @GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX: Frame index for download comp no ack 1676 * @GENERIC_DOWNLD_COMP_ACK_COMP_INDEX: Frame index for download comp and ack 1677 * @GENERIC_NODOWLOAD_ACK_COMP_INDEX: Frame index for no download comp and ack 1678 * @FRAME_INDEX_MAX: maximum frame index 1679 */ 1680 enum frame_index { 1681 GENERIC_NODOWNLD_NOACK_COMP_INDEX, 1682 GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX, 1683 GENERIC_DOWNLD_COMP_ACK_COMP_INDEX, 1684 GENERIC_NODOWLOAD_ACK_COMP_INDEX, 1685 FRAME_INDEX_MAX 1686 }; 1687 1688 /** 1689 * struct wma_tx_ack_work_ctx - tx ack work context 1690 * @wma_handle: wma handle 1691 * @sub_type: sub type 1692 * @status: status 1693 * @ack_cmp_work: work structure 1694 */ 1695 struct wma_tx_ack_work_ctx { 1696 tp_wma_handle wma_handle; 1697 uint16_t sub_type; 1698 int32_t status; 1699 qdf_work_t ack_cmp_work; 1700 }; 1701 1702 /** 1703 * struct wma_target_req - target request parameters 1704 * @event_timeout: event timeout 1705 * @node: list 1706 * @user_data: user data 1707 * @msg_type: message type 1708 * @vdev_id: vdev id 1709 * @type: type 1710 */ 1711 struct wma_target_req { 1712 qdf_mc_timer_t event_timeout; 1713 qdf_list_node_t node; 1714 void *user_data; 1715 uint32_t msg_type; 1716 uint8_t vdev_id; 1717 uint8_t type; 1718 }; 1719 1720 /** 1721 * struct wma_vdev_start_req - vdev start request parameters 1722 * @beacon_intval: beacon interval 1723 * @dtim_period: dtim period 1724 * @max_txpow: max tx power 1725 * @chan_offset: channel offset 1726 * @is_dfs: is dfs supported or not 1727 * @vdev_id: vdev id 1728 * @chan: channel 1729 * @oper_mode: operating mode 1730 * @ssid: ssid 1731 * @hidden_ssid: hidden ssid 1732 * @pmf_enabled: is pmf enabled or not 1733 * @vht_capable: VHT capabality 1734 * @ht_capable: HT capabality 1735 * @dfs_pri_multiplier: DFS multiplier 1736 * @dot11_mode: 802.11 mode 1737 * @is_half_rate: is the channel operating at 10MHz 1738 * @is_quarter_rate: is the channel operating at 5MHz 1739 * @preferred_tx_streams: policy manager indicates the preferred 1740 * number of transmit streams 1741 * @preferred_rx_streams: policy manager indicates the preferred 1742 * number of receive streams 1743 */ 1744 struct wma_vdev_start_req { 1745 uint32_t beacon_intval; 1746 uint32_t dtim_period; 1747 int32_t max_txpow; 1748 enum phy_ch_width chan_width; 1749 bool is_dfs; 1750 uint8_t vdev_id; 1751 uint8_t chan; 1752 uint8_t oper_mode; 1753 tSirMacSSid ssid; 1754 uint8_t hidden_ssid; 1755 uint8_t pmf_enabled; 1756 uint8_t vht_capable; 1757 uint8_t ch_center_freq_seg0; 1758 uint8_t ch_center_freq_seg1; 1759 uint8_t ht_capable; 1760 int32_t dfs_pri_multiplier; 1761 uint8_t dot11_mode; 1762 bool is_half_rate; 1763 bool is_quarter_rate; 1764 uint32_t preferred_tx_streams; 1765 uint32_t preferred_rx_streams; 1766 uint8_t beacon_tx_rate; 1767 }; 1768 1769 /** 1770 * struct wma_set_key_params - set key parameters 1771 * @vdev_id: vdev id 1772 * @def_key_idx: used to see if we have to read the key from cfg 1773 * @key_len: key length 1774 * @peer_mac: peer mac address 1775 * @singl_tid_rc: 1=Single TID based Replay Count, 0=Per TID based RC 1776 * @key_type: key type 1777 * @key_idx: key index 1778 * @unicast: unicast flag 1779 * @key_data: key data 1780 */ 1781 struct wma_set_key_params { 1782 uint8_t vdev_id; 1783 /* def_key_idx can be used to see if we have to read the key from cfg */ 1784 uint32_t def_key_idx; 1785 uint16_t key_len; 1786 uint8_t peer_mac[IEEE80211_ADDR_LEN]; 1787 uint8_t singl_tid_rc; 1788 enum eAniEdType key_type; 1789 uint32_t key_idx; 1790 bool unicast; 1791 uint8_t key_data[SIR_MAC_MAX_KEY_LENGTH]; 1792 }; 1793 1794 /** 1795 * struct t_thermal_cmd_params - thermal command parameters 1796 * @minTemp: minimum temprature 1797 * @maxTemp: maximum temprature 1798 * @thermalEnable: thermal enable 1799 */ 1800 typedef struct { 1801 uint16_t minTemp; 1802 uint16_t maxTemp; 1803 uint8_t thermalEnable; 1804 } t_thermal_cmd_params, *tp_thermal_cmd_params; 1805 1806 /** 1807 * enum wma_cfg_cmd_id - wma cmd ids 1808 * @WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID: txrx firmware stats enable command 1809 * @WMA_VDEV_TXRX_FWSTATS_RESET_CMDID: txrx firmware stats reset command 1810 * @WMA_VDEV_MCC_SET_TIME_LATENCY: set MCC latency time 1811 * @WMA_VDEV_MCC_SET_TIME_QUOTA: set MCC time quota 1812 * @WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE: set IBSS ATIM window size 1813 * @WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED: set IBSS enable power save 1814 * @WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED: set IBSS power collapse enable 1815 * @WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX: awake IBSS on TX/RX 1816 * @WMA_VDEV_IBSS_SET_INACTIVITY_TIME: set IBSS inactivity time 1817 * @WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME: set IBSS TXSP 1818 * @WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS: set IBSS power save warmup time 1819 * @WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW: set IBSS power save ATIM 1820 * @WMA_VDEV_DFS_CONTROL_CMDID: DFS control command 1821 * @WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID: get IPA microcontroller fw stats 1822 * 1823 * wma command ids for configuration request which 1824 * does not involve sending a wmi command. 1825 */ 1826 enum wma_cfg_cmd_id { 1827 WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID = WMI_CMDID_MAX, 1828 WMA_VDEV_TXRX_FWSTATS_RESET_CMDID, 1829 WMA_VDEV_MCC_SET_TIME_LATENCY, 1830 WMA_VDEV_MCC_SET_TIME_QUOTA, 1831 WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE, 1832 WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED, 1833 WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED, 1834 WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX, 1835 WMA_VDEV_IBSS_SET_INACTIVITY_TIME, 1836 WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME, 1837 WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS, 1838 WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW, 1839 WMA_VDEV_DFS_CONTROL_CMDID, 1840 WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID, 1841 WMA_CMD_ID_MAX 1842 }; 1843 1844 /** 1845 * struct wma_trigger_uapsd_params - trigger uapsd parameters 1846 * @wmm_ac: wmm access catagory 1847 * @user_priority: user priority 1848 * @service_interval: service interval 1849 * @suspend_interval: suspend interval 1850 * @delay_interval: delay interval 1851 */ 1852 typedef struct wma_trigger_uapsd_params { 1853 uint32_t wmm_ac; 1854 uint32_t user_priority; 1855 uint32_t service_interval; 1856 uint32_t suspend_interval; 1857 uint32_t delay_interval; 1858 } t_wma_trigger_uapsd_params, *tp_wma_trigger_uapsd_params; 1859 1860 /** 1861 * enum uapsd_peer_param_max_sp - U-APSD maximum service period of peer station 1862 * @UAPSD_MAX_SP_LEN_UNLIMITED: unlimited max service period 1863 * @UAPSD_MAX_SP_LEN_2: max service period = 2 1864 * @UAPSD_MAX_SP_LEN_4: max service period = 4 1865 * @UAPSD_MAX_SP_LEN_6: max service period = 6 1866 */ 1867 enum uapsd_peer_param_max_sp { 1868 UAPSD_MAX_SP_LEN_UNLIMITED = 0, 1869 UAPSD_MAX_SP_LEN_2 = 2, 1870 UAPSD_MAX_SP_LEN_4 = 4, 1871 UAPSD_MAX_SP_LEN_6 = 6 1872 }; 1873 1874 /** 1875 * enum uapsd_peer_param_enabled_ac - U-APSD Enabled AC's of peer station 1876 * @UAPSD_VO_ENABLED: enable uapsd for voice 1877 * @UAPSD_VI_ENABLED: enable uapsd for video 1878 * @UAPSD_BK_ENABLED: enable uapsd for background 1879 * @UAPSD_BE_ENABLED: enable uapsd for best effort 1880 */ 1881 enum uapsd_peer_param_enabled_ac { 1882 UAPSD_VO_ENABLED = 0x01, 1883 UAPSD_VI_ENABLED = 0x02, 1884 UAPSD_BK_ENABLED = 0x04, 1885 UAPSD_BE_ENABLED = 0x08 1886 }; 1887 1888 /** 1889 * enum profile_id_t - Firmware profiling index 1890 * @PROF_CPU_IDLE: cpu idle profile 1891 * @PROF_PPDU_PROC: ppdu processing profile 1892 * @PROF_PPDU_POST: ppdu post profile 1893 * @PROF_HTT_TX_INPUT: htt tx input profile 1894 * @PROF_MSDU_ENQ: msdu enqueue profile 1895 * @PROF_PPDU_POST_HAL: ppdu post profile 1896 * @PROF_COMPUTE_TX_TIME: tx time profile 1897 * @PROF_MAX_ID: max profile index 1898 */ 1899 enum profile_id_t { 1900 PROF_CPU_IDLE, 1901 PROF_PPDU_PROC, 1902 PROF_PPDU_POST, 1903 PROF_HTT_TX_INPUT, 1904 PROF_MSDU_ENQ, 1905 PROF_PPDU_POST_HAL, 1906 PROF_COMPUTE_TX_TIME, 1907 PROF_MAX_ID, 1908 }; 1909 1910 /** 1911 * struct p2p_ie - P2P IE structural definition. 1912 * @p2p_id: p2p id 1913 * @p2p_len: p2p length 1914 * @p2p_oui: p2p OUI 1915 * @p2p_oui_type: p2p OUI type 1916 */ 1917 struct p2p_ie { 1918 uint8_t p2p_id; 1919 uint8_t p2p_len; 1920 uint8_t p2p_oui[3]; 1921 uint8_t p2p_oui_type; 1922 } __packed; 1923 1924 /** 1925 * struct p2p_noa_descriptor - noa descriptor 1926 * @type_count: 255: continuous schedule, 0: reserved 1927 * @duration: Absent period duration in micro seconds 1928 * @interval: Absent period interval in micro seconds 1929 * @start_time: 32 bit tsf time when in starts 1930 */ 1931 struct p2p_noa_descriptor { 1932 uint8_t type_count; 1933 uint32_t duration; 1934 uint32_t interval; 1935 uint32_t start_time; 1936 } __packed; 1937 1938 /** 1939 * struct p2p_sub_element_noa - p2p noa element 1940 * @p2p_sub_id: p2p sub id 1941 * @p2p_sub_len: p2p sub length 1942 * @index: identifies instance of NOA su element 1943 * @oppPS: oppPS state of the AP 1944 * @ctwindow: ctwindow in TUs 1945 * @num_descriptors: number of NOA descriptors 1946 * @noa_descriptors: noa descriptors 1947 */ 1948 struct p2p_sub_element_noa { 1949 uint8_t p2p_sub_id; 1950 uint8_t p2p_sub_len; 1951 uint8_t index; /* identifies instance of NOA su element */ 1952 uint8_t oppPS:1, /* oppPS state of the AP */ 1953 ctwindow:7; /* ctwindow in TUs */ 1954 uint8_t num_descriptors; /* number of NOA descriptors */ 1955 struct p2p_noa_descriptor noa_descriptors[WMA_MAX_NOA_DESCRIPTORS]; 1956 }; 1957 1958 /** 1959 * struct wma_decap_info_t - decapsulation info 1960 * @hdr: header 1961 * @hdr_len: header length 1962 */ 1963 struct wma_decap_info_t { 1964 uint8_t hdr[sizeof(struct ieee80211_qosframe_addr4)]; 1965 int32_t hdr_len; 1966 }; 1967 1968 /** 1969 * enum packet_power_save - packet power save params 1970 * @WMI_VDEV_PPS_PAID_MATCH: paid match param 1971 * @WMI_VDEV_PPS_GID_MATCH: gid match param 1972 * @WMI_VDEV_PPS_EARLY_TIM_CLEAR: early tim clear param 1973 * @WMI_VDEV_PPS_EARLY_DTIM_CLEAR: early dtim clear param 1974 * @WMI_VDEV_PPS_EOF_PAD_DELIM: eof pad delim param 1975 * @WMI_VDEV_PPS_MACADDR_MISMATCH: macaddr mismatch param 1976 * @WMI_VDEV_PPS_DELIM_CRC_FAIL: delim CRC fail param 1977 * @WMI_VDEV_PPS_GID_NSTS_ZERO: gid nsts zero param 1978 * @WMI_VDEV_PPS_RSSI_CHECK: RSSI check param 1979 * @WMI_VDEV_PPS_5G_EBT: 5G ebt param 1980 */ 1981 typedef enum { 1982 WMI_VDEV_PPS_PAID_MATCH = 0, 1983 WMI_VDEV_PPS_GID_MATCH = 1, 1984 WMI_VDEV_PPS_EARLY_TIM_CLEAR = 2, 1985 WMI_VDEV_PPS_EARLY_DTIM_CLEAR = 3, 1986 WMI_VDEV_PPS_EOF_PAD_DELIM = 4, 1987 WMI_VDEV_PPS_MACADDR_MISMATCH = 5, 1988 WMI_VDEV_PPS_DELIM_CRC_FAIL = 6, 1989 WMI_VDEV_PPS_GID_NSTS_ZERO = 7, 1990 WMI_VDEV_PPS_RSSI_CHECK = 8, 1991 WMI_VDEV_VHT_SET_GID_MGMT = 9, 1992 WMI_VDEV_PPS_5G_EBT = 10 1993 } packet_power_save; 1994 1995 /** 1996 * enum green_tx_param - green tx parameters 1997 * @WMI_VDEV_PARAM_GTX_HT_MCS: ht mcs param 1998 * @WMI_VDEV_PARAM_GTX_VHT_MCS: vht mcs param 1999 * @WMI_VDEV_PARAM_GTX_USR_CFG: user cfg param 2000 * @WMI_VDEV_PARAM_GTX_THRE: thre param 2001 * @WMI_VDEV_PARAM_GTX_MARGIN: green tx margin param 2002 * @WMI_VDEV_PARAM_GTX_STEP: green tx step param 2003 * @WMI_VDEV_PARAM_GTX_MINTPC: mintpc param 2004 * @WMI_VDEV_PARAM_GTX_BW_MASK: bandwidth mask 2005 */ 2006 typedef enum { 2007 WMI_VDEV_PARAM_GTX_HT_MCS, 2008 WMI_VDEV_PARAM_GTX_VHT_MCS, 2009 WMI_VDEV_PARAM_GTX_USR_CFG, 2010 WMI_VDEV_PARAM_GTX_THRE, 2011 WMI_VDEV_PARAM_GTX_MARGIN, 2012 WMI_VDEV_PARAM_GTX_STEP, 2013 WMI_VDEV_PARAM_GTX_MINTPC, 2014 WMI_VDEV_PARAM_GTX_BW_MASK, 2015 } green_tx_param; 2016 2017 #ifdef FEATURE_WLAN_TDLS 2018 /** 2019 * struct wma_tdls_params - TDLS parameters 2020 * @vdev_id: vdev id 2021 * @tdls_state: TDLS state 2022 * @notification_interval_ms: notification inerval 2023 * @tx_discovery_threshold: tx discovery threshold 2024 * @tx_teardown_threshold: tx teardown threashold 2025 * @rssi_teardown_threshold: RSSI teardown threshold 2026 * @rssi_delta: RSSI delta 2027 * @tdls_options: TDLS options 2028 * @peer_traffic_ind_window: raffic indication window 2029 * @peer_traffic_response_timeout: traffic response timeout 2030 * @puapsd_mask: uapsd mask 2031 * @puapsd_inactivity_time: uapsd inactivity time 2032 * @puapsd_rx_frame_threshold: uapsd rx frame threshold 2033 * @teardown_notification_ms: tdls teardown notification interval 2034 * @tdls_peer_kickout_threshold: tdls packet threshold for 2035 * peer kickout operation 2036 */ 2037 typedef struct wma_tdls_params { 2038 uint32_t vdev_id; 2039 uint32_t tdls_state; 2040 uint32_t notification_interval_ms; 2041 uint32_t tx_discovery_threshold; 2042 uint32_t tx_teardown_threshold; 2043 int32_t rssi_teardown_threshold; 2044 int32_t rssi_delta; 2045 uint32_t tdls_options; 2046 uint32_t peer_traffic_ind_window; 2047 uint32_t peer_traffic_response_timeout; 2048 uint32_t puapsd_mask; 2049 uint32_t puapsd_inactivity_time; 2050 uint32_t puapsd_rx_frame_threshold; 2051 uint32_t teardown_notification_ms; 2052 uint32_t tdls_peer_kickout_threshold; 2053 } t_wma_tdls_params; 2054 2055 /** 2056 * struct wma_tdls_peer_event - TDLS peer event 2057 * @vdev_id: vdev id 2058 * @peer_macaddr: peer MAC address 2059 * @peer_status: TDLS peer status 2060 * @peer_reason: TDLS peer reason 2061 */ 2062 typedef struct { 2063 A_UINT32 vdev_id; 2064 wmi_mac_addr peer_macaddr; 2065 A_UINT32 peer_status; 2066 A_UINT32 peer_reason; 2067 } wma_tdls_peer_event; 2068 2069 #endif /* FEATURE_WLAN_TDLS */ 2070 2071 /** 2072 * struct wma_dfs_radar_channel_list - dfs radar channel list 2073 * @nchannels: nuber of channels 2074 * @channels: Channel number including bonded channels on which 2075 * radar is present 2076 */ 2077 struct wma_dfs_radar_channel_list { 2078 A_UINT32 nchannels; 2079 uint8_t channels[WMA_DFS_MAX_20M_SUB_CH]; 2080 }; 2081 2082 /** 2083 * struct wma_dfs_radar_indication - Structure to indicate RADAR 2084 * @vdev_id: vdev id 2085 * @chan_list: Channel list on which RADAR is detected 2086 * @dfs_radar_status: Flag to Indicate RADAR presence on the current channel 2087 * @use_nol: Flag to indicate use NOL 2088 */ 2089 struct wma_dfs_radar_indication { 2090 A_UINT32 vdev_id; 2091 struct wma_dfs_radar_channel_list chan_list; 2092 uint32_t dfs_radar_status; 2093 int use_nol; 2094 }; 2095 2096 /** 2097 * enum uapsd_ac - U-APSD Access Categories 2098 * @UAPSD_BE: best effort 2099 * @UAPSD_BK: back ground 2100 * @UAPSD_VI: video 2101 * @UAPSD_VO: voice 2102 */ 2103 enum uapsd_ac { 2104 UAPSD_BE, 2105 UAPSD_BK, 2106 UAPSD_VI, 2107 UAPSD_VO 2108 }; 2109 2110 QDF_STATUS wma_disable_uapsd_per_ac(tp_wma_handle wma_handle, 2111 uint32_t vdev_id, enum uapsd_ac ac); 2112 2113 /** 2114 * enum uapsd_up - U-APSD User Priorities 2115 * @UAPSD_UP_BE: best effort 2116 * @UAPSD_UP_BK: back ground 2117 * @UAPSD_UP_RESV: reserve 2118 * @UAPSD_UP_EE: Excellent Effort 2119 * @UAPSD_UP_CL: Critical Applications 2120 * @UAPSD_UP_VI: video 2121 * @UAPSD_UP_VO: voice 2122 * @UAPSD_UP_NC: Network Control 2123 */ 2124 enum uapsd_up { 2125 UAPSD_UP_BE, 2126 UAPSD_UP_BK, 2127 UAPSD_UP_RESV, 2128 UAPSD_UP_EE, 2129 UAPSD_UP_CL, 2130 UAPSD_UP_VI, 2131 UAPSD_UP_VO, 2132 UAPSD_UP_NC, 2133 UAPSD_UP_MAX 2134 }; 2135 2136 /** 2137 * struct wma_unit_test_cmd - unit test command parameters 2138 * @vdev_id: vdev id 2139 * @module_id: module id 2140 * @num_args: number of arguments 2141 * @args: arguments 2142 */ 2143 typedef struct wma_unit_test_cmd { 2144 uint32_t vdev_id; 2145 WLAN_MODULE_ID module_id; 2146 uint32_t num_args; 2147 uint32_t args[WMA_MAX_NUM_ARGS]; 2148 } t_wma_unit_test_cmd; 2149 2150 /** 2151 * struct wma_roam_invoke_cmd - roam invoke command 2152 * @vdev_id: vdev id 2153 * @bssid: mac address 2154 * @channel: channel 2155 */ 2156 struct wma_roam_invoke_cmd { 2157 uint32_t vdev_id; 2158 uint8_t bssid[IEEE80211_ADDR_LEN]; 2159 uint32_t channel; 2160 }; 2161 2162 /** 2163 * struct wma_process_fw_event_params - fw event parameters 2164 * @wmi_handle: wmi handle 2165 * @evt_buf: event buffer 2166 */ 2167 typedef struct { 2168 void *wmi_handle; 2169 void *evt_buf; 2170 } wma_process_fw_event_params; 2171 2172 int wma_process_fw_event_handler(void *ctx, void *ev, uint8_t rx_ctx); 2173 2174 A_UINT32 e_csr_auth_type_to_rsn_authmode(eCsrAuthType authtype, 2175 eCsrEncryptionType encr); 2176 A_UINT32 e_csr_encryption_type_to_rsn_cipherset(eCsrEncryptionType encr); 2177 2178 /* 2179 * WMA-DFS Hooks 2180 */ 2181 int ol_if_dfs_attach(struct ieee80211com *ic, void *ptr, void *radar_info); 2182 uint64_t ol_if_get_tsf64(struct ieee80211com *ic); 2183 int ol_if_dfs_disable(struct ieee80211com *ic); 2184 struct dfs_ieee80211_channel *ieee80211_find_channel(struct ieee80211com *ic, 2185 int freq, uint32_t flags); 2186 int ol_if_dfs_enable(struct ieee80211com *ic, int *is_fastclk, void *pe); 2187 uint32_t ieee80211_ieee2mhz(uint32_t chan, uint32_t flags); 2188 int ol_if_dfs_get_ext_busy(struct ieee80211com *ic); 2189 int ol_if_dfs_get_mib_cycle_counts_pct(struct ieee80211com *ic, 2190 uint32_t *rxc_pcnt, uint32_t *rxf_pcnt, 2191 uint32_t *txf_pcnt); 2192 uint16_t ol_if_dfs_usenol(struct ieee80211com *ic); 2193 void ieee80211_mark_dfs(struct ieee80211com *ic, 2194 struct dfs_ieee80211_channel *ichan); 2195 int wma_dfs_indicate_radar(struct ieee80211com *ic, 2196 struct dfs_ieee80211_channel *ichan); 2197 2198 QDF_STATUS wma_trigger_uapsd_params(tp_wma_handle wma_handle, uint32_t vdev_id, 2199 tp_wma_trigger_uapsd_params 2200 trigger_uapsd_params); 2201 2202 /* added to get average snr for both data and beacon */ 2203 QDF_STATUS wma_send_snr_request(tp_wma_handle wma_handle, void *pGetRssiReq); 2204 2205 2206 QDF_STATUS wma_update_vdev_tbl(tp_wma_handle wma_handle, uint8_t vdev_id, 2207 void *tx_rx_vdev_handle, 2208 uint8_t *mac, uint32_t vdev_type, bool add_del); 2209 2210 void wma_send_flush_logs_to_fw(tp_wma_handle wma_handle); 2211 void wma_log_completion_timeout(void *data); 2212 2213 QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma, 2214 struct rssi_monitor_req *req); 2215 2216 QDF_STATUS wma_send_pdev_set_pcl_cmd(tp_wma_handle wma_handle, 2217 struct wmi_pcl_chan_weights *msg); 2218 2219 QDF_STATUS wma_send_pdev_set_hw_mode_cmd(tp_wma_handle wma_handle, 2220 struct sir_hw_mode *msg); 2221 QDF_STATUS wma_get_scan_id(uint32_t *scan_id); 2222 2223 QDF_STATUS wma_send_pdev_set_dual_mac_config(tp_wma_handle wma_handle, 2224 struct sir_dual_mac_config *msg); 2225 QDF_STATUS wma_send_pdev_set_antenna_mode(tp_wma_handle wma_handle, 2226 struct sir_antenna_mode_param *msg); 2227 QDF_STATUS wma_crash_inject(tp_wma_handle wma_handle, uint32_t type, 2228 uint32_t delay_time_ms); 2229 2230 struct wma_target_req *wma_fill_vdev_req(tp_wma_handle wma, 2231 uint8_t vdev_id, 2232 uint32_t msg_type, uint8_t type, 2233 void *params, uint32_t timeout); 2234 struct wma_target_req *wma_fill_hold_req(tp_wma_handle wma, 2235 uint8_t vdev_id, uint32_t msg_type, 2236 uint8_t type, void *params, 2237 uint32_t timeout); 2238 2239 QDF_STATUS wma_vdev_start(tp_wma_handle wma, 2240 struct wma_vdev_start_req *req, bool isRestart); 2241 2242 void wma_remove_vdev_req(tp_wma_handle wma, uint8_t vdev_id, 2243 uint8_t type); 2244 2245 int wmi_desc_pool_init(tp_wma_handle wma_handle, uint32_t pool_size); 2246 void wmi_desc_pool_deinit(tp_wma_handle wma_handle); 2247 struct wmi_desc_t *wmi_desc_get(tp_wma_handle wma_handle); 2248 void wmi_desc_put(tp_wma_handle wma_handle, struct wmi_desc_t *wmi_desc); 2249 int wma_mgmt_tx_completion_handler(void *handle, uint8_t *cmpl_event_params, 2250 uint32_t len); 2251 int wma_mgmt_tx_bundle_completion_handler(void *handle, 2252 uint8_t *cmpl_event_params, uint32_t len); 2253 void wma_set_dfs_region(tp_wma_handle wma, enum dfs_region dfs_region); 2254 uint32_t wma_get_vht_ch_width(void); 2255 QDF_STATUS 2256 wma_config_debug_module_cmd(wmi_unified_t wmi_handle, A_UINT32 param, 2257 A_UINT32 val, A_UINT32 *module_id_bitmap, 2258 A_UINT32 bitmap_len); 2259 #ifdef FEATURE_LFR_SUBNET_DETECTION 2260 QDF_STATUS wma_set_gateway_params(tp_wma_handle wma, 2261 struct gateway_param_update_req *req); 2262 #else 2263 static inline QDF_STATUS wma_set_gateway_params(tp_wma_handle wma, 2264 struct gateway_param_update_req *req) 2265 { 2266 return QDF_STATUS_SUCCESS; 2267 } 2268 #endif /* FEATURE_LFR_SUBNET_DETECTION */ 2269 2270 #if defined(FEATURE_LRO) 2271 QDF_STATUS wma_lro_config_cmd(tp_wma_handle wma_handle, 2272 struct wma_lro_config_cmd_t *wma_lro_cmd); 2273 #else 2274 static inline QDF_STATUS wma_lro_config_cmd(tp_wma_handle wma_handle, 2275 struct wma_lro_config_cmd_t *wma_lro_cmd) 2276 { 2277 return QDF_STATUS_SUCCESS; 2278 } 2279 #endif 2280 void 2281 wma_indicate_err(enum ol_rx_err_type err_type, 2282 struct ol_error_info *err_info); 2283 2284 QDF_STATUS wma_ht40_stop_obss_scan(tp_wma_handle wma_handle, 2285 int32_t vdev_id); 2286 2287 void wma_process_fw_test_cmd(WMA_HANDLE handle, 2288 struct set_fwtest_params *wma_fwtest); 2289 2290 QDF_STATUS wma_send_ht40_obss_scanind(tp_wma_handle wma, 2291 struct obss_ht40_scanind *req); 2292 2293 int wma_get_bpf_caps_event_handler(void *handle, 2294 u_int8_t *cmd_param_info, 2295 u_int32_t len); 2296 uint32_t wma_get_num_of_setbits_from_bitmask(uint32_t mask); 2297 QDF_STATUS wma_get_bpf_capabilities(tp_wma_handle wma); 2298 QDF_STATUS wma_set_bpf_instructions(tp_wma_handle wma, 2299 struct sir_bpf_set_offload *bpf_set_offload); 2300 void wma_process_set_pdev_ie_req(tp_wma_handle wma, 2301 struct set_ie_param *ie_params); 2302 void wma_process_set_pdev_ht_ie_req(tp_wma_handle wma, 2303 struct set_ie_param *ie_params); 2304 void wma_process_set_pdev_vht_ie_req(tp_wma_handle wma, 2305 struct set_ie_param *ie_params); 2306 void wma_remove_peer(tp_wma_handle wma, u_int8_t *bssid, 2307 u_int8_t vdev_id, void *peer, 2308 bool roam_synch_in_progress); 2309 2310 QDF_STATUS wma_add_wow_wakeup_event(tp_wma_handle wma, 2311 uint32_t vdev_id, 2312 uint32_t bitmap, 2313 bool enable); 2314 QDF_STATUS wma_create_peer(tp_wma_handle wma, void *pdev, 2315 void *vdev, u8 peer_addr[6], 2316 u_int32_t peer_type, u_int8_t vdev_id, 2317 bool roam_synch_in_progress); 2318 2319 #endif 2320 struct wma_ini_config *wma_get_ini_handle(tp_wma_handle wma_handle); 2321 WLAN_PHY_MODE wma_chan_phy_mode(u8 chan, enum phy_ch_width chan_width, 2322 u8 dot11_mode); 2323 2324 #ifdef FEATURE_OEM_DATA_SUPPORT 2325 QDF_STATUS wma_start_oem_data_req(tp_wma_handle wma_handle, 2326 struct oem_data_req *oem_req); 2327 #endif 2328 2329 QDF_STATUS wma_enable_disable_caevent_ind(tp_wma_handle wma_handle, 2330 uint8_t val); 2331 void wma_register_packetdump_callback( 2332 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb, 2333 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb); 2334 void wma_deregister_packetdump_callback(void); 2335 void wma_update_sta_inactivity_timeout(tp_wma_handle wma, 2336 struct sme_sta_inactivity_timeout *sta_inactivity_timer); 2337 void wma_peer_set_default_routing(void *scn_handle, uint8_t *peer_macaddr, 2338 uint8_t vdev_id, bool hash_based, uint8_t ring_num); 2339 int wma_peer_rx_reorder_queue_setup(void *scn_handle, 2340 uint8_t vdev_id, uint8_t *peer_macaddr, qdf_dma_addr_t hw_qdesc, 2341 int tid, uint16_t queue_no); 2342 int wma_peer_rx_reorder_queue_remove(void *scn_handle, 2343 uint8_t vdev_id, uint8_t *peer_macaddr, uint32_t peer_tid_bitmap); 2344