1 /* 2 * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _WMI_UNIFIED_DBR_PARAM_H_ 20 #define _WMI_UNIFIED_DBR_PARAM_H_ 21 22 #define WMI_HOST_DBR_RING_ADDR_LO_S 0 23 #define WMI_HOST_DBR_RING_ADDR_LO 0xffffffff 24 25 #define WMI_HOST_DBR_RING_ADDR_LO_GET(dword) \ 26 WMI_HOST_F_MS(dword, WMI_HOST_DBR_RING_ADDR_LO) 27 #define WMI_HOST_DBR_RING_ADDR_LO_SET(dword, val) \ 28 WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_RING_ADDR_LO) 29 30 #define WMI_HOST_DBR_RING_ADDR_HI_S 0 31 #define WMI_HOST_DBR_RING_ADDR_HI 0xf 32 33 #define WMI_HOST_DBR_RING_ADDR_HI_GET(dword) \ 34 WMI_HOST_F_MS(dword, WMI_HOST_DBR_RING_ADDR_HI) 35 #define WMI_HOST_DBR_RING_ADDR_HI_SET(dword, val) \ 36 WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_RING_ADDR_HI) 37 38 #define WMI_HOST_DBR_DATA_ADDR_LO_S 0 39 #define WMI_HOST_DBR_DATA_ADDR_LO 0xffffffff 40 41 #define WMI_HOST_DBR_DATA_ADDR_LO_GET(dword) \ 42 WMI_HOST_F_MS(dword, WMI_HOST_DBR_DATA_ADDR_LO) 43 #define WMI_HOST_DBR_DATA_ADDR_LO_SET(dword, val) \ 44 WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_DATA_ADDR_LO) 45 46 #define WMI_HOST_DBR_DATA_ADDR_HI_S 0 47 #define WMI_HOST_DBR_DATA_ADDR_HI 0xf 48 49 #define WMI_HOST_DBR_DATA_ADDR_HI_GET(dword) \ 50 WMI_HOST_F_MS(dword, WMI_HOST_DBR_DATA_ADDR_HI) 51 #define WMI_HOST_DBR_DATA_ADDR_HI_SET(dword, val) \ 52 WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_DATA_ADDR_HI) 53 54 #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_S 12 55 #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA 0x7fffff 56 57 #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_GET(dword) \ 58 WMI_HOST_F_MS(dword, WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA) 59 #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_SET(dword, val) \ 60 WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA) 61 62 #define WMI_HOST_MAX_NUM_CHAINS 8 63 64 /** 65 * struct direct_buf_rx_rsp: direct buffer rx response structure 66 * 67 * @pdev_id: Index of the pdev for which response is received 68 * @mod_mod: Index of the module for which respone is received 69 * @num_buf_release_entry: Number of buffers released through event 70 * @dbr_entries: Pointer to direct buffer rx entry struct 71 */ 72 struct direct_buf_rx_rsp { 73 uint32_t pdev_id; 74 uint32_t mod_id; 75 uint32_t num_buf_release_entry; 76 uint32_t num_meta_data_entry; 77 struct direct_buf_rx_entry *dbr_entries; 78 }; 79 80 /** 81 * struct direct_buf_rx_cfg_req: direct buffer rx config request structure 82 * 83 * @pdev_id: Index of the pdev for which response is received 84 * @mod_id: Index of the module for which respone is received 85 * @base_paddr_lo: Lower 32bits of ring base address 86 * @base_paddr_hi: Higher 32bits of ring base address 87 * @head_idx_paddr_lo: Lower 32bits of head idx register address 88 * @head_idx_paddr_hi: Higher 32bits of head idx register address 89 * @tail_idx_paddr_lo: Lower 32bits of tail idx register address 90 * @tail_idx_paddr_hi: Higher 32bits of tail idx register address 91 * @buf_size: Size of the buffer for each pointer in the ring 92 * @num_elems: Number of pointers allocated and part of the source ring 93 */ 94 struct direct_buf_rx_cfg_req { 95 uint32_t pdev_id; 96 uint32_t mod_id; 97 uint32_t base_paddr_lo; 98 uint32_t base_paddr_hi; 99 uint32_t head_idx_paddr_lo; 100 uint32_t head_idx_paddr_hi; 101 uint32_t tail_idx_paddr_hi; 102 uint32_t tail_idx_paddr_lo; 103 uint32_t buf_size; 104 uint32_t num_elems; 105 uint32_t event_timeout_ms; 106 uint32_t num_resp_per_event; 107 }; 108 109 /** 110 * struct direct_buf_rx_metadata: direct buffer metadata 111 * 112 * @noisefloor: noisefloor 113 */ 114 struct direct_buf_rx_metadata { 115 int32_t noisefloor[WMI_HOST_MAX_NUM_CHAINS]; 116 }; 117 118 /** 119 * struct direct_buf_rx_entry: direct buffer rx release entry structure 120 * 121 * @addr_lo: LSB 32-bits of the buffer 122 * @addr_hi: MSB 32-bits of the buffer 123 * @len: Length of the buffer 124 */ 125 struct direct_buf_rx_entry { 126 uint32_t paddr_lo; 127 uint32_t paddr_hi; 128 uint32_t len; 129 }; 130 131 #endif /* _WMI_UNIFIED_DBR_PARAM_H_ */ 132