xref: /wlan-dirver/qca-wifi-host-cmn/wlan_cfg/wlan_cfg.h (revision dae10a5fbc53d54c53c4ba24fa018ad8b1e7c008)
1 /*
2 * * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef __WLAN_CFG_H
20 #define __WLAN_CFG_H
21 
22 /*
23  * Temporary place holders. These should come either from target config
24  * or platform configuration
25  */
26 #if defined(CONFIG_MCL)
27 #define MAX_PDEV_CNT 1
28 #define WLAN_CFG_INT_NUM_CONTEXTS 7
29 /*
30  * This mask defines how many transmit frames account for 1 NAPI work unit
31  * 0 means each tx completion is 1 unit
32  */
33 #define DP_TX_NAPI_BUDGET_DIV_MASK 0
34 
35 /* PPDU Stats Configuration - Configure bitmask for enabling tx ppdu tlv's */
36 #define DP_PPDU_TXLITE_STATS_BITMASK_CFG 0x1FFF
37 
38 #define NUM_RXDMA_RINGS_PER_PDEV 2
39 #else
40 #define MAX_PDEV_CNT 3
41 #define WLAN_CFG_INT_NUM_CONTEXTS 7
42 /*
43  * This mask defines how many transmit frames account for 1 NAPI work unit
44  * 0xFFFF means each 64K tx frame completions account for 1 unit of NAPI budget
45  */
46 #define DP_TX_NAPI_BUDGET_DIV_MASK 0xFFFF
47 
48 /* PPDU Stats Configuration - Configure bitmask for enabling tx ppdu tlv's */
49 #define DP_PPDU_TXLITE_STATS_BITMASK_CFG 0xFFFF
50 
51 #define NUM_RXDMA_RINGS_PER_PDEV 1
52 #endif
53 
54 /* Tx configuration */
55 #define MAX_LINK_DESC_BANKS 8
56 #define MAX_TXDESC_POOLS 4
57 #define MAX_TCL_DATA_RINGS 4
58 
59 /* Rx configuration */
60 #define MAX_RXDESC_POOLS 4
61 #define MAX_REO_DEST_RINGS 4
62 #define MAX_RX_MAC_RINGS 2
63 
64 /* DP process status */
65 #ifdef CONFIG_MCL
66 #define CONFIG_PROCESS_RX_STATUS 1
67 #define CONFIG_PROCESS_TX_STATUS 1
68 #else
69 #define CONFIG_PROCESS_RX_STATUS 0
70 #define CONFIG_PROCESS_TX_STATUS 0
71 #endif
72 
73 /* Miscellaneous configuration */
74 #define MAX_IDLE_SCATTER_BUFS 16
75 #define DP_MAX_IRQ_PER_CONTEXT 12
76 #define DP_MAX_INTERRUPT_CONTEXTS 8
77 #define DP_MAX_INTERRUPT_CONTEXTS 8
78 #define MAX_HTT_METADATA_LEN 32
79 #define MAX_NUM_PEER_ID_PER_PEER 8
80 #define DP_MAX_TIDS 17
81 #define DP_NON_QOS_TID 16
82 
83 struct wlan_cfg_dp_pdev_ctxt;
84 
85 /**
86  * struct wlan_cfg_dp_soc_ctxt - Configuration parameters for SoC (core TxRx)
87  * @num_int_ctxts - Number of NAPI/Interrupt contexts to be registered for DP
88  * @max_clients - Maximum number of peers/stations supported by device
89  * @max_alloc_size - Maximum allocation size for any dynamic memory
90  *			allocation request for this device
91  * @per_pdev_tx_ring - 0 - TCL ring is not mapped per radio
92  *		       1 - Each TCL ring is mapped to one radio/pdev
93  * @num_tcl_data_rings - Number of TCL Data rings supported by device
94  * @per_pdev_rx_ring - 0 - REO ring is not mapped per radio
95  *		       1 - Each REO ring is mapped to one radio/pdev
96  * @num_tx_desc_pool - Number of Tx Descriptor pools
97  * @num_tx_ext_desc_pool - Number of Tx MSDU extension Descriptor pools
98  * @num_tx_desc - Number of Tx Descriptors per pool
99  * @num_tx_ext_desc - Number of Tx MSDU extension Descriptors per pool
100  * @max_peer_id - Maximum value of peer id that FW can assign for a client
101  * @htt_packet_type - Default 802.11 encapsulation type for any VAP created
102  * @int_tx_ring_mask - Bitmap of Tx interrupts mapped to each NAPI/Intr context
103  * @int_rx_ring_mask - Bitmap of Rx interrupts mapped to each NAPI/Intr context
104  * @int_rx_mon_ring_mask - Bitmap of Rx monitor ring interrupts mapped to each
105  *			  NAPI/Intr context
106  * @int_rx_err_ring_mask - Bitmap of Rx err ring interrupts mapped to each
107  *			  NAPI/Intr context
108  * @int_wbm_rel_ring_mask - Bitmap of wbm rel ring interrupts mapped to each
109  *			  NAPI/Intr context
110  * @int_reo_status_ring_mask - Bitmap of reo status ring interrupts mapped to each
111  *                        NAPI/Intr context
112  * @int_ce_ring_mask - Bitmap of CE interrupts mapped to each NAPI/Intr context
113  * @lro_enabled - enable/disable lro feature
114  * @rx_hash - Enable hash based steering of rx packets
115  * @tso_enabled - enable/disable tso feature
116  * @napi_enabled - enable/disable interrupt mode for reaping tx and rx packets
117  * @tcp_Udp_Checksumoffload - enable/disable checksum offload
118  * @nss_cfg - nss configuration
119  * @rx_defrag_min_timeout - rx defrag minimum timeout
120  * @wbm_release_ring - wbm release ring size
121  * @tcl_cmd_ring - tcl cmd ring size
122  * @tcl_status_ring - tcl status ring size
123  * @reo_reinject_ring - reo reinject ring
124  * @rx_release_ring - rx release ring size
125  * @reo_exception_ring - reo exception ring size
126  * @reo_cmd_ring - reo cmd ring size
127  * @reo_status_ring - reo status ting size
128  * @rxdma_refill_ring - rxdma refill ring size
129  * @rxdma_err_dst_ring - rxdma error detination ring size
130  * @raw_mode_war - enable/disable raw mode war
131  */
132 struct wlan_cfg_dp_soc_ctxt {
133 	int num_int_ctxts;
134 	int max_clients;
135 	int max_alloc_size;
136 	int per_pdev_tx_ring;
137 	int num_tcl_data_rings;
138 	int per_pdev_rx_ring;
139 	int per_pdev_lmac_ring;
140 	int num_reo_dest_rings;
141 	int num_tx_desc_pool;
142 	int num_tx_ext_desc_pool;
143 	int num_tx_desc;
144 	int num_tx_ext_desc;
145 	int max_peer_id;
146 	int htt_packet_type;
147 	int int_batch_threshold_tx;
148 	int int_timer_threshold_tx;
149 	int int_batch_threshold_rx;
150 	int int_timer_threshold_rx;
151 	int int_batch_threshold_other;
152 	int int_timer_threshold_other;
153 	int tx_ring_size;
154 	int tx_comp_ring_size;
155 	int tx_comp_ring_size_nss;
156 	int int_tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
157 	int int_rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
158 	int int_rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
159 	int int_ce_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
160 	int int_rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
161 	int int_rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
162 	int int_reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
163 	int int_rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
164 	int int_host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
165 	int hw_macid[MAX_PDEV_CNT];
166 	int base_hw_macid;
167 	bool rx_hash;
168 	bool tso_enabled;
169 	bool lro_enabled;
170 	bool sg_enabled;
171 	bool gro_enabled;
172 	bool ol_tx_csum_enabled;
173 	bool ol_rx_csum_enabled;
174 	bool rawmode_enabled;
175 	bool peer_flow_ctrl_enabled;
176 	bool napi_enabled;
177 	bool tcp_udp_checksumoffload;
178 	bool defrag_timeout_check;
179 	int nss_cfg;
180 #ifdef QCA_LL_TX_FLOW_CONTROL_V2
181 	uint32_t tx_flow_stop_queue_threshold;
182 	uint32_t tx_flow_start_queue_offset;
183 #endif
184 	int rx_defrag_min_timeout;
185 	int reo_dst_ring_size;
186 	int wbm_release_ring;
187 	int tcl_cmd_ring;
188 	int tcl_status_ring;
189 	int reo_reinject_ring;
190 	int rx_release_ring;
191 	int reo_exception_ring;
192 	int reo_cmd_ring;
193 	int reo_status_ring;
194 
195 	int rxdma_refill_ring;
196 	int rxdma_err_dst_ring;
197 	bool raw_mode_war;
198 };
199 
200 /**
201  * wlan_cfg_soc_attach() - Attach configuration interface for SoC
202  * @ctrl_obj - PSOC object
203  *
204  * Allocates context for Soc configuration parameters,
205  * Read configuration information from device tree/ini file and
206  * returns back handle
207  *
208  * Return: Handle to configuration context
209  */
210 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach(void *ctrl_obj);
211 
212 /**
213  * wlan_cfg_soc_detach() - Detach soc configuration handle
214  * @wlan_cfg_ctx: soc configuration handle
215  *
216  * De-allocates memory allocated for SoC configuration
217  *
218  * Return:none
219  */
220 void wlan_cfg_soc_detach(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
221 
222 /**
223  * wlan_cfg_pdev_attach() Attach configuration interface for pdev
224  * @ctrl_obj - PSOC object
225  *
226  * Allocates context for pdev configuration parameters,
227  * Read configuration information from device tree/ini file and
228  * returns back handle
229  *
230  * Return: Handle to configuration context
231  */
232 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_attach(void *ctrl_obj);
233 
234 /**
235  * wlan_cfg_pdev_detach() Detach and free pdev configuration handle
236  * @wlan_cfg_pdev_ctx - PDEV Configuration Handle
237  *
238  * Return: void
239  */
240 void wlan_cfg_pdev_detach(struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx);
241 
242 void wlan_cfg_set_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg, int num);
243 void wlan_cfg_set_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
244 			       int context, int mask);
245 void wlan_cfg_set_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
246 			       int context, int mask);
247 void wlan_cfg_set_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
248 				   int context, int mask);
249 void wlan_cfg_set_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
250 			       int context, int mask);
251 void wlan_cfg_set_rxbuf_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context,
252 				  int mask);
253 void wlan_cfg_set_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg, uint32_t val);
254 
255 int wlan_cfg_set_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
256 				int context, int mask);
257 int wlan_cfg_set_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
258 					int context, int mask);
259 int wlan_cfg_set_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
260 					int context, int mask);
261 /**
262  * wlan_cfg_get_num_contexts() - Number of interrupt contexts to be registered
263  * @wlan_cfg_ctx - Configuration Handle
264  *
265  * For WIN,  DP_NUM_INTERRUPT_CONTEXTS will be equal to  number of CPU cores.
266  * Each context (for linux it is a NAPI context) will have a tx_ring_mask,
267  * rx_ring_mask ,and rx_monitor_ring mask  to indicate the rings
268  * that are processed by the handler.
269  *
270  * Return: num_contexts
271  */
272 int wlan_cfg_get_num_contexts(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
273 
274 /**
275  * wlan_cfg_get_tx_ring_mask() - Return Tx interrupt mask mapped to an
276  *				 interrupt context
277  * @wlan_cfg_ctx - Configuration Handle
278  * @context - Numerical ID identifying the Interrupt/NAPI context
279  *
280  * Return: int_tx_ring_mask[context]
281  */
282 int wlan_cfg_get_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
283 		int context);
284 
285 /**
286  * wlan_cfg_get_rx_ring_mask() - Return Rx interrupt mask mapped to an
287  *				 interrupt context
288  * @wlan_cfg_ctx - Configuration Handle
289  * @context - Numerical ID identifying the Interrupt/NAPI context
290  *
291  * Return: int_rx_ring_mask[context]
292  */
293 int wlan_cfg_get_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
294 		int context);
295 
296 /**
297  * wlan_cfg_get_rx_mon_ring_mask() - Return Rx monitor ring interrupt mask
298  *				   mapped to an interrupt context
299  * @wlan_cfg_ctx - Configuration Handle
300  * @context - Numerical ID identifying the Interrupt/NAPI context
301  *
302  * Return: int_rx_mon_ring_mask[context]
303  */
304 int wlan_cfg_get_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
305 		int context);
306 
307 /**
308  * wlan_cfg_set_rxdma2host_ring_mask() - Set rxdma2host ring interrupt mask
309  *				   for the given interrupt context
310  * @wlan_cfg_ctx - Configuration Handle
311  * @context - Numerical ID identifying the Interrupt/NAPI context
312  *
313  */
314 void wlan_cfg_set_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
315 	int context, int mask);
316 
317 /**
318  * wlan_cfg_get_rxdma2host_ring_mask() - Return rxdma2host ring interrupt mask
319  *				   mapped to an interrupt context
320  * @wlan_cfg_ctx - Configuration Handle
321  * @context - Numerical ID identifying the Interrupt/NAPI context
322  *
323  * Return: int_rxdma2host_ring_mask[context]
324  */
325 int wlan_cfg_get_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
326 	int context);
327 
328 /**
329  * wlan_cfg_set_host2rxdma_ring_mask() - Set host2rxdma ring interrupt mask
330  *				   for the given interrupt context
331  * @wlan_cfg_ctx - Configuration Handle
332  * @context - Numerical ID identifying the Interrupt/NAPI context
333  *
334  */
335 void wlan_cfg_set_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
336 	int context, int mask);
337 
338 /**
339  * wlan_cfg_get_host2rxdma_ring_mask() - Return host2rxdma ring interrupt mask
340  *				   mapped to an interrupt context
341  * @wlan_cfg_ctx - Configuration Handle
342  * @context - Numerical ID identifying the Interrupt/NAPI context
343  *
344  * Return: int_host2rxdma_ring_mask[context]
345  */
346 int wlan_cfg_get_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
347 	int context);
348 
349 /**
350  * wlan_cfg_set_hw_macid() - Set HW MAC Id for the given PDEV index
351  *
352  * @wlan_cfg_ctx - Configuration Handle
353  * @pdev_idx - Index of SW PDEV
354  * @hw_macid - HW MAC Id
355  *
356  */
357 void wlan_cfg_set_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx,
358 	int hw_macid);
359 
360 /**
361  * wlan_cfg_get_hw_macid() - Get HW MAC Id for the given PDEV index
362  *
363  * @wlan_cfg_ctx - Configuration Handle
364  * @pdev_idx - Index of SW PDEV
365  *
366  * Return: HW MAC Id
367  */
368 int wlan_cfg_get_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx);
369 
370 /**
371  * wlan_cfg_get_hw_mac_idx() - Get 0 based HW MAC index for the given
372  * PDEV index
373  *
374  * @wlan_cfg_ctx - Configuration Handle
375  * @pdev_idx - Index of SW PDEV
376  *
377  * Return: HW MAC index
378  */
379 int wlan_cfg_get_hw_mac_idx(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx);
380 
381 /**
382  * wlan_cfg_get_rx_err_ring_mask() - Return Rx monitor ring interrupt mask
383  *					   mapped to an interrupt context
384  * @wlan_cfg_ctx - Configuration Handle
385  * @context - Numerical ID identifying the Interrupt/NAPI context
386  *
387  * Return: int_rx_err_ring_mask[context]
388  */
389 int wlan_cfg_get_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int
390 				  context);
391 
392 /**
393  * wlan_cfg_get_rx_wbm_rel_ring_mask() - Return Rx monitor ring interrupt mask
394  *					   mapped to an interrupt context
395  * @wlan_cfg_ctx - Configuration Handle
396  * @context - Numerical ID identifying the Interrupt/NAPI context
397  *
398  * Return: int_wbm_rel_ring_mask[context]
399  */
400 int wlan_cfg_get_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int
401 				      context);
402 
403 /**
404  * wlan_cfg_get_reo_status_ring_mask() - Return Rx monitor ring interrupt mask
405  *					   mapped to an interrupt context
406  * @wlan_cfg_ctx - Configuration Handle
407  * @context - Numerical ID identifying the Interrupt/NAPI context
408  *
409  * Return: int_reo_status_ring_mask[context]
410  */
411 int wlan_cfg_get_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int
412 				      context);
413 
414 /**
415  * wlan_cfg_get_ce_ring_mask() - Return CE ring interrupt mask
416  *				mapped to an interrupt context
417  * @wlan_cfg_ctx - Configuration Handle
418  * @context - Numerical ID identifying the Interrupt/NAPI context
419  *
420  * Return: int_ce_ring_mask[context]
421  */
422 int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
423 		int context);
424 
425 /**
426  * wlan_cfg_get_max_clients() - Return maximum number of peers/stations
427  *				supported by device
428  * @wlan_cfg_ctx - Configuration Handle
429  *
430  * Return: max_clients
431  */
432 uint32_t wlan_cfg_get_max_clients(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
433 
434 /**
435  * wlan_cfg_max_alloc_size() - Return Maximum allocation size for any dynamic
436  *			    memory allocation request for this device
437  * @wlan_cfg_ctx - Configuration Handle
438  *
439  * Return: max_alloc_size
440  */
441 uint32_t wlan_cfg_max_alloc_size(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
442 
443 /*
444  * wlan_cfg_per_pdev_tx_ring() - Return true if Tx rings are mapped as
445  *			       one per radio
446  * @wlan_cfg_ctx - Configuration Handle
447  *
448  * Return: per_pdev_tx_ring
449  */
450 int wlan_cfg_per_pdev_tx_ring(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
451 
452 /*
453  * wlan_cfg_num_tcl_data_rings() - Number of TCL Data rings supported by device
454  * @wlan_cfg_ctx
455  *
456  * Return: num_tcl_data_rings
457  */
458 int wlan_cfg_num_tcl_data_rings(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
459 
460 /*
461  * wlan_cfg_per_pdev_rx_ring() - Return true if Rx rings are mapped as
462  *                              one per radio
463  * @wlan_cfg_ctx
464  *
465  * Return: per_pdev_rx_ring
466  */
467 int wlan_cfg_per_pdev_rx_ring(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
468 
469 /*
470  * wlan_cfg_per_pdev_lmac_ring() - Return true if error rings are mapped as
471  *                              one per radio
472  * @wlan_cfg_ctx
473  *
474  * Return: return 1 if per pdev error ring else 0
475  */
476 int wlan_cfg_per_pdev_lmac_ring(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
477 
478 /*
479  * wlan_cfg_num_reo_dest_rings() - Number of REO Data rings supported by device
480  * @wlan_cfg_ctx - Configuration Handle
481  *
482  * Return: num_reo_dest_rings
483  */
484 int wlan_cfg_num_reo_dest_rings(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
485 
486 /*
487  * wlan_cfg_pkt_type() - Default 802.11 encapsulation type
488  * @wlan_cfg_ctx - Configuration Handle
489  *
490  * Return: htt_pkt_type_ethernet
491  */
492 int wlan_cfg_pkt_type(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
493 
494 /*
495  * wlan_cfg_get_num_tx_desc_pool() - Number of Tx Descriptor pools for the
496  *					device
497  * @wlan_cfg_ctx - Configuration Handle
498  *
499  * Return: num_tx_desc_pool
500  */
501 int wlan_cfg_get_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
502 
503 /*
504  * wlan_cfg_set_num_tx_desc_pool() - Set the number of Tx Descriptor pools for the
505  *					device
506  * @wlan_cfg_ctx - Configuration Handle
507  * @num_pool - Number of pool
508  */
509 void wlan_cfg_set_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool);
510 
511 /*
512  * wlan_cfg_get_num_tx_ext_desc_pool() -  Number of Tx MSDU ext Descriptor
513  *					pools
514  * @wlan_cfg_ctx - Configuration Handle
515  *
516  * Return: num_tx_ext_desc_pool
517  */
518 int wlan_cfg_get_num_tx_ext_desc_pool(
519 		struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
520 
521 /*
522  * wlan_cfg_get_reo_dst_ring_size() - Get REO destination ring size
523  *
524  * @wlan_cfg_ctx - Configuration Handle
525  *
526  * Return: reo_dst_ring_size
527  */
528 int wlan_cfg_get_reo_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
529 
530 /*
531  * wlan_cfg_set_num_tx_desc_pool() - Set the REO Destination ring size
532  *
533  * @wlan_cfg_ctx - Configuration Handle
534  * @reo_dst_ring_size - REO Destination ring size
535  */
536 void wlan_cfg_set_reo_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg,
537 				    int reo_dst_ring_size);
538 
539 /*
540  * wlan_cfg_set_raw_mode_war() - Set raw mode war configuration
541  *
542  * @wlan_cfg_ctx - Configuration Handle
543  * @raw_mode_war - raw mode war configuration
544  */
545 void wlan_cfg_set_raw_mode_war(struct wlan_cfg_dp_soc_ctxt *cfg,
546 			       bool raw_mode_war);
547 
548 /*
549  * wlan_cfg_get_raw_mode_war() - Get raw mode war configuration
550  *
551  * @wlan_cfg_ctx - Configuration Handle
552  *
553  * Return: reo_dst_ring_size
554  */
555 bool wlan_cfg_get_raw_mode_war(struct wlan_cfg_dp_soc_ctxt *cfg);
556 
557 /*
558  * wlan_cfg_set_num_tx_ext_desc_pool() -  Set the number of Tx MSDU ext Descriptor
559  *					pools
560  * @wlan_cfg_ctx - Configuration Handle
561  * @num_pool - Number of pool
562  */
563 void wlan_cfg_set_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool);
564 
565 /*
566  * wlan_cfg_get_num_tx_desc() - Number of Tx Descriptors per pool
567  * @wlan_cfg_ctx - Configuration Handle
568  *
569  * Return: num_tx_desc
570  */
571 int wlan_cfg_get_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
572 
573 /*
574  * wlan_cfg_set_num_tx_desc() - Set the number of Tx Descriptors per pool
575  *
576  * @wlan_cfg_ctx - Configuration Handle
577  * @num_desc: Number of descriptor
578  */
579 void wlan_cfg_set_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_desc);
580 
581 /*
582  * wlan_cfg_get_num_tx_ext_desc() - Number of Tx MSDU extension Descriptors
583  *					per pool
584  * @wlan_cfg_ctx - Configuration Handle
585  *
586  * Return: num_tx_ext_desc
587  */
588 int wlan_cfg_get_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx);
589 
590 /*
591  * wlan_cfg_set_num_tx_ext_desc() - Set the number of Tx MSDU extension Descriptors
592  *					per pool
593  * @wlan_cfg_ctx - Configuration Handle
594  * @num_desc: Number of descriptor
595  */
596 void wlan_cfg_set_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_ext_desc);
597 
598 /*
599  * wlan_cfg_max_peer_id() - Get maximum peer ID
600  * @cfg: Configuration Handle
601  *
602  * Return: maximum peer ID
603  */
604 uint32_t wlan_cfg_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg);
605 
606 /*
607  * wlan_cfg_get_dma_mon_buf_ring_size() - Return Size of monitor buffer ring
608  * @wlan_cfg_pdev_ctx
609  *
610  * Return: dma_mon_buf_ring_size
611  */
612 int wlan_cfg_get_dma_mon_buf_ring_size(
613 		struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx);
614 
615 /*
616  * wlan_cfg_get_dma_mon_dest_ring_size() - Return Size of RxDMA Monitor
617  *					Destination ring
618  * @wlan_cfg_pdev_ctx
619  *
620  * Return: dma_mon_dest_size
621  */
622 int wlan_cfg_get_dma_mon_dest_ring_size(
623 		struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx);
624 
625 /*
626  * wlan_cfg_get_dma_mon_stat_ring_size() - Return size of Monitor Status ring
627  * @wlan_cfg_pdev_ctx
628  *
629  * Return: dma_mon_stat_ring_size
630  */
631 int wlan_cfg_get_dma_mon_stat_ring_size(
632 		struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx);
633 
634 /*
635  * wlan_cfg_get_dma_mon_desc_ring_size - Get rxdma monitor size
636  * @wlan_cfg_soc_ctx
637  *
638  * Return: rxdma monitor desc ring size
639  */
640 int
641 wlan_cfg_get_dma_mon_desc_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg);
642 
643 /*
644  * wlan_cfg_get_rx_dma_buf_ring_size() - Return Size of RxDMA buffer ring
645  * @wlan_cfg_pdev_ctx
646  *
647  * Return: rx_dma_buf_ring_size
648  */
649 int wlan_cfg_get_rx_dma_buf_ring_size(
650 		struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx);
651 
652 /*
653  * wlan_cfg_get_num_mac_rings() - Return the number of MAC RX DMA rings
654  * per pdev
655  * @wlan_cfg_pdev_ctx
656  *
657  * Return: number of mac DMA rings per pdev
658  */
659 int wlan_cfg_get_num_mac_rings(struct wlan_cfg_dp_pdev_ctxt *cfg);
660 
661 /*
662  * wlan_cfg_is_lro_enabled - Return LRO enabled/disabled
663  * @wlan_cfg_pdev_ctx
664  *
665  * Return: true - LRO enabled false - LRO disabled
666  */
667 bool wlan_cfg_is_lro_enabled(struct wlan_cfg_dp_soc_ctxt *cfg);
668 
669 /*
670  * wlan_cfg_is_lro_enabled - Return RX hash enabled/disabled
671  * @wlan_cfg_pdev_ctx
672  *
673  * Return: true - enabled false - disabled
674  */
675 bool wlan_cfg_is_rx_hash_enabled(struct wlan_cfg_dp_soc_ctxt *cfg);
676 
677 /*
678  * wlan_cfg_set_rx_hash - set rx hash enabled/disabled
679  * @wlan_cfg_soc_ctx
680  * @rx_hash
681  */
682 void wlan_cfg_set_rx_hash(struct wlan_cfg_dp_soc_ctxt *cfg, bool rx_hash);
683 
684 /*
685  * wlan_cfg_get_dp_pdev_nss_enabled - Return pdev nss enabled/disabled
686  * @wlan_cfg_pdev_ctx
687  *
688  * Return: 1 - enabled 0 - disabled
689  */
690 int wlan_cfg_get_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg);
691 
692 /*
693  * wlan_cfg_set_dp_pdev_nss_enabled - set pdev nss enabled/disabled
694  * @wlan_cfg_pdev_ctx
695  */
696 void wlan_cfg_set_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg, int nss_enabled);
697 
698 /*
699  * wlan_cfg_get_dp_soc_nss_cfg - Return soc nss config
700  * @wlan_cfg_pdev_ctx
701  *
702  * Return: nss_cfg
703  */
704 int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg);
705 
706 /*
707  * wlan_cfg_set_dp_soc_nss_cfg - set soc nss config
708  * @wlan_cfg_pdev_ctx
709  *
710  */
711 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg);
712 
713 /*
714  * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for Tx
715  * @wlan_cfg_soc_ctx
716  *
717  * Return: Batch threshold
718  */
719 int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg);
720 
721 /*
722  * wlan_cfg_get_int_timer_threshold_tx - Get interrupt mitigation cfg for Tx
723  * @wlan_cfg_soc_ctx
724  *
725  * Return: Timer threshold
726  */
727 int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg);
728 
729 /*
730  * wlan_cfg_get_int_batch_threshold_rx - Get interrupt mitigation cfg for Rx
731  * @wlan_cfg_soc_ctx
732  *
733  * Return: Batch threshold
734  */
735 int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg);
736 
737 /*
738  * wlan_cfg_get_int_batch_threshold_rx - Get interrupt mitigation cfg for Rx
739  * @wlan_cfg_soc_ctx
740  *
741  * Return: Timer threshold
742  */
743 int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg);
744 
745 /*
746  * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for other srngs
747  * @wlan_cfg_soc_ctx
748  *
749  * Return: Batch threshold
750  */
751 int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg);
752 
753 /*
754  * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for other srngs
755  * @wlan_cfg_soc_ctx
756  *
757  * Return: Timer threshold
758  */
759 int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg);
760 
761 /*
762  * wlan_cfg_get_checksum_offload - Get checksum offload enable or disable status
763  * @wlan_cfg_soc_ctx
764  *
765  * Return: Checksum offload enable or disable
766  */
767 int wlan_cfg_get_checksum_offload(struct wlan_cfg_dp_soc_ctxt *cfg);
768 
769 /*
770  * wlan_cfg_tx_ring_size - Get Tx DMA ring size (TCL Data Ring)
771  * @wlan_cfg_soc_ctx
772  *
773  * Return: Tx Ring Size
774  */
775 int wlan_cfg_tx_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
776 
777 /*
778  * wlan_cfg_tx_comp_ring_size - Get Tx completion ring size (WBM Ring)
779  * @wlan_cfg_soc_ctx
780  *
781  * Return: Tx Completion ring size
782  */
783 int wlan_cfg_tx_comp_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
784 
785 /*
786  * wlan_cfg_get_dp_soc_wbm_release_ring_size - Get wbm_release_ring size
787  * @wlan_cfg_soc_ctx
788  *
789  * Return: wbm_release_ring size
790  */
791 int
792 wlan_cfg_get_dp_soc_wbm_release_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
793 
794 /*
795  * wlan_cfg_get_dp_soc_tcl_cmd_ring_size - Get tcl_cmd_ring size
796  * @wlan_cfg_soc_ctx
797  *
798  * Return: tcl_cmd_ring size
799  */
800 int
801 wlan_cfg_get_dp_soc_tcl_cmd_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
802 
803 /*
804  * wlan_cfg_get_dp_soc_tcl_status_ring_size - Get tcl_status_ring size
805  * @wlan_cfg_soc_ctx
806  *
807  * Return: tcl_status_ring size
808  */
809 int
810 wlan_cfg_get_dp_soc_tcl_status_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
811 
812 /*
813  * wlan_cfg_get_dp_soc_reo_reinject_ring_size - Get reo_reinject_ring size
814  * @wlan_cfg_soc_ctx
815  *
816  * Return: reo_reinject_ring size
817  */
818 int
819 wlan_cfg_get_dp_soc_reo_reinject_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
820 
821 /*
822  * wlan_cfg_get_dp_soc_rx_release_ring_size - Get rx_release_ring size
823  * @wlan_cfg_soc_ctx
824  *
825  * Return: rx_release_ring size
826  */
827 int
828 wlan_cfg_get_dp_soc_rx_release_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
829 
830 /*
831  * wlan_cfg_get_dp_soc_reo_exception_ring_size - Get reo_exception_ring size
832  * @wlan_cfg_soc_ctx
833  *
834  * Return: reo_exception_ring size
835  */
836 int
837 wlan_cfg_get_dp_soc_reo_exception_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
838 
839 /*
840  * wlan_cfg_get_dp_soc_reo_cmd_ring_size - Get reo_cmd_ring size
841  * @wlan_cfg_soc_ctx
842  *
843  * Return: reo_cmd_ring size
844  */
845 int
846 wlan_cfg_get_dp_soc_reo_cmd_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
847 
848 /*
849  * wlan_cfg_get_dp_soc_reo_status_ring_size - Get reo_status_ring size
850  * @wlan_cfg_soc_ctx
851  *
852  * Return: reo_status_ring size
853  */
854 int
855 wlan_cfg_get_dp_soc_reo_status_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
856 
857 /*
858  * wlan_cfg_get_dp_soc_rxdma_refill_ring_size - Get rxdma refill ring size
859  * @wlan_cfg_soc_ctx
860  *
861  * Return: rxdma refill ring size
862  */
863 int
864 wlan_cfg_get_dp_soc_rxdma_refill_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
865 
866 /*
867  * wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size - Get rxdma dst ring size
868  * @wlan_cfg_soc_ctx
869  *
870  * Return: rxdma error dst ring size
871  */
872 int
873 wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
874 
875 /*
876  * wlan_cfg_get_dp_caps - Get dp capablities
877  * @wlan_cfg_soc_ctx
878  * @dp_caps: enum for dp capablities
879  *
880  * Return: bool if a dp capabilities is enabled
881  */
882 bool
883 wlan_cfg_get_dp_caps(struct wlan_cfg_dp_soc_ctxt *cfg,
884 		     enum cdp_capabilities dp_caps);
885 
886 #ifdef QCA_LL_TX_FLOW_CONTROL_V2
887 int wlan_cfg_get_tx_flow_stop_queue_th(struct wlan_cfg_dp_soc_ctxt *cfg);
888 
889 int wlan_cfg_get_tx_flow_start_queue_offset(struct wlan_cfg_dp_soc_ctxt *cfg);
890 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
891 int wlan_cfg_get_rx_defrag_min_timeout(struct wlan_cfg_dp_soc_ctxt *cfg);
892 
893 int wlan_cfg_get_defrag_timeout_check(struct wlan_cfg_dp_soc_ctxt *cfg);
894 #endif
895