1 /* 2 * * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef __WLAN_CFG_H 20 #define __WLAN_CFG_H 21 22 /* 23 * Temporary place holders. These should come either from target config 24 * or platform configuration 25 */ 26 #if defined(CONFIG_MCL) 27 #define MAX_PDEV_CNT 1 28 #define WLAN_CFG_INT_NUM_CONTEXTS 7 29 /* 30 * This mask defines how many transmit frames account for 1 NAPI work unit 31 * 0 means each tx completion is 1 unit 32 */ 33 #define DP_TX_NAPI_BUDGET_DIV_MASK 0 34 35 /* PPDU Stats Configuration - Configure bitmask for enabling tx ppdu tlv's */ 36 #define DP_PPDU_TXLITE_STATS_BITMASK_CFG 0x1FFF 37 38 #else 39 #define MAX_PDEV_CNT 3 40 #define WLAN_CFG_INT_NUM_CONTEXTS 4 41 /* 42 * This mask defines how many transmit frames account for 1 NAPI work unit 43 * 0xFFFF means each 64K tx frame completions account for 1 unit of NAPI budget 44 */ 45 #define DP_TX_NAPI_BUDGET_DIV_MASK 0xFFFF 46 47 /* PPDU Stats Configuration - Configure bitmask for enabling tx ppdu tlv's */ 48 #define DP_PPDU_TXLITE_STATS_BITMASK_CFG 0xFFFF 49 50 #endif 51 52 /* Tx configuration */ 53 #define MAX_LINK_DESC_BANKS 8 54 #define MAX_TXDESC_POOLS 4 55 #define MAX_TCL_DATA_RINGS 4 56 57 /* Rx configuration */ 58 #define MAX_RXDESC_POOLS 4 59 #define MAX_REO_DEST_RINGS 4 60 #define MAX_RX_MAC_RINGS 2 61 62 /* DP process status */ 63 #ifdef CONFIG_MCL 64 #define CONFIG_PROCESS_RX_STATUS 1 65 #define CONFIG_PROCESS_TX_STATUS 1 66 #else 67 #define CONFIG_PROCESS_RX_STATUS 0 68 #define CONFIG_PROCESS_TX_STATUS 0 69 #endif 70 71 /* Miscellaneous configuration */ 72 #define MAX_IDLE_SCATTER_BUFS 16 73 #define DP_MAX_IRQ_PER_CONTEXT 12 74 #define DP_MAX_INTERRUPT_CONTEXTS 8 75 #define DP_MAX_INTERRUPT_CONTEXTS 8 76 #define MAX_HTT_METADATA_LEN 32 77 #define MAX_NUM_PEER_ID_PER_PEER 8 78 #define DP_MAX_TIDS 17 79 #define DP_NON_QOS_TID 16 80 81 struct wlan_cfg_dp_pdev_ctxt; 82 83 /** 84 * struct wlan_cfg_dp_soc_ctxt - Configuration parameters for SoC (core TxRx) 85 * @num_int_ctxts - Number of NAPI/Interrupt contexts to be registered for DP 86 * @max_clients - Maximum number of peers/stations supported by device 87 * @max_alloc_size - Maximum allocation size for any dynamic memory 88 * allocation request for this device 89 * @per_pdev_tx_ring - 0 - TCL ring is not mapped per radio 90 * 1 - Each TCL ring is mapped to one radio/pdev 91 * @num_tcl_data_rings - Number of TCL Data rings supported by device 92 * @per_pdev_rx_ring - 0 - REO ring is not mapped per radio 93 * 1 - Each REO ring is mapped to one radio/pdev 94 * @num_tx_desc_pool - Number of Tx Descriptor pools 95 * @num_tx_ext_desc_pool - Number of Tx MSDU extension Descriptor pools 96 * @num_tx_desc - Number of Tx Descriptors per pool 97 * @num_tx_ext_desc - Number of Tx MSDU extension Descriptors per pool 98 * @max_peer_id - Maximum value of peer id that FW can assign for a client 99 * @htt_packet_type - Default 802.11 encapsulation type for any VAP created 100 * @int_tx_ring_mask - Bitmap of Tx interrupts mapped to each NAPI/Intr context 101 * @int_rx_ring_mask - Bitmap of Rx interrupts mapped to each NAPI/Intr context 102 * @int_rx_mon_ring_mask - Bitmap of Rx monitor ring interrupts mapped to each 103 * NAPI/Intr context 104 * @int_rx_err_ring_mask - Bitmap of Rx err ring interrupts mapped to each 105 * NAPI/Intr context 106 * @int_wbm_rel_ring_mask - Bitmap of wbm rel ring interrupts mapped to each 107 * NAPI/Intr context 108 * @int_reo_status_ring_mask - Bitmap of reo status ring interrupts mapped to each 109 * NAPI/Intr context 110 * @int_ce_ring_mask - Bitmap of CE interrupts mapped to each NAPI/Intr context 111 * @lro_enabled - enable/disable lro feature 112 * @rx_hash - Enable hash based steering of rx packets 113 * @tso_enabled - enable/disable tso feature 114 * @napi_enabled - enable/disable interrupt mode for reaping tx and rx packets 115 * @tcp_Udp_Checksumoffload - enable/disable checksum offload 116 * @nss_cfg - nss configuration 117 */ 118 struct wlan_cfg_dp_soc_ctxt { 119 int num_int_ctxts; 120 int max_clients; 121 int max_alloc_size; 122 int per_pdev_tx_ring; 123 int num_tcl_data_rings; 124 int per_pdev_rx_ring; 125 int per_pdev_lmac_ring; 126 int num_reo_dest_rings; 127 int num_tx_desc_pool; 128 int num_tx_ext_desc_pool; 129 int num_tx_desc; 130 int num_tx_ext_desc; 131 int max_peer_id; 132 int htt_packet_type; 133 int int_batch_threshold_tx; 134 int int_timer_threshold_tx; 135 int int_batch_threshold_rx; 136 int int_timer_threshold_rx; 137 int int_batch_threshold_other; 138 int int_timer_threshold_other; 139 int tx_ring_size; 140 int tx_comp_ring_size; 141 int int_tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 142 int int_rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 143 int int_rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 144 int int_ce_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 145 int int_rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 146 int int_rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 147 int int_reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 148 int int_rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 149 int int_host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; 150 int hw_macid[MAX_PDEV_CNT]; 151 int base_hw_macid; 152 bool lro_enabled; 153 bool rx_hash; 154 bool tso_enabled; 155 bool napi_enabled; 156 bool tcp_udp_checksumoffload; 157 bool defrag_timeout_check; 158 int nss_cfg; 159 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 160 uint32_t tx_flow_stop_queue_threshold; 161 uint32_t tx_flow_start_queue_offset; 162 #endif 163 uint32_t rx_defrag_min_timeout; 164 }; 165 166 /** 167 * wlan_cfg_soc_attach() - Attach configuration interface for SoC 168 * 169 * Allocates context for Soc configuration parameters, 170 * Read configuration information from device tree/ini file and 171 * returns back handle 172 * 173 * Return: Handle to configuration context 174 */ 175 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach(void); 176 177 /** 178 * wlan_cfg_soc_detach() - Detach soc configuration handle 179 * @wlan_cfg_ctx: soc configuration handle 180 * 181 * De-allocates memory allocated for SoC configuration 182 * 183 * Return:none 184 */ 185 void wlan_cfg_soc_detach(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 186 187 /** 188 * wlan_cfg_pdev_attach() Attach configuration interface for pdev 189 * 190 * Allocates context for pdev configuration parameters, 191 * Read configuration information from device tree/ini file and 192 * returns back handle 193 * 194 * Return: Handle to configuration context 195 */ 196 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_attach(void); 197 198 /** 199 * wlan_cfg_pdev_detach() Detach and free pdev configuration handle 200 * @wlan_cfg_pdev_ctx - PDEV Configuration Handle 201 * 202 * Return: void 203 */ 204 void wlan_cfg_pdev_detach(struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx); 205 206 void wlan_cfg_set_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg, int num); 207 void wlan_cfg_set_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 208 int context, int mask); 209 void wlan_cfg_set_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 210 int context, int mask); 211 void wlan_cfg_set_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 212 int context, int mask); 213 void wlan_cfg_set_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 214 int context, int mask); 215 void wlan_cfg_set_rxbuf_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context, 216 int mask); 217 void wlan_cfg_set_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg, uint32_t val); 218 219 int wlan_cfg_set_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 220 int context, int mask); 221 int wlan_cfg_set_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 222 int context, int mask); 223 int wlan_cfg_set_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 224 int context, int mask); 225 /** 226 * wlan_cfg_get_num_contexts() - Number of interrupt contexts to be registered 227 * @wlan_cfg_ctx - Configuration Handle 228 * 229 * For WIN, DP_NUM_INTERRUPT_CONTEXTS will be equal to number of CPU cores. 230 * Each context (for linux it is a NAPI context) will have a tx_ring_mask, 231 * rx_ring_mask ,and rx_monitor_ring mask to indicate the rings 232 * that are processed by the handler. 233 * 234 * Return: num_contexts 235 */ 236 int wlan_cfg_get_num_contexts(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 237 238 /** 239 * wlan_cfg_get_tx_ring_mask() - Return Tx interrupt mask mapped to an 240 * interrupt context 241 * @wlan_cfg_ctx - Configuration Handle 242 * @context - Numerical ID identifying the Interrupt/NAPI context 243 * 244 * Return: int_tx_ring_mask[context] 245 */ 246 int wlan_cfg_get_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx, 247 int context); 248 249 /** 250 * wlan_cfg_get_rx_ring_mask() - Return Rx interrupt mask mapped to an 251 * interrupt context 252 * @wlan_cfg_ctx - Configuration Handle 253 * @context - Numerical ID identifying the Interrupt/NAPI context 254 * 255 * Return: int_rx_ring_mask[context] 256 */ 257 int wlan_cfg_get_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx, 258 int context); 259 260 /** 261 * wlan_cfg_get_rx_mon_ring_mask() - Return Rx monitor ring interrupt mask 262 * mapped to an interrupt context 263 * @wlan_cfg_ctx - Configuration Handle 264 * @context - Numerical ID identifying the Interrupt/NAPI context 265 * 266 * Return: int_rx_mon_ring_mask[context] 267 */ 268 int wlan_cfg_get_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx, 269 int context); 270 271 /** 272 * wlan_cfg_set_rxdma2host_ring_mask() - Set rxdma2host ring interrupt mask 273 * for the given interrupt context 274 * @wlan_cfg_ctx - Configuration Handle 275 * @context - Numerical ID identifying the Interrupt/NAPI context 276 * 277 */ 278 void wlan_cfg_set_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 279 int context, int mask); 280 281 /** 282 * wlan_cfg_get_rxdma2host_ring_mask() - Return rxdma2host ring interrupt mask 283 * mapped to an interrupt context 284 * @wlan_cfg_ctx - Configuration Handle 285 * @context - Numerical ID identifying the Interrupt/NAPI context 286 * 287 * Return: int_rxdma2host_ring_mask[context] 288 */ 289 int wlan_cfg_get_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 290 int context); 291 292 /** 293 * wlan_cfg_set_host2rxdma_ring_mask() - Set host2rxdma ring interrupt mask 294 * for the given interrupt context 295 * @wlan_cfg_ctx - Configuration Handle 296 * @context - Numerical ID identifying the Interrupt/NAPI context 297 * 298 */ 299 void wlan_cfg_set_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 300 int context, int mask); 301 302 /** 303 * wlan_cfg_get_host2rxdma_ring_mask() - Return host2rxdma ring interrupt mask 304 * mapped to an interrupt context 305 * @wlan_cfg_ctx - Configuration Handle 306 * @context - Numerical ID identifying the Interrupt/NAPI context 307 * 308 * Return: int_host2rxdma_ring_mask[context] 309 */ 310 int wlan_cfg_get_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 311 int context); 312 313 /** 314 * wlan_cfg_set_hw_macid() - Set HW MAC Id for the given PDEV index 315 * 316 * @wlan_cfg_ctx - Configuration Handle 317 * @pdev_idx - Index of SW PDEV 318 * @hw_macid - HW MAC Id 319 * 320 */ 321 void wlan_cfg_set_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx, 322 int hw_macid); 323 324 /** 325 * wlan_cfg_get_hw_macid() - Get HW MAC Id for the given PDEV index 326 * 327 * @wlan_cfg_ctx - Configuration Handle 328 * @pdev_idx - Index of SW PDEV 329 * 330 * Return: HW MAC Id 331 */ 332 int wlan_cfg_get_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx); 333 334 /** 335 * wlan_cfg_get_hw_mac_idx() - Get 0 based HW MAC index for the given 336 * PDEV index 337 * 338 * @wlan_cfg_ctx - Configuration Handle 339 * @pdev_idx - Index of SW PDEV 340 * 341 * Return: HW MAC index 342 */ 343 int wlan_cfg_get_hw_mac_idx(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx); 344 345 /** 346 * wlan_cfg_get_rx_err_ring_mask() - Return Rx monitor ring interrupt mask 347 * mapped to an interrupt context 348 * @wlan_cfg_ctx - Configuration Handle 349 * @context - Numerical ID identifying the Interrupt/NAPI context 350 * 351 * Return: int_rx_err_ring_mask[context] 352 */ 353 int wlan_cfg_get_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int 354 context); 355 356 /** 357 * wlan_cfg_get_rx_wbm_rel_ring_mask() - Return Rx monitor ring interrupt mask 358 * mapped to an interrupt context 359 * @wlan_cfg_ctx - Configuration Handle 360 * @context - Numerical ID identifying the Interrupt/NAPI context 361 * 362 * Return: int_wbm_rel_ring_mask[context] 363 */ 364 int wlan_cfg_get_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int 365 context); 366 367 /** 368 * wlan_cfg_get_reo_status_ring_mask() - Return Rx monitor ring interrupt mask 369 * mapped to an interrupt context 370 * @wlan_cfg_ctx - Configuration Handle 371 * @context - Numerical ID identifying the Interrupt/NAPI context 372 * 373 * Return: int_reo_status_ring_mask[context] 374 */ 375 int wlan_cfg_get_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int 376 context); 377 378 /** 379 * wlan_cfg_get_ce_ring_mask() - Return CE ring interrupt mask 380 * mapped to an interrupt context 381 * @wlan_cfg_ctx - Configuration Handle 382 * @context - Numerical ID identifying the Interrupt/NAPI context 383 * 384 * Return: int_ce_ring_mask[context] 385 */ 386 int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx, 387 int context); 388 389 /** 390 * wlan_cfg_get_max_clients() - Return maximum number of peers/stations 391 * supported by device 392 * @wlan_cfg_ctx - Configuration Handle 393 * 394 * Return: max_clients 395 */ 396 uint32_t wlan_cfg_get_max_clients(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 397 398 /** 399 * wlan_cfg_max_alloc_size() - Return Maximum allocation size for any dynamic 400 * memory allocation request for this device 401 * @wlan_cfg_ctx - Configuration Handle 402 * 403 * Return: max_alloc_size 404 */ 405 uint32_t wlan_cfg_max_alloc_size(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 406 407 /* 408 * wlan_cfg_per_pdev_tx_ring() - Return true if Tx rings are mapped as 409 * one per radio 410 * @wlan_cfg_ctx - Configuration Handle 411 * 412 * Return: per_pdev_tx_ring 413 */ 414 int wlan_cfg_per_pdev_tx_ring(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 415 416 /* 417 * wlan_cfg_num_tcl_data_rings() - Number of TCL Data rings supported by device 418 * @wlan_cfg_ctx 419 * 420 * Return: num_tcl_data_rings 421 */ 422 int wlan_cfg_num_tcl_data_rings(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 423 424 /* 425 * wlan_cfg_per_pdev_rx_ring() - Return true if Rx rings are mapped as 426 * one per radio 427 * @wlan_cfg_ctx 428 * 429 * Return: per_pdev_rx_ring 430 */ 431 int wlan_cfg_per_pdev_rx_ring(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 432 433 /* 434 * wlan_cfg_per_pdev_lmac_ring() - Return true if error rings are mapped as 435 * one per radio 436 * @wlan_cfg_ctx 437 * 438 * Return: return 1 if per pdev error ring else 0 439 */ 440 int wlan_cfg_per_pdev_lmac_ring(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 441 442 /* 443 * wlan_cfg_num_reo_dest_rings() - Number of REO Data rings supported by device 444 * @wlan_cfg_ctx - Configuration Handle 445 * 446 * Return: num_reo_dest_rings 447 */ 448 int wlan_cfg_num_reo_dest_rings(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 449 450 /* 451 * wlan_cfg_pkt_type() - Default 802.11 encapsulation type 452 * @wlan_cfg_ctx - Configuration Handle 453 * 454 * Return: htt_pkt_type_ethernet 455 */ 456 int wlan_cfg_pkt_type(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 457 458 /* 459 * wlan_cfg_get_num_tx_desc_pool() - Number of Tx Descriptor pools for the 460 * device 461 * @wlan_cfg_ctx - Configuration Handle 462 * 463 * Return: num_tx_desc_pool 464 */ 465 int wlan_cfg_get_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 466 467 /* 468 * wlan_cfg_set_num_tx_desc_pool() - Set the number of Tx Descriptor pools for the 469 * device 470 * @wlan_cfg_ctx - Configuration Handle 471 * @num_pool - Number of pool 472 */ 473 void wlan_cfg_set_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool); 474 475 /* 476 * wlan_cfg_get_num_tx_ext_desc_pool() - Number of Tx MSDU ext Descriptor 477 * pools 478 * @wlan_cfg_ctx - Configuration Handle 479 * 480 * Return: num_tx_ext_desc_pool 481 */ 482 int wlan_cfg_get_num_tx_ext_desc_pool( 483 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 484 485 /* 486 * wlan_cfg_set_num_tx_ext_desc_pool() - Set the number of Tx MSDU ext Descriptor 487 * pools 488 * @wlan_cfg_ctx - Configuration Handle 489 * @num_pool - Number of pool 490 */ 491 void wlan_cfg_set_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool); 492 493 /* 494 * wlan_cfg_get_num_tx_desc() - Number of Tx Descriptors per pool 495 * @wlan_cfg_ctx - Configuration Handle 496 * 497 * Return: num_tx_desc 498 */ 499 int wlan_cfg_get_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 500 501 /* 502 * wlan_cfg_set_num_tx_desc() - Set the number of Tx Descriptors per pool 503 * 504 * @wlan_cfg_ctx - Configuration Handle 505 * @num_desc: Number of descriptor 506 */ 507 void wlan_cfg_set_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_desc); 508 509 /* 510 * wlan_cfg_get_num_tx_ext_desc() - Number of Tx MSDU extension Descriptors 511 * per pool 512 * @wlan_cfg_ctx - Configuration Handle 513 * 514 * Return: num_tx_ext_desc 515 */ 516 int wlan_cfg_get_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx); 517 518 /* 519 * wlan_cfg_set_num_tx_ext_desc() - Set the number of Tx MSDU extension Descriptors 520 * per pool 521 * @wlan_cfg_ctx - Configuration Handle 522 * @num_desc: Number of descriptor 523 */ 524 void wlan_cfg_set_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_ext_desc); 525 526 /* 527 * wlan_cfg_max_peer_id() - Get maximum peer ID 528 * @cfg: Configuration Handle 529 * 530 * Return: maximum peer ID 531 */ 532 uint32_t wlan_cfg_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg); 533 534 /* 535 * wlan_cfg_get_dma_mon_buf_ring_size() - Return Size of monitor buffer ring 536 * @wlan_cfg_pdev_ctx 537 * 538 * Return: dma_mon_buf_ring_size 539 */ 540 int wlan_cfg_get_dma_mon_buf_ring_size( 541 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx); 542 543 /* 544 * wlan_cfg_get_dma_mon_dest_ring_size() - Return Size of RxDMA Monitor 545 * Destination ring 546 * @wlan_cfg_pdev_ctx 547 * 548 * Return: dma_mon_dest_size 549 */ 550 int wlan_cfg_get_dma_mon_dest_ring_size( 551 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx); 552 553 /* 554 * wlan_cfg_get_dma_mon_stat_ring_size() - Return size of Monitor Status ring 555 * @wlan_cfg_pdev_ctx 556 * 557 * Return: dma_mon_stat_ring_size 558 */ 559 int wlan_cfg_get_dma_mon_stat_ring_size( 560 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx); 561 562 /* 563 * wlan_cfg_get_rx_dma_buf_ring_size() - Return Size of RxDMA buffer ring 564 * @wlan_cfg_pdev_ctx 565 * 566 * Return: rx_dma_buf_ring_size 567 */ 568 int wlan_cfg_get_rx_dma_buf_ring_size( 569 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_ctx); 570 571 /* 572 * wlan_cfg_get_num_mac_rings() - Return the number of MAC RX DMA rings 573 * per pdev 574 * @wlan_cfg_pdev_ctx 575 * 576 * Return: number of mac DMA rings per pdev 577 */ 578 int wlan_cfg_get_num_mac_rings(struct wlan_cfg_dp_pdev_ctxt *cfg); 579 580 /* 581 * wlan_cfg_is_lro_enabled - Return LRO enabled/disabled 582 * @wlan_cfg_pdev_ctx 583 * 584 * Return: true - LRO enabled false - LRO disabled 585 */ 586 bool wlan_cfg_is_lro_enabled(struct wlan_cfg_dp_soc_ctxt *cfg); 587 588 /* 589 * wlan_cfg_is_lro_enabled - Return RX hash enabled/disabled 590 * @wlan_cfg_pdev_ctx 591 * 592 * Return: true - enabled false - disabled 593 */ 594 bool wlan_cfg_is_rx_hash_enabled(struct wlan_cfg_dp_soc_ctxt *cfg); 595 596 /* 597 * wlan_cfg_set_rx_hash - set rx hash enabled/disabled 598 * @wlan_cfg_soc_ctx 599 * @rx_hash 600 */ 601 void wlan_cfg_set_rx_hash(struct wlan_cfg_dp_soc_ctxt *cfg, bool rx_hash); 602 603 /* 604 * wlan_cfg_get_dp_pdev_nss_enabled - Return pdev nss enabled/disabled 605 * @wlan_cfg_pdev_ctx 606 * 607 * Return: 1 - enabled 0 - disabled 608 */ 609 int wlan_cfg_get_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg); 610 611 /* 612 * wlan_cfg_set_dp_pdev_nss_enabled - set pdev nss enabled/disabled 613 * @wlan_cfg_pdev_ctx 614 */ 615 void wlan_cfg_set_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg, int nss_enabled); 616 617 /* 618 * wlan_cfg_get_dp_soc_nss_cfg - Return soc nss config 619 * @wlan_cfg_pdev_ctx 620 * 621 * Return: nss_cfg 622 */ 623 int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg); 624 625 /* 626 * wlan_cfg_set_dp_soc_nss_cfg - set soc nss config 627 * @wlan_cfg_pdev_ctx 628 * 629 */ 630 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg); 631 632 /* 633 * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for Tx 634 * @wlan_cfg_soc_ctx 635 * 636 * Return: Batch threshold 637 */ 638 int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg); 639 640 /* 641 * wlan_cfg_get_int_timer_threshold_tx - Get interrupt mitigation cfg for Tx 642 * @wlan_cfg_soc_ctx 643 * 644 * Return: Timer threshold 645 */ 646 int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg); 647 648 /* 649 * wlan_cfg_get_int_batch_threshold_rx - Get interrupt mitigation cfg for Rx 650 * @wlan_cfg_soc_ctx 651 * 652 * Return: Batch threshold 653 */ 654 int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg); 655 656 /* 657 * wlan_cfg_get_int_batch_threshold_rx - Get interrupt mitigation cfg for Rx 658 * @wlan_cfg_soc_ctx 659 * 660 * Return: Timer threshold 661 */ 662 int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg); 663 664 /* 665 * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for other srngs 666 * @wlan_cfg_soc_ctx 667 * 668 * Return: Batch threshold 669 */ 670 int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg); 671 672 /* 673 * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for other srngs 674 * @wlan_cfg_soc_ctx 675 * 676 * Return: Timer threshold 677 */ 678 int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg); 679 680 /* 681 * wlan_cfg_get_checksum_offload - Get checksum offload enable or disable status 682 * @wlan_cfg_soc_ctx 683 * 684 * Return: Checksum offload enable or disable 685 */ 686 int wlan_cfg_get_checksum_offload(struct wlan_cfg_dp_soc_ctxt *cfg); 687 688 /* 689 * wlan_cfg_tx_ring_size - Get Tx DMA ring size (TCL Data Ring) 690 * @wlan_cfg_soc_ctx 691 * 692 * Return: Tx Ring Size 693 */ 694 int wlan_cfg_tx_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg); 695 696 /* 697 * wlan_cfg_tx_comp_ring_size - Get Tx completion ring size (WBM Ring) 698 * @wlan_cfg_soc_ctx 699 * 700 * Return: Tx Completion ring size 701 */ 702 int wlan_cfg_tx_comp_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg); 703 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 704 int wlan_cfg_get_tx_flow_stop_queue_th(struct wlan_cfg_dp_soc_ctxt *cfg); 705 706 int wlan_cfg_get_tx_flow_start_queue_offset(struct wlan_cfg_dp_soc_ctxt *cfg); 707 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 708 int wlan_cfg_get_rx_defrag_min_timeout(struct wlan_cfg_dp_soc_ctxt *cfg); 709 710 int wlan_cfg_get_defrag_timeout_check(struct wlan_cfg_dp_soc_ctxt *cfg); 711 #endif 712