1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #if defined(CONFIG_HL_SUPPORT) 20 #include "wlan_tgt_def_config_hl.h" 21 #else 22 #include "wlan_tgt_def_config.h" 23 #endif 24 25 #include "qdf_trace.h" 26 #include "qdf_mem.h" 27 #include "wlan_cfg.h" 28 29 /* 30 * FIX THIS - 31 * For now, all these configuration parameters are hardcoded. 32 * Many of these should actually be coming from dts file/ini file 33 */ 34 35 #ifdef CONFIG_MCL 36 #define WLAN_CFG_PER_PDEV_RX_RING 0 37 #define WLAN_CFG_PER_PDEV_LMAC_RING 0 38 #define NUM_RXDMA_RINGS_PER_PDEV 2 39 #define WLAN_LRO_ENABLE 1 40 #ifdef IPA_OFFLOAD 41 #define WLAN_CFG_TX_RING_SIZE 2048 42 #else 43 #define WLAN_CFG_TX_RING_SIZE 512 44 #endif 45 #define WLAN_CFG_TX_COMP_RING_SIZE 1024 46 47 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 48 #define WLAN_CFG_NUM_TX_DESC 1024 49 #define WLAN_CFG_NUM_TX_EXT_DESC 1024 50 51 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 52 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1 53 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1 54 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 55 56 /* Interrupt Mitigation - Timer threshold in us */ 57 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8 58 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8 59 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8 60 #endif 61 62 #ifdef CONFIG_WIN 63 #define WLAN_CFG_PER_PDEV_RX_RING 0 64 #define WLAN_CFG_PER_PDEV_LMAC_RING 1 65 #define NUM_RXDMA_RINGS_PER_PDEV 1 66 #define WLAN_LRO_ENABLE 0 67 68 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 69 #define WLAN_CFG_NUM_TX_DESC (32 << 10) 70 #define WLAN_CFG_NUM_TX_EXT_DESC (8 << 10) 71 72 73 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 74 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256 75 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128 76 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 77 78 /* Interrupt Mitigation - Timer threshold in us */ 79 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000 80 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500 81 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000 82 83 #define WLAN_CFG_TX_RING_SIZE 512 84 85 /* Size the completion ring using following 2 parameters 86 * - NAPI schedule latency (assuming 1 netdev competing for CPU) = 20 ms (2 jiffies) 87 * - Worst case PPS requirement = 400K PPS 88 * 89 * Ring size = 20 * 400 = 8000 90 * 8192 is nearest power of 2 91 */ 92 #define WLAN_CFG_TX_COMP_RING_SIZE (8 << 10) 93 #endif 94 95 /* 96 * The max allowed size for tx comp ring is 8191. 97 * This is limitted by h/w ring max size. 98 * As this is not a power of 2 it does not work with nss offload so the 99 * nearest available size which is power of 2 is 4096 choosen for nss 100 */ 101 #define NSS_TX_COMP_RING_SIZE (4 << 10) 102 103 #define RXDMA_BUF_RING_SIZE 2048 104 #define RXDMA_MONITOR_BUF_RING_SIZE 2048 105 #define RXDMA_MONITOR_DEST_RING_SIZE 2048 106 #define RXDMA_MONITOR_STATUS_RING_SIZE 2048 107 108 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 109 110 /* Per vdev pools */ 111 #define WLAN_CFG_NUM_TX_DESC_POOL 3 112 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 113 114 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */ 115 116 #ifdef TX_PER_PDEV_DESC_POOL 117 #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT 118 #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT 119 120 #else /* TX_PER_PDEV_DESC_POOL */ 121 122 #define WLAN_CFG_NUM_TX_DESC_POOL 3 123 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 124 125 #endif /* TX_PER_PDEV_DESC_POOL */ 126 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 127 128 #define WLAN_CFG_TX_RING_MASK_0 0x1 129 #define WLAN_CFG_TX_RING_MASK_1 0x2 130 #define WLAN_CFG_TX_RING_MASK_2 0x4 131 #define WLAN_CFG_TX_RING_MASK_3 0x0 132 133 #define WLAN_CFG_RX_RING_MASK_0 0x1 134 #define WLAN_CFG_RX_RING_MASK_1 0x2 135 #define WLAN_CFG_RX_RING_MASK_2 0x4 136 #define WLAN_CFG_RX_RING_MASK_3 0x8 137 138 #define WLAN_CFG_RX_MON_RING_MASK_0 0x1 139 #define WLAN_CFG_RX_MON_RING_MASK_1 0x2 140 #define WLAN_CFG_RX_MON_RING_MASK_2 0x4 141 #define WLAN_CFG_RX_MON_RING_MASK_3 0x0 142 143 #define WLAN_CFG_RX_ERR_RING_MASK_0 0x1 144 #define WLAN_CFG_RX_ERR_RING_MASK_1 0x0 145 #define WLAN_CFG_RX_ERR_RING_MASK_2 0x0 146 #define WLAN_CFG_RX_ERR_RING_MASK_3 0x0 147 148 #define WLAN_CFG_RX_WBM_REL_RING_MASK_0 0x1 149 #define WLAN_CFG_RX_WBM_REL_RING_MASK_1 0x0 150 #define WLAN_CFG_RX_WBM_REL_RING_MASK_2 0x0 151 #define WLAN_CFG_RX_WBM_REL_RING_MASK_3 0x0 152 153 #define WLAN_CFG_REO_STATUS_RING_MASK_0 0x1 154 #define WLAN_CFG_REO_STATUS_RING_MASK_1 0x0 155 #define WLAN_CFG_REO_STATUS_RING_MASK_2 0x0 156 #define WLAN_CFG_REO_STATUS_RING_MASK_3 0x0 157 158 #define WLAN_CFG_RXDMA2HOST_RING_MASK_0 0x1 159 #define WLAN_CFG_RXDMA2HOST_RING_MASK_1 0x2 160 #define WLAN_CFG_RXDMA2HOST_RING_MASK_2 0x4 161 #define WLAN_CFG_RXDMA2HOST_RING_MASK_3 0x0 162 163 #define WLAN_CFG_HOST2RXDMA_RING_MASK_0 0x1 164 #define WLAN_CFG_HOST2RXDMA_RING_MASK_1 0x2 165 #define WLAN_CFG_HOST2RXDMA_RING_MASK_2 0x4 166 #define WLAN_CFG_HOST2RXDMA_RING_MASK_3 0x0 167 168 #define WLAN_CFG_DP_TX_NUM_POOLS 3 169 /* Change this to a lower value to enforce scattered idle list mode */ 170 #define WLAN_CFG_MAX_ALLOC_SIZE (2 << 20) 171 172 #define WLAN_CFG_MAX_CLIENTS 64 173 174 #ifdef CONFIG_MCL 175 #ifdef IPA_OFFLOAD 176 #define WLAN_CFG_PER_PDEV_TX_RING 0 177 #else 178 #define WLAN_CFG_PER_PDEV_TX_RING 1 179 #endif 180 #else 181 #define WLAN_CFG_PER_PDEV_TX_RING 0 182 #endif 183 184 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 185 #define WLAN_CFG_NUM_REO_DEST_RING 4 186 187 #define WLAN_CFG_HTT_PKT_TYPE 2 188 #define WLAN_CFG_MAX_PEER_ID 64 189 190 191 #ifdef CONFIG_MCL 192 static const int tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 193 0, 194 WLAN_CFG_TX_RING_MASK_0, 195 0, 196 0, 197 0, 198 0, 199 0}; 200 201 static const int rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 202 0, 203 0, 204 WLAN_CFG_RX_RING_MASK_0, 205 0, 206 WLAN_CFG_RX_RING_MASK_1, 207 WLAN_CFG_RX_RING_MASK_2, 208 WLAN_CFG_RX_RING_MASK_3}; 209 210 static const int rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 211 0, 212 0, 213 0, 214 WLAN_CFG_RX_MON_RING_MASK_0, 215 WLAN_CFG_RX_MON_RING_MASK_1, 216 WLAN_CFG_RX_MON_RING_MASK_2, 217 WLAN_CFG_RX_MON_RING_MASK_3}; 218 #else 219 static const int tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 220 WLAN_CFG_TX_RING_MASK_0, 221 WLAN_CFG_TX_RING_MASK_1, 222 WLAN_CFG_TX_RING_MASK_2, 223 WLAN_CFG_TX_RING_MASK_3}; 224 225 static const int rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 226 WLAN_CFG_RX_RING_MASK_0, 227 WLAN_CFG_RX_RING_MASK_1, 228 WLAN_CFG_RX_RING_MASK_2, 229 WLAN_CFG_RX_RING_MASK_3}; 230 231 static const int rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 232 WLAN_CFG_RX_MON_RING_MASK_0, 233 WLAN_CFG_RX_MON_RING_MASK_1, 234 WLAN_CFG_RX_MON_RING_MASK_2, 235 WLAN_CFG_RX_MON_RING_MASK_3}; 236 237 #endif 238 239 static const int rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 240 WLAN_CFG_RX_ERR_RING_MASK_0, 241 WLAN_CFG_RX_ERR_RING_MASK_1, 242 WLAN_CFG_RX_ERR_RING_MASK_2, 243 WLAN_CFG_RX_ERR_RING_MASK_3}; 244 245 static const int rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 246 WLAN_CFG_RX_WBM_REL_RING_MASK_0, 247 WLAN_CFG_RX_WBM_REL_RING_MASK_1, 248 WLAN_CFG_RX_WBM_REL_RING_MASK_2, 249 WLAN_CFG_RX_WBM_REL_RING_MASK_3}; 250 251 static const int reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 252 WLAN_CFG_REO_STATUS_RING_MASK_0, 253 WLAN_CFG_REO_STATUS_RING_MASK_1, 254 WLAN_CFG_REO_STATUS_RING_MASK_2, 255 WLAN_CFG_REO_STATUS_RING_MASK_3}; 256 257 static const int rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 258 WLAN_CFG_RXDMA2HOST_RING_MASK_0, 259 WLAN_CFG_RXDMA2HOST_RING_MASK_1, 260 WLAN_CFG_RXDMA2HOST_RING_MASK_2, 261 WLAN_CFG_RXDMA2HOST_RING_MASK_3}; 262 263 static const int host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = { 264 WLAN_CFG_HOST2RXDMA_RING_MASK_0, 265 WLAN_CFG_HOST2RXDMA_RING_MASK_1, 266 WLAN_CFG_HOST2RXDMA_RING_MASK_2, 267 WLAN_CFG_HOST2RXDMA_RING_MASK_3}; 268 269 /** 270 * struct wlan_cfg_dp_pdev_ctxt - Configuration parameters for pdev (radio) 271 * @rx_dma_buf_ring_size - Size of RxDMA buffer ring 272 * @dma_mon_buf_ring_size - Size of RxDMA Monitor buffer ring 273 * @dma_mon_dest_ring_size - Size of RxDMA Monitor Destination ring 274 * @dma_mon_status_ring_size - Size of RxDMA Monitor Status ring 275 */ 276 struct wlan_cfg_dp_pdev_ctxt { 277 int rx_dma_buf_ring_size; 278 int dma_mon_buf_ring_size; 279 int dma_mon_dest_ring_size; 280 int dma_mon_status_ring_size; 281 int num_mac_rings; 282 int nss_enabled; 283 }; 284 285 /** 286 * wlan_cfg_soc_attach() - Allocate and prepare SoC configuration 287 * 288 * Return: wlan_cfg_ctx - Handle to Configuration context 289 */ 290 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach() 291 { 292 int i = 0; 293 294 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = 295 qdf_mem_malloc(sizeof(struct wlan_cfg_dp_soc_ctxt)); 296 297 if (wlan_cfg_ctx == NULL) 298 return NULL; 299 300 wlan_cfg_ctx->num_int_ctxts = WLAN_CFG_INT_NUM_CONTEXTS; 301 wlan_cfg_ctx->max_clients = WLAN_CFG_MAX_CLIENTS; 302 wlan_cfg_ctx->max_alloc_size = WLAN_CFG_MAX_ALLOC_SIZE; 303 wlan_cfg_ctx->per_pdev_tx_ring = WLAN_CFG_PER_PDEV_TX_RING; 304 wlan_cfg_ctx->num_tcl_data_rings = WLAN_CFG_NUM_TCL_DATA_RINGS; 305 wlan_cfg_ctx->per_pdev_rx_ring = WLAN_CFG_PER_PDEV_RX_RING; 306 wlan_cfg_ctx->per_pdev_lmac_ring = WLAN_CFG_PER_PDEV_LMAC_RING; 307 wlan_cfg_ctx->num_reo_dest_rings = WLAN_CFG_NUM_REO_DEST_RING; 308 wlan_cfg_ctx->num_tx_desc_pool = MAX_TXDESC_POOLS; 309 wlan_cfg_ctx->num_tx_ext_desc_pool = WLAN_CFG_NUM_TXEXT_DESC_POOL; 310 wlan_cfg_ctx->num_tx_desc = WLAN_CFG_NUM_TX_DESC; 311 wlan_cfg_ctx->num_tx_ext_desc = WLAN_CFG_NUM_TX_EXT_DESC; 312 wlan_cfg_ctx->htt_packet_type = WLAN_CFG_HTT_PKT_TYPE; 313 wlan_cfg_ctx->max_peer_id = WLAN_CFG_MAX_PEER_ID; 314 315 wlan_cfg_ctx->tx_ring_size = WLAN_CFG_TX_RING_SIZE; 316 wlan_cfg_ctx->tx_comp_ring_size = WLAN_CFG_TX_COMP_RING_SIZE; 317 318 wlan_cfg_ctx->int_batch_threshold_tx = WLAN_CFG_INT_BATCH_THRESHOLD_TX; 319 wlan_cfg_ctx->int_timer_threshold_tx = WLAN_CFG_INT_TIMER_THRESHOLD_TX; 320 wlan_cfg_ctx->int_batch_threshold_rx = WLAN_CFG_INT_BATCH_THRESHOLD_RX; 321 wlan_cfg_ctx->int_timer_threshold_rx = WLAN_CFG_INT_TIMER_THRESHOLD_RX; 322 wlan_cfg_ctx->int_batch_threshold_other = 323 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER; 324 wlan_cfg_ctx->int_timer_threshold_other = 325 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER; 326 327 for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) { 328 wlan_cfg_ctx->int_tx_ring_mask[i] = tx_ring_mask[i]; 329 wlan_cfg_ctx->int_rx_ring_mask[i] = rx_ring_mask[i]; 330 wlan_cfg_ctx->int_rx_mon_ring_mask[i] = rx_mon_ring_mask[i]; 331 wlan_cfg_ctx->int_rx_err_ring_mask[i] = rx_err_ring_mask[i]; 332 wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] = 333 rx_wbm_rel_ring_mask[i]; 334 wlan_cfg_ctx->int_reo_status_ring_mask[i] = 335 reo_status_ring_mask[i]; 336 wlan_cfg_ctx->int_rxdma2host_ring_mask[i] = 337 rxdma2host_ring_mask[i]; 338 wlan_cfg_ctx->int_host2rxdma_ring_mask[i] = 339 host2rxdma_ring_mask[i]; 340 } 341 342 /* This is default mapping and can be overridden by HW config 343 * received from FW */ 344 wlan_cfg_set_hw_macid(wlan_cfg_ctx, 0, 1); 345 if (MAX_PDEV_CNT > 1) 346 wlan_cfg_set_hw_macid(wlan_cfg_ctx, 1, 3); 347 if (MAX_PDEV_CNT > 2) 348 wlan_cfg_set_hw_macid(wlan_cfg_ctx, 2, 2); 349 350 wlan_cfg_ctx->base_hw_macid = 1; 351 /*Enable checksum offload by default*/ 352 wlan_cfg_ctx->tcp_udp_checksumoffload = 1; 353 354 return wlan_cfg_ctx; 355 } 356 357 void wlan_cfg_soc_detach(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx) 358 { 359 qdf_mem_free(wlan_cfg_ctx); 360 } 361 362 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_attach(void) 363 { 364 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_ctx = 365 qdf_mem_malloc(sizeof(struct wlan_cfg_dp_pdev_ctxt)); 366 367 if (wlan_cfg_ctx == NULL) 368 return NULL; 369 370 wlan_cfg_ctx->rx_dma_buf_ring_size = RXDMA_BUF_RING_SIZE; 371 wlan_cfg_ctx->dma_mon_buf_ring_size = RXDMA_MONITOR_BUF_RING_SIZE; 372 wlan_cfg_ctx->dma_mon_dest_ring_size = RXDMA_MONITOR_DEST_RING_SIZE; 373 wlan_cfg_ctx->dma_mon_status_ring_size = RXDMA_MONITOR_STATUS_RING_SIZE; 374 wlan_cfg_ctx->num_mac_rings = NUM_RXDMA_RINGS_PER_PDEV; 375 376 return wlan_cfg_ctx; 377 } 378 379 void wlan_cfg_pdev_detach(struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_ctx) 380 { 381 qdf_mem_free(wlan_cfg_ctx); 382 } 383 384 void wlan_cfg_set_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg, int num) 385 { 386 cfg->num_int_ctxts = num; 387 } 388 389 void wlan_cfg_set_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg, uint32_t val) 390 { 391 cfg->max_peer_id = val;; 392 } 393 394 void wlan_cfg_set_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 395 int context, int mask) 396 { 397 cfg->int_tx_ring_mask[context] = mask; 398 } 399 400 void wlan_cfg_set_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 401 int context, int mask) 402 { 403 cfg->int_rx_ring_mask[context] = mask; 404 } 405 406 void wlan_cfg_set_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 407 int context, int mask) 408 { 409 cfg->int_rx_mon_ring_mask[context] = mask; 410 } 411 412 void wlan_cfg_set_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 413 int context, int mask) 414 { 415 cfg->int_rxdma2host_ring_mask[context] = mask; 416 } 417 418 int wlan_cfg_get_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 419 int context) 420 { 421 return cfg->int_rxdma2host_ring_mask[context]; 422 } 423 424 void wlan_cfg_set_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 425 int context, int mask) 426 { 427 cfg->int_host2rxdma_ring_mask[context] = mask; 428 } 429 430 int wlan_cfg_get_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 431 int context) 432 { 433 return cfg->int_host2rxdma_ring_mask[context]; 434 } 435 436 void wlan_cfg_set_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx, 437 int hw_macid) 438 { 439 qdf_assert_always(pdev_idx < MAX_PDEV_CNT); 440 cfg->hw_macid[pdev_idx] = hw_macid; 441 } 442 443 int wlan_cfg_get_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx) 444 { 445 qdf_assert_always(pdev_idx < MAX_PDEV_CNT); 446 return cfg->hw_macid[pdev_idx]; 447 } 448 449 int wlan_cfg_get_hw_mac_idx(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx) 450 { 451 qdf_assert_always(pdev_idx < MAX_PDEV_CNT); 452 return cfg->hw_macid[pdev_idx] - cfg->base_hw_macid; 453 } 454 455 void wlan_cfg_set_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 456 int context, int mask) 457 { 458 cfg->int_ce_ring_mask[context] = mask; 459 } 460 461 void wlan_cfg_set_rxbuf_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context, 462 int mask) 463 { 464 cfg->int_rx_ring_mask[context] = mask; 465 } 466 467 int wlan_cfg_set_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 468 int context, int mask) 469 { 470 return cfg->int_rx_err_ring_mask[context] = mask; 471 } 472 473 int wlan_cfg_set_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 474 int context, int mask) 475 { 476 return cfg->int_rx_wbm_rel_ring_mask[context] = mask; 477 } 478 479 int wlan_cfg_set_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 480 int context, int mask) 481 { 482 return cfg->int_reo_status_ring_mask[context] = mask; 483 } 484 485 int wlan_cfg_get_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg) 486 { 487 return cfg->num_int_ctxts; 488 } 489 490 int wlan_cfg_get_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context) 491 { 492 return cfg->int_tx_ring_mask[context]; 493 } 494 495 int wlan_cfg_get_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context) 496 { 497 return cfg->int_rx_ring_mask[context]; 498 } 499 500 int wlan_cfg_get_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 501 int context) 502 { 503 return cfg->int_rx_err_ring_mask[context]; 504 } 505 506 int wlan_cfg_get_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 507 int context) 508 { 509 return cfg->int_rx_wbm_rel_ring_mask[context]; 510 } 511 512 int wlan_cfg_get_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, 513 int context) 514 { 515 return cfg->int_reo_status_ring_mask[context]; 516 } 517 518 int wlan_cfg_get_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context) 519 { 520 return cfg->int_rx_mon_ring_mask[context]; 521 } 522 523 int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context) 524 { 525 return cfg->int_ce_ring_mask[context]; 526 } 527 528 uint32_t wlan_cfg_get_max_clients(struct wlan_cfg_dp_soc_ctxt *cfg) 529 { 530 return cfg->max_clients; 531 } 532 533 uint32_t wlan_cfg_max_alloc_size(struct wlan_cfg_dp_soc_ctxt *cfg) 534 { 535 return cfg->max_alloc_size; 536 } 537 538 int wlan_cfg_per_pdev_tx_ring(struct wlan_cfg_dp_soc_ctxt *cfg) 539 { 540 return cfg->per_pdev_tx_ring; 541 } 542 543 int wlan_cfg_per_pdev_lmac_ring(struct wlan_cfg_dp_soc_ctxt *cfg) 544 { 545 return cfg->per_pdev_lmac_ring; 546 } 547 548 int wlan_cfg_num_tcl_data_rings(struct wlan_cfg_dp_soc_ctxt *cfg) 549 { 550 return cfg->num_tcl_data_rings; 551 } 552 553 int wlan_cfg_tx_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg) 554 { 555 return cfg->tx_ring_size; 556 } 557 558 int wlan_cfg_tx_comp_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg) 559 { 560 return cfg->tx_comp_ring_size; 561 } 562 563 int wlan_cfg_per_pdev_rx_ring(struct wlan_cfg_dp_soc_ctxt *cfg) 564 { 565 return cfg->per_pdev_rx_ring; 566 } 567 568 int wlan_cfg_num_reo_dest_rings(struct wlan_cfg_dp_soc_ctxt *cfg) 569 { 570 return cfg->num_reo_dest_rings; 571 } 572 573 int wlan_cfg_pkt_type(struct wlan_cfg_dp_soc_ctxt *cfg) 574 { 575 return cfg->htt_packet_type; /*htt_pkt_type_ethernet*/ 576 } 577 578 int wlan_cfg_get_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg) 579 { 580 return cfg->num_tx_desc_pool; 581 } 582 583 int wlan_cfg_get_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg) 584 { 585 return cfg->num_tx_ext_desc_pool; 586 } 587 588 int wlan_cfg_get_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg) 589 { 590 return cfg->num_tx_desc; 591 } 592 593 int wlan_cfg_get_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg) 594 { 595 return cfg->num_tx_ext_desc; 596 } 597 598 uint32_t wlan_cfg_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg) 599 { 600 /* TODO: This should be calculated based on target capabilities */ 601 return cfg->max_peer_id; 602 } 603 604 int wlan_cfg_get_dma_mon_buf_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg) 605 { 606 return cfg->dma_mon_buf_ring_size; 607 } 608 609 int wlan_cfg_get_dma_mon_dest_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg) 610 { 611 return cfg->dma_mon_dest_ring_size; 612 } 613 614 int wlan_cfg_get_dma_mon_stat_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg) 615 { 616 return cfg->dma_mon_status_ring_size; 617 } 618 619 int wlan_cfg_get_rx_dma_buf_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg) 620 { 621 return cfg->rx_dma_buf_ring_size; 622 } 623 624 int wlan_cfg_get_num_mac_rings(struct wlan_cfg_dp_pdev_ctxt *cfg) 625 { 626 return cfg->num_mac_rings; 627 } 628 629 bool wlan_cfg_is_lro_enabled(struct wlan_cfg_dp_soc_ctxt *cfg) 630 { 631 return cfg->lro_enabled; 632 } 633 634 void wlan_cfg_set_rx_hash(struct wlan_cfg_dp_soc_ctxt *cfg, bool val) 635 { 636 cfg->rx_hash = val; 637 } 638 639 bool wlan_cfg_is_rx_hash_enabled(struct wlan_cfg_dp_soc_ctxt *cfg) 640 { 641 return cfg->rx_hash; 642 } 643 644 int wlan_cfg_get_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg) 645 { 646 return cfg->nss_enabled; 647 } 648 649 void wlan_cfg_set_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg, int nss_enabled) 650 { 651 cfg->nss_enabled = nss_enabled; 652 } 653 654 int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg) 655 { 656 return cfg->nss_cfg; 657 } 658 659 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg) 660 { 661 cfg->nss_cfg = nss_cfg; 662 if (cfg->nss_cfg) 663 cfg->tx_comp_ring_size = NSS_TX_COMP_RING_SIZE; 664 } 665 666 int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg) 667 { 668 return cfg->int_batch_threshold_tx; 669 } 670 671 int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg) 672 { 673 return cfg->int_timer_threshold_tx; 674 } 675 676 int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg) 677 { 678 return cfg->int_batch_threshold_rx; 679 } 680 681 int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg) 682 { 683 return cfg->int_timer_threshold_rx; 684 } 685 686 int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg) 687 { 688 return cfg->int_batch_threshold_other; 689 } 690 691 int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg) 692 { 693 return cfg->int_timer_threshold_other; 694 } 695 696 int wlan_cfg_get_checksum_offload(struct wlan_cfg_dp_soc_ctxt *cfg) 697 { 698 return cfg->tcp_udp_checksumoffload; 699 } 700 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 701 /** 702 * wlan_cfg_get_tx_flow_stop_queue_th() - Get flow control stop threshold 703 * @cfg: config context 704 * 705 * Return: stop threshold 706 */ 707 int wlan_cfg_get_tx_flow_stop_queue_th(struct wlan_cfg_dp_soc_ctxt *cfg) 708 { 709 return cfg->tx_flow_stop_queue_threshold; 710 } 711 712 /** 713 * wlan_cfg_get_tx_flow_start_queue_offset() - Get flow control start offset 714 * for TX to resume 715 * @cfg: config context 716 * 717 * Return: stop threshold 718 */ 719 int wlan_cfg_get_tx_flow_start_queue_offset(struct wlan_cfg_dp_soc_ctxt *cfg) 720 { 721 return cfg->tx_flow_start_queue_offset; 722 } 723 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 724