xref: /wlan-dirver/qca-wifi-host-cmn/wlan_cfg/wlan_cfg.c (revision 6ecd284e5a94a1c96e26d571dd47419ac305990d)
1 /*
2  * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #if defined(CONFIG_HL_SUPPORT)
20 #include "wlan_tgt_def_config_hl.h"
21 #else
22 #include "wlan_tgt_def_config.h"
23 #endif
24 
25 #include "qdf_trace.h"
26 #include "qdf_mem.h"
27 #include "wlan_cfg.h"
28 
29 /*
30  * FIX THIS -
31  * For now, all these configuration parameters are hardcoded.
32  * Many of these should actually be coming from dts file/ini file
33  */
34 
35 #ifdef CONFIG_MCL
36 #define WLAN_CFG_PER_PDEV_RX_RING 0
37 #define WLAN_CFG_PER_PDEV_LMAC_RING 0
38 #define WLAN_LRO_ENABLE 1
39 #ifdef IPA_OFFLOAD
40 #define WLAN_CFG_TX_RING_SIZE 2048
41 #else
42 #define WLAN_CFG_TX_RING_SIZE 512
43 #endif
44 #define WLAN_CFG_TX_COMP_RING_SIZE 1024
45 
46 /* Tx Descriptor and Tx Extension Descriptor pool sizes */
47 #define WLAN_CFG_NUM_TX_DESC  1024
48 #define WLAN_CFG_NUM_TX_EXT_DESC 1024
49 
50 /* Interrupt Mitigation - Batch threshold in terms of number of frames */
51 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
52 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
53 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
54 
55 /* Interrupt Mitigation - Timer threshold in us */
56 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
57 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
58 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
59 #endif
60 
61 #ifdef CONFIG_WIN
62 #define WLAN_CFG_PER_PDEV_RX_RING 0
63 #define WLAN_CFG_PER_PDEV_LMAC_RING 1
64 #define WLAN_LRO_ENABLE 0
65 
66 /* Tx Descriptor and Tx Extension Descriptor pool sizes */
67 #define WLAN_CFG_NUM_TX_DESC  (32 << 10)
68 #define WLAN_CFG_NUM_TX_EXT_DESC (8 << 10)
69 
70 
71 /* Interrupt Mitigation - Batch threshold in terms of number of frames */
72 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256
73 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128
74 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
75 
76 /* Interrupt Mitigation - Timer threshold in us */
77 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000
78 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500
79 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000
80 
81 #define WLAN_CFG_TX_RING_SIZE 512
82 
83 /* Size the completion ring using following 2 parameters
84  *  - NAPI schedule latency (assuming 1 netdev competing for CPU) = 20 ms (2 jiffies)
85  *  - Worst case PPS requirement = 400K PPS
86  *
87  * Ring size = 20 * 400 = 8000
88  * 8192 is nearest power of 2
89  */
90 #define WLAN_CFG_TX_COMP_RING_SIZE (8 << 10)
91 #endif
92 
93 /*
94  * The max allowed size for tx comp ring is 8191.
95  * This is limitted by h/w ring max size.
96  * As this is not a power of 2 it does not work with nss offload so the
97  * nearest available size which is power of 2 is 4096 choosen for nss
98  */
99 #define NSS_TX_COMP_RING_SIZE (4 << 10)
100 
101 #define RXDMA_BUF_RING_SIZE 2048
102 #define RXDMA_MONITOR_BUF_RING_SIZE 2048
103 #define RXDMA_MONITOR_DEST_RING_SIZE 2048
104 #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
105 
106 #ifdef QCA_LL_TX_FLOW_CONTROL_V2
107 
108 /* Per vdev pools */
109 #define WLAN_CFG_NUM_TX_DESC_POOL	3
110 #define WLAN_CFG_NUM_TXEXT_DESC_POOL	3
111 
112 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
113 
114 #ifdef TX_PER_PDEV_DESC_POOL
115 #define WLAN_CFG_NUM_TX_DESC_POOL	MAX_PDEV_CNT
116 #define WLAN_CFG_NUM_TXEXT_DESC_POOL	MAX_PDEV_CNT
117 
118 #else /* TX_PER_PDEV_DESC_POOL */
119 
120 #define WLAN_CFG_NUM_TX_DESC_POOL 3
121 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
122 
123 #endif /* TX_PER_PDEV_DESC_POOL */
124 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
125 
126 #define WLAN_CFG_TX_RING_MASK_0 0x1
127 #define WLAN_CFG_TX_RING_MASK_1 0x2
128 #define WLAN_CFG_TX_RING_MASK_2 0x4
129 #define WLAN_CFG_TX_RING_MASK_3 0x0
130 
131 #define WLAN_CFG_RX_RING_MASK_0 0x1
132 #define WLAN_CFG_RX_RING_MASK_1 0x2
133 #define WLAN_CFG_RX_RING_MASK_2 0x4
134 #define WLAN_CFG_RX_RING_MASK_3 0x8
135 
136 #define WLAN_CFG_RX_MON_RING_MASK_0 0x1
137 #define WLAN_CFG_RX_MON_RING_MASK_1 0x2
138 #define WLAN_CFG_RX_MON_RING_MASK_2 0x4
139 #define WLAN_CFG_RX_MON_RING_MASK_3 0x0
140 
141 #define WLAN_CFG_RX_ERR_RING_MASK_0 0x1
142 #define WLAN_CFG_RX_ERR_RING_MASK_1 0x0
143 #define WLAN_CFG_RX_ERR_RING_MASK_2 0x0
144 #define WLAN_CFG_RX_ERR_RING_MASK_3 0x0
145 
146 #define WLAN_CFG_RX_WBM_REL_RING_MASK_0 0x1
147 #define WLAN_CFG_RX_WBM_REL_RING_MASK_1 0x0
148 #define WLAN_CFG_RX_WBM_REL_RING_MASK_2 0x0
149 #define WLAN_CFG_RX_WBM_REL_RING_MASK_3 0x0
150 
151 #define WLAN_CFG_REO_STATUS_RING_MASK_0 0x1
152 #define WLAN_CFG_REO_STATUS_RING_MASK_1 0x0
153 #define WLAN_CFG_REO_STATUS_RING_MASK_2 0x0
154 #define WLAN_CFG_REO_STATUS_RING_MASK_3 0x0
155 
156 #define WLAN_CFG_RXDMA2HOST_RING_MASK_0 0x1
157 #define WLAN_CFG_RXDMA2HOST_RING_MASK_1 0x2
158 #define WLAN_CFG_RXDMA2HOST_RING_MASK_2 0x4
159 #define WLAN_CFG_RXDMA2HOST_RING_MASK_3 0x0
160 
161 #define WLAN_CFG_HOST2RXDMA_RING_MASK_0 0x1
162 #define WLAN_CFG_HOST2RXDMA_RING_MASK_1 0x2
163 #define WLAN_CFG_HOST2RXDMA_RING_MASK_2 0x4
164 #define WLAN_CFG_HOST2RXDMA_RING_MASK_3 0x0
165 
166 #define WLAN_CFG_DP_TX_NUM_POOLS 3
167 /* Change this to a lower value to enforce scattered idle list mode */
168 #define WLAN_CFG_MAX_ALLOC_SIZE (2 << 20)
169 
170 #define WLAN_CFG_MAX_CLIENTS 64
171 
172 #ifdef CONFIG_MCL
173 #ifdef IPA_OFFLOAD
174 #define WLAN_CFG_PER_PDEV_TX_RING 0
175 #else
176 #define WLAN_CFG_PER_PDEV_TX_RING 1
177 #endif
178 #else
179 #define WLAN_CFG_PER_PDEV_TX_RING 0
180 #endif
181 
182 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
183 #define WLAN_CFG_NUM_REO_DEST_RING 4
184 
185 #define WLAN_CFG_HTT_PKT_TYPE 2
186 #define WLAN_CFG_MAX_PEER_ID 64
187 
188 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
189 
190 #ifdef CONFIG_MCL
191 static const int tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
192 						0,
193 						WLAN_CFG_TX_RING_MASK_0,
194 						0,
195 						0,
196 						0,
197 						0,
198 						0};
199 
200 static const int rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
201 					0,
202 					0,
203 					WLAN_CFG_RX_RING_MASK_0,
204 					0,
205 					WLAN_CFG_RX_RING_MASK_1,
206 					WLAN_CFG_RX_RING_MASK_2,
207 					WLAN_CFG_RX_RING_MASK_3};
208 
209 static const int rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
210 					0,
211 					0,
212 					0,
213 					WLAN_CFG_RX_MON_RING_MASK_0,
214 					WLAN_CFG_RX_MON_RING_MASK_1,
215 					WLAN_CFG_RX_MON_RING_MASK_2,
216 					WLAN_CFG_RX_MON_RING_MASK_3};
217 #else
218 static const int tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
219 						WLAN_CFG_TX_RING_MASK_0,
220 						WLAN_CFG_TX_RING_MASK_1,
221 						WLAN_CFG_TX_RING_MASK_2,
222 						WLAN_CFG_TX_RING_MASK_3};
223 
224 static const int rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
225 					WLAN_CFG_RX_RING_MASK_0,
226 					WLAN_CFG_RX_RING_MASK_1,
227 					WLAN_CFG_RX_RING_MASK_2,
228 					WLAN_CFG_RX_RING_MASK_3};
229 
230 static const int rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
231 					0,
232 					0,
233 					0,
234 					0,
235 					WLAN_CFG_RX_MON_RING_MASK_0,
236 					WLAN_CFG_RX_MON_RING_MASK_1,
237 					WLAN_CFG_RX_MON_RING_MASK_2};
238 
239 #endif
240 
241 static const int rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
242 					WLAN_CFG_RX_ERR_RING_MASK_0,
243 					WLAN_CFG_RX_ERR_RING_MASK_1,
244 					WLAN_CFG_RX_ERR_RING_MASK_2,
245 					WLAN_CFG_RX_ERR_RING_MASK_3};
246 
247 static const int rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
248 					WLAN_CFG_RX_WBM_REL_RING_MASK_0,
249 					WLAN_CFG_RX_WBM_REL_RING_MASK_1,
250 					WLAN_CFG_RX_WBM_REL_RING_MASK_2,
251 					WLAN_CFG_RX_WBM_REL_RING_MASK_3};
252 
253 static const int reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
254 					WLAN_CFG_REO_STATUS_RING_MASK_0,
255 					WLAN_CFG_REO_STATUS_RING_MASK_1,
256 					WLAN_CFG_REO_STATUS_RING_MASK_2,
257 					WLAN_CFG_REO_STATUS_RING_MASK_3};
258 
259 static const int rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
260 					WLAN_CFG_RXDMA2HOST_RING_MASK_0,
261 					WLAN_CFG_RXDMA2HOST_RING_MASK_1,
262 					WLAN_CFG_RXDMA2HOST_RING_MASK_2,
263 					WLAN_CFG_RXDMA2HOST_RING_MASK_3};
264 
265 static const int host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
266 					WLAN_CFG_HOST2RXDMA_RING_MASK_0,
267 					WLAN_CFG_HOST2RXDMA_RING_MASK_1,
268 					WLAN_CFG_HOST2RXDMA_RING_MASK_2,
269 					WLAN_CFG_HOST2RXDMA_RING_MASK_3};
270 
271 /**
272  * struct wlan_cfg_dp_pdev_ctxt - Configuration parameters for pdev (radio)
273  * @rx_dma_buf_ring_size - Size of RxDMA buffer ring
274  * @dma_mon_buf_ring_size - Size of RxDMA Monitor buffer ring
275  * @dma_mon_dest_ring_size - Size of RxDMA Monitor Destination ring
276  * @dma_mon_status_ring_size - Size of RxDMA Monitor Status ring
277  */
278 struct wlan_cfg_dp_pdev_ctxt {
279 	int rx_dma_buf_ring_size;
280 	int dma_mon_buf_ring_size;
281 	int dma_mon_dest_ring_size;
282 	int dma_mon_status_ring_size;
283 	int num_mac_rings;
284 	int nss_enabled;
285 };
286 
287 /**
288  * wlan_cfg_soc_attach() - Allocate and prepare SoC configuration
289  *
290  * Return: wlan_cfg_ctx - Handle to Configuration context
291  */
292 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach()
293 {
294 	int i = 0;
295 
296 	struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx =
297 		qdf_mem_malloc(sizeof(struct wlan_cfg_dp_soc_ctxt));
298 
299 	if (wlan_cfg_ctx == NULL)
300 		return NULL;
301 
302 	wlan_cfg_ctx->num_int_ctxts = WLAN_CFG_INT_NUM_CONTEXTS;
303 	wlan_cfg_ctx->max_clients = WLAN_CFG_MAX_CLIENTS;
304 	wlan_cfg_ctx->max_alloc_size = WLAN_CFG_MAX_ALLOC_SIZE;
305 	wlan_cfg_ctx->per_pdev_tx_ring = WLAN_CFG_PER_PDEV_TX_RING;
306 	wlan_cfg_ctx->num_tcl_data_rings = WLAN_CFG_NUM_TCL_DATA_RINGS;
307 	wlan_cfg_ctx->per_pdev_rx_ring = WLAN_CFG_PER_PDEV_RX_RING;
308 	wlan_cfg_ctx->per_pdev_lmac_ring = WLAN_CFG_PER_PDEV_LMAC_RING;
309 	wlan_cfg_ctx->num_reo_dest_rings = WLAN_CFG_NUM_REO_DEST_RING;
310 	wlan_cfg_ctx->num_tx_desc_pool = MAX_TXDESC_POOLS;
311 	wlan_cfg_ctx->num_tx_ext_desc_pool = WLAN_CFG_NUM_TXEXT_DESC_POOL;
312 	wlan_cfg_ctx->num_tx_desc = WLAN_CFG_NUM_TX_DESC;
313 	wlan_cfg_ctx->num_tx_ext_desc = WLAN_CFG_NUM_TX_EXT_DESC;
314 	wlan_cfg_ctx->htt_packet_type = WLAN_CFG_HTT_PKT_TYPE;
315 	wlan_cfg_ctx->max_peer_id = WLAN_CFG_MAX_PEER_ID;
316 
317 	wlan_cfg_ctx->tx_ring_size = WLAN_CFG_TX_RING_SIZE;
318 	wlan_cfg_ctx->tx_comp_ring_size = WLAN_CFG_TX_COMP_RING_SIZE;
319 
320 	wlan_cfg_ctx->int_batch_threshold_tx = WLAN_CFG_INT_BATCH_THRESHOLD_TX;
321 	wlan_cfg_ctx->int_timer_threshold_tx =  WLAN_CFG_INT_TIMER_THRESHOLD_TX;
322 	wlan_cfg_ctx->int_batch_threshold_rx = WLAN_CFG_INT_BATCH_THRESHOLD_RX;
323 	wlan_cfg_ctx->int_timer_threshold_rx = WLAN_CFG_INT_TIMER_THRESHOLD_RX;
324 	wlan_cfg_ctx->int_batch_threshold_other =
325 		WLAN_CFG_INT_BATCH_THRESHOLD_OTHER;
326 	wlan_cfg_ctx->int_timer_threshold_other =
327 		WLAN_CFG_INT_TIMER_THRESHOLD_OTHER;
328 
329 	for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
330 		wlan_cfg_ctx->int_tx_ring_mask[i] = tx_ring_mask[i];
331 		wlan_cfg_ctx->int_rx_ring_mask[i] = rx_ring_mask[i];
332 		wlan_cfg_ctx->int_rx_mon_ring_mask[i] = rx_mon_ring_mask[i];
333 		wlan_cfg_ctx->int_rx_err_ring_mask[i] = rx_err_ring_mask[i];
334 		wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] =
335 					rx_wbm_rel_ring_mask[i];
336 		wlan_cfg_ctx->int_reo_status_ring_mask[i] =
337 					reo_status_ring_mask[i];
338 		wlan_cfg_ctx->int_rxdma2host_ring_mask[i] =
339 			rxdma2host_ring_mask[i];
340 		wlan_cfg_ctx->int_host2rxdma_ring_mask[i] =
341 			host2rxdma_ring_mask[i];
342 	}
343 
344 	/* This is default mapping and can be overridden by HW config
345 	 * received from FW */
346 	wlan_cfg_set_hw_macid(wlan_cfg_ctx, 0, 1);
347 	if (MAX_PDEV_CNT > 1)
348 		wlan_cfg_set_hw_macid(wlan_cfg_ctx, 1, 3);
349 	if (MAX_PDEV_CNT > 2)
350 		wlan_cfg_set_hw_macid(wlan_cfg_ctx, 2, 2);
351 
352 	wlan_cfg_ctx->base_hw_macid = 1;
353 	/*Enable checksum offload by default*/
354 	wlan_cfg_ctx->tcp_udp_checksumoffload = 1;
355 
356 	wlan_cfg_ctx->defrag_timeout_check = 1;
357 	wlan_cfg_ctx->rx_defrag_min_timeout = WLAN_CFG_RX_DEFRAG_TIMEOUT;
358 
359 	return wlan_cfg_ctx;
360 }
361 
362 void wlan_cfg_soc_detach(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx)
363 {
364 	qdf_mem_free(wlan_cfg_ctx);
365 }
366 
367 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_attach(void)
368 {
369 	struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_ctx =
370 		qdf_mem_malloc(sizeof(struct wlan_cfg_dp_pdev_ctxt));
371 
372 	if (wlan_cfg_ctx == NULL)
373 		return NULL;
374 
375 	wlan_cfg_ctx->rx_dma_buf_ring_size = RXDMA_BUF_RING_SIZE;
376 	wlan_cfg_ctx->dma_mon_buf_ring_size = RXDMA_MONITOR_BUF_RING_SIZE;
377 	wlan_cfg_ctx->dma_mon_dest_ring_size = RXDMA_MONITOR_DEST_RING_SIZE;
378 	wlan_cfg_ctx->dma_mon_status_ring_size = RXDMA_MONITOR_STATUS_RING_SIZE;
379 	wlan_cfg_ctx->num_mac_rings = NUM_RXDMA_RINGS_PER_PDEV;
380 
381 	return wlan_cfg_ctx;
382 }
383 
384 void wlan_cfg_pdev_detach(struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_ctx)
385 {
386 	qdf_mem_free(wlan_cfg_ctx);
387 }
388 
389 void wlan_cfg_set_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg, int num)
390 {
391 	cfg->num_int_ctxts = num;
392 }
393 
394 void wlan_cfg_set_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg, uint32_t val)
395 {
396 	cfg->max_peer_id = val;;
397 }
398 
399 void wlan_cfg_set_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
400 		int context, int mask)
401 {
402 	cfg->int_tx_ring_mask[context] = mask;
403 }
404 
405 void wlan_cfg_set_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
406 		int context, int mask)
407 {
408 	cfg->int_rx_ring_mask[context] = mask;
409 }
410 
411 void wlan_cfg_set_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
412 		int context, int mask)
413 {
414 	cfg->int_rx_mon_ring_mask[context] = mask;
415 }
416 
417 void wlan_cfg_set_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
418 	int context, int mask)
419 {
420 	cfg->int_rxdma2host_ring_mask[context] = mask;
421 }
422 
423 int wlan_cfg_get_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
424 	int context)
425 {
426 	return cfg->int_rxdma2host_ring_mask[context];
427 }
428 
429 void wlan_cfg_set_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
430 	int context, int mask)
431 {
432 	cfg->int_host2rxdma_ring_mask[context] = mask;
433 }
434 
435 int wlan_cfg_get_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
436 	int context)
437 {
438 	return cfg->int_host2rxdma_ring_mask[context];
439 }
440 
441 void wlan_cfg_set_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx,
442 	int hw_macid)
443 {
444 	qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
445 	cfg->hw_macid[pdev_idx] = hw_macid;
446 }
447 
448 int wlan_cfg_get_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx)
449 {
450 	qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
451 	return cfg->hw_macid[pdev_idx];
452 }
453 
454 int wlan_cfg_get_hw_mac_idx(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx)
455 {
456 	qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
457 	return cfg->hw_macid[pdev_idx] - cfg->base_hw_macid;
458 }
459 
460 void wlan_cfg_set_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
461 		int context, int mask)
462 {
463 	cfg->int_ce_ring_mask[context] = mask;
464 }
465 
466 void wlan_cfg_set_rxbuf_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context,
467 		int mask)
468 {
469 	cfg->int_rx_ring_mask[context] = mask;
470 }
471 
472 int wlan_cfg_set_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
473 		int context, int mask)
474 {
475 	return cfg->int_rx_err_ring_mask[context] = mask;
476 }
477 
478 int wlan_cfg_set_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
479 		int context, int mask)
480 {
481 	return cfg->int_rx_wbm_rel_ring_mask[context] = mask;
482 }
483 
484 int wlan_cfg_set_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
485 		int context, int mask)
486 {
487 	return cfg->int_reo_status_ring_mask[context] = mask;
488 }
489 
490 int wlan_cfg_get_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg)
491 {
492 	return cfg->num_int_ctxts;
493 }
494 
495 int wlan_cfg_get_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
496 {
497 	return cfg->int_tx_ring_mask[context];
498 }
499 
500 int wlan_cfg_get_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
501 {
502 	return cfg->int_rx_ring_mask[context];
503 }
504 
505 int wlan_cfg_get_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
506 						int context)
507 {
508 	return cfg->int_rx_err_ring_mask[context];
509 }
510 
511 int wlan_cfg_get_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
512 					int context)
513 {
514 	return cfg->int_rx_wbm_rel_ring_mask[context];
515 }
516 
517 int wlan_cfg_get_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
518 					int context)
519 {
520 	return cfg->int_reo_status_ring_mask[context];
521 }
522 
523 int wlan_cfg_get_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
524 {
525 	return cfg->int_rx_mon_ring_mask[context];
526 }
527 
528 int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
529 {
530 	return cfg->int_ce_ring_mask[context];
531 }
532 
533 uint32_t wlan_cfg_get_max_clients(struct wlan_cfg_dp_soc_ctxt *cfg)
534 {
535 	return cfg->max_clients;
536 }
537 
538 uint32_t wlan_cfg_max_alloc_size(struct wlan_cfg_dp_soc_ctxt *cfg)
539 {
540 	return cfg->max_alloc_size;
541 }
542 
543 int wlan_cfg_per_pdev_tx_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
544 {
545 	return cfg->per_pdev_tx_ring;
546 }
547 
548 int wlan_cfg_per_pdev_lmac_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
549 {
550 	return cfg->per_pdev_lmac_ring;
551 }
552 
553 int wlan_cfg_num_tcl_data_rings(struct wlan_cfg_dp_soc_ctxt *cfg)
554 {
555 	return cfg->num_tcl_data_rings;
556 }
557 
558 int wlan_cfg_tx_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
559 {
560 	return cfg->tx_ring_size;
561 }
562 
563 int wlan_cfg_tx_comp_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
564 {
565 	return cfg->tx_comp_ring_size;
566 }
567 
568 int wlan_cfg_per_pdev_rx_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
569 {
570 	return cfg->per_pdev_rx_ring;
571 }
572 
573 int wlan_cfg_num_reo_dest_rings(struct wlan_cfg_dp_soc_ctxt *cfg)
574 {
575 	return cfg->num_reo_dest_rings;
576 }
577 
578 int wlan_cfg_pkt_type(struct wlan_cfg_dp_soc_ctxt *cfg)
579 {
580 	return cfg->htt_packet_type;            /*htt_pkt_type_ethernet*/
581 }
582 
583 int wlan_cfg_get_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg)
584 {
585 	return cfg->num_tx_desc_pool;
586 }
587 
588 void wlan_cfg_set_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool)
589 {
590 	cfg->num_tx_desc_pool = num_pool;
591 }
592 
593 int wlan_cfg_get_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg)
594 {
595 	return cfg->num_tx_ext_desc_pool;
596 }
597 
598 void wlan_cfg_set_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool)
599 {
600 	cfg->num_tx_ext_desc_pool = num_pool;
601 }
602 
603 int wlan_cfg_get_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg)
604 {
605 	return cfg->num_tx_desc;
606 }
607 
608 void wlan_cfg_set_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_desc)
609 {
610 	cfg->num_tx_desc = num_desc;
611 }
612 
613 int wlan_cfg_get_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg)
614 {
615 	return cfg->num_tx_ext_desc;
616 }
617 
618 void wlan_cfg_set_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_ext_desc)
619 {
620 	cfg->num_tx_ext_desc = num_ext_desc;
621 }
622 
623 uint32_t wlan_cfg_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg)
624 {
625 	/* TODO: This should be calculated based on target capabilities */
626 	return cfg->max_peer_id;
627 }
628 
629 int wlan_cfg_get_dma_mon_buf_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
630 {
631 	return  cfg->dma_mon_buf_ring_size;
632 }
633 
634 int wlan_cfg_get_dma_mon_dest_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
635 {
636 	return  cfg->dma_mon_dest_ring_size;
637 }
638 
639 int wlan_cfg_get_dma_mon_stat_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
640 {
641 	return  cfg->dma_mon_status_ring_size;
642 }
643 
644 int wlan_cfg_get_rx_dma_buf_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
645 {
646 	return  cfg->rx_dma_buf_ring_size;
647 }
648 
649 int wlan_cfg_get_num_mac_rings(struct wlan_cfg_dp_pdev_ctxt *cfg)
650 {
651 	return  cfg->num_mac_rings;
652 }
653 
654 bool wlan_cfg_is_lro_enabled(struct wlan_cfg_dp_soc_ctxt *cfg)
655 {
656 	return  cfg->lro_enabled;
657 }
658 
659 void wlan_cfg_set_rx_hash(struct wlan_cfg_dp_soc_ctxt *cfg, bool val)
660 {
661 	cfg->rx_hash = val;
662 }
663 
664 bool wlan_cfg_is_rx_hash_enabled(struct wlan_cfg_dp_soc_ctxt *cfg)
665 {
666 	return  cfg->rx_hash;
667 }
668 
669 int wlan_cfg_get_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg)
670 {
671 	return  cfg->nss_enabled;
672 }
673 
674 void wlan_cfg_set_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg, int nss_enabled)
675 {
676 	cfg->nss_enabled = nss_enabled;
677 }
678 
679 int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg)
680 {
681 	return  cfg->nss_cfg;
682 }
683 
684 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg)
685 {
686 	cfg->nss_cfg = nss_cfg;
687 	if (cfg->nss_cfg)
688 		cfg->tx_comp_ring_size = NSS_TX_COMP_RING_SIZE;
689 }
690 
691 int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
692 {
693 	return cfg->int_batch_threshold_tx;
694 }
695 
696 int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
697 {
698 	return cfg->int_timer_threshold_tx;
699 }
700 
701 int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg)
702 {
703 	return cfg->int_batch_threshold_rx;
704 }
705 
706 int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg)
707 {
708 	return cfg->int_timer_threshold_rx;
709 }
710 
711 int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg)
712 {
713 	return cfg->int_batch_threshold_other;
714 }
715 
716 int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg)
717 {
718 	return cfg->int_timer_threshold_other;
719 }
720 
721 int wlan_cfg_get_checksum_offload(struct wlan_cfg_dp_soc_ctxt *cfg)
722 {
723 	return cfg->tcp_udp_checksumoffload;
724 }
725 
726 int wlan_cfg_get_rx_defrag_min_timeout(struct wlan_cfg_dp_soc_ctxt *cfg)
727 {
728 	return cfg->rx_defrag_min_timeout;
729 }
730 
731 int wlan_cfg_get_defrag_timeout_check(struct wlan_cfg_dp_soc_ctxt *cfg)
732 {
733 	return cfg->defrag_timeout_check;
734 }
735 
736 #ifdef QCA_LL_TX_FLOW_CONTROL_V2
737 /**
738  * wlan_cfg_get_tx_flow_stop_queue_th() - Get flow control stop threshold
739  * @cfg: config context
740  *
741  * Return: stop threshold
742  */
743 int wlan_cfg_get_tx_flow_stop_queue_th(struct wlan_cfg_dp_soc_ctxt *cfg)
744 {
745 	return cfg->tx_flow_stop_queue_threshold;
746 }
747 
748 /**
749  * wlan_cfg_get_tx_flow_start_queue_offset() - Get flow control start offset
750  *					for TX to resume
751  * @cfg: config context
752  *
753  * Return: stop threshold
754  */
755 int wlan_cfg_get_tx_flow_start_queue_offset(struct wlan_cfg_dp_soc_ctxt *cfg)
756 {
757 	return cfg->tx_flow_start_queue_offset;
758 }
759 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
760