xref: /wlan-dirver/qca-wifi-host-cmn/wlan_cfg/wlan_cfg.c (revision 3149adf58a329e17232a4c0e58d460d025edd55a)
1 /*
2  * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #if defined(CONFIG_HL_SUPPORT)
20 #include "wlan_tgt_def_config_hl.h"
21 #else
22 #include "wlan_tgt_def_config.h"
23 #endif
24 
25 #include "qdf_trace.h"
26 #include "qdf_mem.h"
27 #include "wlan_cfg.h"
28 
29 /*
30  * FIX THIS -
31  * For now, all these configuration parameters are hardcoded.
32  * Many of these should actually be coming from dts file/ini file
33  */
34 
35 #ifdef CONFIG_MCL
36 #define WLAN_CFG_PER_PDEV_RX_RING 0
37 #define WLAN_CFG_PER_PDEV_LMAC_RING 0
38 #define NUM_RXDMA_RINGS_PER_PDEV 2
39 #define WLAN_LRO_ENABLE 1
40 #ifdef IPA_OFFLOAD
41 #define WLAN_CFG_TX_RING_SIZE 2048
42 #else
43 #define WLAN_CFG_TX_RING_SIZE 512
44 #endif
45 #define WLAN_CFG_TX_COMP_RING_SIZE 1024
46 
47 /* Tx Descriptor and Tx Extension Descriptor pool sizes */
48 #define WLAN_CFG_NUM_TX_DESC  1024
49 #define WLAN_CFG_NUM_TX_EXT_DESC 1024
50 
51 /* Interrupt Mitigation - Batch threshold in terms of number of frames */
52 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
53 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
54 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
55 
56 /* Interrupt Mitigation - Timer threshold in us */
57 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
58 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
59 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
60 #endif
61 
62 #ifdef CONFIG_WIN
63 #define WLAN_CFG_PER_PDEV_RX_RING 0
64 #define WLAN_CFG_PER_PDEV_LMAC_RING 1
65 #define NUM_RXDMA_RINGS_PER_PDEV 1
66 #define WLAN_LRO_ENABLE 0
67 
68 /* Tx Descriptor and Tx Extension Descriptor pool sizes */
69 #define WLAN_CFG_NUM_TX_DESC  (32 << 10)
70 #define WLAN_CFG_NUM_TX_EXT_DESC (8 << 10)
71 
72 
73 /* Interrupt Mitigation - Batch threshold in terms of number of frames */
74 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256
75 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128
76 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
77 
78 /* Interrupt Mitigation - Timer threshold in us */
79 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000
80 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500
81 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000
82 
83 #define WLAN_CFG_TX_RING_SIZE 512
84 
85 /* Size the completion ring using following 2 parameters
86  *  - NAPI schedule latency (assuming 1 netdev competing for CPU) = 20 ms (2 jiffies)
87  *  - Worst case PPS requirement = 400K PPS
88  *
89  * Ring size = 20 * 400 = 8000
90  * 8192 is nearest power of 2
91  */
92 #define WLAN_CFG_TX_COMP_RING_SIZE (8 << 10)
93 #endif
94 
95 /*
96  * The max allowed size for tx comp ring is 8191.
97  * This is limitted by h/w ring max size.
98  * As this is not a power of 2 it does not work with nss offload so the
99  * nearest available size which is power of 2 is 4096 choosen for nss
100  */
101 #define NSS_TX_COMP_RING_SIZE (4 << 10)
102 
103 #define RXDMA_BUF_RING_SIZE 2048
104 #define RXDMA_MONITOR_BUF_RING_SIZE 2048
105 #define RXDMA_MONITOR_DEST_RING_SIZE 2048
106 #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
107 
108 #ifdef QCA_LL_TX_FLOW_CONTROL_V2
109 
110 /* Per vdev pools */
111 #define WLAN_CFG_NUM_TX_DESC_POOL	3
112 #define WLAN_CFG_NUM_TXEXT_DESC_POOL	3
113 
114 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
115 
116 #ifdef TX_PER_PDEV_DESC_POOL
117 #define WLAN_CFG_NUM_TX_DESC_POOL	MAX_PDEV_CNT
118 #define WLAN_CFG_NUM_TXEXT_DESC_POOL	MAX_PDEV_CNT
119 
120 #else /* TX_PER_PDEV_DESC_POOL */
121 
122 #define WLAN_CFG_NUM_TX_DESC_POOL 3
123 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
124 
125 #endif /* TX_PER_PDEV_DESC_POOL */
126 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
127 
128 #define WLAN_CFG_TX_RING_MASK_0 0x1
129 #define WLAN_CFG_TX_RING_MASK_1 0x2
130 #define WLAN_CFG_TX_RING_MASK_2 0x4
131 #define WLAN_CFG_TX_RING_MASK_3 0x0
132 
133 #define WLAN_CFG_RX_RING_MASK_0 0x1
134 #define WLAN_CFG_RX_RING_MASK_1 0x2
135 #define WLAN_CFG_RX_RING_MASK_2 0x4
136 #define WLAN_CFG_RX_RING_MASK_3 0x8
137 
138 #define WLAN_CFG_RX_MON_RING_MASK_0 0x1
139 #define WLAN_CFG_RX_MON_RING_MASK_1 0x2
140 #define WLAN_CFG_RX_MON_RING_MASK_2 0x4
141 #define WLAN_CFG_RX_MON_RING_MASK_3 0x0
142 
143 #define WLAN_CFG_RX_ERR_RING_MASK_0 0x1
144 #define WLAN_CFG_RX_ERR_RING_MASK_1 0x0
145 #define WLAN_CFG_RX_ERR_RING_MASK_2 0x0
146 #define WLAN_CFG_RX_ERR_RING_MASK_3 0x0
147 
148 #define WLAN_CFG_RX_WBM_REL_RING_MASK_0 0x1
149 #define WLAN_CFG_RX_WBM_REL_RING_MASK_1 0x0
150 #define WLAN_CFG_RX_WBM_REL_RING_MASK_2 0x0
151 #define WLAN_CFG_RX_WBM_REL_RING_MASK_3 0x0
152 
153 #define WLAN_CFG_REO_STATUS_RING_MASK_0 0x1
154 #define WLAN_CFG_REO_STATUS_RING_MASK_1 0x0
155 #define WLAN_CFG_REO_STATUS_RING_MASK_2 0x0
156 #define WLAN_CFG_REO_STATUS_RING_MASK_3 0x0
157 
158 #define WLAN_CFG_RXDMA2HOST_RING_MASK_0 0x1
159 #define WLAN_CFG_RXDMA2HOST_RING_MASK_1 0x2
160 #define WLAN_CFG_RXDMA2HOST_RING_MASK_2 0x4
161 #define WLAN_CFG_RXDMA2HOST_RING_MASK_3 0x0
162 
163 #define WLAN_CFG_HOST2RXDMA_RING_MASK_0 0x1
164 #define WLAN_CFG_HOST2RXDMA_RING_MASK_1 0x2
165 #define WLAN_CFG_HOST2RXDMA_RING_MASK_2 0x4
166 #define WLAN_CFG_HOST2RXDMA_RING_MASK_3 0x0
167 
168 #define WLAN_CFG_DP_TX_NUM_POOLS 3
169 /* Change this to a lower value to enforce scattered idle list mode */
170 #define WLAN_CFG_MAX_ALLOC_SIZE (2 << 20)
171 
172 #define WLAN_CFG_MAX_CLIENTS 64
173 
174 #ifdef CONFIG_MCL
175 #ifdef IPA_OFFLOAD
176 #define WLAN_CFG_PER_PDEV_TX_RING 0
177 #else
178 #define WLAN_CFG_PER_PDEV_TX_RING 1
179 #endif
180 #else
181 #define WLAN_CFG_PER_PDEV_TX_RING 0
182 #endif
183 
184 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
185 #define WLAN_CFG_NUM_REO_DEST_RING 4
186 
187 #define WLAN_CFG_HTT_PKT_TYPE 2
188 #define WLAN_CFG_MAX_PEER_ID 64
189 
190 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
191 
192 #ifdef CONFIG_MCL
193 static const int tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
194 						0,
195 						WLAN_CFG_TX_RING_MASK_0,
196 						0,
197 						0,
198 						0,
199 						0,
200 						0};
201 
202 static const int rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
203 					0,
204 					0,
205 					WLAN_CFG_RX_RING_MASK_0,
206 					0,
207 					WLAN_CFG_RX_RING_MASK_1,
208 					WLAN_CFG_RX_RING_MASK_2,
209 					WLAN_CFG_RX_RING_MASK_3};
210 
211 static const int rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
212 					0,
213 					0,
214 					0,
215 					WLAN_CFG_RX_MON_RING_MASK_0,
216 					WLAN_CFG_RX_MON_RING_MASK_1,
217 					WLAN_CFG_RX_MON_RING_MASK_2,
218 					WLAN_CFG_RX_MON_RING_MASK_3};
219 #else
220 static const int tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
221 						WLAN_CFG_TX_RING_MASK_0,
222 						WLAN_CFG_TX_RING_MASK_1,
223 						WLAN_CFG_TX_RING_MASK_2,
224 						WLAN_CFG_TX_RING_MASK_3};
225 
226 static const int rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
227 					WLAN_CFG_RX_RING_MASK_0,
228 					WLAN_CFG_RX_RING_MASK_1,
229 					WLAN_CFG_RX_RING_MASK_2,
230 					WLAN_CFG_RX_RING_MASK_3};
231 
232 static const int rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
233 					WLAN_CFG_RX_MON_RING_MASK_0,
234 					WLAN_CFG_RX_MON_RING_MASK_1,
235 					WLAN_CFG_RX_MON_RING_MASK_2,
236 					WLAN_CFG_RX_MON_RING_MASK_3};
237 
238 #endif
239 
240 static const int rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
241 					WLAN_CFG_RX_ERR_RING_MASK_0,
242 					WLAN_CFG_RX_ERR_RING_MASK_1,
243 					WLAN_CFG_RX_ERR_RING_MASK_2,
244 					WLAN_CFG_RX_ERR_RING_MASK_3};
245 
246 static const int rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
247 					WLAN_CFG_RX_WBM_REL_RING_MASK_0,
248 					WLAN_CFG_RX_WBM_REL_RING_MASK_1,
249 					WLAN_CFG_RX_WBM_REL_RING_MASK_2,
250 					WLAN_CFG_RX_WBM_REL_RING_MASK_3};
251 
252 static const int reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
253 					WLAN_CFG_REO_STATUS_RING_MASK_0,
254 					WLAN_CFG_REO_STATUS_RING_MASK_1,
255 					WLAN_CFG_REO_STATUS_RING_MASK_2,
256 					WLAN_CFG_REO_STATUS_RING_MASK_3};
257 
258 static const int rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
259 					WLAN_CFG_RXDMA2HOST_RING_MASK_0,
260 					WLAN_CFG_RXDMA2HOST_RING_MASK_1,
261 					WLAN_CFG_RXDMA2HOST_RING_MASK_2,
262 					WLAN_CFG_RXDMA2HOST_RING_MASK_3};
263 
264 static const int host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
265 					WLAN_CFG_HOST2RXDMA_RING_MASK_0,
266 					WLAN_CFG_HOST2RXDMA_RING_MASK_1,
267 					WLAN_CFG_HOST2RXDMA_RING_MASK_2,
268 					WLAN_CFG_HOST2RXDMA_RING_MASK_3};
269 
270 /**
271  * struct wlan_cfg_dp_pdev_ctxt - Configuration parameters for pdev (radio)
272  * @rx_dma_buf_ring_size - Size of RxDMA buffer ring
273  * @dma_mon_buf_ring_size - Size of RxDMA Monitor buffer ring
274  * @dma_mon_dest_ring_size - Size of RxDMA Monitor Destination ring
275  * @dma_mon_status_ring_size - Size of RxDMA Monitor Status ring
276  */
277 struct wlan_cfg_dp_pdev_ctxt {
278 	int rx_dma_buf_ring_size;
279 	int dma_mon_buf_ring_size;
280 	int dma_mon_dest_ring_size;
281 	int dma_mon_status_ring_size;
282 	int num_mac_rings;
283 	int nss_enabled;
284 };
285 
286 /**
287  * wlan_cfg_soc_attach() - Allocate and prepare SoC configuration
288  *
289  * Return: wlan_cfg_ctx - Handle to Configuration context
290  */
291 struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach()
292 {
293 	int i = 0;
294 
295 	struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx =
296 		qdf_mem_malloc(sizeof(struct wlan_cfg_dp_soc_ctxt));
297 
298 	if (wlan_cfg_ctx == NULL)
299 		return NULL;
300 
301 	wlan_cfg_ctx->num_int_ctxts = WLAN_CFG_INT_NUM_CONTEXTS;
302 	wlan_cfg_ctx->max_clients = WLAN_CFG_MAX_CLIENTS;
303 	wlan_cfg_ctx->max_alloc_size = WLAN_CFG_MAX_ALLOC_SIZE;
304 	wlan_cfg_ctx->per_pdev_tx_ring = WLAN_CFG_PER_PDEV_TX_RING;
305 	wlan_cfg_ctx->num_tcl_data_rings = WLAN_CFG_NUM_TCL_DATA_RINGS;
306 	wlan_cfg_ctx->per_pdev_rx_ring = WLAN_CFG_PER_PDEV_RX_RING;
307 	wlan_cfg_ctx->per_pdev_lmac_ring = WLAN_CFG_PER_PDEV_LMAC_RING;
308 	wlan_cfg_ctx->num_reo_dest_rings = WLAN_CFG_NUM_REO_DEST_RING;
309 	wlan_cfg_ctx->num_tx_desc_pool = MAX_TXDESC_POOLS;
310 	wlan_cfg_ctx->num_tx_ext_desc_pool = WLAN_CFG_NUM_TXEXT_DESC_POOL;
311 	wlan_cfg_ctx->num_tx_desc = WLAN_CFG_NUM_TX_DESC;
312 	wlan_cfg_ctx->num_tx_ext_desc = WLAN_CFG_NUM_TX_EXT_DESC;
313 	wlan_cfg_ctx->htt_packet_type = WLAN_CFG_HTT_PKT_TYPE;
314 	wlan_cfg_ctx->max_peer_id = WLAN_CFG_MAX_PEER_ID;
315 
316 	wlan_cfg_ctx->tx_ring_size = WLAN_CFG_TX_RING_SIZE;
317 	wlan_cfg_ctx->tx_comp_ring_size = WLAN_CFG_TX_COMP_RING_SIZE;
318 
319 	wlan_cfg_ctx->int_batch_threshold_tx = WLAN_CFG_INT_BATCH_THRESHOLD_TX;
320 	wlan_cfg_ctx->int_timer_threshold_tx =  WLAN_CFG_INT_TIMER_THRESHOLD_TX;
321 	wlan_cfg_ctx->int_batch_threshold_rx = WLAN_CFG_INT_BATCH_THRESHOLD_RX;
322 	wlan_cfg_ctx->int_timer_threshold_rx = WLAN_CFG_INT_TIMER_THRESHOLD_RX;
323 	wlan_cfg_ctx->int_batch_threshold_other =
324 		WLAN_CFG_INT_BATCH_THRESHOLD_OTHER;
325 	wlan_cfg_ctx->int_timer_threshold_other =
326 		WLAN_CFG_INT_TIMER_THRESHOLD_OTHER;
327 
328 	for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
329 		wlan_cfg_ctx->int_tx_ring_mask[i] = tx_ring_mask[i];
330 		wlan_cfg_ctx->int_rx_ring_mask[i] = rx_ring_mask[i];
331 		wlan_cfg_ctx->int_rx_mon_ring_mask[i] = rx_mon_ring_mask[i];
332 		wlan_cfg_ctx->int_rx_err_ring_mask[i] = rx_err_ring_mask[i];
333 		wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] =
334 					rx_wbm_rel_ring_mask[i];
335 		wlan_cfg_ctx->int_reo_status_ring_mask[i] =
336 					reo_status_ring_mask[i];
337 		wlan_cfg_ctx->int_rxdma2host_ring_mask[i] =
338 			rxdma2host_ring_mask[i];
339 		wlan_cfg_ctx->int_host2rxdma_ring_mask[i] =
340 			host2rxdma_ring_mask[i];
341 	}
342 
343 	/* This is default mapping and can be overridden by HW config
344 	 * received from FW */
345 	wlan_cfg_set_hw_macid(wlan_cfg_ctx, 0, 1);
346 	if (MAX_PDEV_CNT > 1)
347 		wlan_cfg_set_hw_macid(wlan_cfg_ctx, 1, 3);
348 	if (MAX_PDEV_CNT > 2)
349 		wlan_cfg_set_hw_macid(wlan_cfg_ctx, 2, 2);
350 
351 	wlan_cfg_ctx->base_hw_macid = 1;
352 	/*Enable checksum offload by default*/
353 	wlan_cfg_ctx->tcp_udp_checksumoffload = 1;
354 
355 	wlan_cfg_ctx->defrag_timeout_check = 1;
356 	wlan_cfg_ctx->rx_defrag_min_timeout = WLAN_CFG_RX_DEFRAG_TIMEOUT;
357 
358 	return wlan_cfg_ctx;
359 }
360 
361 void wlan_cfg_soc_detach(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx)
362 {
363 	qdf_mem_free(wlan_cfg_ctx);
364 }
365 
366 struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_pdev_attach(void)
367 {
368 	struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_ctx =
369 		qdf_mem_malloc(sizeof(struct wlan_cfg_dp_pdev_ctxt));
370 
371 	if (wlan_cfg_ctx == NULL)
372 		return NULL;
373 
374 	wlan_cfg_ctx->rx_dma_buf_ring_size = RXDMA_BUF_RING_SIZE;
375 	wlan_cfg_ctx->dma_mon_buf_ring_size = RXDMA_MONITOR_BUF_RING_SIZE;
376 	wlan_cfg_ctx->dma_mon_dest_ring_size = RXDMA_MONITOR_DEST_RING_SIZE;
377 	wlan_cfg_ctx->dma_mon_status_ring_size = RXDMA_MONITOR_STATUS_RING_SIZE;
378 	wlan_cfg_ctx->num_mac_rings = NUM_RXDMA_RINGS_PER_PDEV;
379 
380 	return wlan_cfg_ctx;
381 }
382 
383 void wlan_cfg_pdev_detach(struct wlan_cfg_dp_pdev_ctxt *wlan_cfg_ctx)
384 {
385 	qdf_mem_free(wlan_cfg_ctx);
386 }
387 
388 void wlan_cfg_set_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg, int num)
389 {
390 	cfg->num_int_ctxts = num;
391 }
392 
393 void wlan_cfg_set_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg, uint32_t val)
394 {
395 	cfg->max_peer_id = val;;
396 }
397 
398 void wlan_cfg_set_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
399 		int context, int mask)
400 {
401 	cfg->int_tx_ring_mask[context] = mask;
402 }
403 
404 void wlan_cfg_set_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
405 		int context, int mask)
406 {
407 	cfg->int_rx_ring_mask[context] = mask;
408 }
409 
410 void wlan_cfg_set_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
411 		int context, int mask)
412 {
413 	cfg->int_rx_mon_ring_mask[context] = mask;
414 }
415 
416 void wlan_cfg_set_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
417 	int context, int mask)
418 {
419 	cfg->int_rxdma2host_ring_mask[context] = mask;
420 }
421 
422 int wlan_cfg_get_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
423 	int context)
424 {
425 	return cfg->int_rxdma2host_ring_mask[context];
426 }
427 
428 void wlan_cfg_set_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
429 	int context, int mask)
430 {
431 	cfg->int_host2rxdma_ring_mask[context] = mask;
432 }
433 
434 int wlan_cfg_get_host2rxdma_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
435 	int context)
436 {
437 	return cfg->int_host2rxdma_ring_mask[context];
438 }
439 
440 void wlan_cfg_set_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx,
441 	int hw_macid)
442 {
443 	qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
444 	cfg->hw_macid[pdev_idx] = hw_macid;
445 }
446 
447 int wlan_cfg_get_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx)
448 {
449 	qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
450 	return cfg->hw_macid[pdev_idx];
451 }
452 
453 int wlan_cfg_get_hw_mac_idx(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx)
454 {
455 	qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
456 	return cfg->hw_macid[pdev_idx] - cfg->base_hw_macid;
457 }
458 
459 void wlan_cfg_set_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
460 		int context, int mask)
461 {
462 	cfg->int_ce_ring_mask[context] = mask;
463 }
464 
465 void wlan_cfg_set_rxbuf_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context,
466 		int mask)
467 {
468 	cfg->int_rx_ring_mask[context] = mask;
469 }
470 
471 int wlan_cfg_set_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
472 		int context, int mask)
473 {
474 	return cfg->int_rx_err_ring_mask[context] = mask;
475 }
476 
477 int wlan_cfg_set_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
478 		int context, int mask)
479 {
480 	return cfg->int_rx_wbm_rel_ring_mask[context] = mask;
481 }
482 
483 int wlan_cfg_set_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
484 		int context, int mask)
485 {
486 	return cfg->int_reo_status_ring_mask[context] = mask;
487 }
488 
489 int wlan_cfg_get_num_contexts(struct wlan_cfg_dp_soc_ctxt *cfg)
490 {
491 	return cfg->num_int_ctxts;
492 }
493 
494 int wlan_cfg_get_tx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
495 {
496 	return cfg->int_tx_ring_mask[context];
497 }
498 
499 int wlan_cfg_get_rx_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
500 {
501 	return cfg->int_rx_ring_mask[context];
502 }
503 
504 int wlan_cfg_get_rx_err_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
505 						int context)
506 {
507 	return cfg->int_rx_err_ring_mask[context];
508 }
509 
510 int wlan_cfg_get_rx_wbm_rel_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
511 					int context)
512 {
513 	return cfg->int_rx_wbm_rel_ring_mask[context];
514 }
515 
516 int wlan_cfg_get_reo_status_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
517 					int context)
518 {
519 	return cfg->int_reo_status_ring_mask[context];
520 }
521 
522 int wlan_cfg_get_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
523 {
524 	return cfg->int_rx_mon_ring_mask[context];
525 }
526 
527 int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
528 {
529 	return cfg->int_ce_ring_mask[context];
530 }
531 
532 uint32_t wlan_cfg_get_max_clients(struct wlan_cfg_dp_soc_ctxt *cfg)
533 {
534 	return cfg->max_clients;
535 }
536 
537 uint32_t wlan_cfg_max_alloc_size(struct wlan_cfg_dp_soc_ctxt *cfg)
538 {
539 	return cfg->max_alloc_size;
540 }
541 
542 int wlan_cfg_per_pdev_tx_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
543 {
544 	return cfg->per_pdev_tx_ring;
545 }
546 
547 int wlan_cfg_per_pdev_lmac_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
548 {
549 	return cfg->per_pdev_lmac_ring;
550 }
551 
552 int wlan_cfg_num_tcl_data_rings(struct wlan_cfg_dp_soc_ctxt *cfg)
553 {
554 	return cfg->num_tcl_data_rings;
555 }
556 
557 int wlan_cfg_tx_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
558 {
559 	return cfg->tx_ring_size;
560 }
561 
562 int wlan_cfg_tx_comp_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
563 {
564 	return cfg->tx_comp_ring_size;
565 }
566 
567 int wlan_cfg_per_pdev_rx_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
568 {
569 	return cfg->per_pdev_rx_ring;
570 }
571 
572 int wlan_cfg_num_reo_dest_rings(struct wlan_cfg_dp_soc_ctxt *cfg)
573 {
574 	return cfg->num_reo_dest_rings;
575 }
576 
577 int wlan_cfg_pkt_type(struct wlan_cfg_dp_soc_ctxt *cfg)
578 {
579 	return cfg->htt_packet_type;            /*htt_pkt_type_ethernet*/
580 }
581 
582 int wlan_cfg_get_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg)
583 {
584 	return cfg->num_tx_desc_pool;
585 }
586 
587 void wlan_cfg_set_num_tx_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool)
588 {
589 	cfg->num_tx_desc_pool = num_pool;
590 }
591 
592 int wlan_cfg_get_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg)
593 {
594 	return cfg->num_tx_ext_desc_pool;
595 }
596 
597 void wlan_cfg_set_num_tx_ext_desc_pool(struct wlan_cfg_dp_soc_ctxt *cfg, int num_pool)
598 {
599 	cfg->num_tx_ext_desc_pool = num_pool;
600 }
601 
602 int wlan_cfg_get_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg)
603 {
604 	return cfg->num_tx_desc;
605 }
606 
607 void wlan_cfg_set_num_tx_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_desc)
608 {
609 	cfg->num_tx_desc = num_desc;
610 }
611 
612 int wlan_cfg_get_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg)
613 {
614 	return cfg->num_tx_ext_desc;
615 }
616 
617 void wlan_cfg_set_num_tx_ext_desc(struct wlan_cfg_dp_soc_ctxt *cfg, int num_ext_desc)
618 {
619 	cfg->num_tx_ext_desc = num_ext_desc;
620 }
621 
622 uint32_t wlan_cfg_max_peer_id(struct wlan_cfg_dp_soc_ctxt *cfg)
623 {
624 	/* TODO: This should be calculated based on target capabilities */
625 	return cfg->max_peer_id;
626 }
627 
628 int wlan_cfg_get_dma_mon_buf_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
629 {
630 	return  cfg->dma_mon_buf_ring_size;
631 }
632 
633 int wlan_cfg_get_dma_mon_dest_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
634 {
635 	return  cfg->dma_mon_dest_ring_size;
636 }
637 
638 int wlan_cfg_get_dma_mon_stat_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
639 {
640 	return  cfg->dma_mon_status_ring_size;
641 }
642 
643 int wlan_cfg_get_rx_dma_buf_ring_size(struct wlan_cfg_dp_pdev_ctxt *cfg)
644 {
645 	return  cfg->rx_dma_buf_ring_size;
646 }
647 
648 int wlan_cfg_get_num_mac_rings(struct wlan_cfg_dp_pdev_ctxt *cfg)
649 {
650 	return  cfg->num_mac_rings;
651 }
652 
653 bool wlan_cfg_is_lro_enabled(struct wlan_cfg_dp_soc_ctxt *cfg)
654 {
655 	return  cfg->lro_enabled;
656 }
657 
658 void wlan_cfg_set_rx_hash(struct wlan_cfg_dp_soc_ctxt *cfg, bool val)
659 {
660 	cfg->rx_hash = val;
661 }
662 
663 bool wlan_cfg_is_rx_hash_enabled(struct wlan_cfg_dp_soc_ctxt *cfg)
664 {
665 	return  cfg->rx_hash;
666 }
667 
668 int wlan_cfg_get_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg)
669 {
670 	return  cfg->nss_enabled;
671 }
672 
673 void wlan_cfg_set_dp_pdev_nss_enabled(struct wlan_cfg_dp_pdev_ctxt *cfg, int nss_enabled)
674 {
675 	cfg->nss_enabled = nss_enabled;
676 }
677 
678 int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg)
679 {
680 	return  cfg->nss_cfg;
681 }
682 
683 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg)
684 {
685 	cfg->nss_cfg = nss_cfg;
686 	if (cfg->nss_cfg)
687 		cfg->tx_comp_ring_size = NSS_TX_COMP_RING_SIZE;
688 }
689 
690 int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
691 {
692 	return cfg->int_batch_threshold_tx;
693 }
694 
695 int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
696 {
697 	return cfg->int_timer_threshold_tx;
698 }
699 
700 int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg)
701 {
702 	return cfg->int_batch_threshold_rx;
703 }
704 
705 int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg)
706 {
707 	return cfg->int_timer_threshold_rx;
708 }
709 
710 int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg)
711 {
712 	return cfg->int_batch_threshold_other;
713 }
714 
715 int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg)
716 {
717 	return cfg->int_timer_threshold_other;
718 }
719 
720 int wlan_cfg_get_checksum_offload(struct wlan_cfg_dp_soc_ctxt *cfg)
721 {
722 	return cfg->tcp_udp_checksumoffload;
723 }
724 
725 int wlan_cfg_get_rx_defrag_min_timeout(struct wlan_cfg_dp_soc_ctxt *cfg)
726 {
727 	return cfg->rx_defrag_min_timeout;
728 }
729 
730 int wlan_cfg_get_defrag_timeout_check(struct wlan_cfg_dp_soc_ctxt *cfg)
731 {
732 	return cfg->defrag_timeout_check;
733 }
734 
735 #ifdef QCA_LL_TX_FLOW_CONTROL_V2
736 /**
737  * wlan_cfg_get_tx_flow_stop_queue_th() - Get flow control stop threshold
738  * @cfg: config context
739  *
740  * Return: stop threshold
741  */
742 int wlan_cfg_get_tx_flow_stop_queue_th(struct wlan_cfg_dp_soc_ctxt *cfg)
743 {
744 	return cfg->tx_flow_stop_queue_threshold;
745 }
746 
747 /**
748  * wlan_cfg_get_tx_flow_start_queue_offset() - Get flow control start offset
749  *					for TX to resume
750  * @cfg: config context
751  *
752  * Return: stop threshold
753  */
754 int wlan_cfg_get_tx_flow_start_queue_offset(struct wlan_cfg_dp_soc_ctxt *cfg)
755 {
756 	return cfg->tx_flow_start_queue_offset;
757 }
758 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
759