1 /* 2 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: This file contains definitions of Data Path configuration. 21 */ 22 23 #ifndef _CFG_DP_H_ 24 #define _CFG_DP_H_ 25 26 #include "cfg_define.h" 27 28 #define WLAN_CFG_MAX_CLIENTS 64 29 #define WLAN_CFG_MAX_CLIENTS_MIN 8 30 #define WLAN_CFG_MAX_CLIENTS_MAX 64 31 32 /* Change this to a lower value to enforce scattered idle list mode */ 33 #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000 34 #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000 35 #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000 36 37 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 38 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3 39 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3 40 41 #ifdef CONFIG_MCL 42 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 43 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10 44 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15 45 #else 46 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0 47 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0 48 #endif 49 #else 50 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0 51 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0 52 #endif 53 54 #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0 55 #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1 56 57 #ifdef CONFIG_MCL 58 #define WLAN_CFG_PER_PDEV_RX_RING 0 59 #define WLAN_CFG_PER_PDEV_LMAC_RING 0 60 #define WLAN_LRO_ENABLE 0 61 #define WLAN_CFG_MAC_PER_TARGET 2 62 #ifdef IPA_OFFLOAD 63 /* Size of TCL TX Ring */ 64 #define WLAN_CFG_TX_RING_SIZE 1024 65 #define WLAN_CFG_PER_PDEV_TX_RING 0 66 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048 67 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000 68 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024 69 #else 70 #define WLAN_CFG_TX_RING_SIZE 512 71 #define WLAN_CFG_PER_PDEV_TX_RING 1 72 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0 73 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0 74 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0 75 #endif 76 #define WLAN_CFG_TX_COMP_RING_SIZE 1024 77 78 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 79 #define WLAN_CFG_NUM_TX_DESC 1024 80 #define WLAN_CFG_NUM_TX_EXT_DESC 1024 81 82 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 83 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1 84 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1 85 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 86 87 /* Interrupt Mitigation - Timer threshold in us */ 88 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8 89 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8 90 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8 91 #else 92 #define WLAN_CFG_PER_PDEV_TX_RING 0 93 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0 94 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0 95 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0 96 #endif 97 98 #ifdef CONFIG_WIN 99 #define WLAN_CFG_PER_PDEV_RX_RING 0 100 #define WLAN_CFG_PER_PDEV_LMAC_RING 1 101 #define WLAN_LRO_ENABLE 0 102 #define WLAN_CFG_MAC_PER_TARGET 3 103 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 104 #ifndef QCA_WIFI_QCA8074_VP 105 #define WLAN_CFG_NUM_TX_DESC 0x320000 106 #else 107 #define WLAN_CFG_NUM_TX_DESC (8 << 10) 108 #endif 109 #define WLAN_CFG_NUM_TX_EXT_DESC 0x80000 110 111 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 112 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256 113 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128 114 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 115 116 /* Interrupt Mitigation - Timer threshold in us */ 117 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000 118 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500 119 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000 120 121 #define WLAN_CFG_TX_RING_SIZE 512 122 123 /* Size the completion ring using following 2 parameters 124 * - NAPI schedule latency (assuming 1 netdev competing for CPU) 125 * = 20 ms (2 jiffies) 126 * - Worst case PPS requirement = 400K PPS 127 * 128 * Ring size = 20 * 400 = 8000 129 * 8192 is nearest power of 2 130 */ 131 #define WLAN_CFG_TX_COMP_RING_SIZE 0x80000 132 #endif 133 134 #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0 135 #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0 136 137 #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0 138 #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1 139 140 #define WLAN_CFG_TX_RING_SIZE_MIN 512 141 #define WLAN_CFG_TX_RING_SIZE_MAX 2048 142 143 #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512 144 #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000 145 146 #define WLAN_CFG_NUM_TX_DESC_MIN 1024 147 #define WLAN_CFG_NUM_TX_DESC_MAX 32768 148 149 #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 1024 150 #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000 151 152 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1 153 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256 154 155 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 1 156 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128 157 158 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1 159 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1 160 161 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8 162 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 100 163 164 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8 165 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500 166 167 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8 168 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000 169 170 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000 171 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000 172 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000 173 174 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 175 176 /* Per vdev pools */ 177 #define WLAN_CFG_NUM_TX_DESC_POOL 3 178 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 179 180 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */ 181 182 #ifdef TX_PER_PDEV_DESC_POOL 183 #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT 184 #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT 185 186 #else /* TX_PER_PDEV_DESC_POOL */ 187 188 #define WLAN_CFG_NUM_TX_DESC_POOL 3 189 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 190 191 #endif /* TX_PER_PDEV_DESC_POOL */ 192 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 193 194 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1 195 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4 196 197 #define WLAN_CFG_HTT_PKT_TYPE 2 198 #define WLAN_CFG_HTT_PKT_TYPE_MIN 2 199 #define WLAN_CFG_HTT_PKT_TYPE_MAX 2 200 201 #define WLAN_CFG_MAX_PEER_ID 64 202 #define WLAN_CFG_MAX_PEER_ID_MIN 64 203 #define WLAN_CFG_MAX_PEER_ID_MAX 64 204 205 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100 206 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100 207 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100 208 209 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 210 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3 211 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3 212 213 #define WLAN_CFG_NUM_REO_DEST_RING 4 214 #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4 215 #define WLAN_CFG_NUM_REO_DEST_RING_MAX 4 216 217 #define WLAN_CFG_WBM_RELEASE_RING_SIZE 64 218 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64 219 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 64 220 221 #define WLAN_CFG_TCL_CMD_RING_SIZE 32 222 #define WLAN_CFG_TCL_CMD_RING_SIZE_MIN 32 223 #define WLAN_CFG_TCL_CMD_RING_SIZE_MAX 32 224 225 #define WLAN_CFG_TCL_STATUS_RING_SIZE 32 226 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32 227 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32 228 229 #if defined(QCA_WIFI_QCA6290) 230 #define WLAN_CFG_REO_DST_RING_SIZE 1024 231 #else 232 #define WLAN_CFG_REO_DST_RING_SIZE 2048 233 #endif 234 235 #define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024 236 #define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048 237 238 #define WLAN_CFG_REO_REINJECT_RING_SIZE 32 239 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32 240 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 32 241 242 #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024 243 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8 244 #if defined(QCA_WIFI_QCA6390) 245 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024 246 #else 247 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192 248 #endif 249 250 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 128 251 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128 252 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 128 253 254 #define WLAN_CFG_REO_CMD_RING_SIZE 128 255 #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64 256 #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128 257 258 #define WLAN_CFG_REO_STATUS_RING_SIZE 256 259 #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128 260 #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048 261 262 #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024 263 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024 264 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024 265 266 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096 267 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16 268 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096 269 270 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096 271 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16 272 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192 273 274 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048 275 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48 276 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192 277 278 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024 279 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16 280 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192 281 282 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096 283 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096 284 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384 285 286 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024 287 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024 288 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192 289 290 /* DP INI Declerations */ 291 #define CFG_DP_HTT_PACKET_TYPE \ 292 CFG_INI_UINT("dp_htt_packet_type", \ 293 WLAN_CFG_HTT_PKT_TYPE_MIN, \ 294 WLAN_CFG_HTT_PKT_TYPE_MAX, \ 295 WLAN_CFG_HTT_PKT_TYPE, \ 296 CFG_VALUE_OR_DEFAULT, "DP HTT packet type") 297 298 #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \ 299 CFG_INI_UINT("dp_int_batch_threshold_other", \ 300 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \ 301 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \ 302 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \ 303 CFG_VALUE_OR_DEFAULT, "DP INT threshold Other") 304 305 #define CFG_DP_INT_BATCH_THRESHOLD_RX \ 306 CFG_INI_UINT("dp_int_batch_threshold_rx", \ 307 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \ 308 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \ 309 WLAN_CFG_INT_BATCH_THRESHOLD_RX, \ 310 CFG_VALUE_OR_DEFAULT, "DP INT threshold Rx") 311 312 #define CFG_DP_INT_BATCH_THRESHOLD_TX \ 313 CFG_INI_UINT("dp_int_batch_threshold_tx", \ 314 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \ 315 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \ 316 WLAN_CFG_INT_BATCH_THRESHOLD_TX, \ 317 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx") 318 319 #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \ 320 CFG_INI_UINT("dp_int_timer_threshold_other", \ 321 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 322 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 323 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 324 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other") 325 326 #define CFG_DP_INT_TIMER_THRESHOLD_RX \ 327 CFG_INI_UINT("dp_int_timer_threshold_rx", \ 328 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \ 329 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \ 330 WLAN_CFG_INT_TIMER_THRESHOLD_RX, \ 331 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx") 332 333 #define CFG_DP_INT_TIMER_THRESHOLD_TX \ 334 CFG_INI_UINT("dp_int_timer_threshold_tx", \ 335 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \ 336 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \ 337 WLAN_CFG_INT_TIMER_THRESHOLD_TX, \ 338 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx") 339 340 #define CFG_DP_MAX_ALLOC_SIZE \ 341 CFG_INI_UINT("dp_max_alloc_size", \ 342 WLAN_CFG_MAX_ALLOC_SIZE_MIN, \ 343 WLAN_CFG_MAX_ALLOC_SIZE_MAX, \ 344 WLAN_CFG_MAX_ALLOC_SIZE, \ 345 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size") 346 347 #define CFG_DP_MAX_CLIENTS \ 348 CFG_INI_UINT("dp_max_clients", \ 349 WLAN_CFG_MAX_CLIENTS_MIN, \ 350 WLAN_CFG_MAX_CLIENTS_MAX, \ 351 WLAN_CFG_MAX_CLIENTS, \ 352 CFG_VALUE_OR_DEFAULT, "DP Max Clients") 353 354 #define CFG_DP_MAX_PEER_ID \ 355 CFG_INI_UINT("dp_max_peer_id", \ 356 WLAN_CFG_MAX_PEER_ID_MIN, \ 357 WLAN_CFG_MAX_PEER_ID_MAX, \ 358 WLAN_CFG_MAX_PEER_ID, \ 359 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID") 360 361 #define CFG_DP_REO_DEST_RINGS \ 362 CFG_INI_UINT("dp_reo_dest_rings", \ 363 WLAN_CFG_NUM_REO_DEST_RING_MIN, \ 364 WLAN_CFG_NUM_REO_DEST_RING_MAX, \ 365 WLAN_CFG_NUM_REO_DEST_RING, \ 366 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings") 367 368 #define CFG_DP_TCL_DATA_RINGS \ 369 CFG_INI_UINT("dp_tcl_data_rings", \ 370 WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \ 371 WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \ 372 WLAN_CFG_NUM_TCL_DATA_RINGS, \ 373 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings") 374 375 #define CFG_DP_TX_DESC \ 376 CFG_INI_UINT("dp_tx_desc", \ 377 WLAN_CFG_NUM_TX_DESC_MIN, \ 378 WLAN_CFG_NUM_TX_DESC_MAX, \ 379 WLAN_CFG_NUM_TX_DESC, \ 380 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors") 381 382 #define CFG_DP_TX_EXT_DESC \ 383 CFG_INI_UINT("dp_tx_ext_desc", \ 384 WLAN_CFG_NUM_TX_EXT_DESC_MIN, \ 385 WLAN_CFG_NUM_TX_EXT_DESC_MAX, \ 386 WLAN_CFG_NUM_TX_EXT_DESC, \ 387 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors") 388 389 #define CFG_DP_TX_EXT_DESC_POOLS \ 390 CFG_INI_UINT("dp_tx_ext_desc_pool", \ 391 WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \ 392 WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \ 393 WLAN_CFG_NUM_TXEXT_DESC_POOL, \ 394 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool") 395 396 #define CFG_DP_PDEV_RX_RING \ 397 CFG_INI_UINT("dp_pdev_rx_ring", \ 398 WLAN_CFG_PER_PDEV_RX_RING_MIN, \ 399 WLAN_CFG_PER_PDEV_RX_RING_MAX, \ 400 WLAN_CFG_PER_PDEV_RX_RING, \ 401 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring") 402 403 #define CFG_DP_PDEV_TX_RING \ 404 CFG_INI_UINT("dp_pdev_tx_ring", \ 405 WLAN_CFG_PER_PDEV_TX_RING_MIN, \ 406 WLAN_CFG_PER_PDEV_TX_RING_MAX, \ 407 WLAN_CFG_PER_PDEV_TX_RING, \ 408 CFG_VALUE_OR_DEFAULT, \ 409 "DP PDEV Tx Ring") 410 411 #define CFG_DP_RX_DEFRAG_TIMEOUT \ 412 CFG_INI_UINT("dp_rx_defrag_timeout", \ 413 WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \ 414 WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \ 415 WLAN_CFG_RX_DEFRAG_TIMEOUT, \ 416 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout") 417 418 #define CFG_DP_TX_COMPL_RING_SIZE \ 419 CFG_INI_UINT("dp_tx_compl_ring_size", \ 420 WLAN_CFG_TX_COMP_RING_SIZE_MIN, \ 421 WLAN_CFG_TX_COMP_RING_SIZE_MAX, \ 422 WLAN_CFG_TX_COMP_RING_SIZE, \ 423 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size") 424 425 #define CFG_DP_TX_RING_SIZE \ 426 CFG_INI_UINT("dp_tx_ring_size", \ 427 WLAN_CFG_TX_RING_SIZE_MIN,\ 428 WLAN_CFG_TX_RING_SIZE_MAX,\ 429 WLAN_CFG_TX_RING_SIZE,\ 430 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size") 431 432 #define CFG_DP_NSS_COMP_RING_SIZE \ 433 CFG_INI_UINT("dp_nss_comp_ring_size", \ 434 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \ 435 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \ 436 WLAN_CFG_NSS_TX_COMP_RING_SIZE, \ 437 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size") 438 439 #define CFG_DP_PDEV_LMAC_RING \ 440 CFG_INI_UINT("dp_pdev_lmac_ring", \ 441 WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \ 442 WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \ 443 WLAN_CFG_PER_PDEV_LMAC_RING, \ 444 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring") 445 446 #define CFG_DP_BASE_HW_MAC_ID \ 447 CFG_INI_UINT("dp_base_hw_macid", \ 448 0, 1, 1, \ 449 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID") 450 451 #define CFG_DP_RX_HASH \ 452 CFG_INI_BOOL("dp_rx_hash", true, \ 453 "DP Rx Hash") 454 455 #define CFG_DP_TSO \ 456 CFG_INI_BOOL("TSOEnable", false, \ 457 "DP TSO Enabled") 458 459 #define CFG_DP_LRO \ 460 CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \ 461 "DP LRO Enable") 462 463 #define CFG_DP_SG \ 464 CFG_INI_BOOL("dp_sg_support", false, \ 465 "DP SG Enable") 466 467 #define CFG_DP_GRO \ 468 CFG_INI_BOOL("GROEnable", false, \ 469 "DP GRO Enable") 470 471 #define CFG_DP_OL_TX_CSUM \ 472 CFG_INI_BOOL("dp_offload_tx_csum_support", false, \ 473 "DP tx csum Enable") 474 475 #define CFG_DP_OL_RX_CSUM \ 476 CFG_INI_BOOL("dp_offload_rx_csum_support", false, \ 477 "DP rx csum Enable") 478 479 #define CFG_DP_RAWMODE \ 480 CFG_INI_BOOL("dp_rawmode_support", false, \ 481 "DP rawmode Enable") 482 483 #define CFG_DP_PEER_FLOW_CTRL \ 484 CFG_INI_BOOL("dp_peer_flow_control_support", false, \ 485 "DP peer flow ctrl Enable") 486 487 #define CFG_DP_NAPI \ 488 CFG_INI_BOOL("dp_napi_enabled", MCL_OR_WIN_VALUE(true, false), \ 489 "DP Napi Enabled") 490 491 #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \ 492 CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \ 493 "DP TCP UDP Checksum Offload") 494 495 #define CFG_DP_DEFRAG_TIMEOUT_CHECK \ 496 CFG_INI_BOOL("dp_defrag_timeout_check", true, \ 497 "DP Defrag Timeout Check") 498 499 #define CFG_DP_WBM_RELEASE_RING \ 500 CFG_INI_UINT("dp_wbm_release_ring", \ 501 WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \ 502 WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \ 503 WLAN_CFG_WBM_RELEASE_RING_SIZE, \ 504 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring") 505 506 #define CFG_DP_TCL_CMD_RING \ 507 CFG_INI_UINT("dp_tcl_cmd_ring", \ 508 WLAN_CFG_TCL_CMD_RING_SIZE_MIN, \ 509 WLAN_CFG_TCL_CMD_RING_SIZE_MAX, \ 510 WLAN_CFG_TCL_CMD_RING_SIZE, \ 511 CFG_VALUE_OR_DEFAULT, "DP TCL command ring") 512 513 #define CFG_DP_TCL_STATUS_RING \ 514 CFG_INI_UINT("dp_tcl_status_ring",\ 515 WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \ 516 WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \ 517 WLAN_CFG_TCL_STATUS_RING_SIZE, \ 518 CFG_VALUE_OR_DEFAULT, "DP TCL status ring") 519 520 #define CFG_DP_REO_REINJECT_RING \ 521 CFG_INI_UINT("dp_reo_reinject_ring", \ 522 WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \ 523 WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \ 524 WLAN_CFG_REO_REINJECT_RING_SIZE, \ 525 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring") 526 527 #define CFG_DP_RX_RELEASE_RING \ 528 CFG_INI_UINT("dp_rx_release_ring", \ 529 WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \ 530 WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \ 531 WLAN_CFG_RX_RELEASE_RING_SIZE, \ 532 CFG_VALUE_OR_DEFAULT, "DP Rx release ring") 533 534 #define CFG_DP_REO_EXCEPTION_RING \ 535 CFG_INI_UINT("dp_reo_exception_ring", \ 536 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \ 537 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \ 538 WLAN_CFG_REO_EXCEPTION_RING_SIZE, \ 539 CFG_VALUE_OR_DEFAULT, "DP REO exception ring") 540 541 #define CFG_DP_REO_CMD_RING \ 542 CFG_INI_UINT("dp_reo_cmd_ring", \ 543 WLAN_CFG_REO_CMD_RING_SIZE_MIN, \ 544 WLAN_CFG_REO_CMD_RING_SIZE_MAX, \ 545 WLAN_CFG_REO_CMD_RING_SIZE, \ 546 CFG_VALUE_OR_DEFAULT, "DP REO command ring") 547 548 #define CFG_DP_REO_STATUS_RING \ 549 CFG_INI_UINT("dp_reo_status_ring", \ 550 WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \ 551 WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \ 552 WLAN_CFG_REO_STATUS_RING_SIZE, \ 553 CFG_VALUE_OR_DEFAULT, "DP REO status ring") 554 555 #define CFG_DP_RXDMA_BUF_RING \ 556 CFG_INI_UINT("dp_rxdma_buf_ring", \ 557 WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \ 558 WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \ 559 WLAN_CFG_RXDMA_BUF_RING_SIZE, \ 560 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring") 561 562 #define CFG_DP_RXDMA_REFILL_RING \ 563 CFG_INI_UINT("dp_rxdma_refill_ring", \ 564 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \ 565 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \ 566 WLAN_CFG_RXDMA_REFILL_RING_SIZE, \ 567 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring") 568 569 #define CFG_DP_RXDMA_MONITOR_BUF_RING \ 570 CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \ 571 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \ 572 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \ 573 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \ 574 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring") 575 576 #define CFG_DP_RXDMA_MONITOR_DST_RING \ 577 CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \ 578 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \ 579 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \ 580 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \ 581 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 582 583 #define CFG_DP_RXDMA_MONITOR_STATUS_RING \ 584 CFG_INI_UINT("dp_rxdma_monitor_status_ring", \ 585 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \ 586 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \ 587 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \ 588 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring") 589 590 #define CFG_DP_RXDMA_MONITOR_DESC_RING \ 591 CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \ 592 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \ 593 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \ 594 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \ 595 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 596 597 #define CFG_DP_RXDMA_ERR_DST_RING \ 598 CFG_INI_UINT("dp_rxdma_err_dst_ring", \ 599 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \ 600 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \ 601 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \ 602 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring") 603 604 #define CFG_DP_PER_PKT_LOGGING \ 605 CFG_INI_UINT("enable_verbose_debug", \ 606 0, 0xffff, 0, \ 607 CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging") 608 609 #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \ 610 CFG_INI_UINT("TxFlowStartQueueOffset", \ 611 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \ 612 CFG_VALUE_OR_DEFAULT, "Start queue offset") 613 614 #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \ 615 CFG_INI_UINT("TxFlowStopQueueThreshold", \ 616 0, 50, 15, \ 617 CFG_VALUE_OR_DEFAULT, "Stop queue Threshold") 618 619 #define CFG_DP_IPA_UC_TX_BUF_SIZE \ 620 CFG_INI_UINT("IpaUcTxBufSize", \ 621 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \ 622 CFG_VALUE_OR_DEFAULT, "IPA tx buffer size") 623 624 #define CFG_DP_IPA_UC_TX_PARTITION_BASE \ 625 CFG_INI_UINT("IpaUcTxPartitionBase", \ 626 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \ 627 CFG_VALUE_OR_DEFAULT, "IPA tx partition base") 628 629 #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \ 630 CFG_INI_UINT("IpaUcRxIndRingCount", \ 631 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \ 632 CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count") 633 634 #define CFG_DP_REORDER_OFFLOAD_SUPPORT \ 635 CFG_INI_UINT("gReorderOffloadSupported", \ 636 0, 1, 1, \ 637 CFG_VALUE_OR_DEFAULT, "Packet reordering offload to firmware") 638 639 #define CFG_DP_AP_STA_SECURITY_SEPERATION \ 640 CFG_INI_BOOL("gDisableIntraBssFwd", \ 641 false, "Disable intrs BSS Rx packets") 642 643 #define CFG_DP_ENABLE_DATA_STALL_DETECTION \ 644 CFG_INI_BOOL("gEnableDataStallDetection", \ 645 true, "Enable/Disable Data stall detection") 646 647 #define CFG_DP \ 648 CFG(CFG_DP_HTT_PACKET_TYPE) \ 649 CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \ 650 CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \ 651 CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \ 652 CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \ 653 CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \ 654 CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \ 655 CFG(CFG_DP_MAX_ALLOC_SIZE) \ 656 CFG(CFG_DP_MAX_CLIENTS) \ 657 CFG(CFG_DP_MAX_PEER_ID) \ 658 CFG(CFG_DP_REO_DEST_RINGS) \ 659 CFG(CFG_DP_TCL_DATA_RINGS) \ 660 CFG(CFG_DP_TX_DESC) \ 661 CFG(CFG_DP_TX_EXT_DESC) \ 662 CFG(CFG_DP_TX_EXT_DESC_POOLS) \ 663 CFG(CFG_DP_PDEV_RX_RING) \ 664 CFG(CFG_DP_PDEV_TX_RING) \ 665 CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \ 666 CFG(CFG_DP_TX_COMPL_RING_SIZE) \ 667 CFG(CFG_DP_TX_RING_SIZE) \ 668 CFG(CFG_DP_NSS_COMP_RING_SIZE) \ 669 CFG(CFG_DP_PDEV_LMAC_RING) \ 670 CFG(CFG_DP_BASE_HW_MAC_ID) \ 671 CFG(CFG_DP_RX_HASH) \ 672 CFG(CFG_DP_TSO) \ 673 CFG(CFG_DP_LRO) \ 674 CFG(CFG_DP_SG) \ 675 CFG(CFG_DP_GRO) \ 676 CFG(CFG_DP_OL_TX_CSUM) \ 677 CFG(CFG_DP_OL_RX_CSUM) \ 678 CFG(CFG_DP_RAWMODE) \ 679 CFG(CFG_DP_PEER_FLOW_CTRL) \ 680 CFG(CFG_DP_NAPI) \ 681 CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \ 682 CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \ 683 CFG(CFG_DP_WBM_RELEASE_RING) \ 684 CFG(CFG_DP_TCL_CMD_RING) \ 685 CFG(CFG_DP_TCL_STATUS_RING) \ 686 CFG(CFG_DP_REO_REINJECT_RING) \ 687 CFG(CFG_DP_RX_RELEASE_RING) \ 688 CFG(CFG_DP_REO_EXCEPTION_RING) \ 689 CFG(CFG_DP_REO_CMD_RING) \ 690 CFG(CFG_DP_REO_STATUS_RING) \ 691 CFG(CFG_DP_RXDMA_BUF_RING) \ 692 CFG(CFG_DP_RXDMA_REFILL_RING) \ 693 CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \ 694 CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \ 695 CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \ 696 CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \ 697 CFG(CFG_DP_RXDMA_ERR_DST_RING) \ 698 CFG(CFG_DP_PER_PKT_LOGGING) \ 699 CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \ 700 CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \ 701 CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \ 702 CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \ 703 CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \ 704 CFG(CFG_DP_REORDER_OFFLOAD_SUPPORT) \ 705 CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \ 706 CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) 707 708 #endif /* _CFG_DP_H_ */ 709