1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: This file contains definitions of Data Path configuration. 21 */ 22 23 #ifndef _CFG_DP_H_ 24 #define _CFG_DP_H_ 25 26 #include "cfg_define.h" 27 28 #define WLAN_CFG_MAX_CLIENTS 64 29 #define WLAN_CFG_MAX_CLIENTS_MIN 8 30 #define WLAN_CFG_MAX_CLIENTS_MAX 64 31 32 /* Change this to a lower value to enforce scattered idle list mode */ 33 #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000 34 #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x200000 35 #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000 36 37 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 38 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3 39 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3 40 41 #ifdef CONFIG_MCL 42 #ifdef IPA_OFFLOAD 43 #define WLAN_CFG_PER_PDEV_TX_RING 0 44 #else 45 #define WLAN_CFG_PER_PDEV_TX_RING 1 46 #endif 47 #else 48 #define WLAN_CFG_PER_PDEV_TX_RING 0 49 #endif 50 51 #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0 52 #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1 53 54 #ifdef CONFIG_MCL 55 #define WLAN_CFG_PER_PDEV_RX_RING 0 56 #define WLAN_CFG_PER_PDEV_LMAC_RING 0 57 #define WLAN_LRO_ENABLE 1 58 #ifdef IPA_OFFLOAD 59 #define WLAN_CFG_TX_RING_SIZE 2048 60 #else 61 #define WLAN_CFG_TX_RING_SIZE 512 62 #endif 63 #define WLAN_CFG_TX_COMP_RING_SIZE 1024 64 65 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 66 #define WLAN_CFG_NUM_TX_DESC 1024 67 #define WLAN_CFG_NUM_TX_EXT_DESC 1024 68 69 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 70 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1 71 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1 72 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 73 74 /* Interrupt Mitigation - Timer threshold in us */ 75 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8 76 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8 77 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8 78 #endif 79 80 #ifdef CONFIG_WIN 81 #define WLAN_CFG_PER_PDEV_RX_RING 0 82 #define WLAN_CFG_PER_PDEV_LMAC_RING 1 83 #define WLAN_LRO_ENABLE 0 84 85 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 86 #ifndef QCA_WIFI_QCA8074_VP 87 #define WLAN_CFG_NUM_TX_DESC 0x320000 88 #else 89 #define WLAN_CFG_NUM_TX_DESC (8 << 10) 90 #endif 91 #define WLAN_CFG_NUM_TX_EXT_DESC 0x80000 92 93 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 94 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256 95 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128 96 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 97 98 /* Interrupt Mitigation - Timer threshold in us */ 99 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000 100 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500 101 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000 102 103 #define WLAN_CFG_TX_RING_SIZE 512 104 105 /* Size the completion ring using following 2 parameters 106 * - NAPI schedule latency (assuming 1 netdev competing for CPU) 107 * = 20 ms (2 jiffies) 108 * - Worst case PPS requirement = 400K PPS 109 * 110 * Ring size = 20 * 400 = 8000 111 * 8192 is nearest power of 2 112 */ 113 #define WLAN_CFG_TX_COMP_RING_SIZE 0x80000 114 #endif 115 116 #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0 117 #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0 118 119 #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0 120 #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1 121 122 #define WLAN_CFG_TX_RING_SIZE_MIN 512 123 #define WLAN_CFG_TX_RING_SIZE_MAX 2048 124 125 #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512 126 #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000 127 128 #define WLAN_CFG_NUM_TX_DESC_MIN 1024 129 #define WLAN_CFG_NUM_TX_DESC_MAX 0x320000 130 131 #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 1024 132 #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000 133 134 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1 135 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256 136 137 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 1 138 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128 139 140 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1 141 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1 142 143 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8 144 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 100 145 146 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8 147 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500 148 149 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8 150 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000 151 152 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000 153 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000 154 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0x2000 155 156 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 157 158 /* Per vdev pools */ 159 #define WLAN_CFG_NUM_TX_DESC_POOL 3 160 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 161 162 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */ 163 164 #ifdef TX_PER_PDEV_DESC_POOL 165 #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT 166 #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT 167 168 #else /* TX_PER_PDEV_DESC_POOL */ 169 170 #define WLAN_CFG_NUM_TX_DESC_POOL 3 171 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 172 173 #endif /* TX_PER_PDEV_DESC_POOL */ 174 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 175 176 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1 177 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4 178 179 #define WLAN_CFG_HTT_PKT_TYPE 2 180 #define WLAN_CFG_HTT_PKT_TYPE_MIN 2 181 #define WLAN_CFG_HTT_PKT_TYPE_MAX 2 182 183 #define WLAN_CFG_MAX_PEER_ID 64 184 #define WLAN_CFG_MAX_PEER_ID_MIN 64 185 #define WLAN_CFG_MAX_PEER_ID_MAX 64 186 187 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100 188 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100 189 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100 190 191 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 192 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3 193 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3 194 195 #define WLAN_CFG_NUM_REO_DEST_RING 4 196 #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4 197 #define WLAN_CFG_NUM_REO_DEST_RING_MAX 4 198 199 #define WLAN_CFG_WBM_RELEASE_RING_SIZE 64 200 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64 201 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 64 202 203 #define WLAN_CFG_TCL_CMD_RING_SIZE 32 204 #define WLAN_CFG_TCL_CMD_RING_SIZE_MIN 32 205 #define WLAN_CFG_TCL_CMD_RING_SIZE_MAX 32 206 207 #define WLAN_CFG_TCL_STATUS_RING_SIZE 32 208 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32 209 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32 210 211 #if defined(QCA_WIFI_QCA6290) 212 #define WLAN_CFG_REO_DST_RING_SIZE 1024 213 #else 214 #define WLAN_CFG_REO_DST_RING_SIZE 2048 215 #endif 216 217 #define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024 218 #define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048 219 220 #define WLAN_CFG_REO_REINJECT_RING_SIZE 32 221 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32 222 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 32 223 224 #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024 225 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8 226 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024 227 228 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 128 229 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128 230 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 128 231 232 #define WLAN_CFG_REO_CMD_RING_SIZE 64 233 #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64 234 #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 64 235 236 #define WLAN_CFG_REO_STATUS_RING_SIZE 128 237 #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128 238 #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 128 239 240 #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024 241 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024 242 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024 243 244 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096 245 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16 246 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096 247 248 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096 249 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16 250 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 4096 251 252 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048 253 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48 254 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 2048 255 256 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024 257 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16 258 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 1024 259 260 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096 261 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096 262 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 4096 263 264 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024 265 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024 266 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 1024 267 268 /* DP INI Declerations */ 269 #define CFG_DP_HTT_PACKET_TYPE \ 270 CFG_INI_UINT("dp_htt_packet_type", \ 271 WLAN_CFG_HTT_PKT_TYPE_MIN, \ 272 WLAN_CFG_HTT_PKT_TYPE_MAX, \ 273 WLAN_CFG_HTT_PKT_TYPE, \ 274 CFG_VALUE_OR_DEFAULT, "DP HTT packet type") 275 276 #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \ 277 CFG_INI_UINT("dp_int_batch_threshold_other", \ 278 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 279 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 280 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 281 CFG_VALUE_OR_DEFAULT, "DP INT threshold Other") 282 283 #define CFG_DP_INT_BATCH_THRESHOLD_RX \ 284 CFG_INI_UINT("dp_int_batch_threshold_rx", \ 285 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \ 286 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \ 287 WLAN_CFG_INT_BATCH_THRESHOLD_RX, \ 288 CFG_VALUE_OR_DEFAULT, "DP INT threshold Rx") 289 290 #define CFG_DP_INT_BATCH_THRESHOLD_TX \ 291 CFG_INI_UINT("dp_int_batch_threshold_tx", \ 292 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \ 293 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \ 294 WLAN_CFG_INT_BATCH_THRESHOLD_TX, \ 295 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx") 296 297 #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \ 298 CFG_INI_UINT("dp_int_timer_threshold_other", \ 299 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 300 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 301 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 302 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other") 303 304 #define CFG_DP_INT_TIMER_THRESHOLD_RX \ 305 CFG_INI_UINT("dp_int_timer_threshold_rx", \ 306 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \ 307 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \ 308 WLAN_CFG_INT_TIMER_THRESHOLD_RX, \ 309 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx") 310 311 #define CFG_DP_INT_TIMER_THRESHOLD_TX \ 312 CFG_INI_UINT("dp_int_timer_threshold_tx", \ 313 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \ 314 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \ 315 WLAN_CFG_INT_TIMER_THRESHOLD_TX, \ 316 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx") 317 318 #define CFG_DP_MAX_ALLOC_SIZE \ 319 CFG_INI_UINT("dp_max_alloc_size", \ 320 WLAN_CFG_MAX_ALLOC_SIZE_MIN, \ 321 WLAN_CFG_MAX_ALLOC_SIZE_MAX, \ 322 WLAN_CFG_MAX_ALLOC_SIZE, \ 323 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size") 324 325 #define CFG_DP_MAX_CLIENTS \ 326 CFG_INI_UINT("dp_max_clients", \ 327 WLAN_CFG_MAX_CLIENTS_MIN, \ 328 WLAN_CFG_MAX_CLIENTS_MAX, \ 329 WLAN_CFG_MAX_CLIENTS, \ 330 CFG_VALUE_OR_DEFAULT, "DP Max Clients") 331 332 #define CFG_DP_MAX_PEER_ID \ 333 CFG_INI_UINT("dp_max_peer_id", \ 334 WLAN_CFG_MAX_PEER_ID_MIN, \ 335 WLAN_CFG_MAX_PEER_ID_MAX, \ 336 WLAN_CFG_MAX_PEER_ID, \ 337 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID") 338 339 #define CFG_DP_REO_DEST_RINGS \ 340 CFG_INI_UINT("dp_reo_dest_rings", \ 341 WLAN_CFG_NUM_REO_DEST_RING_MIN, \ 342 WLAN_CFG_NUM_REO_DEST_RING_MAX, \ 343 WLAN_CFG_NUM_REO_DEST_RING, \ 344 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings") 345 346 #define CFG_DP_TCL_DATA_RINGS \ 347 CFG_INI_UINT("dp_tcl_data_rings", \ 348 WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \ 349 WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \ 350 WLAN_CFG_NUM_TCL_DATA_RINGS, \ 351 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings") 352 353 #define CFG_DP_TX_DESC \ 354 CFG_INI_UINT("dp_tx_desc", \ 355 WLAN_CFG_NUM_TX_DESC_MIN, \ 356 WLAN_CFG_NUM_TX_DESC_MAX, \ 357 WLAN_CFG_NUM_TX_DESC, \ 358 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors") 359 360 #define CFG_DP_TX_EXT_DESC \ 361 CFG_INI_UINT("dp_tx_ext_desc", \ 362 WLAN_CFG_NUM_TX_EXT_DESC_MIN, \ 363 WLAN_CFG_NUM_TX_EXT_DESC_MAX, \ 364 WLAN_CFG_NUM_TX_EXT_DESC, \ 365 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors") 366 367 #define CFG_DP_TX_EXT_DESC_POOLS \ 368 CFG_INI_UINT("dp_tx_ext_desc_pool", \ 369 WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \ 370 WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \ 371 WLAN_CFG_NUM_TXEXT_DESC_POOL, \ 372 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool") 373 374 #define CFG_DP_PDEV_RX_RING \ 375 CFG_INI_UINT("dp_pdev_rx_ring", \ 376 WLAN_CFG_PER_PDEV_RX_RING_MIN, \ 377 WLAN_CFG_PER_PDEV_RX_RING_MAX, \ 378 WLAN_CFG_PER_PDEV_RX_RING, \ 379 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring") 380 381 #define CFG_DP_PDEV_TX_RING \ 382 CFG_INI_UINT("dp_pdev_tx_ring", \ 383 WLAN_CFG_PER_PDEV_TX_RING_MIN, \ 384 WLAN_CFG_PER_PDEV_TX_RING_MAX, \ 385 WLAN_CFG_PER_PDEV_TX_RING, \ 386 CFG_VALUE_OR_DEFAULT, \ 387 "DP PDEV Tx Ring") 388 389 #define CFG_DP_RX_DEFRAG_TIMEOUT \ 390 CFG_INI_UINT("dp_rx_defrag_timeout", \ 391 WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \ 392 WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \ 393 WLAN_CFG_RX_DEFRAG_TIMEOUT, \ 394 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout") 395 396 #define CFG_DP_TX_COMPL_RING_SIZE \ 397 CFG_INI_UINT("dp_tx_compl_ring_size", \ 398 WLAN_CFG_TX_COMP_RING_SIZE_MIN, \ 399 WLAN_CFG_TX_COMP_RING_SIZE_MAX, \ 400 WLAN_CFG_TX_COMP_RING_SIZE, \ 401 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size") 402 403 #define CFG_DP_TX_RING_SIZE \ 404 CFG_INI_UINT("dp_tx_ring_size", \ 405 WLAN_CFG_TX_RING_SIZE_MIN,\ 406 WLAN_CFG_TX_RING_SIZE_MAX,\ 407 WLAN_CFG_TX_RING_SIZE,\ 408 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size") 409 410 #define CFG_DP_NSS_COMP_RING_SIZE \ 411 CFG_INI_UINT("dp_nss_comp_ring_size", \ 412 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \ 413 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \ 414 WLAN_CFG_NSS_TX_COMP_RING_SIZE, \ 415 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size") 416 417 #define CFG_DP_PDEV_LMAC_RING \ 418 CFG_INI_UINT("dp_pdev_lmac_ring", \ 419 WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \ 420 WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \ 421 WLAN_CFG_PER_PDEV_LMAC_RING, \ 422 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring") 423 424 #define CFG_DP_BASE_HW_MAC_ID \ 425 CFG_INI_UINT("dp_base_hw_macid", \ 426 0, 1, 1, \ 427 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID") 428 429 #define CFG_DP_RX_HASH \ 430 CFG_INI_BOOL("dp_rx_hash", true, \ 431 "DP Rx Hash") 432 433 #define CFG_DP_TSO \ 434 CFG_INI_BOOL("TSOEnable", false, \ 435 "DP TSO Enabled") 436 437 #define CFG_DP_LRO \ 438 CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \ 439 "DP LRO Enable") 440 441 #define CFG_DP_SG \ 442 CFG_INI_BOOL("dp_sg_support", false, \ 443 "DP SG Enable") 444 445 #define CFG_DP_GRO \ 446 CFG_INI_BOOL("GROEnable", false, \ 447 "DP GRO Enable") 448 449 #define CFG_DP_OL_TX_CSUM \ 450 CFG_INI_BOOL("dp_offload_tx_csum_support", false, \ 451 "DP tx csum Enable") 452 453 #define CFG_DP_OL_RX_CSUM \ 454 CFG_INI_BOOL("dp_offload_rx_csum_support", false, \ 455 "DP rx csum Enable") 456 457 #define CFG_DP_RAWMODE \ 458 CFG_INI_BOOL("dp_rawmode_support", false, \ 459 "DP rawmode Enable") 460 461 #define CFG_DP_PEER_FLOW_CTRL \ 462 CFG_INI_BOOL("dp_peer_flow_control_support", false, \ 463 "DP peer flow ctrl Enable") 464 465 #define CFG_DP_NAPI \ 466 CFG_INI_BOOL("dp_napi_enabled", MCL_OR_WIN_VALUE(true, false), \ 467 "DP Napi Enabled") 468 469 #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \ 470 CFG_INI_BOOL("dp_tcp_udp_checksumoffload", true, \ 471 "DP TCP UDP Checksum Offload") 472 473 #define CFG_DP_DEFRAG_TIMEOUT_CHECK \ 474 CFG_INI_BOOL("dp_defrag_timeout_check", true, \ 475 "DP Defrag Timeout Check") 476 477 #define CFG_DP_WBM_RELEASE_RING \ 478 CFG_INI_UINT("dp_wbm_release_ring", \ 479 WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \ 480 WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \ 481 WLAN_CFG_WBM_RELEASE_RING_SIZE, \ 482 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring") 483 484 #define CFG_DP_TCL_CMD_RING \ 485 CFG_INI_UINT("dp_tcl_cmd_ring", \ 486 WLAN_CFG_TCL_CMD_RING_SIZE_MIN, \ 487 WLAN_CFG_TCL_CMD_RING_SIZE_MAX, \ 488 WLAN_CFG_TCL_CMD_RING_SIZE, \ 489 CFG_VALUE_OR_DEFAULT, "DP TCL command ring") 490 491 #define CFG_DP_TCL_STATUS_RING \ 492 CFG_INI_UINT("dp_tcl_status_ring",\ 493 WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \ 494 WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \ 495 WLAN_CFG_TCL_STATUS_RING_SIZE, \ 496 CFG_VALUE_OR_DEFAULT, "DP TCL status ring") 497 498 #define CFG_DP_REO_REINJECT_RING \ 499 CFG_INI_UINT("dp_reo_reinject_ring", \ 500 WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \ 501 WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \ 502 WLAN_CFG_REO_REINJECT_RING_SIZE, \ 503 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring") 504 505 #define CFG_DP_RX_RELEASE_RING \ 506 CFG_INI_UINT("dp_rx_release_ring", \ 507 WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \ 508 WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \ 509 WLAN_CFG_RX_RELEASE_RING_SIZE, \ 510 CFG_VALUE_OR_DEFAULT, "DP Rx release ring") 511 512 #define CFG_DP_REO_EXCEPTION_RING \ 513 CFG_INI_UINT("dp_reo_exception_ring", \ 514 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \ 515 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \ 516 WLAN_CFG_REO_EXCEPTION_RING_SIZE, \ 517 CFG_VALUE_OR_DEFAULT, "DP REO exception ring") 518 519 #define CFG_DP_REO_CMD_RING \ 520 CFG_INI_UINT("dp_reo_cmd_ring", \ 521 WLAN_CFG_REO_CMD_RING_SIZE_MIN, \ 522 WLAN_CFG_REO_CMD_RING_SIZE_MAX, \ 523 WLAN_CFG_REO_CMD_RING_SIZE, \ 524 CFG_VALUE_OR_DEFAULT, "DP REO command ring") 525 526 #define CFG_DP_REO_STATUS_RING \ 527 CFG_INI_UINT("dp_reo_status_ring", \ 528 WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \ 529 WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \ 530 WLAN_CFG_REO_STATUS_RING_SIZE, \ 531 CFG_VALUE_OR_DEFAULT, "DP REO status ring") 532 533 #define CFG_DP_RXDMA_BUF_RING \ 534 CFG_INI_UINT("dp_rxdma_buf_ring", \ 535 WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \ 536 WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \ 537 WLAN_CFG_RXDMA_BUF_RING_SIZE, \ 538 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring") 539 540 #define CFG_DP_RXDMA_REFILL_RING \ 541 CFG_INI_UINT("dp_rxdma_refill_ring", \ 542 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \ 543 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \ 544 WLAN_CFG_RXDMA_REFILL_RING_SIZE, \ 545 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring") 546 547 #define CFG_DP_RXDMA_MONITOR_BUF_RING \ 548 CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \ 549 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \ 550 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \ 551 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \ 552 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring") 553 554 #define CFG_DP_RXDMA_MONITOR_DST_RING \ 555 CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \ 556 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \ 557 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \ 558 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \ 559 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 560 561 #define CFG_DP_RXDMA_MONITOR_STATUS_RING \ 562 CFG_INI_UINT("dp_rxdma_monitor_status_ring", \ 563 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \ 564 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \ 565 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \ 566 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring") 567 568 #define CFG_DP_RXDMA_MONITOR_DESC_RING \ 569 CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \ 570 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \ 571 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \ 572 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \ 573 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 574 575 #define CFG_DP_RXDMA_ERR_DST_RING \ 576 CFG_INI_UINT("dp_rxdma_err_dst_ring", \ 577 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \ 578 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \ 579 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \ 580 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring") 581 582 #define CFG_DP \ 583 CFG(CFG_DP_HTT_PACKET_TYPE) \ 584 CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \ 585 CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \ 586 CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \ 587 CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \ 588 CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \ 589 CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \ 590 CFG(CFG_DP_MAX_ALLOC_SIZE) \ 591 CFG(CFG_DP_MAX_CLIENTS) \ 592 CFG(CFG_DP_MAX_PEER_ID) \ 593 CFG(CFG_DP_REO_DEST_RINGS) \ 594 CFG(CFG_DP_TCL_DATA_RINGS) \ 595 CFG(CFG_DP_TX_DESC) \ 596 CFG(CFG_DP_TX_EXT_DESC) \ 597 CFG(CFG_DP_TX_EXT_DESC_POOLS) \ 598 CFG(CFG_DP_PDEV_RX_RING) \ 599 CFG(CFG_DP_PDEV_TX_RING) \ 600 CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \ 601 CFG(CFG_DP_TX_COMPL_RING_SIZE) \ 602 CFG(CFG_DP_TX_RING_SIZE) \ 603 CFG(CFG_DP_NSS_COMP_RING_SIZE) \ 604 CFG(CFG_DP_PDEV_LMAC_RING) \ 605 CFG(CFG_DP_BASE_HW_MAC_ID) \ 606 CFG(CFG_DP_RX_HASH) \ 607 CFG(CFG_DP_TSO) \ 608 CFG(CFG_DP_LRO) \ 609 CFG(CFG_DP_SG) \ 610 CFG(CFG_DP_GRO) \ 611 CFG(CFG_DP_OL_TX_CSUM) \ 612 CFG(CFG_DP_OL_RX_CSUM) \ 613 CFG(CFG_DP_RAWMODE) \ 614 CFG(CFG_DP_PEER_FLOW_CTRL) \ 615 CFG(CFG_DP_NAPI) \ 616 CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \ 617 CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \ 618 CFG(CFG_DP_WBM_RELEASE_RING) \ 619 CFG(CFG_DP_TCL_CMD_RING) \ 620 CFG(CFG_DP_TCL_STATUS_RING) \ 621 CFG(CFG_DP_REO_REINJECT_RING) \ 622 CFG(CFG_DP_RX_RELEASE_RING) \ 623 CFG(CFG_DP_REO_EXCEPTION_RING) \ 624 CFG(CFG_DP_REO_CMD_RING) \ 625 CFG(CFG_DP_REO_STATUS_RING) \ 626 CFG(CFG_DP_RXDMA_BUF_RING) \ 627 CFG(CFG_DP_RXDMA_REFILL_RING) \ 628 CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \ 629 CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \ 630 CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \ 631 CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \ 632 CFG(CFG_DP_RXDMA_ERR_DST_RING) 633 634 #endif /* _CFG_DP_H_ */ 635