1 /* 2 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /** 21 * DOC: This file contains definitions of Data Path configuration. 22 */ 23 24 #ifndef _CFG_DP_H_ 25 #define _CFG_DP_H_ 26 27 #include "cfg_define.h" 28 #include "wlan_init_cfg.h" 29 30 #define WLAN_CFG_MAX_CLIENTS 64 31 #define WLAN_CFG_MAX_CLIENTS_MIN 8 32 #define WLAN_CFG_MAX_CLIENTS_MAX 64 33 34 /* Change this to a lower value to enforce scattered idle list mode */ 35 #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000 36 #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000 37 #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000 38 39 #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \ 40 defined(QCA_LL_PDEV_TX_FLOW_CONTROL) 41 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10 42 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15 43 #else 44 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0 45 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0 46 #endif 47 48 #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0 49 #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1 50 51 #ifdef IPA_OFFLOAD 52 /* Size of TCL TX Ring */ 53 #if defined(TX_TO_NPEERS_INC_TX_DESCS) 54 #define WLAN_CFG_TX_RING_SIZE 2048 55 #else 56 #define WLAN_CFG_TX_RING_SIZE 1024 57 #endif 58 59 #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 512 60 #define WLAN_CFG_IPA_TX_RING_SIZE 1024 61 #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 0x80000 62 63 #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 512 64 #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024 65 #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 0x80000 66 67 #ifdef IPA_WDI3_TX_TWO_PIPES 68 #ifdef WLAN_MEMORY_OPT 69 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 128 70 #else 71 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 512 72 #endif 73 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE 1024 74 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX 0x80000 75 76 #ifdef WLAN_MEMORY_OPT 77 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 128 78 #else 79 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 512 80 #endif 81 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE 1024 82 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX 0x80000 83 #endif 84 85 #define WLAN_CFG_PER_PDEV_TX_RING 0 86 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048 87 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000 88 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024 89 #else 90 #define WLAN_CFG_TX_RING_SIZE 512 91 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) 92 #define WLAN_CFG_PER_PDEV_TX_RING 1 93 #else 94 #define WLAN_CFG_PER_PDEV_TX_RING 0 95 #endif 96 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0 97 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0 98 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0 99 #endif /* IPA_OFFLOAD */ 100 101 #define WLAN_CFG_TIME_CONTROL_BP 3000 102 103 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) 104 #define WLAN_CFG_PER_PDEV_RX_RING 0 105 #define WLAN_CFG_PER_PDEV_LMAC_RING 0 106 #define WLAN_LRO_ENABLE 0 107 #ifdef QCA_WIFI_QCA6750 108 #define WLAN_CFG_MAC_PER_TARGET 1 109 #else 110 #define WLAN_CFG_MAC_PER_TARGET 2 111 #endif 112 113 #if defined(TX_TO_NPEERS_INC_TX_DESCS) 114 #define WLAN_CFG_TX_COMP_RING_SIZE 4096 115 116 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 117 #define WLAN_CFG_NUM_TX_DESC 4096 118 #define WLAN_CFG_NUM_TX_EXT_DESC 4096 119 #else 120 #define WLAN_CFG_TX_COMP_RING_SIZE 1024 121 122 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 123 #define WLAN_CFG_NUM_TX_DESC 1024 124 #define WLAN_CFG_NUM_TX_EXT_DESC 1024 125 #endif 126 127 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 128 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1 129 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 130 131 /* Interrupt Mitigation - Timer threshold in us */ 132 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8 133 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8 134 135 #ifdef WLAN_DP_PER_RING_TYPE_CONFIG 136 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \ 137 WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 138 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \ 139 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 140 #else 141 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1 142 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8 143 #endif 144 #endif /* WLAN_MAX_PDEVS */ 145 146 #define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL 0 147 #define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL 30 148 149 #ifdef NBUF_MEMORY_DEBUG 150 #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF 151 #else 152 #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF 153 #endif 154 155 #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \ 156 WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 157 #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0 158 #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000 159 160 #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \ 161 WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 162 #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100 163 #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000 164 165 #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256 166 #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512 167 #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0 168 169 #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0 170 #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0 171 172 #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0 173 #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1 174 175 #define WLAN_CFG_TX_RING_SIZE_MIN 512 176 #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000 177 178 #define WLAN_CFG_TIME_CONTROL_BP_MIN 3000 179 #define WLAN_CFG_TIME_CONTROL_BP_MAX 1800000 180 181 #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512 182 #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000 183 184 #define WLAN_CFG_NUM_TX_DESC_MIN 16 185 #define WLAN_CFG_NUM_TX_DESC_MAX 0x10000 186 187 #define WLAN_CFG_NUM_TX_SPL_DESC 1024 188 #define WLAN_CFG_NUM_TX_SPL_DESC_MIN 0 189 #define WLAN_CFG_NUM_TX_SPL_DESC_MAX 0x1000 190 191 #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16 192 #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000 193 194 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1 195 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256 196 197 #define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MIN 0 198 #define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MAX 1024 199 200 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0 201 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128 202 203 #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1 204 #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128 205 206 #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1 207 #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128 208 209 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1 210 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1 211 212 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8 213 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000 214 215 #define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MIN 8 216 #define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MAX 1000 217 218 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8 219 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500 220 221 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8 222 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000 223 224 #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8 225 #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512 226 227 #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8 228 #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500 229 230 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000 231 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000 232 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000 233 234 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 235 236 /* Per vdev pools */ 237 #define WLAN_CFG_NUM_TX_DESC_POOL 3 238 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 239 240 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */ 241 242 #ifdef TX_PER_PDEV_DESC_POOL 243 #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT 244 #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT 245 246 #else /* TX_PER_PDEV_DESC_POOL */ 247 248 #define WLAN_CFG_NUM_TX_DESC_POOL 3 249 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 250 251 #endif /* TX_PER_PDEV_DESC_POOL */ 252 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 253 254 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1 255 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4 256 257 #define WLAN_CFG_HTT_PKT_TYPE 2 258 #define WLAN_CFG_HTT_PKT_TYPE_MIN 2 259 #define WLAN_CFG_HTT_PKT_TYPE_MAX 2 260 261 #define WLAN_CFG_MAX_PEER_ID 64 262 #define WLAN_CFG_MAX_PEER_ID_MIN 64 263 #define WLAN_CFG_MAX_PEER_ID_MAX 64 264 265 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100 266 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100 267 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100 268 269 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 270 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 1 271 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS 272 273 #define WLAN_CFG_NUM_TX_COMP_RINGS WLAN_CFG_NUM_TCL_DATA_RINGS 274 #define WLAN_CFG_NUM_TX_COMP_RINGS_MIN WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 275 #define WLAN_CFG_NUM_TX_COMP_RINGS_MAX WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 276 277 #if defined(CONFIG_BERYLLIUM) 278 #define WLAN_CFG_NUM_REO_DEST_RING 8 279 #else 280 #define WLAN_CFG_NUM_REO_DEST_RING 4 281 #endif 282 #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4 283 #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS 284 285 #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2 286 #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1 287 #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3 288 289 #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2 290 #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1 291 #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3 292 293 #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024 294 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64 295 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024 296 297 #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 512 298 #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32 299 #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 512 300 301 #define WLAN_CFG_TCL_STATUS_RING_SIZE 32 302 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32 303 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32 304 305 #if defined(QCA_WIFI_QCA6290) 306 #define WLAN_CFG_REO_DST_RING_SIZE 1024 307 #else 308 #define WLAN_CFG_REO_DST_RING_SIZE 2048 309 #endif 310 311 #define WLAN_CFG_REO_DST_RING_SIZE_MIN 8 312 #define WLAN_CFG_REO_DST_RING_SIZE_MAX 8192 313 314 #define WLAN_CFG_REO_REINJECT_RING_SIZE 128 315 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32 316 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128 317 318 #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024 319 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8 320 #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \ 321 defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI) 322 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024 323 #else 324 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 32768 325 #endif 326 327 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256 328 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128 329 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512 330 331 #define WLAN_CFG_REO_CMD_RING_SIZE 128 332 #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64 333 #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128 334 335 #define WLAN_CFG_REO_STATUS_RING_SIZE 256 336 #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128 337 #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048 338 339 #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024 340 #ifdef WLAN_MEMORY_OPT 341 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 128 342 #else 343 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024 344 #endif 345 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 4096 346 347 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096 348 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16 349 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 16384 350 351 #define WLAN_CFG_TX_DESC_LIMIT_0 0 352 #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096 353 #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768 354 355 #define WLAN_CFG_TX_DESC_LIMIT_1 0 356 #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096 357 #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768 358 359 #define WLAN_CFG_TX_DESC_LIMIT_2 0 360 #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096 361 #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768 362 363 #define WLAN_CFG_TX_DEVICE_LIMIT 65536 364 #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384 365 #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536 366 367 #define WLAN_CFG_TX_SPL_DEVICE_LIMIT 1024 368 #define WLAN_CFG_TX_SPL_DEVICE_LIMIT_MIN 0 369 #define WLAN_CFG_TX_SPL_DEVICE_LIMIT_MAX 4096 370 371 #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024 372 #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128 373 #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024 374 375 #define WLAN_CFG_TX_DESC_GLOBAL_COUNT 0xC000 376 #define WLAN_CFG_TX_DESC_GLOBAL_COUNT_MIN 0x8000 377 #define WLAN_CFG_TX_DESC_GLOBAL_COUNT_MAX 0x60000 378 379 #define WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT 0x400 380 #define WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MIN 0x400 381 #define WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MAX 0x1000 382 383 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096 384 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16 385 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192 386 387 #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE 4096 388 #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN 16 389 #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX 8192 390 391 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048 392 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48 393 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192 394 395 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE 2048 396 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48 397 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 8192 398 399 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024 400 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16 401 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192 402 403 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096 404 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096 405 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384 406 407 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024 408 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024 409 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192 410 411 #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32 412 #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0 413 #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256 414 415 /* 416 * Allocate as many RX descriptors as buffers in the SW2RXDMA 417 * ring. This value may need to be tuned later. 418 */ 419 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) 420 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1 421 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1 422 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1 423 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096 424 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024 425 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384 426 427 /* 428 * For low memory AP cases using 1 will reduce the rx descriptors memory req 429 */ 430 #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG) 431 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1 432 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1 433 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3 434 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096 435 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024 436 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384 437 438 /* 439 * AP use cases need to allocate more RX Descriptors than the number of 440 * entries available in the SW2RXDMA buffer replenish ring. This is to account 441 * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a 442 * multiplication factor of 3, to allocate three times as many RX descriptors 443 * as RX buffers. 444 */ 445 #else 446 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3 447 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1 448 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3 449 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288 450 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096 451 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384 452 #endif 453 454 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384 455 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1 456 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384 457 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128 458 459 #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10 460 #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1 461 #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10 462 463 #ifdef IPA_OFFLOAD 464 #define WLAN_CFG_NUM_REO_RINGS_MAP 0x7 465 #else 466 #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF 467 #endif 468 #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1 469 #if defined(CONFIG_BERYLLIUM) 470 #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xFF 471 #else 472 #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF 473 #endif 474 475 #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1 476 #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2 477 #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3 478 479 #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1 480 #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4 481 482 #define WLAN_CFG_REO2PPE_RING_SIZE 8192 483 #define WLAN_CFG_REO2PPE_RING_SIZE_MIN 64 484 #define WLAN_CFG_REO2PPE_RING_SIZE_MAX 16384 485 486 #define WLAN_CFG_PPE2TCL_RING_SIZE 2048 487 #define WLAN_CFG_PPE2TCL_RING_SIZE_MIN 64 488 #define WLAN_CFG_PPE2TCL_RING_SIZE_MAX 32768 489 490 #define WLAN_CFG_PPE_RELEASE_RING_SIZE 1024 491 #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN 64 492 #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX 1024 493 494 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) 495 #define WLAN_CFG_MLO_RX_RING_MAP 0x7 496 #define WLAN_CFG_MLO_RX_RING_MAP_MIN 0x0 497 #define WLAN_CFG_MLO_RX_RING_MAP_MAX 0xFF 498 #endif 499 500 #define WLAN_CFG_TX_CAPT_MAX_MEM_MIN 0 501 #define WLAN_CFG_TX_CAPT_MAX_MEM_MAX 512 502 #define WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT 0 503 504 #define CFG_DP_MPDU_RETRY_THRESHOLD_MIN 0 505 #define CFG_DP_MPDU_RETRY_THRESHOLD_MAX 255 506 #define CFG_DP_MPDU_RETRY_THRESHOLD 0 507 508 #define WLAN_CFG_DP_NAPI_SCALE_FACTOR 0 509 #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN 0 510 #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX 4 511 512 #ifdef CONFIG_SAWF_STATS 513 #define WLAN_CFG_SAWF_STATS 0x0 514 #define WLAN_CFG_SAWF_STATS_MIN 0x0 515 #define WLAN_CFG_SAWF_STATS_MAX 0x7 516 #endif 517 /* 518 * <ini> 519 * "dp_tx_capt_max_mem_mb"- maximum memory used by Tx capture 520 * @Min: 0 521 * @Max: 512 MB 522 * @Default: 0 (disabled) 523 * 524 * This ini entry is used to set a max limit beyond which frames 525 * are dropped by Tx capture. User needs to set a non-zero value 526 * to enable it. 527 * 528 * Usage: External 529 * 530 * </ini> 531 */ 532 #define CFG_DP_TX_CAPT_MAX_MEM_MB \ 533 CFG_INI_UINT("dp_tx_capt_max_mem_mb", \ 534 WLAN_CFG_TX_CAPT_MAX_MEM_MIN, \ 535 WLAN_CFG_TX_CAPT_MAX_MEM_MAX, \ 536 WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT, \ 537 CFG_VALUE_OR_DEFAULT, "Max Memory (in MB) used by Tx Capture") 538 539 /* DP INI Declarations */ 540 #define CFG_DP_HTT_PACKET_TYPE \ 541 CFG_INI_UINT("dp_htt_packet_type", \ 542 WLAN_CFG_HTT_PKT_TYPE_MIN, \ 543 WLAN_CFG_HTT_PKT_TYPE_MAX, \ 544 WLAN_CFG_HTT_PKT_TYPE, \ 545 CFG_VALUE_OR_DEFAULT, "DP HTT packet type") 546 547 #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \ 548 CFG_INI_UINT("dp_int_batch_threshold_other", \ 549 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \ 550 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \ 551 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \ 552 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other") 553 554 #define CFG_DP_INT_BATCH_THRESHOLD_RX \ 555 CFG_INI_UINT("dp_int_batch_threshold_rx", \ 556 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \ 557 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \ 558 WLAN_CFG_INT_BATCH_THRESHOLD_RX, \ 559 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx") 560 561 #define CFG_DP_INT_BATCH_THRESHOLD_TX \ 562 CFG_INI_UINT("dp_int_batch_threshold_tx", \ 563 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \ 564 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \ 565 WLAN_CFG_INT_BATCH_THRESHOLD_TX, \ 566 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx") 567 568 #define CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL \ 569 CFG_INI_UINT("dp_int_batch_threshold_ppe2tcl", \ 570 WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MIN, \ 571 WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MAX, \ 572 WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL, \ 573 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold ppe2tcl") 574 575 #define CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL \ 576 CFG_INI_UINT("dp_int_timer_threshold_ppe2tcl", \ 577 WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MIN, \ 578 WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MAX, \ 579 WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL, \ 580 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold ppe2tcl") 581 582 #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \ 583 CFG_INI_UINT("dp_int_timer_threshold_other", \ 584 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 585 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 586 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 587 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other") 588 589 #define CFG_DP_INT_TIMER_THRESHOLD_RX \ 590 CFG_INI_UINT("dp_int_timer_threshold_rx", \ 591 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \ 592 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \ 593 WLAN_CFG_INT_TIMER_THRESHOLD_RX, \ 594 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx") 595 596 #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \ 597 CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \ 598 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \ 599 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \ 600 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \ 601 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring") 602 603 #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \ 604 CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \ 605 WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \ 606 WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \ 607 WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \ 608 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring") 609 610 #define CFG_DP_INT_TIMER_THRESHOLD_TX \ 611 CFG_INI_UINT("dp_int_timer_threshold_tx", \ 612 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \ 613 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \ 614 WLAN_CFG_INT_TIMER_THRESHOLD_TX, \ 615 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx") 616 617 #define CFG_DP_MAX_ALLOC_SIZE \ 618 CFG_INI_UINT("dp_max_alloc_size", \ 619 WLAN_CFG_MAX_ALLOC_SIZE_MIN, \ 620 WLAN_CFG_MAX_ALLOC_SIZE_MAX, \ 621 WLAN_CFG_MAX_ALLOC_SIZE, \ 622 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size") 623 624 #define CFG_DP_MAX_CLIENTS \ 625 CFG_INI_UINT("dp_max_clients", \ 626 WLAN_CFG_MAX_CLIENTS_MIN, \ 627 WLAN_CFG_MAX_CLIENTS_MAX, \ 628 WLAN_CFG_MAX_CLIENTS, \ 629 CFG_VALUE_OR_DEFAULT, "DP Max Clients") 630 631 #define CFG_DP_MAX_PEER_ID \ 632 CFG_INI_UINT("dp_max_peer_id", \ 633 WLAN_CFG_MAX_PEER_ID_MIN, \ 634 WLAN_CFG_MAX_PEER_ID_MAX, \ 635 WLAN_CFG_MAX_PEER_ID, \ 636 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID") 637 638 #define CFG_DP_REO_DEST_RINGS \ 639 CFG_INI_UINT("dp_reo_dest_rings", \ 640 WLAN_CFG_NUM_REO_DEST_RING_MIN, \ 641 WLAN_CFG_NUM_REO_DEST_RING_MAX, \ 642 WLAN_CFG_NUM_REO_DEST_RING, \ 643 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings") 644 645 #define CFG_DP_TX_COMP_RINGS \ 646 CFG_INI_UINT("dp_tx_comp_rings", \ 647 WLAN_CFG_NUM_TX_COMP_RINGS_MIN, \ 648 WLAN_CFG_NUM_TX_COMP_RINGS_MAX, \ 649 WLAN_CFG_NUM_TX_COMP_RINGS, \ 650 CFG_VALUE_OR_DEFAULT, "DP Tx Comp Rings") 651 652 #define CFG_DP_TCL_DATA_RINGS \ 653 CFG_INI_UINT("dp_tcl_data_rings", \ 654 WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \ 655 WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \ 656 WLAN_CFG_NUM_TCL_DATA_RINGS, \ 657 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings") 658 659 #define CFG_DP_NSS_REO_DEST_RINGS \ 660 CFG_INI_UINT("dp_nss_reo_dest_rings", \ 661 WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \ 662 WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \ 663 WLAN_CFG_NSS_NUM_REO_DEST_RING, \ 664 CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings") 665 666 #define CFG_DP_NSS_TCL_DATA_RINGS \ 667 CFG_INI_UINT("dp_nss_tcl_data_rings", \ 668 WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \ 669 WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \ 670 WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \ 671 CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings") 672 673 #define CFG_DP_TX_DESC \ 674 CFG_INI_UINT("dp_tx_desc", \ 675 WLAN_CFG_NUM_TX_DESC_MIN, \ 676 WLAN_CFG_NUM_TX_DESC_MAX, \ 677 WLAN_CFG_NUM_TX_DESC, \ 678 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors") 679 680 #define CFG_DP_TX_SPL_DESC \ 681 CFG_INI_UINT("dp_tx_spl_desc", \ 682 WLAN_CFG_NUM_TX_SPL_DESC_MIN, \ 683 WLAN_CFG_NUM_TX_SPL_DESC_MAX, \ 684 WLAN_CFG_NUM_TX_SPL_DESC, \ 685 CFG_VALUE_OR_DEFAULT, "DP Tx Special Descriptors") 686 687 #define CFG_DP_TX_EXT_DESC \ 688 CFG_INI_UINT("dp_tx_ext_desc", \ 689 WLAN_CFG_NUM_TX_EXT_DESC_MIN, \ 690 WLAN_CFG_NUM_TX_EXT_DESC_MAX, \ 691 WLAN_CFG_NUM_TX_EXT_DESC, \ 692 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors") 693 694 #define CFG_DP_TX_EXT_DESC_POOLS \ 695 CFG_INI_UINT("dp_tx_ext_desc_pool", \ 696 WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \ 697 WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \ 698 WLAN_CFG_NUM_TXEXT_DESC_POOL, \ 699 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool") 700 701 #define CFG_DP_PDEV_RX_RING \ 702 CFG_INI_UINT("dp_pdev_rx_ring", \ 703 WLAN_CFG_PER_PDEV_RX_RING_MIN, \ 704 WLAN_CFG_PER_PDEV_RX_RING_MAX, \ 705 WLAN_CFG_PER_PDEV_RX_RING, \ 706 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring") 707 708 #define CFG_DP_PDEV_TX_RING \ 709 CFG_INI_UINT("dp_pdev_tx_ring", \ 710 WLAN_CFG_PER_PDEV_TX_RING_MIN, \ 711 WLAN_CFG_PER_PDEV_TX_RING_MAX, \ 712 WLAN_CFG_PER_PDEV_TX_RING, \ 713 CFG_VALUE_OR_DEFAULT, \ 714 "DP PDEV Tx Ring") 715 716 #define CFG_DP_RX_DEFRAG_TIMEOUT \ 717 CFG_INI_UINT("dp_rx_defrag_timeout", \ 718 WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \ 719 WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \ 720 WLAN_CFG_RX_DEFRAG_TIMEOUT, \ 721 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout") 722 723 #define CFG_DP_TX_COMPL_RING_SIZE \ 724 CFG_INI_UINT("dp_tx_compl_ring_size", \ 725 WLAN_CFG_TX_COMP_RING_SIZE_MIN, \ 726 WLAN_CFG_TX_COMP_RING_SIZE_MAX, \ 727 WLAN_CFG_TX_COMP_RING_SIZE, \ 728 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size") 729 730 #define CFG_DP_TX_RING_SIZE \ 731 CFG_INI_UINT("dp_tx_ring_size", \ 732 WLAN_CFG_TX_RING_SIZE_MIN,\ 733 WLAN_CFG_TX_RING_SIZE_MAX,\ 734 WLAN_CFG_TX_RING_SIZE,\ 735 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size") 736 737 #define CFG_DP_NSS_COMP_RING_SIZE \ 738 CFG_INI_UINT("dp_nss_comp_ring_size", \ 739 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \ 740 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \ 741 WLAN_CFG_NSS_TX_COMP_RING_SIZE, \ 742 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size") 743 744 #define CFG_DP_PDEV_LMAC_RING \ 745 CFG_INI_UINT("dp_pdev_lmac_ring", \ 746 WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \ 747 WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \ 748 WLAN_CFG_PER_PDEV_LMAC_RING, \ 749 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring") 750 751 #define CFG_DP_TIME_CONTROL_BP \ 752 CFG_INI_UINT("dp_time_control_bp", \ 753 WLAN_CFG_TIME_CONTROL_BP_MIN,\ 754 WLAN_CFG_TIME_CONTROL_BP_MAX,\ 755 WLAN_CFG_TIME_CONTROL_BP,\ 756 CFG_VALUE_OR_DEFAULT, "DP time control back pressure") 757 758 #ifdef CONFIG_SAWF_STATS 759 #define CFG_DP_SAWF_STATS \ 760 CFG_INI_UINT("dp_sawf_stats", \ 761 WLAN_CFG_SAWF_STATS_MIN,\ 762 WLAN_CFG_SAWF_STATS_MAX,\ 763 WLAN_CFG_SAWF_STATS,\ 764 CFG_VALUE_OR_DEFAULT, "DP sawf stats config") 765 #define CFG_DP_SAWF_STATS_CONFIG CFG(CFG_DP_SAWF_STATS) 766 #else 767 #define CFG_DP_SAWF_STATS_CONFIG 768 #endif 769 770 /* 771 * <ini> 772 * dp_rx_pending_hl_threshold - High threshold of frame number to start 773 * frame dropping scheme 774 * @Min: 0 775 * @Max: 524288 776 * @Default: 393216 777 * 778 * This ini entry is used to set a high limit threshold to start frame 779 * dropping scheme 780 * 781 * Usage: External 782 * 783 * </ini> 784 */ 785 #define CFG_DP_RX_PENDING_HL_THRESHOLD \ 786 CFG_INI_UINT("dp_rx_pending_hl_threshold", \ 787 WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \ 788 WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \ 789 WLAN_CFG_RX_PENDING_HL_THRESHOLD, \ 790 CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold") 791 792 /* 793 * <ini> 794 * dp_rx_pending_lo_threshold - Low threshold of frame number to stop 795 * frame dropping scheme 796 * @Min: 100 797 * @Max: 524288 798 * @Default: 393216 799 * 800 * This ini entry is used to set a low limit threshold to stop frame 801 * dropping scheme 802 * 803 * Usage: External 804 * 805 * </ini> 806 */ 807 #define CFG_DP_RX_PENDING_LO_THRESHOLD \ 808 CFG_INI_UINT("dp_rx_pending_lo_threshold", \ 809 WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \ 810 WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \ 811 WLAN_CFG_RX_PENDING_LO_THRESHOLD, \ 812 CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold") 813 814 #define CFG_DP_BASE_HW_MAC_ID \ 815 CFG_INI_UINT("dp_base_hw_macid", \ 816 0, 1, 1, \ 817 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID") 818 819 #define CFG_DP_RX_HASH \ 820 CFG_INI_BOOL("dp_rx_hash", true, \ 821 "DP Rx Hash") 822 823 #define CFG_DP_TSO \ 824 CFG_INI_BOOL("TSOEnable", false, \ 825 "DP TSO Enabled") 826 827 #define CFG_DP_LRO \ 828 CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \ 829 "DP LRO Enable") 830 831 #ifdef WLAN_USE_CONFIG_PARAMS 832 /* 833 * <ini> 834 * dp_tx_desc_use_512p - Use 512M tx descriptor size 835 * @Min: 0 836 * @Max: 1 837 * @Default: 0 838 * 839 * This ini entry is used as flag to use 512M tx descriptor size or not 840 * 841 * Usage: Internal 842 * 843 * </ini> 844 */ 845 #define CFG_DP_TX_DESC_512P \ 846 CFG_INI_BOOL("dp_tx_desc_use_512p", false, \ 847 "DP TX DESC PINE SPECIFIC") 848 849 /* 850 * <ini> 851 * dp_nss_3radio_ring - Use 3 Radio NSS comp ring size 852 * @Min: 0 853 * @Max: 1 854 * @Default: 0 855 * 856 * This ini entry is used as flag to use 3 Radio NSS com ring size or not 857 * 858 * Usage: Internal 859 * 860 * </ini> 861 */ 862 #define CFG_DP_NSS_3RADIO_RING \ 863 CFG_INI_BOOL("dp_nss_3radio_ring", false, \ 864 "DP NSS 3 RADIO RING SIZE") 865 866 /* 867 * <ini> 868 * dp_mon_ring_per_512M - Update monitor status ring as 512M profile 869 * @Min: 0 870 * @Max: 1 871 * @Default: 0 872 * 873 * This ini entry is used as flag to update monitor status ring as 512M profile 874 * 875 * Usage: Internal 876 * 877 * </ini> 878 */ 879 #define CFG_DP_MON_STATUS_512M \ 880 CFG_INI_BOOL("dp_mon_ring_per_512M", false, \ 881 "DP MON STATUS RING SIZE PER 512M PROFILE") 882 883 /* 884 * <ini> 885 * dp_mon_2chain_ring - Reduce monitor rings size as for 2 Chains case 886 * @Min: 0 887 * @Max: 1 888 * @Default: 0 889 * 890 * This ini entry is used as flag to reduce monitor rings size as those used 891 * in case of 2 Tx/RxChains 892 * 893 * Usage: Internal 894 * 895 * </ini> 896 */ 897 #define CFG_DP_MON_2CHAIN_RING \ 898 CFG_INI_BOOL("dp_mon_2chain_ring", false, \ 899 "DP MON UPDATE RINGS FOR 2CHAIN") 900 901 /* 902 * <ini> 903 * dp_mon_4chain_ring - Update monitor rings size for 4 Chains case 904 * @Min: 0 905 * @Max: 1 906 * @Default: 0 907 * 908 * This ini entry is used as flag to reduce monitor rings size as those used 909 * in case of 4 Tx/RxChains 910 * 911 * Usage: Internal 912 * 913 * </ini> 914 */ 915 #define CFG_DP_MON_4CHAIN_RING \ 916 CFG_INI_BOOL("dp_mon_4chain_ring", false, \ 917 "DP MON UPDATE RINGS FOR 4CHAIN") 918 919 /* 920 * <ini> 921 * dp_4radip_rdp_reo - Update RDP REO map based on 4 radio config 922 * @Min: 0 923 * @Max: 1 924 * @Default: 0 925 * 926 * This ini entry is used as flag to update RDP reo map based on 4 Radio config 927 * 928 * Usage: Internal 929 * 930 * </ini> 931 */ 932 #define CFG_DP_4RADIO_RDP_REO \ 933 CFG_INI_BOOL("dp_nss_4radio_rdp_reo", \ 934 false, "Update REO destination mapping for 4radio") 935 936 #define CFG_DP_INI_SECTION_PARAMS \ 937 CFG(CFG_DP_NSS_3RADIO_RING) \ 938 CFG(CFG_DP_TX_DESC_512P) \ 939 CFG(CFG_DP_MON_STATUS_512M) \ 940 CFG(CFG_DP_MON_2CHAIN_RING) \ 941 CFG(CFG_DP_MON_4CHAIN_RING) \ 942 CFG(CFG_DP_4RADIO_RDP_REO) 943 #else 944 #define CFG_DP_INI_SECTION_PARAMS 945 #endif 946 947 /* 948 * <ini> 949 * CFG_DP_SG - Enable the SG feature standalonely 950 * @Min: 0 951 * @Max: 1 952 * @Default: 1 953 * 954 * This ini entry is used to enable/disable SG feature standalonely. 955 * Also does Rome support SG on TX, lithium does not. 956 * For example the lithium does not support SG on UDP frames. 957 * Which is able to handle SG only for TSO frames(in case TSO is enabled). 958 * 959 * Usage: External 960 * 961 * </ini> 962 */ 963 #define CFG_DP_SG \ 964 CFG_INI_BOOL("dp_sg_support", false, \ 965 "DP SG Enable") 966 967 #define WLAN_CFG_GRO_ENABLE_MIN 0 968 #define WLAN_CFG_GRO_ENABLE_MAX 3 969 #define WLAN_CFG_GRO_ENABLE_DEFAULT 0 970 #define DP_GRO_ENABLE_BIT_SET BIT(0) 971 #define DP_TC_BASED_DYNAMIC_GRO BIT(1) 972 973 /* 974 * <ini> 975 * CFG_DP_GRO - Enable the GRO feature standalonely 976 * @Min: 0 977 * @Max: 3 978 * @Default: 0 979 * 980 * This ini entry is used to enable/disable GRO feature standalonely. 981 * Value 0: Disable GRO feature 982 * Value 1: Enable GRO feature always 983 * Value 3: Enable GRO dynamic feature where TC rule can control GRO 984 * behavior 985 * 986 * Usage: External 987 * 988 * </ini> 989 */ 990 #define CFG_DP_GRO \ 991 CFG_INI_UINT("GROEnable", \ 992 WLAN_CFG_GRO_ENABLE_MIN, \ 993 WLAN_CFG_GRO_ENABLE_MAX, \ 994 WLAN_CFG_GRO_ENABLE_DEFAULT, \ 995 CFG_VALUE_OR_DEFAULT, "DP GRO Enable") 996 997 #define WLAN_CFG_TC_INGRESS_PRIO_MIN 0 998 #define WLAN_CFG_TC_INGRESS_PRIO_MAX 0xFFFF 999 #define WLAN_CFG_TC_INGRESS_PRIO_DEFAULT 0 1000 1001 #define CFG_DP_TC_INGRESS_PRIO \ 1002 CFG_INI_UINT("tc_ingress_prio", \ 1003 WLAN_CFG_TC_INGRESS_PRIO_MIN, \ 1004 WLAN_CFG_TC_INGRESS_PRIO_MAX, \ 1005 WLAN_CFG_TC_INGRESS_PRIO_DEFAULT, \ 1006 CFG_VALUE_OR_DEFAULT, "DP tc ingress prio") 1007 1008 #define CFG_DP_OL_TX_CSUM \ 1009 CFG_INI_BOOL("dp_offload_tx_csum_support", false, \ 1010 "DP tx csum Enable") 1011 1012 #define CFG_DP_OL_RX_CSUM \ 1013 CFG_INI_BOOL("dp_offload_rx_csum_support", false, \ 1014 "DP rx csum Enable") 1015 1016 #define CFG_DP_RAWMODE \ 1017 CFG_INI_BOOL("dp_rawmode_support", false, \ 1018 "DP rawmode Enable") 1019 1020 #define CFG_DP_PEER_FLOW_CTRL \ 1021 CFG_INI_BOOL("dp_peer_flow_control_support", false, \ 1022 "DP peer flow ctrl Enable") 1023 1024 #define CFG_DP_NAPI \ 1025 CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \ 1026 "DP Napi Enabled") 1027 /* 1028 * <ini> 1029 * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode 1030 * @Min: 0 1031 * @Max: 1 1032 * @Default: 1 1033 * 1034 * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes. 1035 * This includes P2P device mode, P2P client mode and P2P GO mode. 1036 * The feature is enabled by default. To disable TX checksum for P2P, add the 1037 * following entry in ini file: 1038 * gEnableP2pIpTcpUdpChecksumOffload=0 1039 * 1040 * Usage: External 1041 * 1042 * </ini> 1043 */ 1044 #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \ 1045 CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \ 1046 "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)") 1047 1048 /* 1049 * <ini> 1050 * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode 1051 * @Min: 0 1052 * @Max: 1 1053 * @Default: 1 1054 * 1055 * Usage: External 1056 * 1057 * </ini> 1058 */ 1059 #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \ 1060 CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \ 1061 "DP TCP UDP Checksum Offload for NAN mode") 1062 1063 /* 1064 * <ini> 1065 * gEnableIpTcpUdpChecksumOffload - Enable checksum offload 1066 * @Min: 0 1067 * @Max: 1 1068 * @Default: 1 1069 * 1070 * Usage: External 1071 * 1072 * </ini> 1073 */ 1074 #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \ 1075 CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \ 1076 "DP TCP UDP Checksum Offload") 1077 1078 #define CFG_DP_DEFRAG_TIMEOUT_CHECK \ 1079 CFG_INI_BOOL("dp_defrag_timeout_check", true, \ 1080 "DP Defrag Timeout Check") 1081 1082 #define CFG_DP_WBM_RELEASE_RING \ 1083 CFG_INI_UINT("dp_wbm_release_ring", \ 1084 WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \ 1085 WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \ 1086 WLAN_CFG_WBM_RELEASE_RING_SIZE, \ 1087 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring") 1088 1089 #define CFG_DP_TCL_CMD_CREDIT_RING \ 1090 CFG_INI_UINT("dp_tcl_cmd_credit_ring", \ 1091 WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \ 1092 WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \ 1093 WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \ 1094 CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring") 1095 1096 #define CFG_DP_TCL_STATUS_RING \ 1097 CFG_INI_UINT("dp_tcl_status_ring",\ 1098 WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \ 1099 WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \ 1100 WLAN_CFG_TCL_STATUS_RING_SIZE, \ 1101 CFG_VALUE_OR_DEFAULT, "DP TCL status ring") 1102 1103 #define CFG_DP_REO_REINJECT_RING \ 1104 CFG_INI_UINT("dp_reo_reinject_ring", \ 1105 WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \ 1106 WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \ 1107 WLAN_CFG_REO_REINJECT_RING_SIZE, \ 1108 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring") 1109 1110 #define CFG_DP_RX_RELEASE_RING \ 1111 CFG_INI_UINT("dp_rx_release_ring", \ 1112 WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \ 1113 WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \ 1114 WLAN_CFG_RX_RELEASE_RING_SIZE, \ 1115 CFG_VALUE_OR_DEFAULT, "DP Rx release ring") 1116 1117 #define CFG_DP_RX_DESTINATION_RING \ 1118 CFG_INI_UINT("dp_reo_dst_ring", \ 1119 WLAN_CFG_REO_DST_RING_SIZE_MIN, \ 1120 WLAN_CFG_REO_DST_RING_SIZE_MAX, \ 1121 WLAN_CFG_REO_DST_RING_SIZE, \ 1122 CFG_VALUE_OR_DEFAULT, "DP REO destination ring") 1123 1124 #define CFG_DP_REO_EXCEPTION_RING \ 1125 CFG_INI_UINT("dp_reo_exception_ring", \ 1126 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \ 1127 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \ 1128 WLAN_CFG_REO_EXCEPTION_RING_SIZE, \ 1129 CFG_VALUE_OR_DEFAULT, "DP REO exception ring") 1130 1131 #define CFG_DP_REO_CMD_RING \ 1132 CFG_INI_UINT("dp_reo_cmd_ring", \ 1133 WLAN_CFG_REO_CMD_RING_SIZE_MIN, \ 1134 WLAN_CFG_REO_CMD_RING_SIZE_MAX, \ 1135 WLAN_CFG_REO_CMD_RING_SIZE, \ 1136 CFG_VALUE_OR_DEFAULT, "DP REO command ring") 1137 1138 #define CFG_DP_REO_STATUS_RING \ 1139 CFG_INI_UINT("dp_reo_status_ring", \ 1140 WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \ 1141 WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \ 1142 WLAN_CFG_REO_STATUS_RING_SIZE, \ 1143 CFG_VALUE_OR_DEFAULT, "DP REO status ring") 1144 1145 #define CFG_DP_RXDMA_BUF_RING \ 1146 CFG_INI_UINT("dp_rxdma_buf_ring", \ 1147 WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \ 1148 WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \ 1149 WLAN_CFG_RXDMA_BUF_RING_SIZE, \ 1150 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring") 1151 1152 #define CFG_DP_RXDMA_REFILL_RING \ 1153 CFG_INI_UINT("dp_rxdma_refill_ring", \ 1154 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \ 1155 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \ 1156 WLAN_CFG_RXDMA_REFILL_RING_SIZE, \ 1157 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring") 1158 1159 #define CFG_DP_RXDMA_REFILL_LT_DISABLE \ 1160 CFG_INI_BOOL("dp_disable_rx_buf_low_threshold", false, \ 1161 "Disable Low threshold interrupts for Rx Refill ring") 1162 1163 #define CFG_DP_TX_DESC_LIMIT_0 \ 1164 CFG_INI_UINT("dp_tx_desc_limit_0", \ 1165 WLAN_CFG_TX_DESC_LIMIT_0_MIN, \ 1166 WLAN_CFG_TX_DESC_LIMIT_0_MAX, \ 1167 WLAN_CFG_TX_DESC_LIMIT_0, \ 1168 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0") 1169 1170 #define CFG_DP_TX_DESC_LIMIT_1 \ 1171 CFG_INI_UINT("dp_tx_desc_limit_1", \ 1172 WLAN_CFG_TX_DESC_LIMIT_1_MIN, \ 1173 WLAN_CFG_TX_DESC_LIMIT_1_MAX, \ 1174 WLAN_CFG_TX_DESC_LIMIT_1, \ 1175 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1") 1176 1177 #define CFG_DP_TX_DESC_LIMIT_2 \ 1178 CFG_INI_UINT("dp_tx_desc_limit_2", \ 1179 WLAN_CFG_TX_DESC_LIMIT_2_MIN, \ 1180 WLAN_CFG_TX_DESC_LIMIT_2_MAX, \ 1181 WLAN_CFG_TX_DESC_LIMIT_2, \ 1182 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2") 1183 1184 #define CFG_DP_TX_DEVICE_LIMIT \ 1185 CFG_INI_UINT("dp_tx_device_limit", \ 1186 WLAN_CFG_TX_DEVICE_LIMIT_MIN, \ 1187 WLAN_CFG_TX_DEVICE_LIMIT_MAX, \ 1188 WLAN_CFG_TX_DEVICE_LIMIT, \ 1189 CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit") 1190 1191 #define CFG_DP_TX_SPL_DEVICE_LIMIT \ 1192 CFG_INI_UINT("dp_tx_spl_device_limit", \ 1193 WLAN_CFG_TX_SPL_DEVICE_LIMIT_MIN, \ 1194 WLAN_CFG_TX_SPL_DEVICE_LIMIT_MAX, \ 1195 WLAN_CFG_TX_SPL_DEVICE_LIMIT, \ 1196 CFG_VALUE_OR_DEFAULT, "DP TX Special DEVICE limit") 1197 1198 #define CFG_DP_TX_SW_INTERNODE_QUEUE \ 1199 CFG_INI_UINT("dp_tx_sw_internode_queue", \ 1200 WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \ 1201 WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \ 1202 WLAN_CFG_TX_SW_INTERNODE_QUEUE, \ 1203 CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue") 1204 1205 #define CFG_DP_TX_DESC_GLOBAL_COUNT \ 1206 CFG_INI_UINT("dp_tx_desc_global", \ 1207 WLAN_CFG_TX_DESC_GLOBAL_COUNT_MIN, \ 1208 WLAN_CFG_TX_DESC_GLOBAL_COUNT_MAX, \ 1209 WLAN_CFG_TX_DESC_GLOBAL_COUNT, \ 1210 CFG_VALUE_OR_DEFAULT, "DP Global TX descriptor count") 1211 1212 #define CFG_DP_SPCL_TX_DESC_GLOBAL_COUNT \ 1213 CFG_INI_UINT("dp_spcl_tx_desc_global", \ 1214 WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MIN, \ 1215 WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MAX, \ 1216 WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT, \ 1217 CFG_VALUE_OR_DEFAULT, "DP Global special TX descriptor count") 1218 1219 #define CFG_DP_RXDMA_MONITOR_BUF_RING \ 1220 CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \ 1221 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \ 1222 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \ 1223 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \ 1224 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring") 1225 1226 #define CFG_DP_TX_MONITOR_BUF_RING \ 1227 CFG_INI_UINT("dp_tx_monitor_buf_ring", \ 1228 WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN, \ 1229 WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX, \ 1230 WLAN_CFG_TX_MONITOR_BUF_RING_SIZE, \ 1231 CFG_VALUE_OR_DEFAULT, "DP TX monitor buffer ring") 1232 1233 #define CFG_DP_RXDMA_MONITOR_DST_RING \ 1234 CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \ 1235 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \ 1236 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \ 1237 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \ 1238 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 1239 1240 #define CFG_DP_TX_MONITOR_DST_RING \ 1241 CFG_INI_UINT("dp_tx_monitor_dst_ring", \ 1242 WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN, \ 1243 WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX, \ 1244 WLAN_CFG_TX_MONITOR_DST_RING_SIZE, \ 1245 CFG_VALUE_OR_DEFAULT, "DP TX monitor destination ring") 1246 1247 #define CFG_DP_RXDMA_MONITOR_STATUS_RING \ 1248 CFG_INI_UINT("dp_rxdma_monitor_status_ring", \ 1249 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \ 1250 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \ 1251 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \ 1252 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring") 1253 1254 #define CFG_DP_RXDMA_MONITOR_DESC_RING \ 1255 CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \ 1256 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \ 1257 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \ 1258 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \ 1259 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 1260 1261 #define CFG_DP_RXDMA_ERR_DST_RING \ 1262 CFG_INI_UINT("dp_rxdma_err_dst_ring", \ 1263 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \ 1264 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \ 1265 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \ 1266 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring") 1267 1268 #define CFG_DP_PER_PKT_LOGGING \ 1269 CFG_INI_UINT("enable_verbose_debug", \ 1270 0, 0xffff, 0, \ 1271 CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging") 1272 1273 #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \ 1274 CFG_INI_UINT("TxFlowStartQueueOffset", \ 1275 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \ 1276 CFG_VALUE_OR_DEFAULT, "Start queue offset") 1277 1278 #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \ 1279 CFG_INI_UINT("TxFlowStopQueueThreshold", \ 1280 0, 50, 15, \ 1281 CFG_VALUE_OR_DEFAULT, "Stop queue Threshold") 1282 1283 #define CFG_DP_IPA_UC_TX_BUF_SIZE \ 1284 CFG_INI_UINT("IpaUcTxBufSize", \ 1285 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \ 1286 CFG_VALUE_OR_DEFAULT, "IPA tx buffer size") 1287 1288 #define CFG_DP_IPA_UC_TX_PARTITION_BASE \ 1289 CFG_INI_UINT("IpaUcTxPartitionBase", \ 1290 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \ 1291 CFG_VALUE_OR_DEFAULT, "IPA tx partition base") 1292 1293 #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \ 1294 CFG_INI_UINT("IpaUcRxIndRingCount", \ 1295 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \ 1296 CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count") 1297 1298 #define CFG_DP_AP_STA_SECURITY_SEPERATION \ 1299 CFG_INI_BOOL("gDisableIntraBssFwd", \ 1300 false, "Disable intrs BSS Rx packets") 1301 1302 #define CFG_DP_ENABLE_DATA_STALL_DETECTION \ 1303 CFG_INI_UINT("gEnableDataStallDetection", \ 1304 0, 0xFFFFFFFF, 0x1, \ 1305 CFG_VALUE_OR_DEFAULT, "Enable/Disable Data stall detection") 1306 1307 #define CFG_DP_RX_SW_DESC_WEIGHT \ 1308 CFG_INI_UINT("dp_rx_sw_desc_weight", \ 1309 WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \ 1310 WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \ 1311 WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \ 1312 CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight") 1313 1314 #define CFG_DP_RX_SW_DESC_NUM \ 1315 CFG_INI_UINT("dp_rx_sw_desc_num", \ 1316 WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \ 1317 WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \ 1318 WLAN_CFG_RX_SW_DESC_NUM_SIZE, \ 1319 CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num") 1320 1321 #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \ 1322 CFG_INI_UINT("dp_rx_flow_search_table_size", \ 1323 WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \ 1324 WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \ 1325 WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \ 1326 CFG_VALUE_OR_DEFAULT, \ 1327 "DP Rx Flow Search Table Size in number of entries") 1328 1329 #define CFG_DP_RX_FLOW_TAG_ENABLE \ 1330 CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \ 1331 "Enable/Disable DP Rx Flow Tag") 1332 1333 #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \ 1334 CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \ 1335 "DP Rx Flow Search Table Is Per PDev") 1336 1337 #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \ 1338 CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \ 1339 "Enable/Disable Rx Protocol & Flow tags in Monitor mode") 1340 1341 #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \ 1342 CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \ 1343 "Enable/Disable tx Per Pkt vdev id check") 1344 1345 #define CFG_DP_HANDLE_INVALID_DECAP_TYPE_DISABLE \ 1346 CFG_INI_BOOL("dp_handle_invalid_decap_type_disable", false, \ 1347 "Enable/Disable DP TLV out of order WAR") 1348 1349 #define CFG_DP_TXMON_SW_PEER_FILTERING \ 1350 CFG_INI_BOOL("tx_litemon_sw_peer_filtering", false, \ 1351 "Enable SW based tx monitor peer fitlering") 1352 1353 /* 1354 * <ini> 1355 * dp_rx_fisa_enable - Control Rx datapath FISA 1356 * @Min: 0 1357 * @Max: 1 1358 * @Default: 1 1359 * 1360 * This ini is used to enable DP Rx FISA feature 1361 * 1362 * Related: dp_rx_flow_search_table_size 1363 * 1364 * Supported Feature: STA,P2P and SAP IPA disabled terminating 1365 * 1366 * Usage: Internal 1367 * 1368 * </ini> 1369 */ 1370 #define CFG_DP_RX_FISA_ENABLE \ 1371 CFG_INI_BOOL("dp_rx_fisa_enable", true, \ 1372 "Enable/Disable DP Rx FISA") 1373 1374 /* 1375 * <ini> 1376 * dp_rx_fisa_lru_del_enable - Control Rx datapath FISA 1377 * @Min: 0 1378 * @Max: 1 1379 * @Default: 1 1380 * 1381 * This ini is used to enable DP Rx FISA lru deletion feature 1382 * 1383 * Related: dp_rx_fisa_enable 1384 * 1385 * Supported Feature: STA,P2P and SAP IPA disabled terminating 1386 * 1387 * Usage: Internal 1388 * 1389 * </ini> 1390 */ 1391 #define CFG_DP_RX_FISA_LRU_DEL_ENABLE \ 1392 CFG_INI_BOOL("dp_rx_fisa_lru_del_enable", true, \ 1393 "Enable/Disable DP Rx FISA LRU deletion") 1394 1395 #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \ 1396 CFG_INI_UINT("mon_drop_thresh", \ 1397 WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \ 1398 WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \ 1399 WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \ 1400 CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop threshold") 1401 1402 #define CFG_DP_PKTLOG_BUFFER_SIZE \ 1403 CFG_INI_UINT("PktlogBufSize", \ 1404 WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \ 1405 WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \ 1406 WLAN_CFG_PKTLOG_BUFFER_SIZE, \ 1407 CFG_VALUE_OR_DEFAULT, "Packet Log buffer size") 1408 1409 #define CFG_DP_FULL_MON_MODE \ 1410 CFG_INI_BOOL("full_mon_mode", \ 1411 false, "Full Monitor mode support") 1412 1413 #define CFG_DP_REO_RINGS_MAP \ 1414 CFG_INI_UINT("dp_reo_rings_map", \ 1415 WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \ 1416 WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \ 1417 WLAN_CFG_NUM_REO_RINGS_MAP, \ 1418 CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping") 1419 1420 #define CFG_DP_RX_RADIO_0_DEFAULT_REO \ 1421 CFG_INI_UINT("dp_rx_radio0_default_reo", \ 1422 WLAN_CFG_RADIO_DEFAULT_REO_MIN, \ 1423 WLAN_CFG_RADIO_DEFAULT_REO_MAX, \ 1424 WLAN_CFG_RADIO_0_DEFAULT_REO, \ 1425 CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping") 1426 1427 #define CFG_DP_RX_RADIO_1_DEFAULT_REO \ 1428 CFG_INI_UINT("dp_rx_radio1_default_reo", \ 1429 WLAN_CFG_RADIO_DEFAULT_REO_MIN, \ 1430 WLAN_CFG_RADIO_DEFAULT_REO_MAX, \ 1431 WLAN_CFG_RADIO_1_DEFAULT_REO, \ 1432 CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping") 1433 1434 #define CFG_DP_RX_RADIO_2_DEFAULT_REO \ 1435 CFG_INI_UINT("dp_rx_radio2_default_reo", \ 1436 WLAN_CFG_RADIO_DEFAULT_REO_MIN, \ 1437 WLAN_CFG_RADIO_DEFAULT_REO_MAX, \ 1438 WLAN_CFG_RADIO_2_DEFAULT_REO, \ 1439 CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping") 1440 1441 #define CFG_DP_PEER_EXT_STATS \ 1442 CFG_INI_BOOL("peer_ext_stats", \ 1443 false, "Peer extended stats") 1444 1445 #define CFG_DP_PEER_JITTER_STATS \ 1446 CFG_INI_BOOL("peer_jitter_stats", \ 1447 false, "Peer Jitter stats") 1448 1449 #define CFG_DP_NAPI_SCALE_FACTOR \ 1450 CFG_INI_UINT("dp_napi_scale_factor", \ 1451 WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN, \ 1452 WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX, \ 1453 WLAN_CFG_DP_NAPI_SCALE_FACTOR, \ 1454 CFG_VALUE_OR_DEFAULT, "NAPI scale factor for DP") 1455 1456 /* 1457 * <ini> 1458 * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes 1459 * @Min: 0 1460 * @Max: 1 1461 * @Default: Default value indicating if checksum should be disabled for 1462 * legacy WLAN modes 1463 * 1464 * This ini is used to disable HW checksum offload capability for legacy 1465 * connections 1466 * 1467 * Related: gEnableIpTcpUdpChecksumOffload should be enabled 1468 * 1469 * Usage: Internal 1470 * 1471 * </ini> 1472 */ 1473 #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1474 #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1 1475 #endif 1476 1477 #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \ 1478 CFG_INI_BOOL("legacy_mode_csum_disable", \ 1479 DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \ 1480 "Enable/Disable legacy mode checksum") 1481 1482 #define CFG_DP_RX_BUFF_POOL_ENABLE \ 1483 CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \ 1484 "Enable/Disable DP RX emergency buffer pool support") 1485 1486 #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \ 1487 CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \ 1488 "Enable/Disable DP RX refill buffer pool support") 1489 1490 #define CFG_DP_POLL_MODE_ENABLE \ 1491 CFG_INI_BOOL("dp_poll_mode_enable", false, \ 1492 "Enable/Disable Polling mode for data path") 1493 1494 #define CFG_DP_RX_FST_IN_CMEM \ 1495 CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \ 1496 "Enable/Disable flow search table in CMEM") 1497 /* 1498 * <ini> 1499 * gEnableSWLM - Control DP Software latency manager 1500 * @Min: 0 1501 * @Max: 1 1502 * @Default: 0 1503 * 1504 * This ini is used to enable DP Software latency Manager 1505 * 1506 * Supported Feature: STA,P2P and SAP IPA disabled terminating 1507 * 1508 * Usage: Internal 1509 * 1510 * </ini> 1511 */ 1512 #define CFG_DP_SWLM_ENABLE \ 1513 CFG_INI_BOOL("gEnableSWLM", false, \ 1514 "Enable/Disable DP SWLM") 1515 /* 1516 * <ini> 1517 * wow_check_rx_pending_enable - control to check RX frames pending in Wow 1518 * @Min: 0 1519 * @Max: 1 1520 * @Default: 0 1521 * 1522 * This ini is used to control DP Software to perform RX pending check 1523 * before entering WoW mode 1524 * 1525 * Usage: Internal 1526 * 1527 * </ini> 1528 */ 1529 #define CFG_DP_WOW_CHECK_RX_PENDING \ 1530 CFG_INI_BOOL("wow_check_rx_pending_enable", \ 1531 false, \ 1532 "enable rx frame pending check in WoW mode") 1533 #define CFG_DP_DELAY_MON_REPLENISH \ 1534 CFG_INI_BOOL("delay_mon_replenish", \ 1535 true, "Delay Monitor Replenish") 1536 1537 #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT 1538 #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN 500 1539 #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX 2000 1540 #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER 500 1541 1542 #define CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG \ 1543 CFG_INI_BOOL("vdev_stats_hw_offload_config", \ 1544 false, "Offload vdev stats to HW") 1545 #define CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER \ 1546 CFG_INI_UINT("vdev_stats_hw_offload_timer", \ 1547 WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN, \ 1548 WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX, \ 1549 WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER, \ 1550 CFG_VALUE_OR_DEFAULT, \ 1551 "vdev stats hw offload timer duration") 1552 #define CFG_DP_VDEV_STATS_HW_OFFLOAD \ 1553 CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG) \ 1554 CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER) 1555 #else 1556 #define CFG_DP_VDEV_STATS_HW_OFFLOAD 1557 #endif 1558 1559 /* 1560 * <ini> 1561 * ghw_cc_enable - enable HW cookie conversion by register 1562 * @Min: 0 1563 * @Max: 1 1564 * @Default: 1 1565 * 1566 * This ini is used to control HW based 20 bits cookie to 64 bits 1567 * Desc virtual address conversion 1568 * 1569 * Usage: Internal 1570 * 1571 * </ini> 1572 */ 1573 #define CFG_DP_HW_CC_ENABLE \ 1574 CFG_INI_BOOL("ghw_cc_enable", \ 1575 true, "Enable/Disable HW cookie conversion") 1576 1577 #ifdef IPA_OFFLOAD 1578 /* 1579 * <ini> 1580 * dp_ipa_tx_ring_size - Set tcl ring size for IPA 1581 * @Min: 1024 1582 * @Max: 8096 1583 * @Default: 1024 1584 * 1585 * This ini sets the tcl ring size for IPA 1586 * 1587 * Related: N/A 1588 * 1589 * Supported Feature: IPA 1590 * 1591 * Usage: Internal 1592 * 1593 * </ini> 1594 */ 1595 #define CFG_DP_IPA_TX_RING_SIZE \ 1596 CFG_INI_UINT("dp_ipa_tx_ring_size", \ 1597 WLAN_CFG_IPA_TX_RING_SIZE_MIN, \ 1598 WLAN_CFG_IPA_TX_RING_SIZE_MAX, \ 1599 WLAN_CFG_IPA_TX_RING_SIZE, \ 1600 CFG_VALUE_OR_DEFAULT, "IPA TCL ring size") 1601 1602 /* 1603 * <ini> 1604 * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA 1605 * @Min: 1024 1606 * @Max: 8096 1607 * @Default: 1024 1608 * 1609 * This ini sets the tx comp ring size for IPA 1610 * 1611 * Related: N/A 1612 * 1613 * Supported Feature: IPA 1614 * 1615 * Usage: Internal 1616 * 1617 * </ini> 1618 */ 1619 #define CFG_DP_IPA_TX_COMP_RING_SIZE \ 1620 CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \ 1621 WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \ 1622 WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \ 1623 WLAN_CFG_IPA_TX_COMP_RING_SIZE, \ 1624 CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size") 1625 1626 #ifdef IPA_WDI3_TX_TWO_PIPES 1627 /* 1628 * <ini> 1629 * dp_ipa_tx_alt_ring_size - Set alt tcl ring size for IPA 1630 * @Min: 1024 1631 * @Max: 8096 1632 * @Default: 1024 1633 * 1634 * This ini sets the alt tcl ring size for IPA 1635 * 1636 * Related: N/A 1637 * 1638 * Supported Feature: IPA 1639 * 1640 * Usage: Internal 1641 * 1642 * </ini> 1643 */ 1644 #define CFG_DP_IPA_TX_ALT_RING_SIZE \ 1645 CFG_INI_UINT("dp_ipa_tx_alt_ring_size", \ 1646 WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN, \ 1647 WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX, \ 1648 WLAN_CFG_IPA_TX_ALT_RING_SIZE, \ 1649 CFG_VALUE_OR_DEFAULT, \ 1650 "DP IPA TX Alternative Ring Size") 1651 1652 /* 1653 * <ini> 1654 * dp_ipa_tx_alt_comp_ring_size - Set tx alt comp ring size for IPA 1655 * @Min: 1024 1656 * @Max: 8096 1657 * @Default: 1024 1658 * 1659 * This ini sets the tx alt comp ring size for IPA 1660 * 1661 * Related: N/A 1662 * 1663 * Supported Feature: IPA 1664 * 1665 * Usage: Internal 1666 * 1667 * </ini> 1668 */ 1669 #define CFG_DP_IPA_TX_ALT_COMP_RING_SIZE \ 1670 CFG_INI_UINT("dp_ipa_tx_alt_comp_ring_size", \ 1671 WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN, \ 1672 WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX, \ 1673 WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE, \ 1674 CFG_VALUE_OR_DEFAULT, \ 1675 "DP IPA TX Alternative Completion Ring Size") 1676 1677 #define CFG_DP_IPA_TX_ALT_RING_CFG \ 1678 CFG(CFG_DP_IPA_TX_ALT_RING_SIZE) \ 1679 CFG(CFG_DP_IPA_TX_ALT_COMP_RING_SIZE) 1680 1681 #else 1682 #define CFG_DP_IPA_TX_ALT_RING_CFG 1683 #endif 1684 1685 #define CFG_DP_IPA_TX_RING_CFG \ 1686 CFG(CFG_DP_IPA_TX_RING_SIZE) \ 1687 CFG(CFG_DP_IPA_TX_COMP_RING_SIZE) 1688 #else 1689 #define CFG_DP_IPA_TX_RING_CFG 1690 #define CFG_DP_IPA_TX_ALT_RING_CFG 1691 #endif 1692 1693 #ifdef WLAN_SUPPORT_PPEDS 1694 #define WLAN_CFG_NUM_PPEDS_TX_DESC_MIN 16 1695 #define WLAN_CFG_NUM_PPEDS_TX_DESC_MAX 0x8000 1696 #define WLAN_CFG_NUM_PPEDS_TX_DESC 0x8000 1697 1698 #define WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MIN 8 1699 #define WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MAX 256 1700 #define WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI 64 1701 1702 #define CFG_DP_PPEDS_TX_DESC \ 1703 CFG_INI_UINT("dp_ppeds_tx_desc", \ 1704 WLAN_CFG_NUM_PPEDS_TX_DESC_MIN, \ 1705 WLAN_CFG_NUM_PPEDS_TX_DESC_MAX, \ 1706 WLAN_CFG_NUM_PPEDS_TX_DESC, \ 1707 CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Descriptors") 1708 1709 #define CFG_DP_PPEDS_TX_CMP_NAPI_BUDGET \ 1710 CFG_INI_UINT("dp_ppeds_tx_cmp_napi_budget", \ 1711 WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MIN, \ 1712 WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MAX, \ 1713 WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI, \ 1714 CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Comp handler napi budget") 1715 1716 #define CFG_DP_PPEDS_ENABLE \ 1717 CFG_INI_BOOL("ppe_ds_enable", true, \ 1718 "DP ppe enable flag") 1719 1720 #define CFG_DP_REO2PPE_RING \ 1721 CFG_INI_UINT("dp_reo2ppe_ring", \ 1722 WLAN_CFG_REO2PPE_RING_SIZE_MIN, \ 1723 WLAN_CFG_REO2PPE_RING_SIZE_MAX, \ 1724 WLAN_CFG_REO2PPE_RING_SIZE, \ 1725 CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring") 1726 1727 #define CFG_DP_PPE2TCL_RING \ 1728 CFG_INI_UINT("dp_ppe2tcl_ring", \ 1729 WLAN_CFG_PPE2TCL_RING_SIZE_MIN, \ 1730 WLAN_CFG_PPE2TCL_RING_SIZE_MAX, \ 1731 WLAN_CFG_PPE2TCL_RING_SIZE, \ 1732 CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings") 1733 1734 #define CFG_DP_PPEDS_CONFIG \ 1735 CFG(CFG_DP_PPEDS_TX_CMP_NAPI_BUDGET) \ 1736 CFG(CFG_DP_PPEDS_TX_DESC) \ 1737 CFG(CFG_DP_PPEDS_ENABLE) \ 1738 CFG(CFG_DP_REO2PPE_RING) \ 1739 CFG(CFG_DP_PPE2TCL_RING) 1740 #else 1741 #define CFG_DP_PPEDS_CONFIG 1742 #define WLAN_CFG_NUM_PPEDS_TX_DESC_MAX 0 1743 #endif 1744 1745 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) 1746 /* 1747 * <ini> 1748 * dp_chip0_rx_ring_map - Set Rx ring map for CHIP 0 1749 * @Min: 0x0 1750 * @Max: 0xFF 1751 * @Default: 0xF 1752 * 1753 * This ini sets Rx ring map for CHIP 0 1754 * 1755 * Usage: Internal 1756 * 1757 * </ini> 1758 */ 1759 #define CFG_DP_MLO_RX_RING_MAP \ 1760 CFG_INI_UINT("dp_mlo_reo_rings_map", \ 1761 WLAN_CFG_MLO_RX_RING_MAP_MIN, \ 1762 WLAN_CFG_MLO_RX_RING_MAP_MAX, \ 1763 WLAN_CFG_MLO_RX_RING_MAP, \ 1764 CFG_VALUE_OR_DEFAULT, "DP MLO Rx ring map") 1765 1766 1767 #define CFG_DP_MLO_CONFIG \ 1768 CFG(CFG_DP_MLO_RX_RING_MAP) 1769 #else 1770 #define CFG_DP_MLO_CONFIG 1771 #endif 1772 1773 /* 1774 * <ini> 1775 * dp_mpdu_retry_threshold_1 - threshold to increment mpdu success with retries 1776 * @Min: 0 1777 * @Max: 255 1778 * @Default: 0 1779 * 1780 * This ini entry is used to set first threshold to increment the value of 1781 * mpdu_success_with_retries 1782 * 1783 * Usage: Internal 1784 * 1785 * </ini> 1786 */ 1787 #define CFG_DP_MPDU_RETRY_THRESHOLD_1 \ 1788 CFG_INI_UINT("dp_mpdu_retry_threshold_1", \ 1789 CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \ 1790 CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \ 1791 CFG_DP_MPDU_RETRY_THRESHOLD, \ 1792 CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 1") 1793 1794 /* 1795 * <ini> 1796 * dp_mpdu_retry_threshold_2 - threshold to increment mpdu success with retries 1797 * @Min: 0 1798 * @Max: 255 1799 * @Default: 0 1800 * 1801 * This ini entry is used to set second threshold to increment the value of 1802 * mpdu_success_with_retries 1803 * 1804 * Usage: Internal 1805 * 1806 * </ini> 1807 */ 1808 #define CFG_DP_MPDU_RETRY_THRESHOLD_2 \ 1809 CFG_INI_UINT("dp_mpdu_retry_threshold_2", \ 1810 CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \ 1811 CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \ 1812 CFG_DP_MPDU_RETRY_THRESHOLD, \ 1813 CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 2") 1814 1815 #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES 1816 /* Macro enabling support marking of notify frames by host */ 1817 #define DP_MARK_NOTIFY_FRAME_SUPPORT 1 1818 #else 1819 #define DP_MARK_NOTIFY_FRAME_SUPPORT 0 1820 #endif /* QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES */ 1821 1822 /* 1823 * <ini> 1824 * Host DP AST entries database - Enable/Disable 1825 * 1826 * @Default: 0 1827 * 1828 * This ini enables/disables AST entries database on host 1829 * 1830 * Usage: Internal 1831 * 1832 * </ini> 1833 */ 1834 #define CFG_DP_HOST_AST_DB_ENABLE \ 1835 CFG_INI_BOOL("host_ast_db_enable", false, \ 1836 "Host AST entries database Enable/Disable") 1837 1838 #ifdef DP_TX_PACKET_INSPECT_FOR_ILP 1839 /* 1840 * <ini> 1841 * TX packet inspect for ILP - Enable/Disable 1842 * 1843 * @Default: true 1844 * 1845 * This ini enable/disables TX packet inspection for ILP feature 1846 * 1847 * Usage: Internal 1848 * 1849 * </ini> 1850 */ 1851 #define CFG_TX_PKT_INSPECT_FOR_ILP \ 1852 CFG_INI_BOOL("tx_pkt_inspect_for_ilp", true, \ 1853 "TX packet inspect for ILP") 1854 #define CFG_TX_PKT_INSPECT_FOR_ILP_CFG CFG(CFG_TX_PKT_INSPECT_FOR_ILP) 1855 #else 1856 #define CFG_TX_PKT_INSPECT_FOR_ILP_CFG 1857 #endif 1858 1859 #define CFG_DP \ 1860 CFG(CFG_DP_HTT_PACKET_TYPE) \ 1861 CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \ 1862 CFG(CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL) \ 1863 CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \ 1864 CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \ 1865 CFG(CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL) \ 1866 CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \ 1867 CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \ 1868 CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \ 1869 CFG(CFG_DP_MAX_ALLOC_SIZE) \ 1870 CFG(CFG_DP_MAX_CLIENTS) \ 1871 CFG(CFG_DP_MAX_PEER_ID) \ 1872 CFG(CFG_DP_REO_DEST_RINGS) \ 1873 CFG(CFG_DP_TX_COMP_RINGS) \ 1874 CFG(CFG_DP_TCL_DATA_RINGS) \ 1875 CFG(CFG_DP_NSS_REO_DEST_RINGS) \ 1876 CFG(CFG_DP_NSS_TCL_DATA_RINGS) \ 1877 CFG(CFG_DP_TX_DESC) \ 1878 CFG(CFG_DP_TX_SPL_DESC) \ 1879 CFG(CFG_DP_TX_EXT_DESC) \ 1880 CFG(CFG_DP_TX_EXT_DESC_POOLS) \ 1881 CFG(CFG_DP_PDEV_RX_RING) \ 1882 CFG(CFG_DP_PDEV_TX_RING) \ 1883 CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \ 1884 CFG(CFG_DP_TX_COMPL_RING_SIZE) \ 1885 CFG(CFG_DP_TX_RING_SIZE) \ 1886 CFG(CFG_DP_NSS_COMP_RING_SIZE) \ 1887 CFG(CFG_DP_PDEV_LMAC_RING) \ 1888 CFG(CFG_DP_TIME_CONTROL_BP) \ 1889 CFG(CFG_DP_BASE_HW_MAC_ID) \ 1890 CFG(CFG_DP_RX_HASH) \ 1891 CFG(CFG_DP_TSO) \ 1892 CFG(CFG_DP_LRO) \ 1893 CFG(CFG_DP_SG) \ 1894 CFG(CFG_DP_GRO) \ 1895 CFG(CFG_DP_TC_INGRESS_PRIO) \ 1896 CFG(CFG_DP_OL_TX_CSUM) \ 1897 CFG(CFG_DP_OL_RX_CSUM) \ 1898 CFG(CFG_DP_RAWMODE) \ 1899 CFG(CFG_DP_PEER_FLOW_CTRL) \ 1900 CFG(CFG_DP_NAPI) \ 1901 CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \ 1902 CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \ 1903 CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \ 1904 CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \ 1905 CFG(CFG_DP_WBM_RELEASE_RING) \ 1906 CFG(CFG_DP_TCL_CMD_CREDIT_RING) \ 1907 CFG(CFG_DP_TCL_STATUS_RING) \ 1908 CFG(CFG_DP_REO_REINJECT_RING) \ 1909 CFG(CFG_DP_RX_RELEASE_RING) \ 1910 CFG(CFG_DP_REO_EXCEPTION_RING) \ 1911 CFG(CFG_DP_RX_DESTINATION_RING) \ 1912 CFG(CFG_DP_REO_CMD_RING) \ 1913 CFG(CFG_DP_REO_STATUS_RING) \ 1914 CFG(CFG_DP_RXDMA_BUF_RING) \ 1915 CFG(CFG_DP_RXDMA_REFILL_RING) \ 1916 CFG(CFG_DP_RXDMA_REFILL_LT_DISABLE) \ 1917 CFG(CFG_DP_TX_DESC_LIMIT_0) \ 1918 CFG(CFG_DP_TX_DESC_LIMIT_1) \ 1919 CFG(CFG_DP_TX_DESC_LIMIT_2) \ 1920 CFG(CFG_DP_TX_DEVICE_LIMIT) \ 1921 CFG(CFG_DP_TX_SPL_DEVICE_LIMIT) \ 1922 CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \ 1923 CFG(CFG_DP_TX_DESC_GLOBAL_COUNT) \ 1924 CFG(CFG_DP_SPCL_TX_DESC_GLOBAL_COUNT) \ 1925 CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \ 1926 CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \ 1927 CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \ 1928 CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \ 1929 CFG(CFG_DP_RXDMA_ERR_DST_RING) \ 1930 CFG(CFG_DP_PER_PKT_LOGGING) \ 1931 CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \ 1932 CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \ 1933 CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \ 1934 CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \ 1935 CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \ 1936 CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \ 1937 CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \ 1938 CFG(CFG_DP_RX_SW_DESC_WEIGHT) \ 1939 CFG(CFG_DP_RX_SW_DESC_NUM) \ 1940 CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \ 1941 CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \ 1942 CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \ 1943 CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \ 1944 CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \ 1945 CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \ 1946 CFG(CFG_DP_RX_FISA_ENABLE) \ 1947 CFG(CFG_DP_RX_FISA_LRU_DEL_ENABLE) \ 1948 CFG(CFG_DP_FULL_MON_MODE) \ 1949 CFG(CFG_DP_REO_RINGS_MAP) \ 1950 CFG(CFG_DP_PEER_EXT_STATS) \ 1951 CFG(CFG_DP_PEER_JITTER_STATS) \ 1952 CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \ 1953 CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \ 1954 CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \ 1955 CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \ 1956 CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \ 1957 CFG(CFG_DP_POLL_MODE_ENABLE) \ 1958 CFG(CFG_DP_SWLM_ENABLE) \ 1959 CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \ 1960 CFG(CFG_DP_RX_FST_IN_CMEM) \ 1961 CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \ 1962 CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \ 1963 CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \ 1964 CFG(CFG_DP_WOW_CHECK_RX_PENDING) \ 1965 CFG(CFG_DP_HW_CC_ENABLE) \ 1966 CFG(CFG_DP_DELAY_MON_REPLENISH) \ 1967 CFG(CFG_DP_TX_MONITOR_BUF_RING) \ 1968 CFG(CFG_DP_TX_MONITOR_DST_RING) \ 1969 CFG(CFG_DP_MPDU_RETRY_THRESHOLD_1) \ 1970 CFG(CFG_DP_MPDU_RETRY_THRESHOLD_2) \ 1971 CFG_DP_IPA_TX_RING_CFG \ 1972 CFG_DP_PPEDS_CONFIG \ 1973 CFG_DP_IPA_TX_ALT_RING_CFG \ 1974 CFG_DP_MLO_CONFIG \ 1975 CFG_DP_INI_SECTION_PARAMS \ 1976 CFG_DP_VDEV_STATS_HW_OFFLOAD \ 1977 CFG(CFG_DP_TX_CAPT_MAX_MEM_MB) \ 1978 CFG(CFG_DP_NAPI_SCALE_FACTOR) \ 1979 CFG(CFG_DP_HOST_AST_DB_ENABLE) \ 1980 CFG_DP_SAWF_STATS_CONFIG \ 1981 CFG(CFG_DP_HANDLE_INVALID_DECAP_TYPE_DISABLE) \ 1982 CFG(CFG_DP_TXMON_SW_PEER_FILTERING) \ 1983 CFG_TX_PKT_INSPECT_FOR_ILP_CFG 1984 #endif /* _CFG_DP_H_ */ 1985