1 /* 2 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /** 21 * DOC: This file contains definitions of Data Path configuration. 22 */ 23 24 #ifndef _CFG_DP_H_ 25 #define _CFG_DP_H_ 26 27 #include "cfg_define.h" 28 #include "wlan_init_cfg.h" 29 30 #define WLAN_CFG_MAX_CLIENTS 64 31 #define WLAN_CFG_MAX_CLIENTS_MIN 8 32 #define WLAN_CFG_MAX_CLIENTS_MAX 64 33 34 /* Change this to a lower value to enforce scattered idle list mode */ 35 #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000 36 #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000 37 #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000 38 39 #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \ 40 defined(QCA_LL_PDEV_TX_FLOW_CONTROL) 41 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10 42 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15 43 #else 44 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0 45 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0 46 #endif 47 48 #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0 49 #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1 50 51 #ifdef IPA_OFFLOAD 52 /* Size of TCL TX Ring */ 53 #if defined(TX_TO_NPEERS_INC_TX_DESCS) 54 #define WLAN_CFG_TX_RING_SIZE 2048 55 #else 56 #define WLAN_CFG_TX_RING_SIZE 1024 57 #endif 58 59 #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 1024 60 #define WLAN_CFG_IPA_TX_RING_SIZE 1024 61 #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 8096 62 63 #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 1024 64 #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024 65 #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 8096 66 67 #ifdef IPA_WDI3_TX_TWO_PIPES 68 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 1024 69 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE 1024 70 #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX 8096 71 72 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 1024 73 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE 1024 74 #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX 8096 75 #endif 76 77 #define WLAN_CFG_PER_PDEV_TX_RING 0 78 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048 79 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000 80 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024 81 #else 82 #define WLAN_CFG_TX_RING_SIZE 512 83 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) 84 #define WLAN_CFG_PER_PDEV_TX_RING 1 85 #else 86 #define WLAN_CFG_PER_PDEV_TX_RING 0 87 #endif 88 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0 89 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0 90 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0 91 #endif /* IPA_OFFLOAD */ 92 93 #define WLAN_CFG_TIME_CONTROL_BP 3000 94 95 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) 96 #define WLAN_CFG_PER_PDEV_RX_RING 0 97 #define WLAN_CFG_PER_PDEV_LMAC_RING 0 98 #define WLAN_LRO_ENABLE 0 99 #ifdef QCA_WIFI_QCA6750 100 #define WLAN_CFG_MAC_PER_TARGET 1 101 #else 102 #define WLAN_CFG_MAC_PER_TARGET 2 103 #endif 104 105 #if defined(TX_TO_NPEERS_INC_TX_DESCS) 106 #define WLAN_CFG_TX_COMP_RING_SIZE 4096 107 108 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 109 #define WLAN_CFG_NUM_TX_DESC 4096 110 #define WLAN_CFG_NUM_TX_EXT_DESC 4096 111 #else 112 #define WLAN_CFG_TX_COMP_RING_SIZE 1024 113 114 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 115 #define WLAN_CFG_NUM_TX_DESC 1024 116 #define WLAN_CFG_NUM_TX_EXT_DESC 1024 117 #endif 118 119 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 120 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1 121 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 122 123 /* Interrupt Mitigation - Timer threshold in us */ 124 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8 125 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8 126 127 #ifdef WLAN_DP_PER_RING_TYPE_CONFIG 128 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \ 129 WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 130 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \ 131 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 132 #else 133 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1 134 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8 135 #endif 136 #endif /* WLAN_MAX_PDEVS */ 137 138 #ifdef NBUF_MEMORY_DEBUG 139 #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF 140 #else 141 #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF 142 #endif 143 144 #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \ 145 WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 146 #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0 147 #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000 148 149 #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \ 150 WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 151 #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100 152 #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000 153 154 #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256 155 #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512 156 #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0 157 158 #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0 159 #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0 160 161 #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0 162 #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1 163 164 #define WLAN_CFG_TX_RING_SIZE_MIN 512 165 #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000 166 167 #define WLAN_CFG_TIME_CONTROL_BP_MIN 3000 168 #define WLAN_CFG_TIME_CONTROL_BP_MAX 1800000 169 170 #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512 171 #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000 172 173 #define WLAN_CFG_NUM_TX_DESC_MIN 16 174 #define WLAN_CFG_NUM_TX_DESC_MAX 0x10000 175 176 #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16 177 #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000 178 179 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1 180 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256 181 182 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0 183 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128 184 185 #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1 186 #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128 187 188 #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1 189 #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128 190 191 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1 192 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1 193 194 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8 195 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000 196 197 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8 198 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500 199 200 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8 201 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000 202 203 #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8 204 #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512 205 206 #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8 207 #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500 208 209 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000 210 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000 211 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000 212 213 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 214 215 /* Per vdev pools */ 216 #define WLAN_CFG_NUM_TX_DESC_POOL 3 217 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 218 219 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */ 220 221 #ifdef TX_PER_PDEV_DESC_POOL 222 #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT 223 #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT 224 225 #else /* TX_PER_PDEV_DESC_POOL */ 226 227 #define WLAN_CFG_NUM_TX_DESC_POOL 3 228 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 229 230 #endif /* TX_PER_PDEV_DESC_POOL */ 231 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 232 233 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1 234 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4 235 236 #define WLAN_CFG_HTT_PKT_TYPE 2 237 #define WLAN_CFG_HTT_PKT_TYPE_MIN 2 238 #define WLAN_CFG_HTT_PKT_TYPE_MAX 2 239 240 #define WLAN_CFG_MAX_PEER_ID 64 241 #define WLAN_CFG_MAX_PEER_ID_MIN 64 242 #define WLAN_CFG_MAX_PEER_ID_MAX 64 243 244 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100 245 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100 246 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100 247 248 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 249 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 1 250 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS 251 252 #define WLAN_CFG_NUM_TX_COMP_RINGS WLAN_CFG_NUM_TCL_DATA_RINGS 253 #define WLAN_CFG_NUM_TX_COMP_RINGS_MIN WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 254 #define WLAN_CFG_NUM_TX_COMP_RINGS_MAX WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 255 256 #if defined(CONFIG_BERYLLIUM) 257 #define WLAN_CFG_NUM_REO_DEST_RING 8 258 #else 259 #define WLAN_CFG_NUM_REO_DEST_RING 4 260 #endif 261 #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4 262 #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS 263 264 #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2 265 #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1 266 #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3 267 268 #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2 269 #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1 270 #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3 271 272 #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024 273 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64 274 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024 275 276 #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 512 277 #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32 278 #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 512 279 280 #define WLAN_CFG_TCL_STATUS_RING_SIZE 32 281 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32 282 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32 283 284 #if defined(QCA_WIFI_QCA6290) 285 #define WLAN_CFG_REO_DST_RING_SIZE 1024 286 #else 287 #define WLAN_CFG_REO_DST_RING_SIZE 2048 288 #endif 289 290 #define WLAN_CFG_REO_DST_RING_SIZE_MIN 8 291 #define WLAN_CFG_REO_DST_RING_SIZE_MAX 8192 292 293 #define WLAN_CFG_REO_REINJECT_RING_SIZE 128 294 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32 295 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128 296 297 #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024 298 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8 299 #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \ 300 defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI) 301 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024 302 #else 303 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 32768 304 #endif 305 306 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256 307 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128 308 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512 309 310 #define WLAN_CFG_REO_CMD_RING_SIZE 128 311 #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64 312 #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128 313 314 #define WLAN_CFG_REO_STATUS_RING_SIZE 256 315 #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128 316 #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048 317 318 #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024 319 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024 320 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 4096 321 322 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096 323 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16 324 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 16384 325 326 #define WLAN_CFG_TX_DESC_LIMIT_0 0 327 #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096 328 #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768 329 330 #define WLAN_CFG_TX_DESC_LIMIT_1 0 331 #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096 332 #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768 333 334 #define WLAN_CFG_TX_DESC_LIMIT_2 0 335 #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096 336 #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768 337 338 #define WLAN_CFG_TX_DEVICE_LIMIT 65536 339 #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384 340 #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536 341 342 #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024 343 #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128 344 #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024 345 346 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096 347 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16 348 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192 349 350 #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE 4096 351 #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN 16 352 #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX 8192 353 354 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048 355 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48 356 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192 357 358 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE 2048 359 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48 360 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 8192 361 362 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024 363 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16 364 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192 365 366 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096 367 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096 368 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384 369 370 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024 371 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024 372 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192 373 374 #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32 375 #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0 376 #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256 377 378 /** 379 * Allocate as many RX descriptors as buffers in the SW2RXDMA 380 * ring. This value may need to be tuned later. 381 */ 382 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) 383 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1 384 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1 385 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1 386 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096 387 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024 388 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384 389 390 /** 391 * For low memory AP cases using 1 will reduce the rx descriptors memory req 392 */ 393 #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG) 394 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1 395 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1 396 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3 397 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096 398 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024 399 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384 400 401 /** 402 * AP use cases need to allocate more RX Descriptors than the number of 403 * entries available in the SW2RXDMA buffer replenish ring. This is to account 404 * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a 405 * multiplication factor of 3, to allocate three times as many RX descriptors 406 * as RX buffers. 407 */ 408 #else 409 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3 410 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1 411 #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3 412 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288 413 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096 414 #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384 415 #endif 416 417 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384 418 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1 419 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384 420 #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128 421 422 #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10 423 #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1 424 #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10 425 426 #ifdef IPA_OFFLOAD 427 #define WLAN_CFG_NUM_REO_RINGS_MAP 0x7 428 #else 429 #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF 430 #endif 431 #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1 432 #if defined(CONFIG_BERYLLIUM) 433 #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xFF 434 #else 435 #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF 436 #endif 437 438 #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1 439 #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2 440 #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3 441 442 #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1 443 #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4 444 445 #define WLAN_CFG_REO2PPE_RING_SIZE 1024 446 #define WLAN_CFG_REO2PPE_RING_SIZE_MIN 64 447 #define WLAN_CFG_REO2PPE_RING_SIZE_MAX 1024 448 449 #define WLAN_CFG_PPE2TCL_RING_SIZE 1024 450 #define WLAN_CFG_PPE2TCL_RING_SIZE_MIN 64 451 #define WLAN_CFG_PPE2TCL_RING_SIZE_MAX 1024 452 453 #define WLAN_CFG_PPE_RELEASE_RING_SIZE 1024 454 #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN 64 455 #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX 1024 456 457 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) 458 #define WLAN_CFG_MLO_RX_RING_MAP 0x7 459 #define WLAN_CFG_MLO_RX_RING_MAP_MIN 0x0 460 #define WLAN_CFG_MLO_RX_RING_MAP_MAX 0xFF 461 #endif 462 463 #define WLAN_CFG_TX_CAPT_MAX_MEM_MIN 0 464 #define WLAN_CFG_TX_CAPT_MAX_MEM_MAX 512 465 #define WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT 0 466 467 #define CFG_DP_MPDU_RETRY_THRESHOLD_MIN 0 468 #define CFG_DP_MPDU_RETRY_THRESHOLD_MAX 255 469 #define CFG_DP_MPDU_RETRY_THRESHOLD 0 470 471 #define WLAN_CFG_DP_NAPI_SCALE_FACTOR 0 472 #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN 0 473 #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX 4 474 475 /* 476 * <ini> 477 * "dp_tx_capt_max_mem_mb"- maximum memory used by Tx capture 478 * @Min: 0 479 * @Max: 512 MB 480 * @Default: 0 (disabled) 481 * 482 * This ini entry is used to set a max limit beyond which frames 483 * are dropped by Tx capture. User needs to set a non-zero value 484 * to enable it. 485 * 486 * Usage: External 487 * 488 * </ini> 489 */ 490 #define CFG_DP_TX_CAPT_MAX_MEM_MB \ 491 CFG_INI_UINT("dp_tx_capt_max_mem_mb", \ 492 WLAN_CFG_TX_CAPT_MAX_MEM_MIN, \ 493 WLAN_CFG_TX_CAPT_MAX_MEM_MAX, \ 494 WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT, \ 495 CFG_VALUE_OR_DEFAULT, "Max Memory (in MB) used by Tx Capture") 496 497 /* DP INI Declarations */ 498 #define CFG_DP_HTT_PACKET_TYPE \ 499 CFG_INI_UINT("dp_htt_packet_type", \ 500 WLAN_CFG_HTT_PKT_TYPE_MIN, \ 501 WLAN_CFG_HTT_PKT_TYPE_MAX, \ 502 WLAN_CFG_HTT_PKT_TYPE, \ 503 CFG_VALUE_OR_DEFAULT, "DP HTT packet type") 504 505 #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \ 506 CFG_INI_UINT("dp_int_batch_threshold_other", \ 507 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \ 508 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \ 509 WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \ 510 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other") 511 512 #define CFG_DP_INT_BATCH_THRESHOLD_RX \ 513 CFG_INI_UINT("dp_int_batch_threshold_rx", \ 514 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \ 515 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \ 516 WLAN_CFG_INT_BATCH_THRESHOLD_RX, \ 517 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx") 518 519 #define CFG_DP_INT_BATCH_THRESHOLD_TX \ 520 CFG_INI_UINT("dp_int_batch_threshold_tx", \ 521 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \ 522 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \ 523 WLAN_CFG_INT_BATCH_THRESHOLD_TX, \ 524 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx") 525 526 #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \ 527 CFG_INI_UINT("dp_int_timer_threshold_other", \ 528 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 529 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 530 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 531 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other") 532 533 #define CFG_DP_INT_TIMER_THRESHOLD_RX \ 534 CFG_INI_UINT("dp_int_timer_threshold_rx", \ 535 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \ 536 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \ 537 WLAN_CFG_INT_TIMER_THRESHOLD_RX, \ 538 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx") 539 540 #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \ 541 CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \ 542 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \ 543 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \ 544 WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \ 545 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring") 546 547 #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \ 548 CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \ 549 WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \ 550 WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \ 551 WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \ 552 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring") 553 554 #define CFG_DP_INT_TIMER_THRESHOLD_TX \ 555 CFG_INI_UINT("dp_int_timer_threshold_tx", \ 556 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \ 557 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \ 558 WLAN_CFG_INT_TIMER_THRESHOLD_TX, \ 559 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx") 560 561 #define CFG_DP_MAX_ALLOC_SIZE \ 562 CFG_INI_UINT("dp_max_alloc_size", \ 563 WLAN_CFG_MAX_ALLOC_SIZE_MIN, \ 564 WLAN_CFG_MAX_ALLOC_SIZE_MAX, \ 565 WLAN_CFG_MAX_ALLOC_SIZE, \ 566 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size") 567 568 #define CFG_DP_MAX_CLIENTS \ 569 CFG_INI_UINT("dp_max_clients", \ 570 WLAN_CFG_MAX_CLIENTS_MIN, \ 571 WLAN_CFG_MAX_CLIENTS_MAX, \ 572 WLAN_CFG_MAX_CLIENTS, \ 573 CFG_VALUE_OR_DEFAULT, "DP Max Clients") 574 575 #define CFG_DP_MAX_PEER_ID \ 576 CFG_INI_UINT("dp_max_peer_id", \ 577 WLAN_CFG_MAX_PEER_ID_MIN, \ 578 WLAN_CFG_MAX_PEER_ID_MAX, \ 579 WLAN_CFG_MAX_PEER_ID, \ 580 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID") 581 582 #define CFG_DP_REO_DEST_RINGS \ 583 CFG_INI_UINT("dp_reo_dest_rings", \ 584 WLAN_CFG_NUM_REO_DEST_RING_MIN, \ 585 WLAN_CFG_NUM_REO_DEST_RING_MAX, \ 586 WLAN_CFG_NUM_REO_DEST_RING, \ 587 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings") 588 589 #define CFG_DP_TX_COMP_RINGS \ 590 CFG_INI_UINT("dp_tx_comp_rings", \ 591 WLAN_CFG_NUM_TX_COMP_RINGS_MIN, \ 592 WLAN_CFG_NUM_TX_COMP_RINGS_MAX, \ 593 WLAN_CFG_NUM_TX_COMP_RINGS, \ 594 CFG_VALUE_OR_DEFAULT, "DP Tx Comp Rings") 595 596 #define CFG_DP_TCL_DATA_RINGS \ 597 CFG_INI_UINT("dp_tcl_data_rings", \ 598 WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \ 599 WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \ 600 WLAN_CFG_NUM_TCL_DATA_RINGS, \ 601 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings") 602 603 #define CFG_DP_NSS_REO_DEST_RINGS \ 604 CFG_INI_UINT("dp_nss_reo_dest_rings", \ 605 WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \ 606 WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \ 607 WLAN_CFG_NSS_NUM_REO_DEST_RING, \ 608 CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings") 609 610 #define CFG_DP_NSS_TCL_DATA_RINGS \ 611 CFG_INI_UINT("dp_nss_tcl_data_rings", \ 612 WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \ 613 WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \ 614 WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \ 615 CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings") 616 617 #define CFG_DP_TX_DESC \ 618 CFG_INI_UINT("dp_tx_desc", \ 619 WLAN_CFG_NUM_TX_DESC_MIN, \ 620 WLAN_CFG_NUM_TX_DESC_MAX, \ 621 WLAN_CFG_NUM_TX_DESC, \ 622 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors") 623 624 #define CFG_DP_TX_EXT_DESC \ 625 CFG_INI_UINT("dp_tx_ext_desc", \ 626 WLAN_CFG_NUM_TX_EXT_DESC_MIN, \ 627 WLAN_CFG_NUM_TX_EXT_DESC_MAX, \ 628 WLAN_CFG_NUM_TX_EXT_DESC, \ 629 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors") 630 631 #define CFG_DP_TX_EXT_DESC_POOLS \ 632 CFG_INI_UINT("dp_tx_ext_desc_pool", \ 633 WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \ 634 WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \ 635 WLAN_CFG_NUM_TXEXT_DESC_POOL, \ 636 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool") 637 638 #define CFG_DP_PDEV_RX_RING \ 639 CFG_INI_UINT("dp_pdev_rx_ring", \ 640 WLAN_CFG_PER_PDEV_RX_RING_MIN, \ 641 WLAN_CFG_PER_PDEV_RX_RING_MAX, \ 642 WLAN_CFG_PER_PDEV_RX_RING, \ 643 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring") 644 645 #define CFG_DP_PDEV_TX_RING \ 646 CFG_INI_UINT("dp_pdev_tx_ring", \ 647 WLAN_CFG_PER_PDEV_TX_RING_MIN, \ 648 WLAN_CFG_PER_PDEV_TX_RING_MAX, \ 649 WLAN_CFG_PER_PDEV_TX_RING, \ 650 CFG_VALUE_OR_DEFAULT, \ 651 "DP PDEV Tx Ring") 652 653 #define CFG_DP_RX_DEFRAG_TIMEOUT \ 654 CFG_INI_UINT("dp_rx_defrag_timeout", \ 655 WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \ 656 WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \ 657 WLAN_CFG_RX_DEFRAG_TIMEOUT, \ 658 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout") 659 660 #define CFG_DP_TX_COMPL_RING_SIZE \ 661 CFG_INI_UINT("dp_tx_compl_ring_size", \ 662 WLAN_CFG_TX_COMP_RING_SIZE_MIN, \ 663 WLAN_CFG_TX_COMP_RING_SIZE_MAX, \ 664 WLAN_CFG_TX_COMP_RING_SIZE, \ 665 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size") 666 667 #define CFG_DP_TX_RING_SIZE \ 668 CFG_INI_UINT("dp_tx_ring_size", \ 669 WLAN_CFG_TX_RING_SIZE_MIN,\ 670 WLAN_CFG_TX_RING_SIZE_MAX,\ 671 WLAN_CFG_TX_RING_SIZE,\ 672 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size") 673 674 #define CFG_DP_NSS_COMP_RING_SIZE \ 675 CFG_INI_UINT("dp_nss_comp_ring_size", \ 676 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \ 677 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \ 678 WLAN_CFG_NSS_TX_COMP_RING_SIZE, \ 679 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size") 680 681 #define CFG_DP_PDEV_LMAC_RING \ 682 CFG_INI_UINT("dp_pdev_lmac_ring", \ 683 WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \ 684 WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \ 685 WLAN_CFG_PER_PDEV_LMAC_RING, \ 686 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring") 687 688 #define CFG_DP_TIME_CONTROL_BP \ 689 CFG_INI_UINT("dp_time_control_bp", \ 690 WLAN_CFG_TIME_CONTROL_BP_MIN,\ 691 WLAN_CFG_TIME_CONTROL_BP_MAX,\ 692 WLAN_CFG_TIME_CONTROL_BP,\ 693 CFG_VALUE_OR_DEFAULT, "DP time control back pressure") 694 /* 695 * <ini> 696 * dp_rx_pending_hl_threshold - High threshold of frame number to start 697 * frame dropping scheme 698 * @Min: 0 699 * @Max: 524288 700 * @Default: 393216 701 * 702 * This ini entry is used to set a high limit threshold to start frame 703 * dropping scheme 704 * 705 * Usage: External 706 * 707 * </ini> 708 */ 709 #define CFG_DP_RX_PENDING_HL_THRESHOLD \ 710 CFG_INI_UINT("dp_rx_pending_hl_threshold", \ 711 WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \ 712 WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \ 713 WLAN_CFG_RX_PENDING_HL_THRESHOLD, \ 714 CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold") 715 716 /* 717 * <ini> 718 * dp_rx_pending_lo_threshold - Low threshold of frame number to stop 719 * frame dropping scheme 720 * @Min: 100 721 * @Max: 524288 722 * @Default: 393216 723 * 724 * This ini entry is used to set a low limit threshold to stop frame 725 * dropping scheme 726 * 727 * Usage: External 728 * 729 * </ini> 730 */ 731 #define CFG_DP_RX_PENDING_LO_THRESHOLD \ 732 CFG_INI_UINT("dp_rx_pending_lo_threshold", \ 733 WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \ 734 WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \ 735 WLAN_CFG_RX_PENDING_LO_THRESHOLD, \ 736 CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold") 737 738 #define CFG_DP_BASE_HW_MAC_ID \ 739 CFG_INI_UINT("dp_base_hw_macid", \ 740 0, 1, 1, \ 741 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID") 742 743 #define CFG_DP_RX_HASH \ 744 CFG_INI_BOOL("dp_rx_hash", true, \ 745 "DP Rx Hash") 746 747 #define CFG_DP_TSO \ 748 CFG_INI_BOOL("TSOEnable", false, \ 749 "DP TSO Enabled") 750 751 #define CFG_DP_LRO \ 752 CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \ 753 "DP LRO Enable") 754 755 #ifdef WLAN_USE_CONFIG_PARAMS 756 /* 757 * <ini> 758 * dp_tx_desc_use_512p - Use 512M tx descriptor size 759 * @Min: 0 760 * @Max: 1 761 * @Default: 0 762 * 763 * This ini entry is used as flag to use 512M tx descriptor size or not 764 * 765 * Usage: Internal 766 * 767 * </ini> 768 */ 769 #define CFG_DP_TX_DESC_512P \ 770 CFG_INI_BOOL("dp_tx_desc_use_512p", false, \ 771 "DP TX DESC PINE SPECIFIC") 772 773 /* 774 * <ini> 775 * dp_nss_3radio_ring - Use 3 Radio NSS comp ring size 776 * @Min: 0 777 * @Max: 1 778 * @Default: 0 779 * 780 * This ini entry is used as flag to use 3 Radio NSS com ring size or not 781 * 782 * Usage: Internal 783 * 784 * </ini> 785 */ 786 #define CFG_DP_NSS_3RADIO_RING \ 787 CFG_INI_BOOL("dp_nss_3radio_ring", false, \ 788 "DP NSS 3 RADIO RING SIZE") 789 790 /* 791 * <ini> 792 * dp_mon_ring_per_512M - Update monitor status ring as 512M profile 793 * @Min: 0 794 * @Max: 1 795 * @Default: 0 796 * 797 * This ini entry is used as flag to update monitor status ring as 512M profile 798 * 799 * Usage: Internal 800 * 801 * </ini> 802 */ 803 #define CFG_DP_MON_STATUS_512M \ 804 CFG_INI_BOOL("dp_mon_ring_per_512M", false, \ 805 "DP MON STATUS RING SIZE PER 512M PROFILE") 806 807 /* 808 * <ini> 809 * dp_mon_2chain_ring - Reduce monitor rings size as for 2 Chains case 810 * @Min: 0 811 * @Max: 1 812 * @Default: 0 813 * 814 * This ini entry is used as flag to reduce monitor rings size as those used 815 * in case of 2 Tx/RxChains 816 * 817 * Usage: Internal 818 * 819 * </ini> 820 */ 821 #define CFG_DP_MON_2CHAIN_RING \ 822 CFG_INI_BOOL("dp_mon_2chain_ring", false, \ 823 "DP MON UPDATE RINGS FOR 2CHAIN") 824 825 /* 826 * <ini> 827 * dp_mon_4chain_ring - Update monitor rings size for 4 Chains case 828 * @Min: 0 829 * @Max: 1 830 * @Default: 0 831 * 832 * This ini entry is used as flag to reduce monitor rings size as those used 833 * in case of 4 Tx/RxChains 834 * 835 * Usage: Internal 836 * 837 * </ini> 838 */ 839 #define CFG_DP_MON_4CHAIN_RING \ 840 CFG_INI_BOOL("dp_mon_4chain_ring", false, \ 841 "DP MON UPDATE RINGS FOR 4CHAIN") 842 843 /* 844 * <ini> 845 * dp_4radip_rdp_reo - Update RDP REO map based on 4 radio config 846 * @Min: 0 847 * @Max: 1 848 * @Default: 0 849 * 850 * This ini entry is used as flag to update RDP reo map based on 4 Radio config 851 * 852 * Usage: Internal 853 * 854 * </ini> 855 */ 856 #define CFG_DP_4RADIO_RDP_REO \ 857 CFG_INI_BOOL("dp_nss_4radio_rdp_reo", \ 858 false, "Update REO destination mapping for 4radio") 859 860 #define CFG_DP_INI_SECTION_PARAMS \ 861 CFG(CFG_DP_NSS_3RADIO_RING) \ 862 CFG(CFG_DP_TX_DESC_512P) \ 863 CFG(CFG_DP_MON_STATUS_512M) \ 864 CFG(CFG_DP_MON_2CHAIN_RING) \ 865 CFG(CFG_DP_MON_4CHAIN_RING) \ 866 CFG(CFG_DP_4RADIO_RDP_REO) 867 #else 868 #define CFG_DP_INI_SECTION_PARAMS 869 #endif 870 871 /* 872 * <ini> 873 * CFG_DP_SG - Enable the SG feature standalonely 874 * @Min: 0 875 * @Max: 1 876 * @Default: 1 877 * 878 * This ini entry is used to enable/disable SG feature standalonely. 879 * Also does Rome support SG on TX, lithium does not. 880 * For example the lithium does not support SG on UDP frames. 881 * Which is able to handle SG only for TSO frames(in case TSO is enabled). 882 * 883 * Usage: External 884 * 885 * </ini> 886 */ 887 #define CFG_DP_SG \ 888 CFG_INI_BOOL("dp_sg_support", false, \ 889 "DP SG Enable") 890 891 #define WLAN_CFG_GRO_ENABLE_MIN 0 892 #define WLAN_CFG_GRO_ENABLE_MAX 3 893 #define WLAN_CFG_GRO_ENABLE_DEFAULT 0 894 #define DP_GRO_ENABLE_BIT_SET BIT(0) 895 #define DP_TC_BASED_DYNAMIC_GRO BIT(1) 896 897 /* 898 * <ini> 899 * CFG_DP_GRO - Enable the GRO feature standalonely 900 * @Min: 0 901 * @Max: 3 902 * @Default: 0 903 * 904 * This ini entry is used to enable/disable GRO feature standalonely. 905 * Value 0: Disable GRO feature 906 * Value 1: Enable GRO feature always 907 * Value 3: Enable GRO dynamic feature where TC rule can control GRO 908 * behavior 909 * 910 * Usage: External 911 * 912 * </ini> 913 */ 914 #define CFG_DP_GRO \ 915 CFG_INI_UINT("GROEnable", \ 916 WLAN_CFG_GRO_ENABLE_MIN, \ 917 WLAN_CFG_GRO_ENABLE_MAX, \ 918 WLAN_CFG_GRO_ENABLE_DEFAULT, \ 919 CFG_VALUE_OR_DEFAULT, "DP GRO Enable") 920 921 #define WLAN_CFG_TC_INGRESS_PRIO_MIN 0 922 #define WLAN_CFG_TC_INGRESS_PRIO_MAX 0xFFFF 923 #define WLAN_CFG_TC_INGRESS_PRIO_DEFAULT 0 924 925 #define CFG_DP_TC_INGRESS_PRIO \ 926 CFG_INI_UINT("tc_ingress_prio", \ 927 WLAN_CFG_TC_INGRESS_PRIO_MIN, \ 928 WLAN_CFG_TC_INGRESS_PRIO_MAX, \ 929 WLAN_CFG_TC_INGRESS_PRIO_DEFAULT, \ 930 CFG_VALUE_OR_DEFAULT, "DP tc ingress prio") 931 932 #define CFG_DP_OL_TX_CSUM \ 933 CFG_INI_BOOL("dp_offload_tx_csum_support", false, \ 934 "DP tx csum Enable") 935 936 #define CFG_DP_OL_RX_CSUM \ 937 CFG_INI_BOOL("dp_offload_rx_csum_support", false, \ 938 "DP rx csum Enable") 939 940 #define CFG_DP_RAWMODE \ 941 CFG_INI_BOOL("dp_rawmode_support", false, \ 942 "DP rawmode Enable") 943 944 #define CFG_DP_PEER_FLOW_CTRL \ 945 CFG_INI_BOOL("dp_peer_flow_control_support", false, \ 946 "DP peer flow ctrl Enable") 947 948 #define CFG_DP_NAPI \ 949 CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \ 950 "DP Napi Enabled") 951 /* 952 * <ini> 953 * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode 954 * @Min: 0 955 * @Max: 1 956 * @Default: 1 957 * 958 * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes. 959 * This includes P2P device mode, P2P client mode and P2P GO mode. 960 * The feature is enabled by default. To disable TX checksum for P2P, add the 961 * following entry in ini file: 962 * gEnableP2pIpTcpUdpChecksumOffload=0 963 * 964 * Usage: External 965 * 966 * </ini> 967 */ 968 #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \ 969 CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \ 970 "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)") 971 972 /* 973 * <ini> 974 * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode 975 * @Min: 0 976 * @Max: 1 977 * @Default: 1 978 * 979 * Usage: External 980 * 981 * </ini> 982 */ 983 #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \ 984 CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \ 985 "DP TCP UDP Checksum Offload for NAN mode") 986 987 /* 988 * <ini> 989 * gEnableIpTcpUdpChecksumOffload - Enable checksum offload 990 * @Min: 0 991 * @Max: 1 992 * @Default: 1 993 * 994 * Usage: External 995 * 996 * </ini> 997 */ 998 #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \ 999 CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \ 1000 "DP TCP UDP Checksum Offload") 1001 1002 #define CFG_DP_DEFRAG_TIMEOUT_CHECK \ 1003 CFG_INI_BOOL("dp_defrag_timeout_check", true, \ 1004 "DP Defrag Timeout Check") 1005 1006 #define CFG_DP_WBM_RELEASE_RING \ 1007 CFG_INI_UINT("dp_wbm_release_ring", \ 1008 WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \ 1009 WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \ 1010 WLAN_CFG_WBM_RELEASE_RING_SIZE, \ 1011 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring") 1012 1013 #define CFG_DP_TCL_CMD_CREDIT_RING \ 1014 CFG_INI_UINT("dp_tcl_cmd_credit_ring", \ 1015 WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \ 1016 WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \ 1017 WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \ 1018 CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring") 1019 1020 #define CFG_DP_TCL_STATUS_RING \ 1021 CFG_INI_UINT("dp_tcl_status_ring",\ 1022 WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \ 1023 WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \ 1024 WLAN_CFG_TCL_STATUS_RING_SIZE, \ 1025 CFG_VALUE_OR_DEFAULT, "DP TCL status ring") 1026 1027 #define CFG_DP_REO_REINJECT_RING \ 1028 CFG_INI_UINT("dp_reo_reinject_ring", \ 1029 WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \ 1030 WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \ 1031 WLAN_CFG_REO_REINJECT_RING_SIZE, \ 1032 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring") 1033 1034 #define CFG_DP_RX_RELEASE_RING \ 1035 CFG_INI_UINT("dp_rx_release_ring", \ 1036 WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \ 1037 WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \ 1038 WLAN_CFG_RX_RELEASE_RING_SIZE, \ 1039 CFG_VALUE_OR_DEFAULT, "DP Rx release ring") 1040 1041 #define CFG_DP_RX_DESTINATION_RING \ 1042 CFG_INI_UINT("dp_reo_dst_ring", \ 1043 WLAN_CFG_REO_DST_RING_SIZE_MIN, \ 1044 WLAN_CFG_REO_DST_RING_SIZE_MAX, \ 1045 WLAN_CFG_REO_DST_RING_SIZE, \ 1046 CFG_VALUE_OR_DEFAULT, "DP REO destination ring") 1047 1048 #define CFG_DP_REO_EXCEPTION_RING \ 1049 CFG_INI_UINT("dp_reo_exception_ring", \ 1050 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \ 1051 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \ 1052 WLAN_CFG_REO_EXCEPTION_RING_SIZE, \ 1053 CFG_VALUE_OR_DEFAULT, "DP REO exception ring") 1054 1055 #define CFG_DP_REO_CMD_RING \ 1056 CFG_INI_UINT("dp_reo_cmd_ring", \ 1057 WLAN_CFG_REO_CMD_RING_SIZE_MIN, \ 1058 WLAN_CFG_REO_CMD_RING_SIZE_MAX, \ 1059 WLAN_CFG_REO_CMD_RING_SIZE, \ 1060 CFG_VALUE_OR_DEFAULT, "DP REO command ring") 1061 1062 #define CFG_DP_REO_STATUS_RING \ 1063 CFG_INI_UINT("dp_reo_status_ring", \ 1064 WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \ 1065 WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \ 1066 WLAN_CFG_REO_STATUS_RING_SIZE, \ 1067 CFG_VALUE_OR_DEFAULT, "DP REO status ring") 1068 1069 #define CFG_DP_RXDMA_BUF_RING \ 1070 CFG_INI_UINT("dp_rxdma_buf_ring", \ 1071 WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \ 1072 WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \ 1073 WLAN_CFG_RXDMA_BUF_RING_SIZE, \ 1074 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring") 1075 1076 #define CFG_DP_RXDMA_REFILL_RING \ 1077 CFG_INI_UINT("dp_rxdma_refill_ring", \ 1078 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \ 1079 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \ 1080 WLAN_CFG_RXDMA_REFILL_RING_SIZE, \ 1081 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring") 1082 1083 #define CFG_DP_TX_DESC_LIMIT_0 \ 1084 CFG_INI_UINT("dp_tx_desc_limit_0", \ 1085 WLAN_CFG_TX_DESC_LIMIT_0_MIN, \ 1086 WLAN_CFG_TX_DESC_LIMIT_0_MAX, \ 1087 WLAN_CFG_TX_DESC_LIMIT_0, \ 1088 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0") 1089 1090 #define CFG_DP_TX_DESC_LIMIT_1 \ 1091 CFG_INI_UINT("dp_tx_desc_limit_1", \ 1092 WLAN_CFG_TX_DESC_LIMIT_1_MIN, \ 1093 WLAN_CFG_TX_DESC_LIMIT_1_MAX, \ 1094 WLAN_CFG_TX_DESC_LIMIT_1, \ 1095 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1") 1096 1097 #define CFG_DP_TX_DESC_LIMIT_2 \ 1098 CFG_INI_UINT("dp_tx_desc_limit_2", \ 1099 WLAN_CFG_TX_DESC_LIMIT_2_MIN, \ 1100 WLAN_CFG_TX_DESC_LIMIT_2_MAX, \ 1101 WLAN_CFG_TX_DESC_LIMIT_2, \ 1102 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2") 1103 1104 #define CFG_DP_TX_DEVICE_LIMIT \ 1105 CFG_INI_UINT("dp_tx_device_limit", \ 1106 WLAN_CFG_TX_DEVICE_LIMIT_MIN, \ 1107 WLAN_CFG_TX_DEVICE_LIMIT_MAX, \ 1108 WLAN_CFG_TX_DEVICE_LIMIT, \ 1109 CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit") 1110 1111 #define CFG_DP_TX_SW_INTERNODE_QUEUE \ 1112 CFG_INI_UINT("dp_tx_sw_internode_queue", \ 1113 WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \ 1114 WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \ 1115 WLAN_CFG_TX_SW_INTERNODE_QUEUE, \ 1116 CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue") 1117 1118 #define CFG_DP_RXDMA_MONITOR_BUF_RING \ 1119 CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \ 1120 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \ 1121 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \ 1122 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \ 1123 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring") 1124 1125 #define CFG_DP_TX_MONITOR_BUF_RING \ 1126 CFG_INI_UINT("dp_tx_monitor_buf_ring", \ 1127 WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN, \ 1128 WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX, \ 1129 WLAN_CFG_TX_MONITOR_BUF_RING_SIZE, \ 1130 CFG_VALUE_OR_DEFAULT, "DP TX monitor buffer ring") 1131 1132 #define CFG_DP_RXDMA_MONITOR_DST_RING \ 1133 CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \ 1134 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \ 1135 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \ 1136 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \ 1137 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 1138 1139 #define CFG_DP_TX_MONITOR_DST_RING \ 1140 CFG_INI_UINT("dp_tx_monitor_dst_ring", \ 1141 WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN, \ 1142 WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX, \ 1143 WLAN_CFG_TX_MONITOR_DST_RING_SIZE, \ 1144 CFG_VALUE_OR_DEFAULT, "DP TX monitor destination ring") 1145 1146 #define CFG_DP_RXDMA_MONITOR_STATUS_RING \ 1147 CFG_INI_UINT("dp_rxdma_monitor_status_ring", \ 1148 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \ 1149 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \ 1150 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \ 1151 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring") 1152 1153 #define CFG_DP_RXDMA_MONITOR_DESC_RING \ 1154 CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \ 1155 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \ 1156 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \ 1157 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \ 1158 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 1159 1160 #define CFG_DP_RXDMA_ERR_DST_RING \ 1161 CFG_INI_UINT("dp_rxdma_err_dst_ring", \ 1162 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \ 1163 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \ 1164 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \ 1165 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring") 1166 1167 #define CFG_DP_PER_PKT_LOGGING \ 1168 CFG_INI_UINT("enable_verbose_debug", \ 1169 0, 0xffff, 0, \ 1170 CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging") 1171 1172 #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \ 1173 CFG_INI_UINT("TxFlowStartQueueOffset", \ 1174 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \ 1175 CFG_VALUE_OR_DEFAULT, "Start queue offset") 1176 1177 #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \ 1178 CFG_INI_UINT("TxFlowStopQueueThreshold", \ 1179 0, 50, 15, \ 1180 CFG_VALUE_OR_DEFAULT, "Stop queue Threshold") 1181 1182 #define CFG_DP_IPA_UC_TX_BUF_SIZE \ 1183 CFG_INI_UINT("IpaUcTxBufSize", \ 1184 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \ 1185 CFG_VALUE_OR_DEFAULT, "IPA tx buffer size") 1186 1187 #define CFG_DP_IPA_UC_TX_PARTITION_BASE \ 1188 CFG_INI_UINT("IpaUcTxPartitionBase", \ 1189 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \ 1190 CFG_VALUE_OR_DEFAULT, "IPA tx partition base") 1191 1192 #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \ 1193 CFG_INI_UINT("IpaUcRxIndRingCount", \ 1194 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \ 1195 CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count") 1196 1197 #define CFG_DP_AP_STA_SECURITY_SEPERATION \ 1198 CFG_INI_BOOL("gDisableIntraBssFwd", \ 1199 false, "Disable intrs BSS Rx packets") 1200 1201 #define CFG_DP_ENABLE_DATA_STALL_DETECTION \ 1202 CFG_INI_UINT("gEnableDataStallDetection", \ 1203 0, 0xFFFFFFFF, 0x1, \ 1204 CFG_VALUE_OR_DEFAULT, "Enable/Disable Data stall detection") 1205 1206 #define CFG_DP_RX_SW_DESC_WEIGHT \ 1207 CFG_INI_UINT("dp_rx_sw_desc_weight", \ 1208 WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \ 1209 WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \ 1210 WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \ 1211 CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight") 1212 1213 #define CFG_DP_RX_SW_DESC_NUM \ 1214 CFG_INI_UINT("dp_rx_sw_desc_num", \ 1215 WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \ 1216 WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \ 1217 WLAN_CFG_RX_SW_DESC_NUM_SIZE, \ 1218 CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num") 1219 1220 #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \ 1221 CFG_INI_UINT("dp_rx_flow_search_table_size", \ 1222 WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \ 1223 WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \ 1224 WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \ 1225 CFG_VALUE_OR_DEFAULT, \ 1226 "DP Rx Flow Search Table Size in number of entries") 1227 1228 #define CFG_DP_RX_FLOW_TAG_ENABLE \ 1229 CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \ 1230 "Enable/Disable DP Rx Flow Tag") 1231 1232 #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \ 1233 CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \ 1234 "DP Rx Flow Search Table Is Per PDev") 1235 1236 #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \ 1237 CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \ 1238 "Enable/Disable Rx Protocol & Flow tags in Monitor mode") 1239 1240 #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \ 1241 CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \ 1242 "Enable/Disable tx Per Pkt vdev id check") 1243 1244 /* 1245 * <ini> 1246 * dp_rx_fisa_enable - Control Rx datapath FISA 1247 * @Min: 0 1248 * @Max: 1 1249 * @Default: 1 1250 * 1251 * This ini is used to enable DP Rx FISA feature 1252 * 1253 * Related: dp_rx_flow_search_table_size 1254 * 1255 * Supported Feature: STA,P2P and SAP IPA disabled terminating 1256 * 1257 * Usage: Internal 1258 * 1259 * </ini> 1260 */ 1261 #define CFG_DP_RX_FISA_ENABLE \ 1262 CFG_INI_BOOL("dp_rx_fisa_enable", true, \ 1263 "Enable/Disable DP Rx FISA") 1264 1265 /* 1266 * <ini> 1267 * dp_rx_fisa_lru_del_enable - Control Rx datapath FISA 1268 * @Min: 0 1269 * @Max: 1 1270 * @Default: 1 1271 * 1272 * This ini is used to enable DP Rx FISA lru deletion feature 1273 * 1274 * Related: dp_rx_fisa_enable 1275 * 1276 * Supported Feature: STA,P2P and SAP IPA disabled terminating 1277 * 1278 * Usage: Internal 1279 * 1280 * </ini> 1281 */ 1282 #define CFG_DP_RX_FISA_LRU_DEL_ENABLE \ 1283 CFG_INI_BOOL("dp_rx_fisa_lru_del_enable", true, \ 1284 "Enable/Disable DP Rx FISA LRU deletion") 1285 1286 #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \ 1287 CFG_INI_UINT("mon_drop_thresh", \ 1288 WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \ 1289 WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \ 1290 WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \ 1291 CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop threshold") 1292 1293 #define CFG_DP_PKTLOG_BUFFER_SIZE \ 1294 CFG_INI_UINT("PktlogBufSize", \ 1295 WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \ 1296 WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \ 1297 WLAN_CFG_PKTLOG_BUFFER_SIZE, \ 1298 CFG_VALUE_OR_DEFAULT, "Packet Log buffer size") 1299 1300 #define CFG_DP_FULL_MON_MODE \ 1301 CFG_INI_BOOL("full_mon_mode", \ 1302 false, "Full Monitor mode support") 1303 1304 #define CFG_DP_REO_RINGS_MAP \ 1305 CFG_INI_UINT("dp_reo_rings_map", \ 1306 WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \ 1307 WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \ 1308 WLAN_CFG_NUM_REO_RINGS_MAP, \ 1309 CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping") 1310 1311 #define CFG_DP_RX_RADIO_0_DEFAULT_REO \ 1312 CFG_INI_UINT("dp_rx_radio0_default_reo", \ 1313 WLAN_CFG_RADIO_DEFAULT_REO_MIN, \ 1314 WLAN_CFG_RADIO_DEFAULT_REO_MAX, \ 1315 WLAN_CFG_RADIO_0_DEFAULT_REO, \ 1316 CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping") 1317 1318 #define CFG_DP_RX_RADIO_1_DEFAULT_REO \ 1319 CFG_INI_UINT("dp_rx_radio1_default_reo", \ 1320 WLAN_CFG_RADIO_DEFAULT_REO_MIN, \ 1321 WLAN_CFG_RADIO_DEFAULT_REO_MAX, \ 1322 WLAN_CFG_RADIO_1_DEFAULT_REO, \ 1323 CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping") 1324 1325 #define CFG_DP_RX_RADIO_2_DEFAULT_REO \ 1326 CFG_INI_UINT("dp_rx_radio2_default_reo", \ 1327 WLAN_CFG_RADIO_DEFAULT_REO_MIN, \ 1328 WLAN_CFG_RADIO_DEFAULT_REO_MAX, \ 1329 WLAN_CFG_RADIO_2_DEFAULT_REO, \ 1330 CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping") 1331 1332 #define CFG_DP_PEER_EXT_STATS \ 1333 CFG_INI_BOOL("peer_ext_stats", \ 1334 false, "Peer extended stats") 1335 1336 #define CFG_DP_NAPI_SCALE_FACTOR \ 1337 CFG_INI_UINT("dp_napi_scale_factor", \ 1338 WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN, \ 1339 WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX, \ 1340 WLAN_CFG_DP_NAPI_SCALE_FACTOR, \ 1341 CFG_VALUE_OR_DEFAULT, "NAPI scale factor for DP") 1342 1343 /* 1344 * <ini> 1345 * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes 1346 * @Min: 0 1347 * @Max: 1 1348 * @Default: Default value indicating if checksum should be disabled for 1349 * legacy WLAN modes 1350 * 1351 * This ini is used to disable HW checksum offload capability for legacy 1352 * connections 1353 * 1354 * Related: gEnableIpTcpUdpChecksumOffload should be enabled 1355 * 1356 * Usage: Internal 1357 * 1358 * </ini> 1359 */ 1360 #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1361 #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1 1362 #endif 1363 1364 #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \ 1365 CFG_INI_BOOL("legacy_mode_csum_disable", \ 1366 DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \ 1367 "Enable/Disable legacy mode checksum") 1368 1369 #define CFG_DP_RX_BUFF_POOL_ENABLE \ 1370 CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \ 1371 "Enable/Disable DP RX emergency buffer pool support") 1372 1373 #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \ 1374 CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \ 1375 "Enable/Disable DP RX refill buffer pool support") 1376 1377 #define CFG_DP_POLL_MODE_ENABLE \ 1378 CFG_INI_BOOL("dp_poll_mode_enable", false, \ 1379 "Enable/Disable Polling mode for data path") 1380 1381 #define CFG_DP_RX_FST_IN_CMEM \ 1382 CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \ 1383 "Enable/Disable flow search table in CMEM") 1384 /* 1385 * <ini> 1386 * gEnableSWLM - Control DP Software latency manager 1387 * @Min: 0 1388 * @Max: 1 1389 * @Default: 0 1390 * 1391 * This ini is used to enable DP Software latency Manager 1392 * 1393 * Supported Feature: STA,P2P and SAP IPA disabled terminating 1394 * 1395 * Usage: Internal 1396 * 1397 * </ini> 1398 */ 1399 #define CFG_DP_SWLM_ENABLE \ 1400 CFG_INI_BOOL("gEnableSWLM", false, \ 1401 "Enable/Disable DP SWLM") 1402 /* 1403 * <ini> 1404 * wow_check_rx_pending_enable - control to check RX frames pending in Wow 1405 * @Min: 0 1406 * @Max: 1 1407 * @Default: 0 1408 * 1409 * This ini is used to control DP Software to perform RX pending check 1410 * before entering WoW mode 1411 * 1412 * Usage: Internal 1413 * 1414 * </ini> 1415 */ 1416 #define CFG_DP_WOW_CHECK_RX_PENDING \ 1417 CFG_INI_BOOL("wow_check_rx_pending_enable", \ 1418 false, \ 1419 "enable rx frame pending check in WoW mode") 1420 #define CFG_DP_DELAY_MON_REPLENISH \ 1421 CFG_INI_BOOL("delay_mon_replenish", \ 1422 true, "Delay Monitor Replenish") 1423 1424 #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT 1425 #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN 500 1426 #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX 2000 1427 #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER 500 1428 1429 #define CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG \ 1430 CFG_INI_BOOL("vdev_stats_hw_offload_config", \ 1431 false, "Offload vdev stats to HW") 1432 #define CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER \ 1433 CFG_INI_UINT("vdev_stats_hw_offload_timer", \ 1434 WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN, \ 1435 WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX, \ 1436 WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER, \ 1437 CFG_VALUE_OR_DEFAULT, \ 1438 "vdev stats hw offload timer duration") 1439 #define CFG_DP_VDEV_STATS_HW_OFFLOAD \ 1440 CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG) \ 1441 CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER) 1442 #else 1443 #define CFG_DP_VDEV_STATS_HW_OFFLOAD 1444 #endif 1445 1446 /* 1447 * <ini> 1448 * ghw_cc_enable - enable HW cookie conversion by register 1449 * @Min: 0 1450 * @Max: 1 1451 * @Default: 1 1452 * 1453 * This ini is used to control HW based 20 bits cookie to 64 bits 1454 * Desc virtual address conversion 1455 * 1456 * Usage: Internal 1457 * 1458 * </ini> 1459 */ 1460 #define CFG_DP_HW_CC_ENABLE \ 1461 CFG_INI_BOOL("ghw_cc_enable", \ 1462 true, "Enable/Disable HW cookie conversion") 1463 1464 #ifdef IPA_OFFLOAD 1465 /* 1466 * <ini> 1467 * dp_ipa_tx_ring_size - Set tcl ring size for IPA 1468 * @Min: 1024 1469 * @Max: 8096 1470 * @Default: 1024 1471 * 1472 * This ini sets the tcl ring size for IPA 1473 * 1474 * Related: N/A 1475 * 1476 * Supported Feature: IPA 1477 * 1478 * Usage: Internal 1479 * 1480 * </ini> 1481 */ 1482 #define CFG_DP_IPA_TX_RING_SIZE \ 1483 CFG_INI_UINT("dp_ipa_tx_ring_size", \ 1484 WLAN_CFG_IPA_TX_RING_SIZE_MIN, \ 1485 WLAN_CFG_IPA_TX_RING_SIZE_MAX, \ 1486 WLAN_CFG_IPA_TX_RING_SIZE, \ 1487 CFG_VALUE_OR_DEFAULT, "IPA TCL ring size") 1488 1489 /* 1490 * <ini> 1491 * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA 1492 * @Min: 1024 1493 * @Max: 8096 1494 * @Default: 1024 1495 * 1496 * This ini sets the tx comp ring size for IPA 1497 * 1498 * Related: N/A 1499 * 1500 * Supported Feature: IPA 1501 * 1502 * Usage: Internal 1503 * 1504 * </ini> 1505 */ 1506 #define CFG_DP_IPA_TX_COMP_RING_SIZE \ 1507 CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \ 1508 WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \ 1509 WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \ 1510 WLAN_CFG_IPA_TX_COMP_RING_SIZE, \ 1511 CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size") 1512 1513 #ifdef IPA_WDI3_TX_TWO_PIPES 1514 /* 1515 * <ini> 1516 * dp_ipa_tx_alt_ring_size - Set alt tcl ring size for IPA 1517 * @Min: 1024 1518 * @Max: 8096 1519 * @Default: 1024 1520 * 1521 * This ini sets the alt tcl ring size for IPA 1522 * 1523 * Related: N/A 1524 * 1525 * Supported Feature: IPA 1526 * 1527 * Usage: Internal 1528 * 1529 * </ini> 1530 */ 1531 #define CFG_DP_IPA_TX_ALT_RING_SIZE \ 1532 CFG_INI_UINT("dp_ipa_tx_alt_ring_size", \ 1533 WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN, \ 1534 WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX, \ 1535 WLAN_CFG_IPA_TX_ALT_RING_SIZE, \ 1536 CFG_VALUE_OR_DEFAULT, \ 1537 "DP IPA TX Alternative Ring Size") 1538 1539 /* 1540 * <ini> 1541 * dp_ipa_tx_alt_comp_ring_size - Set tx alt comp ring size for IPA 1542 * @Min: 1024 1543 * @Max: 8096 1544 * @Default: 1024 1545 * 1546 * This ini sets the tx alt comp ring size for IPA 1547 * 1548 * Related: N/A 1549 * 1550 * Supported Feature: IPA 1551 * 1552 * Usage: Internal 1553 * 1554 * </ini> 1555 */ 1556 #define CFG_DP_IPA_TX_ALT_COMP_RING_SIZE \ 1557 CFG_INI_UINT("dp_ipa_tx_alt_comp_ring_size", \ 1558 WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN, \ 1559 WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX, \ 1560 WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE, \ 1561 CFG_VALUE_OR_DEFAULT, \ 1562 "DP IPA TX Alternative Completion Ring Size") 1563 1564 #define CFG_DP_IPA_TX_ALT_RING_CFG \ 1565 CFG(CFG_DP_IPA_TX_ALT_RING_SIZE) \ 1566 CFG(CFG_DP_IPA_TX_ALT_COMP_RING_SIZE) 1567 1568 #else 1569 #define CFG_DP_IPA_TX_ALT_RING_CFG 1570 #endif 1571 1572 #define CFG_DP_IPA_TX_RING_CFG \ 1573 CFG(CFG_DP_IPA_TX_RING_SIZE) \ 1574 CFG(CFG_DP_IPA_TX_COMP_RING_SIZE) 1575 #else 1576 #define CFG_DP_IPA_TX_RING_CFG 1577 #define CFG_DP_IPA_TX_ALT_RING_CFG 1578 #endif 1579 1580 #ifdef WLAN_SUPPORT_PPEDS 1581 #define CFG_DP_PPE_ENABLE \ 1582 CFG_INI_BOOL("ppe_enable", false, \ 1583 "DP ppe enable flag") 1584 1585 #define CFG_DP_REO2PPE_RING \ 1586 CFG_INI_UINT("dp_reo2ppe_ring", \ 1587 WLAN_CFG_REO2PPE_RING_SIZE_MIN, \ 1588 WLAN_CFG_REO2PPE_RING_SIZE_MAX, \ 1589 WLAN_CFG_REO2PPE_RING_SIZE, \ 1590 CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring") 1591 1592 #define CFG_DP_PPE2TCL_RING \ 1593 CFG_INI_UINT("dp_ppe2tcl_ring", \ 1594 WLAN_CFG_PPE2TCL_RING_SIZE_MIN, \ 1595 WLAN_CFG_PPE2TCL_RING_SIZE_MAX, \ 1596 WLAN_CFG_PPE2TCL_RING_SIZE, \ 1597 CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings") 1598 1599 #define CFG_DP_PPE_RELEASE_RING \ 1600 CFG_INI_UINT("dp_ppe_release_ring", \ 1601 WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN, \ 1602 WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX, \ 1603 WLAN_CFG_PPE_RELEASE_RING_SIZE, \ 1604 CFG_VALUE_OR_DEFAULT, "DP PPE Release Ring") 1605 1606 #define CFG_DP_PPE_CONFIG \ 1607 CFG(CFG_DP_PPE_ENABLE) \ 1608 CFG(CFG_DP_REO2PPE_RING) \ 1609 CFG(CFG_DP_PPE2TCL_RING) \ 1610 CFG(CFG_DP_PPE_RELEASE_RING) 1611 #else 1612 #define CFG_DP_PPE_CONFIG 1613 #endif 1614 1615 #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) 1616 /* 1617 * <ini> 1618 * dp_chip0_rx_ring_map - Set Rx ring map for CHIP 0 1619 * @Min: 0x0 1620 * @Max: 0xFF 1621 * @Default: 0xF 1622 * 1623 * This ini sets Rx ring map for CHIP 0 1624 * 1625 * Usage: Internal 1626 * 1627 * </ini> 1628 */ 1629 #define CFG_DP_MLO_RX_RING_MAP \ 1630 CFG_INI_UINT("dp_mlo_reo_rings_map", \ 1631 WLAN_CFG_MLO_RX_RING_MAP_MIN, \ 1632 WLAN_CFG_MLO_RX_RING_MAP_MAX, \ 1633 WLAN_CFG_MLO_RX_RING_MAP, \ 1634 CFG_VALUE_OR_DEFAULT, "DP MLO Rx ring map") 1635 1636 1637 #define CFG_DP_MLO_CONFIG \ 1638 CFG(CFG_DP_MLO_RX_RING_MAP) 1639 #else 1640 #define CFG_DP_MLO_CONFIG 1641 #endif 1642 1643 /* 1644 * <ini> 1645 * dp_mpdu_retry_threshold_1 - threshold to increment mpdu success with retries 1646 * @Min: 0 1647 * @Max: 255 1648 * @Default: 0 1649 * 1650 * This ini entry is used to set first threshold to increment the value of 1651 * mpdu_success_with_retries 1652 * 1653 * Usage: Internal 1654 * 1655 * </ini> 1656 */ 1657 #define CFG_DP_MPDU_RETRY_THRESHOLD_1 \ 1658 CFG_INI_UINT("dp_mpdu_retry_threshold_1", \ 1659 CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \ 1660 CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \ 1661 CFG_DP_MPDU_RETRY_THRESHOLD, \ 1662 CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 1") 1663 1664 /* 1665 * <ini> 1666 * dp_mpdu_retry_threshold_2 - threshold to increment mpdu success with retries 1667 * @Min: 0 1668 * @Max: 255 1669 * @Default: 0 1670 * 1671 * This ini entry is used to set second threshold to increment the value of 1672 * mpdu_success_with_retries 1673 * 1674 * Usage: Internal 1675 * 1676 * </ini> 1677 */ 1678 #define CFG_DP_MPDU_RETRY_THRESHOLD_2 \ 1679 CFG_INI_UINT("dp_mpdu_retry_threshold_2", \ 1680 CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \ 1681 CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \ 1682 CFG_DP_MPDU_RETRY_THRESHOLD, \ 1683 CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 2") 1684 1685 #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES 1686 /* Macro enabling support marking of notify frames by host */ 1687 #define DP_MARK_NOTIFY_FRAME_SUPPORT 1 1688 #else 1689 #define DP_MARK_NOTIFY_FRAME_SUPPORT 0 1690 #endif /* QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES */ 1691 1692 /* 1693 * <ini> 1694 * Host DP AST entries database - Enable/Disable 1695 * 1696 * @Default: 0 1697 * 1698 * This ini enables/disables AST entries database on host 1699 * 1700 * Usage: Internal 1701 * 1702 * </ini> 1703 */ 1704 #define CFG_DP_HOST_AST_DB_ENABLE \ 1705 CFG_INI_BOOL("host_ast_db_enable", false, \ 1706 "Host AST entries database Enable/Disable") 1707 1708 #define CFG_DP \ 1709 CFG(CFG_DP_HTT_PACKET_TYPE) \ 1710 CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \ 1711 CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \ 1712 CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \ 1713 CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \ 1714 CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \ 1715 CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \ 1716 CFG(CFG_DP_MAX_ALLOC_SIZE) \ 1717 CFG(CFG_DP_MAX_CLIENTS) \ 1718 CFG(CFG_DP_MAX_PEER_ID) \ 1719 CFG(CFG_DP_REO_DEST_RINGS) \ 1720 CFG(CFG_DP_TX_COMP_RINGS) \ 1721 CFG(CFG_DP_TCL_DATA_RINGS) \ 1722 CFG(CFG_DP_NSS_REO_DEST_RINGS) \ 1723 CFG(CFG_DP_NSS_TCL_DATA_RINGS) \ 1724 CFG(CFG_DP_TX_DESC) \ 1725 CFG(CFG_DP_TX_EXT_DESC) \ 1726 CFG(CFG_DP_TX_EXT_DESC_POOLS) \ 1727 CFG(CFG_DP_PDEV_RX_RING) \ 1728 CFG(CFG_DP_PDEV_TX_RING) \ 1729 CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \ 1730 CFG(CFG_DP_TX_COMPL_RING_SIZE) \ 1731 CFG(CFG_DP_TX_RING_SIZE) \ 1732 CFG(CFG_DP_NSS_COMP_RING_SIZE) \ 1733 CFG(CFG_DP_PDEV_LMAC_RING) \ 1734 CFG(CFG_DP_TIME_CONTROL_BP) \ 1735 CFG(CFG_DP_BASE_HW_MAC_ID) \ 1736 CFG(CFG_DP_RX_HASH) \ 1737 CFG(CFG_DP_TSO) \ 1738 CFG(CFG_DP_LRO) \ 1739 CFG(CFG_DP_SG) \ 1740 CFG(CFG_DP_GRO) \ 1741 CFG(CFG_DP_TC_INGRESS_PRIO) \ 1742 CFG(CFG_DP_OL_TX_CSUM) \ 1743 CFG(CFG_DP_OL_RX_CSUM) \ 1744 CFG(CFG_DP_RAWMODE) \ 1745 CFG(CFG_DP_PEER_FLOW_CTRL) \ 1746 CFG(CFG_DP_NAPI) \ 1747 CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \ 1748 CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \ 1749 CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \ 1750 CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \ 1751 CFG(CFG_DP_WBM_RELEASE_RING) \ 1752 CFG(CFG_DP_TCL_CMD_CREDIT_RING) \ 1753 CFG(CFG_DP_TCL_STATUS_RING) \ 1754 CFG(CFG_DP_REO_REINJECT_RING) \ 1755 CFG(CFG_DP_RX_RELEASE_RING) \ 1756 CFG(CFG_DP_REO_EXCEPTION_RING) \ 1757 CFG(CFG_DP_RX_DESTINATION_RING) \ 1758 CFG(CFG_DP_REO_CMD_RING) \ 1759 CFG(CFG_DP_REO_STATUS_RING) \ 1760 CFG(CFG_DP_RXDMA_BUF_RING) \ 1761 CFG(CFG_DP_RXDMA_REFILL_RING) \ 1762 CFG(CFG_DP_TX_DESC_LIMIT_0) \ 1763 CFG(CFG_DP_TX_DESC_LIMIT_1) \ 1764 CFG(CFG_DP_TX_DESC_LIMIT_2) \ 1765 CFG(CFG_DP_TX_DEVICE_LIMIT) \ 1766 CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \ 1767 CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \ 1768 CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \ 1769 CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \ 1770 CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \ 1771 CFG(CFG_DP_RXDMA_ERR_DST_RING) \ 1772 CFG(CFG_DP_PER_PKT_LOGGING) \ 1773 CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \ 1774 CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \ 1775 CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \ 1776 CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \ 1777 CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \ 1778 CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \ 1779 CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \ 1780 CFG(CFG_DP_RX_SW_DESC_WEIGHT) \ 1781 CFG(CFG_DP_RX_SW_DESC_NUM) \ 1782 CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \ 1783 CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \ 1784 CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \ 1785 CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \ 1786 CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \ 1787 CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \ 1788 CFG(CFG_DP_RX_FISA_ENABLE) \ 1789 CFG(CFG_DP_RX_FISA_LRU_DEL_ENABLE) \ 1790 CFG(CFG_DP_FULL_MON_MODE) \ 1791 CFG(CFG_DP_REO_RINGS_MAP) \ 1792 CFG(CFG_DP_PEER_EXT_STATS) \ 1793 CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \ 1794 CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \ 1795 CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \ 1796 CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \ 1797 CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \ 1798 CFG(CFG_DP_POLL_MODE_ENABLE) \ 1799 CFG(CFG_DP_SWLM_ENABLE) \ 1800 CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \ 1801 CFG(CFG_DP_RX_FST_IN_CMEM) \ 1802 CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \ 1803 CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \ 1804 CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \ 1805 CFG(CFG_DP_WOW_CHECK_RX_PENDING) \ 1806 CFG(CFG_DP_HW_CC_ENABLE) \ 1807 CFG(CFG_DP_DELAY_MON_REPLENISH) \ 1808 CFG(CFG_DP_TX_MONITOR_BUF_RING) \ 1809 CFG(CFG_DP_TX_MONITOR_DST_RING) \ 1810 CFG(CFG_DP_MPDU_RETRY_THRESHOLD_1) \ 1811 CFG(CFG_DP_MPDU_RETRY_THRESHOLD_2) \ 1812 CFG_DP_IPA_TX_RING_CFG \ 1813 CFG_DP_PPE_CONFIG \ 1814 CFG_DP_IPA_TX_ALT_RING_CFG \ 1815 CFG_DP_MLO_CONFIG \ 1816 CFG_DP_INI_SECTION_PARAMS \ 1817 CFG_DP_VDEV_STATS_HW_OFFLOAD \ 1818 CFG(CFG_DP_TX_CAPT_MAX_MEM_MB) \ 1819 CFG(CFG_DP_NAPI_SCALE_FACTOR) \ 1820 CFG(CFG_DP_HOST_AST_DB_ENABLE) 1821 #endif /* _CFG_DP_H_ */ 1822