1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: This file contains definitions of Data Path configuration. 21 */ 22 23 #ifndef _CFG_DP_H_ 24 #define _CFG_DP_H_ 25 26 #include "cfg_define.h" 27 28 #define WLAN_CFG_MAX_CLIENTS 64 29 #define WLAN_CFG_MAX_CLIENTS_MIN 8 30 #define WLAN_CFG_MAX_CLIENTS_MAX 64 31 32 /* Change this to a lower value to enforce scattered idle list mode */ 33 #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000 34 #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x200000 35 #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000 36 37 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 38 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3 39 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3 40 41 #ifdef CONFIG_MCL 42 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 43 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10 44 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15 45 #else 46 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0 47 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0 48 #endif 49 #else 50 #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0 51 #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0 52 #endif 53 54 #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0 55 #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1 56 57 #ifdef CONFIG_MCL 58 #define WLAN_CFG_PER_PDEV_RX_RING 0 59 #define WLAN_CFG_PER_PDEV_LMAC_RING 0 60 #define WLAN_LRO_ENABLE 0 61 #ifdef IPA_OFFLOAD 62 #define WLAN_CFG_TX_RING_SIZE 2048 63 #define WLAN_CFG_PER_PDEV_TX_RING 0 64 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048 65 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000 66 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024 67 #else 68 #define WLAN_CFG_TX_RING_SIZE 512 69 #define WLAN_CFG_PER_PDEV_TX_RING 1 70 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0 71 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0 72 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0 73 #endif 74 #define WLAN_CFG_TX_COMP_RING_SIZE 1024 75 76 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 77 #define WLAN_CFG_NUM_TX_DESC 1024 78 #define WLAN_CFG_NUM_TX_EXT_DESC 1024 79 80 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 81 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1 82 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1 83 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 84 85 /* Interrupt Mitigation - Timer threshold in us */ 86 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8 87 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8 88 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8 89 #else 90 #define WLAN_CFG_PER_PDEV_TX_RING 0 91 #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0 92 #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0 93 #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0 94 #endif 95 96 #ifdef CONFIG_WIN 97 #define WLAN_CFG_PER_PDEV_RX_RING 0 98 #define WLAN_CFG_PER_PDEV_LMAC_RING 1 99 #define WLAN_LRO_ENABLE 0 100 101 /* Tx Descriptor and Tx Extension Descriptor pool sizes */ 102 #ifndef QCA_WIFI_QCA8074_VP 103 #define WLAN_CFG_NUM_TX_DESC 0x320000 104 #else 105 #define WLAN_CFG_NUM_TX_DESC (8 << 10) 106 #endif 107 #define WLAN_CFG_NUM_TX_EXT_DESC 0x80000 108 109 /* Interrupt Mitigation - Batch threshold in terms of number of frames */ 110 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256 111 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128 112 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1 113 114 /* Interrupt Mitigation - Timer threshold in us */ 115 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000 116 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500 117 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000 118 119 #define WLAN_CFG_TX_RING_SIZE 512 120 121 /* Size the completion ring using following 2 parameters 122 * - NAPI schedule latency (assuming 1 netdev competing for CPU) 123 * = 20 ms (2 jiffies) 124 * - Worst case PPS requirement = 400K PPS 125 * 126 * Ring size = 20 * 400 = 8000 127 * 8192 is nearest power of 2 128 */ 129 #define WLAN_CFG_TX_COMP_RING_SIZE 0x80000 130 #endif 131 132 #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0 133 #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0 134 135 #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0 136 #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1 137 138 #define WLAN_CFG_TX_RING_SIZE_MIN 512 139 #define WLAN_CFG_TX_RING_SIZE_MAX 2048 140 141 #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512 142 #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000 143 144 #define WLAN_CFG_NUM_TX_DESC_MIN 1024 145 #define WLAN_CFG_NUM_TX_DESC_MAX 0x320000 146 147 #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 1024 148 #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000 149 150 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1 151 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256 152 153 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 1 154 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128 155 156 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1 157 #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1 158 159 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8 160 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 100 161 162 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8 163 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500 164 165 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8 166 #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000 167 168 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000 169 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000 170 #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0x2000 171 172 #ifdef QCA_LL_TX_FLOW_CONTROL_V2 173 174 /* Per vdev pools */ 175 #define WLAN_CFG_NUM_TX_DESC_POOL 3 176 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 177 178 #else /* QCA_LL_TX_FLOW_CONTROL_V2 */ 179 180 #ifdef TX_PER_PDEV_DESC_POOL 181 #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT 182 #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT 183 184 #else /* TX_PER_PDEV_DESC_POOL */ 185 186 #define WLAN_CFG_NUM_TX_DESC_POOL 3 187 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3 188 189 #endif /* TX_PER_PDEV_DESC_POOL */ 190 #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */ 191 192 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1 193 #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4 194 195 #define WLAN_CFG_HTT_PKT_TYPE 2 196 #define WLAN_CFG_HTT_PKT_TYPE_MIN 2 197 #define WLAN_CFG_HTT_PKT_TYPE_MAX 2 198 199 #define WLAN_CFG_MAX_PEER_ID 64 200 #define WLAN_CFG_MAX_PEER_ID_MIN 64 201 #define WLAN_CFG_MAX_PEER_ID_MAX 64 202 203 #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100 204 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100 205 #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100 206 207 #define WLAN_CFG_NUM_TCL_DATA_RINGS 3 208 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3 209 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3 210 211 #define WLAN_CFG_NUM_REO_DEST_RING 4 212 #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4 213 #define WLAN_CFG_NUM_REO_DEST_RING_MAX 4 214 215 #define WLAN_CFG_WBM_RELEASE_RING_SIZE 64 216 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64 217 #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 64 218 219 #define WLAN_CFG_TCL_CMD_RING_SIZE 32 220 #define WLAN_CFG_TCL_CMD_RING_SIZE_MIN 32 221 #define WLAN_CFG_TCL_CMD_RING_SIZE_MAX 32 222 223 #define WLAN_CFG_TCL_STATUS_RING_SIZE 32 224 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32 225 #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32 226 227 #if defined(QCA_WIFI_QCA6290) 228 #define WLAN_CFG_REO_DST_RING_SIZE 1024 229 #else 230 #define WLAN_CFG_REO_DST_RING_SIZE 2048 231 #endif 232 233 #define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024 234 #define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048 235 236 #define WLAN_CFG_REO_REINJECT_RING_SIZE 32 237 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32 238 #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 32 239 240 #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024 241 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8 242 #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024 243 244 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 128 245 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128 246 #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 128 247 248 #define WLAN_CFG_REO_CMD_RING_SIZE 64 249 #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64 250 #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 64 251 252 #define WLAN_CFG_REO_STATUS_RING_SIZE 128 253 #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128 254 #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 128 255 256 #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024 257 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024 258 #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024 259 260 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096 261 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16 262 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096 263 264 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096 265 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16 266 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 4096 267 268 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048 269 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48 270 #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 2048 271 272 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024 273 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16 274 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 1024 275 276 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096 277 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096 278 #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 4096 279 280 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024 281 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024 282 #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192 283 284 /* DP INI Declerations */ 285 #define CFG_DP_HTT_PACKET_TYPE \ 286 CFG_INI_UINT("dp_htt_packet_type", \ 287 WLAN_CFG_HTT_PKT_TYPE_MIN, \ 288 WLAN_CFG_HTT_PKT_TYPE_MAX, \ 289 WLAN_CFG_HTT_PKT_TYPE, \ 290 CFG_VALUE_OR_DEFAULT, "DP HTT packet type") 291 292 #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \ 293 CFG_INI_UINT("dp_int_batch_threshold_other", \ 294 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 295 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 296 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 297 CFG_VALUE_OR_DEFAULT, "DP INT threshold Other") 298 299 #define CFG_DP_INT_BATCH_THRESHOLD_RX \ 300 CFG_INI_UINT("dp_int_batch_threshold_rx", \ 301 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \ 302 WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \ 303 WLAN_CFG_INT_BATCH_THRESHOLD_RX, \ 304 CFG_VALUE_OR_DEFAULT, "DP INT threshold Rx") 305 306 #define CFG_DP_INT_BATCH_THRESHOLD_TX \ 307 CFG_INI_UINT("dp_int_batch_threshold_tx", \ 308 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \ 309 WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \ 310 WLAN_CFG_INT_BATCH_THRESHOLD_TX, \ 311 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx") 312 313 #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \ 314 CFG_INI_UINT("dp_int_timer_threshold_other", \ 315 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \ 316 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \ 317 WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \ 318 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other") 319 320 #define CFG_DP_INT_TIMER_THRESHOLD_RX \ 321 CFG_INI_UINT("dp_int_timer_threshold_rx", \ 322 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \ 323 WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \ 324 WLAN_CFG_INT_TIMER_THRESHOLD_RX, \ 325 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx") 326 327 #define CFG_DP_INT_TIMER_THRESHOLD_TX \ 328 CFG_INI_UINT("dp_int_timer_threshold_tx", \ 329 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \ 330 WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \ 331 WLAN_CFG_INT_TIMER_THRESHOLD_TX, \ 332 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx") 333 334 #define CFG_DP_MAX_ALLOC_SIZE \ 335 CFG_INI_UINT("dp_max_alloc_size", \ 336 WLAN_CFG_MAX_ALLOC_SIZE_MIN, \ 337 WLAN_CFG_MAX_ALLOC_SIZE_MAX, \ 338 WLAN_CFG_MAX_ALLOC_SIZE, \ 339 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size") 340 341 #define CFG_DP_MAX_CLIENTS \ 342 CFG_INI_UINT("dp_max_clients", \ 343 WLAN_CFG_MAX_CLIENTS_MIN, \ 344 WLAN_CFG_MAX_CLIENTS_MAX, \ 345 WLAN_CFG_MAX_CLIENTS, \ 346 CFG_VALUE_OR_DEFAULT, "DP Max Clients") 347 348 #define CFG_DP_MAX_PEER_ID \ 349 CFG_INI_UINT("dp_max_peer_id", \ 350 WLAN_CFG_MAX_PEER_ID_MIN, \ 351 WLAN_CFG_MAX_PEER_ID_MAX, \ 352 WLAN_CFG_MAX_PEER_ID, \ 353 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID") 354 355 #define CFG_DP_REO_DEST_RINGS \ 356 CFG_INI_UINT("dp_reo_dest_rings", \ 357 WLAN_CFG_NUM_REO_DEST_RING_MIN, \ 358 WLAN_CFG_NUM_REO_DEST_RING_MAX, \ 359 WLAN_CFG_NUM_REO_DEST_RING, \ 360 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings") 361 362 #define CFG_DP_TCL_DATA_RINGS \ 363 CFG_INI_UINT("dp_tcl_data_rings", \ 364 WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \ 365 WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \ 366 WLAN_CFG_NUM_TCL_DATA_RINGS, \ 367 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings") 368 369 #define CFG_DP_TX_DESC \ 370 CFG_INI_UINT("dp_tx_desc", \ 371 WLAN_CFG_NUM_TX_DESC_MIN, \ 372 WLAN_CFG_NUM_TX_DESC_MAX, \ 373 WLAN_CFG_NUM_TX_DESC, \ 374 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors") 375 376 #define CFG_DP_TX_EXT_DESC \ 377 CFG_INI_UINT("dp_tx_ext_desc", \ 378 WLAN_CFG_NUM_TX_EXT_DESC_MIN, \ 379 WLAN_CFG_NUM_TX_EXT_DESC_MAX, \ 380 WLAN_CFG_NUM_TX_EXT_DESC, \ 381 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors") 382 383 #define CFG_DP_TX_EXT_DESC_POOLS \ 384 CFG_INI_UINT("dp_tx_ext_desc_pool", \ 385 WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \ 386 WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \ 387 WLAN_CFG_NUM_TXEXT_DESC_POOL, \ 388 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool") 389 390 #define CFG_DP_PDEV_RX_RING \ 391 CFG_INI_UINT("dp_pdev_rx_ring", \ 392 WLAN_CFG_PER_PDEV_RX_RING_MIN, \ 393 WLAN_CFG_PER_PDEV_RX_RING_MAX, \ 394 WLAN_CFG_PER_PDEV_RX_RING, \ 395 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring") 396 397 #define CFG_DP_PDEV_TX_RING \ 398 CFG_INI_UINT("dp_pdev_tx_ring", \ 399 WLAN_CFG_PER_PDEV_TX_RING_MIN, \ 400 WLAN_CFG_PER_PDEV_TX_RING_MAX, \ 401 WLAN_CFG_PER_PDEV_TX_RING, \ 402 CFG_VALUE_OR_DEFAULT, \ 403 "DP PDEV Tx Ring") 404 405 #define CFG_DP_RX_DEFRAG_TIMEOUT \ 406 CFG_INI_UINT("dp_rx_defrag_timeout", \ 407 WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \ 408 WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \ 409 WLAN_CFG_RX_DEFRAG_TIMEOUT, \ 410 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout") 411 412 #define CFG_DP_TX_COMPL_RING_SIZE \ 413 CFG_INI_UINT("dp_tx_compl_ring_size", \ 414 WLAN_CFG_TX_COMP_RING_SIZE_MIN, \ 415 WLAN_CFG_TX_COMP_RING_SIZE_MAX, \ 416 WLAN_CFG_TX_COMP_RING_SIZE, \ 417 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size") 418 419 #define CFG_DP_TX_RING_SIZE \ 420 CFG_INI_UINT("dp_tx_ring_size", \ 421 WLAN_CFG_TX_RING_SIZE_MIN,\ 422 WLAN_CFG_TX_RING_SIZE_MAX,\ 423 WLAN_CFG_TX_RING_SIZE,\ 424 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size") 425 426 #define CFG_DP_NSS_COMP_RING_SIZE \ 427 CFG_INI_UINT("dp_nss_comp_ring_size", \ 428 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \ 429 WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \ 430 WLAN_CFG_NSS_TX_COMP_RING_SIZE, \ 431 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size") 432 433 #define CFG_DP_PDEV_LMAC_RING \ 434 CFG_INI_UINT("dp_pdev_lmac_ring", \ 435 WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \ 436 WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \ 437 WLAN_CFG_PER_PDEV_LMAC_RING, \ 438 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring") 439 440 #define CFG_DP_BASE_HW_MAC_ID \ 441 CFG_INI_UINT("dp_base_hw_macid", \ 442 0, 1, 1, \ 443 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID") 444 445 #define CFG_DP_RX_HASH \ 446 CFG_INI_BOOL("dp_rx_hash", true, \ 447 "DP Rx Hash") 448 449 #define CFG_DP_TSO \ 450 CFG_INI_BOOL("TSOEnable", false, \ 451 "DP TSO Enabled") 452 453 #define CFG_DP_LRO \ 454 CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \ 455 "DP LRO Enable") 456 457 #define CFG_DP_SG \ 458 CFG_INI_BOOL("dp_sg_support", false, \ 459 "DP SG Enable") 460 461 #define CFG_DP_GRO \ 462 CFG_INI_BOOL("GROEnable", false, \ 463 "DP GRO Enable") 464 465 #define CFG_DP_OL_TX_CSUM \ 466 CFG_INI_BOOL("dp_offload_tx_csum_support", false, \ 467 "DP tx csum Enable") 468 469 #define CFG_DP_OL_RX_CSUM \ 470 CFG_INI_BOOL("dp_offload_rx_csum_support", false, \ 471 "DP rx csum Enable") 472 473 #define CFG_DP_RAWMODE \ 474 CFG_INI_BOOL("dp_rawmode_support", false, \ 475 "DP rawmode Enable") 476 477 #define CFG_DP_PEER_FLOW_CTRL \ 478 CFG_INI_BOOL("dp_peer_flow_control_support", false, \ 479 "DP peer flow ctrl Enable") 480 481 #define CFG_DP_NAPI \ 482 CFG_INI_BOOL("dp_napi_enabled", MCL_OR_WIN_VALUE(true, false), \ 483 "DP Napi Enabled") 484 485 #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \ 486 CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \ 487 "DP TCP UDP Checksum Offload") 488 489 #define CFG_DP_DEFRAG_TIMEOUT_CHECK \ 490 CFG_INI_BOOL("dp_defrag_timeout_check", true, \ 491 "DP Defrag Timeout Check") 492 493 #define CFG_DP_WBM_RELEASE_RING \ 494 CFG_INI_UINT("dp_wbm_release_ring", \ 495 WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \ 496 WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \ 497 WLAN_CFG_WBM_RELEASE_RING_SIZE, \ 498 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring") 499 500 #define CFG_DP_TCL_CMD_RING \ 501 CFG_INI_UINT("dp_tcl_cmd_ring", \ 502 WLAN_CFG_TCL_CMD_RING_SIZE_MIN, \ 503 WLAN_CFG_TCL_CMD_RING_SIZE_MAX, \ 504 WLAN_CFG_TCL_CMD_RING_SIZE, \ 505 CFG_VALUE_OR_DEFAULT, "DP TCL command ring") 506 507 #define CFG_DP_TCL_STATUS_RING \ 508 CFG_INI_UINT("dp_tcl_status_ring",\ 509 WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \ 510 WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \ 511 WLAN_CFG_TCL_STATUS_RING_SIZE, \ 512 CFG_VALUE_OR_DEFAULT, "DP TCL status ring") 513 514 #define CFG_DP_REO_REINJECT_RING \ 515 CFG_INI_UINT("dp_reo_reinject_ring", \ 516 WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \ 517 WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \ 518 WLAN_CFG_REO_REINJECT_RING_SIZE, \ 519 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring") 520 521 #define CFG_DP_RX_RELEASE_RING \ 522 CFG_INI_UINT("dp_rx_release_ring", \ 523 WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \ 524 WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \ 525 WLAN_CFG_RX_RELEASE_RING_SIZE, \ 526 CFG_VALUE_OR_DEFAULT, "DP Rx release ring") 527 528 #define CFG_DP_REO_EXCEPTION_RING \ 529 CFG_INI_UINT("dp_reo_exception_ring", \ 530 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \ 531 WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \ 532 WLAN_CFG_REO_EXCEPTION_RING_SIZE, \ 533 CFG_VALUE_OR_DEFAULT, "DP REO exception ring") 534 535 #define CFG_DP_REO_CMD_RING \ 536 CFG_INI_UINT("dp_reo_cmd_ring", \ 537 WLAN_CFG_REO_CMD_RING_SIZE_MIN, \ 538 WLAN_CFG_REO_CMD_RING_SIZE_MAX, \ 539 WLAN_CFG_REO_CMD_RING_SIZE, \ 540 CFG_VALUE_OR_DEFAULT, "DP REO command ring") 541 542 #define CFG_DP_REO_STATUS_RING \ 543 CFG_INI_UINT("dp_reo_status_ring", \ 544 WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \ 545 WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \ 546 WLAN_CFG_REO_STATUS_RING_SIZE, \ 547 CFG_VALUE_OR_DEFAULT, "DP REO status ring") 548 549 #define CFG_DP_RXDMA_BUF_RING \ 550 CFG_INI_UINT("dp_rxdma_buf_ring", \ 551 WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \ 552 WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \ 553 WLAN_CFG_RXDMA_BUF_RING_SIZE, \ 554 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring") 555 556 #define CFG_DP_RXDMA_REFILL_RING \ 557 CFG_INI_UINT("dp_rxdma_refill_ring", \ 558 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \ 559 WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \ 560 WLAN_CFG_RXDMA_REFILL_RING_SIZE, \ 561 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring") 562 563 #define CFG_DP_RXDMA_MONITOR_BUF_RING \ 564 CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \ 565 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \ 566 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \ 567 WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \ 568 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring") 569 570 #define CFG_DP_RXDMA_MONITOR_DST_RING \ 571 CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \ 572 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \ 573 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \ 574 WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \ 575 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 576 577 #define CFG_DP_RXDMA_MONITOR_STATUS_RING \ 578 CFG_INI_UINT("dp_rxdma_monitor_status_ring", \ 579 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \ 580 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \ 581 WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \ 582 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring") 583 584 #define CFG_DP_RXDMA_MONITOR_DESC_RING \ 585 CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \ 586 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \ 587 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \ 588 WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \ 589 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring") 590 591 #define CFG_DP_RXDMA_ERR_DST_RING \ 592 CFG_INI_UINT("dp_rxdma_err_dst_ring", \ 593 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \ 594 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \ 595 WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \ 596 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring") 597 598 #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \ 599 CFG_INI_UINT("TxFlowStartQueueOffset", \ 600 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \ 601 CFG_VALUE_OR_DEFAULT, "Start queue offset") 602 603 #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \ 604 CFG_INI_UINT("TxFlowStopQueueThreshold", \ 605 0, 50, 15, \ 606 CFG_VALUE_OR_DEFAULT, "Stop queue Threshold") 607 608 #define CFG_DP_IPA_UC_TX_BUF_SIZE \ 609 CFG_INI_UINT("IpaUcTxBufSize", \ 610 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \ 611 CFG_VALUE_OR_DEFAULT, "IPA tx buffer size") 612 613 #define CFG_DP_IPA_UC_TX_PARTITION_BASE \ 614 CFG_INI_UINT("IpaUcTxPartitionBase", \ 615 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \ 616 CFG_VALUE_OR_DEFAULT, "IPA tx partition base") 617 618 #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \ 619 CFG_INI_UINT("IpaUcRxIndRingCount", \ 620 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \ 621 CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count") 622 623 #define CFG_DP_REORDER_OFFLOAD_SUPPORT \ 624 CFG_INI_UINT("gReorderOffloadSupported", \ 625 0, 1, 1, \ 626 CFG_VALUE_OR_DEFAULT, "Packet reordering offload to firmware") 627 628 #define CFG_DP_AP_STA_SECURITY_SEPERATION \ 629 CFG_INI_BOOL("gDisableIntraBssFwd", \ 630 false, "Disable intrs BSS Rx packets") 631 632 #define CFG_DP_ENABLE_DATA_STALL_DETECTION \ 633 CFG_INI_BOOL("gEnableDataStallDetection", \ 634 true, "Enable/Disable Data stall detection") 635 636 #define CFG_DP \ 637 CFG(CFG_DP_HTT_PACKET_TYPE) \ 638 CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \ 639 CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \ 640 CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \ 641 CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \ 642 CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \ 643 CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \ 644 CFG(CFG_DP_MAX_ALLOC_SIZE) \ 645 CFG(CFG_DP_MAX_CLIENTS) \ 646 CFG(CFG_DP_MAX_PEER_ID) \ 647 CFG(CFG_DP_REO_DEST_RINGS) \ 648 CFG(CFG_DP_TCL_DATA_RINGS) \ 649 CFG(CFG_DP_TX_DESC) \ 650 CFG(CFG_DP_TX_EXT_DESC) \ 651 CFG(CFG_DP_TX_EXT_DESC_POOLS) \ 652 CFG(CFG_DP_PDEV_RX_RING) \ 653 CFG(CFG_DP_PDEV_TX_RING) \ 654 CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \ 655 CFG(CFG_DP_TX_COMPL_RING_SIZE) \ 656 CFG(CFG_DP_TX_RING_SIZE) \ 657 CFG(CFG_DP_NSS_COMP_RING_SIZE) \ 658 CFG(CFG_DP_PDEV_LMAC_RING) \ 659 CFG(CFG_DP_BASE_HW_MAC_ID) \ 660 CFG(CFG_DP_RX_HASH) \ 661 CFG(CFG_DP_TSO) \ 662 CFG(CFG_DP_LRO) \ 663 CFG(CFG_DP_SG) \ 664 CFG(CFG_DP_GRO) \ 665 CFG(CFG_DP_OL_TX_CSUM) \ 666 CFG(CFG_DP_OL_RX_CSUM) \ 667 CFG(CFG_DP_RAWMODE) \ 668 CFG(CFG_DP_PEER_FLOW_CTRL) \ 669 CFG(CFG_DP_NAPI) \ 670 CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \ 671 CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \ 672 CFG(CFG_DP_WBM_RELEASE_RING) \ 673 CFG(CFG_DP_TCL_CMD_RING) \ 674 CFG(CFG_DP_TCL_STATUS_RING) \ 675 CFG(CFG_DP_REO_REINJECT_RING) \ 676 CFG(CFG_DP_RX_RELEASE_RING) \ 677 CFG(CFG_DP_REO_EXCEPTION_RING) \ 678 CFG(CFG_DP_REO_CMD_RING) \ 679 CFG(CFG_DP_REO_STATUS_RING) \ 680 CFG(CFG_DP_RXDMA_BUF_RING) \ 681 CFG(CFG_DP_RXDMA_REFILL_RING) \ 682 CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \ 683 CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \ 684 CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \ 685 CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \ 686 CFG(CFG_DP_RXDMA_ERR_DST_RING) \ 687 CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \ 688 CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \ 689 CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \ 690 CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \ 691 CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \ 692 CFG(CFG_DP_REORDER_OFFLOAD_SUPPORT) \ 693 CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \ 694 CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) 695 696 #endif /* _CFG_DP_H_ */ 697