xref: /wlan-dirver/qca-wifi-host-cmn/umac/regulatory/dispatcher/inc/reg_services_public_struct.h (revision fa47688f04ef001a6dcafaebdcc3c031f15ee75e)
1 /*
2  * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19  /**
20  * DOC: reg_services_public_struct.h
21  * This file contains regulatory data structures
22  */
23 
24 #ifndef __REG_SERVICES_PUBLIC_STRUCT_H_
25 #define __REG_SERVICES_PUBLIC_STRUCT_H_
26 
27 #define REG_SBS_SEPARATION_THRESHOLD 100
28 #define REG_MAX_CHANNELS_PER_OPERATING_CLASS  25
29 #define REG_MAX_SUPP_OPER_CLASSES 32
30 #define REG_MAX_CHAN_CHANGE_CBKS 30
31 #define MAX_STA_VDEV_CNT 4
32 #define INVALID_VDEV_ID 0xFF
33 #define INVALID_CHANNEL_NUM 0xBAD
34 #define CH_AVOID_MAX_RANGE   4
35 #define REG_ALPHA2_LEN 2
36 #define MAX_REG_RULES 10
37 
38 #define REGULATORY_CHAN_DISABLED     BIT(0)
39 #define REGULATORY_CHAN_NO_IR        BIT(1)
40 #define REGULATORY_CHAN_RADAR        BIT(3)
41 #define REGULATORY_CHAN_NO_OFDM      BIT(6)
42 #define REGULATORY_CHAN_INDOOR_ONLY  BIT(9)
43 
44 #define REGULATORY_CHAN_NO_HT40      BIT(4)
45 #define REGULATORY_CHAN_NO_80MHZ     BIT(7)
46 #define REGULATORY_CHAN_NO_160MHZ    BIT(8)
47 #define REGULATORY_CHAN_NO_20MHZ     BIT(11)
48 #define REGULATORY_CHAN_NO_10MHZ     BIT(12)
49 
50 #define REGULATORY_PHYMODE_NO11A     BIT(0)
51 #define REGULATORY_PHYMODE_NO11B     BIT(1)
52 #define REGULATORY_PHYMODE_NO11G     BIT(2)
53 #define REGULATORY_CHAN_NO11N        BIT(3)
54 #define REGULATORY_PHYMODE_NO11AC    BIT(4)
55 #define REGULATORY_PHYMODE_NO11AX    BIT(5)
56 
57 /**
58  * enum dfs_reg - DFS region
59  * @DFS_UNINIT_REGION: un-initialized region
60  * @DFS_FCC_REGION: FCC region
61  * @DFS_ETSI_REGION: ETSI region
62  * @DFS_MKK_REGION: MKK region
63  * @DFS_CN_REGION: China region
64  * @DFS_KR_REGION: Korea region
65  * @DFS_UNDEF_REGION: Undefined region
66  */
67 enum dfs_reg {
68 	DFS_UNINIT_REGION = 0,
69 	DFS_FCC_REGION = 1,
70 	DFS_ETSI_REGION = 2,
71 	DFS_MKK_REGION = 3,
72 	DFS_CN_REGION = 4,
73 	DFS_KR_REGION = 5,
74 	DFS_UNDEF_REGION = 0xFFFF,
75 };
76 
77 #ifdef CONFIG_LEGACY_CHAN_ENUM
78 
79 /**
80  * enum channel_enum - channel enumeration
81  * @CHAN_ENUM_1:  channel number 1
82  * @CHAN_ENUM_2:  channel number 2
83  * @CHAN_ENUM_3:  channel number 3
84  * @CHAN_ENUM_4:  channel number 4
85  * @CHAN_ENUM_5:  channel number 5
86  * @CHAN_ENUM_6:  channel number 6
87  * @CHAN_ENUM_7:  channel number 7
88  * @CHAN_ENUM_8:  channel number 8
89  * @CHAN_ENUM_9:  channel number 9
90  * @CHAN_ENUM_10:  channel number 10
91  * @CHAN_ENUM_11:  channel number 11
92  * @CHAN_ENUM_12:  channel number 12
93  * @CHAN_ENUM_13:  channel number 13
94  * @CHAN_ENUM_14:  channel number 14
95  * @CHAN_ENUM_183:  channel number 183
96  * @CHAN_ENUM_184:  channel number 184
97  * @CHAN_ENUM_185:  channel number 185
98  * @CHAN_ENUM_187:  channel number 187
99  * @CHAN_ENUM_188:  channel number 188
100  * @CHAN_ENUM_189:  channel number 189
101  * @CHAN_ENUM_192:  channel number 192
102  * @CHAN_ENUM_196:  channel number 196
103  * @CHAN_ENUM_36:  channel number 36
104  * @CHAN_ENUM_40:  channel number 40
105  * @CHAN_ENUM_44:  channel number 44
106  * @CHAN_ENUM_48:  channel number 48
107  * @CHAN_ENUM_52:  channel number 52
108  * @CHAN_ENUM_56:  channel number 56
109  * @CHAN_ENUM_60:  channel number 60
110  * @CHAN_ENUM_64:  channel number 64
111  * @CHAN_ENUM_100:  channel number 100
112  * @CHAN_ENUM_104:  channel number 104
113  * @CHAN_ENUM_108:  channel number 108
114  * @CHAN_ENUM_112:  channel number 112
115  * @CHAN_ENUM_116:  channel number 116
116  * @CHAN_ENUM_120:  channel number 120
117  * @CHAN_ENUM_124:  channel number 124
118  * @CHAN_ENUM_128:  channel number 128
119  * @CHAN_ENUM_132:  channel number 132
120  * @CHAN_ENUM_136:  channel number 136
121  * @CHAN_ENUM_140:  channel number 140
122  * @CHAN_ENUM_144:  channel number 144
123  * @CHAN_ENUM_149:  channel number 149
124  * @CHAN_ENUM_153:  channel number 153
125  * @CHAN_ENUM_157:  channel number 157
126  * @CHAN_ENUM_161:  channel number 161
127  * @CHAN_ENUM_165:  channel number 165
128  * @CHAN_ENUM_169:  channel number 169
129  * @CHAN_ENUM_170:  channel number 170
130  * @CHAN_ENUM_171:  channel number 171
131  * @CHAN_ENUM_172:  channel number 172
132  * @CHAN_ENUM_173:  channel number 173
133  * @CHAN_ENUM_174:  channel number 174
134  * @CHAN_ENUM_175:  channel number 175
135  * @CHAN_ENUM_176:  channel number 176
136  * @CHAN_ENUM_177:  channel number 177
137  * @CHAN_ENUM_178:  channel number 178
138  * @CHAN_ENUM_179:  channel number 179
139  * @CHAN_ENUM_180:  channel number 180
140  * @CHAN_ENUM_181:  channel number 181
141  * @CHAN_ENUM_182:  channel number 182
142  * @CHAN_ENUM_183:  channel number 183
143  * @CHAN_ENUM_184:  channel number 184
144  */
145 
146 #ifdef WLAN_FEATURE_DSRC
147 enum channel_enum {
148 	CHAN_ENUM_1,
149 	CHAN_ENUM_2,
150 	CHAN_ENUM_3,
151 	CHAN_ENUM_4,
152 	CHAN_ENUM_5,
153 	CHAN_ENUM_6,
154 	CHAN_ENUM_7,
155 	CHAN_ENUM_8,
156 	CHAN_ENUM_9,
157 	CHAN_ENUM_10,
158 	CHAN_ENUM_11,
159 	CHAN_ENUM_12,
160 	CHAN_ENUM_13,
161 	CHAN_ENUM_14,
162 
163 	CHAN_ENUM_36,
164 	CHAN_ENUM_40,
165 	CHAN_ENUM_44,
166 	CHAN_ENUM_48,
167 	CHAN_ENUM_52,
168 	CHAN_ENUM_56,
169 	CHAN_ENUM_60,
170 	CHAN_ENUM_64,
171 
172 	CHAN_ENUM_100,
173 	CHAN_ENUM_104,
174 	CHAN_ENUM_108,
175 	CHAN_ENUM_112,
176 	CHAN_ENUM_116,
177 	CHAN_ENUM_120,
178 	CHAN_ENUM_124,
179 	CHAN_ENUM_128,
180 	CHAN_ENUM_132,
181 	CHAN_ENUM_136,
182 	CHAN_ENUM_140,
183 	CHAN_ENUM_144,
184 
185 	CHAN_ENUM_149,
186 	CHAN_ENUM_153,
187 	CHAN_ENUM_157,
188 	CHAN_ENUM_161,
189 	CHAN_ENUM_165,
190 
191 	CHAN_ENUM_170,
192 	CHAN_ENUM_171,
193 	CHAN_ENUM_172,
194 	CHAN_ENUM_173,
195 	CHAN_ENUM_174,
196 	CHAN_ENUM_175,
197 	CHAN_ENUM_176,
198 	CHAN_ENUM_177,
199 	CHAN_ENUM_178,
200 	CHAN_ENUM_179,
201 	CHAN_ENUM_180,
202 	CHAN_ENUM_181,
203 	CHAN_ENUM_182,
204 	CHAN_ENUM_183,
205 	CHAN_ENUM_184,
206 
207 	NUM_CHANNELS,
208 
209 	MIN_24GHZ_CHANNEL = CHAN_ENUM_1,
210 	MAX_24GHZ_CHANNEL = CHAN_ENUM_14,
211 	NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
212 
213 	MIN_49GHZ_CHANNEL = INVALID_CHANNEL_NUM,
214 	MAX_49GHZ_CHANNEL = INVALID_CHANNEL_NUM - 1,
215 	NUM_49GHZ_CHANNELS = MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1,
216 
217 	MIN_5GHZ_CHANNEL = CHAN_ENUM_36,
218 	MAX_5GHZ_CHANNEL = CHAN_ENUM_184,
219 	NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1),
220 
221 	MIN_DSRC_CHANNEL = CHAN_ENUM_170,
222 	MAX_DSRC_CHANNEL = CHAN_ENUM_184,
223 	NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1),
224 
225 	INVALID_CHANNEL = 0xBAD,
226 };
227 
228 #else
229 enum channel_enum {
230 	CHAN_ENUM_1,
231 	CHAN_ENUM_2,
232 	CHAN_ENUM_3,
233 	CHAN_ENUM_4,
234 	CHAN_ENUM_5,
235 	CHAN_ENUM_6,
236 	CHAN_ENUM_7,
237 	CHAN_ENUM_8,
238 	CHAN_ENUM_9,
239 	CHAN_ENUM_10,
240 	CHAN_ENUM_11,
241 	CHAN_ENUM_12,
242 	CHAN_ENUM_13,
243 	CHAN_ENUM_14,
244 
245 	CHAN_ENUM_36,
246 	CHAN_ENUM_40,
247 	CHAN_ENUM_44,
248 	CHAN_ENUM_48,
249 	CHAN_ENUM_52,
250 	CHAN_ENUM_56,
251 	CHAN_ENUM_60,
252 	CHAN_ENUM_64,
253 
254 	CHAN_ENUM_100,
255 	CHAN_ENUM_104,
256 	CHAN_ENUM_108,
257 	CHAN_ENUM_112,
258 	CHAN_ENUM_116,
259 	CHAN_ENUM_120,
260 	CHAN_ENUM_124,
261 	CHAN_ENUM_128,
262 	CHAN_ENUM_132,
263 	CHAN_ENUM_136,
264 	CHAN_ENUM_140,
265 	CHAN_ENUM_144,
266 
267 	CHAN_ENUM_149,
268 	CHAN_ENUM_153,
269 	CHAN_ENUM_157,
270 	CHAN_ENUM_161,
271 	CHAN_ENUM_165,
272 	CHAN_ENUM_169,
273 	CHAN_ENUM_173,
274 
275 	NUM_CHANNELS,
276 
277 	MIN_24GHZ_CHANNEL = CHAN_ENUM_1,
278 	MAX_24GHZ_CHANNEL = CHAN_ENUM_14,
279 	NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
280 
281 	MIN_49GHZ_CHANNEL = INVALID_CHANNEL_NUM,
282 	MAX_49GHZ_CHANNEL = INVALID_CHANNEL_NUM - 1,
283 	NUM_49GHZ_CHANNELS = MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1,
284 
285 	MIN_5GHZ_CHANNEL = CHAN_ENUM_36,
286 
287 	MAX_5GHZ_CHANNEL = CHAN_ENUM_173,
288 
289 	NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1),
290 	INVALID_CHANNEL = 0xBAD,
291 };
292 #endif /* WLAN_FEATURE_DSRC */
293 
294 #else /* CONFIG_LEGACY_CHAN_ENUM */
295 /**
296  * enum channel_enum - channel enumeration
297  * @CHAN_ENUM_2412: channel with freq 2412
298  * @CHAN_ENUM_2417: channel with freq 2417
299  * @CHAN_ENUM_2422: channel with freq 2422
300  * @CHAN_ENUM_2427: channel with freq 2427
301  * @CHAN_ENUM_2432: channel with freq 2432
302  * @CHAN_ENUM_2437: channel with freq 2437
303  * @CHAN_ENUM_2442: channel with freq 2442
304  * @CHAN_ENUM_2447: channel with freq 2447
305  * @CHAN_ENUM_2452: channel with freq 2452
306  * @CHAN_ENUM_2457: channel with freq 2457
307  * @CHAN_ENUM_2462: channel with freq 2462
308  * @CHAN_ENUM_2467: channel with freq 2467
309  * @CHAN_ENUM_2472: channel with freq 2472
310  * @CHAN_ENUM_2484: channel with freq 2484
311  * @CHAN_ENUM_4912: channel with freq 4912
312  * @CHAN_ENUM_4915: channel with freq 4915
313  * @CHAN_ENUM_4917: channel with freq 4917
314  * @CHAN_ENUM_4920: channel with freq 4920
315  * @CHAN_ENUM_4922: channel with freq 4922
316  * @CHAN_ENUM_4925: channel with freq 4925
317  * @CHAN_ENUM_4927: channel with freq 4927
318  * @CHAN_ENUM_4932: channel with freq 4932
319  * @CHAN_ENUM_4935: channel with freq 4935
320  * @CHAN_ENUM_4937: channel with freq 4937
321  * @CHAN_ENUM_4940: channel with freq 4940
322  * @CHAN_ENUM_4942: channel with freq 4942
323  * @CHAN_ENUM_4945: channel with freq 4945
324  * @CHAN_ENUM_4947: channel with freq 4947
325  * @CHAN_ENUM_4950: channel with freq 4950
326  * @CHAN_ENUM_4952: channel with freq 4952
327  * @CHAN_ENUM_4955: channel with freq 4955
328  * @CHAN_ENUM_4957: channel with freq 4957
329  * @CHAN_ENUM_4960: channel with freq 4960
330  * @CHAN_ENUM_4962: channel with freq 4962
331  * @CHAN_ENUM_4965: channel with freq 4965
332  * @CHAN_ENUM_4967: channel with freq 4967
333  * @CHAN_ENUM_4970: channel with freq 4970
334  * @CHAN_ENUM_4972: channel with freq 4972
335  * @CHAN_ENUM_4975: channel with freq 4975
336  * @CHAN_ENUM_4977: channel with freq 4977
337  * @CHAN_ENUM_4980: channel with freq 4980
338  * @CHAN_ENUM_4982: channel with freq 4982
339  * @CHAN_ENUM_4985: channel with freq 4985
340  * @CHAN_ENUM_4987: channel with freq 4987
341  * @CHAN_ENUM_5032: channel with freq 5032
342  * @CHAN_ENUM_5035: channel with freq 5035
343  * @CHAN_ENUM_5037: channel with freq 5037
344  * @CHAN_ENUM_5040: channel with freq 5040
345  * @CHAN_ENUM_5042: channel with freq 5042
346  * @CHAN_ENUM_5045: channel with freq 5045
347  * @CHAN_ENUM_5047: channel with freq 5047
348  * @CHAN_ENUM_5052: channel with freq 5052
349  * @CHAN_ENUM_5055: channel with freq 5055
350  * @CHAN_ENUM_5057: channel with freq 5057
351  * @CHAN_ENUM_5060: channel with freq 5060
352  * @CHAN_ENUM_5080: channel with freq 5080
353  * @CHAN_ENUM_5180: channel with freq 5180
354  * @CHAN_ENUM_5200: channel with freq 5200
355  * @CHAN_ENUM_5220: channel with freq 5220
356  * @CHAN_ENUM_5240: channel with freq 5240
357  * @CHAN_ENUM_5260: channel with freq 5260
358  * @CHAN_ENUM_5280: channel with freq 5280
359  * @CHAN_ENUM_5300: channel with freq 5300
360  * @CHAN_ENUM_5320: channel with freq 5320
361  * @CHAN_ENUM_5500: channel with freq 5500
362  * @CHAN_ENUM_5520: channel with freq 5520
363  * @CHAN_ENUM_5540: channel with freq 5540
364  * @CHAN_ENUM_5560: channel with freq 5560
365  * @CHAN_ENUM_5580: channel with freq 5580
366  * @CHAN_ENUM_5600: channel with freq 5600
367  * @CHAN_ENUM_5620: channel with freq 5620
368  * @CHAN_ENUM_5640: channel with freq 5640
369  * @CHAN_ENUM_5660: channel with freq 5660
370  * @CHAN_ENUM_5680: channel with freq 5680
371  * @CHAN_ENUM_5700: channel with freq 5700
372  * @CHAN_ENUM_5720: channel with freq 5720
373  * @CHAN_ENUM_5745: channel with freq 5745
374  * @CHAN_ENUM_5765: channel with freq 5765
375  * @CHAN_ENUM_5785: channel with freq 5785
376  * @CHAN_ENUM_5805: channel with freq 5805
377  * @CHAN_ENUM_5825: channel with freq 5825
378  * @CHAN_ENUM_5845: channel with freq 5845
379  * @CHAN_ENUM_5850: channel with freq 5850
380  * @CHAN_ENUM_5855: channel with freq 5855
381  * @CHAN_ENUM_5860: channel with freq 5860
382  * @CHAN_ENUM_5865: channel with freq 5865
383  * @CHAN_ENUM_5870: channel with freq 5870
384  * @CHAN_ENUM_5875: channel with freq 5875
385  * @CHAN_ENUM_5880: channel with freq 5880
386  * @CHAN_ENUM_5885: channel with freq 5885
387  * @CHAN_ENUM_5890: channel with freq 5890
388  * @CHAN_ENUM_5895: channel with freq 5895
389  * @CHAN_ENUM_5900: channel with freq 5900
390  * @CHAN_ENUM_5905: channel with freq 5905
391  * @CHAN_ENUM_5910: channel with freq 5910
392  * @CHAN_ENUM_5915: channel with freq 5915
393  * @CHAN_ENUM_5920: channel with freq 5920
394  */
395 enum channel_enum {
396 	CHAN_ENUM_2412,
397 	CHAN_ENUM_2417,
398 	CHAN_ENUM_2422,
399 	CHAN_ENUM_2427,
400 	CHAN_ENUM_2432,
401 	CHAN_ENUM_2437,
402 	CHAN_ENUM_2442,
403 	CHAN_ENUM_2447,
404 	CHAN_ENUM_2452,
405 	CHAN_ENUM_2457,
406 	CHAN_ENUM_2462,
407 	CHAN_ENUM_2467,
408 	CHAN_ENUM_2472,
409 	CHAN_ENUM_2484,
410 
411 	CHAN_ENUM_4912,
412 	CHAN_ENUM_4915,
413 	CHAN_ENUM_4917,
414 	CHAN_ENUM_4920,
415 	CHAN_ENUM_4922,
416 	CHAN_ENUM_4925,
417 	CHAN_ENUM_4927,
418 	CHAN_ENUM_4932,
419 	CHAN_ENUM_4935,
420 	CHAN_ENUM_4937,
421 	CHAN_ENUM_4940,
422 	CHAN_ENUM_4942,
423 	CHAN_ENUM_4945,
424 	CHAN_ENUM_4947,
425 	CHAN_ENUM_4950,
426 	CHAN_ENUM_4952,
427 	CHAN_ENUM_4955,
428 	CHAN_ENUM_4957,
429 	CHAN_ENUM_4960,
430 	CHAN_ENUM_4962,
431 	CHAN_ENUM_4965,
432 	CHAN_ENUM_4967,
433 	CHAN_ENUM_4970,
434 	CHAN_ENUM_4972,
435 	CHAN_ENUM_4975,
436 	CHAN_ENUM_4977,
437 	CHAN_ENUM_4980,
438 	CHAN_ENUM_4982,
439 	CHAN_ENUM_4985,
440 	CHAN_ENUM_4987,
441 	CHAN_ENUM_5032,
442 	CHAN_ENUM_5035,
443 	CHAN_ENUM_5037,
444 	CHAN_ENUM_5040,
445 	CHAN_ENUM_5042,
446 	CHAN_ENUM_5045,
447 	CHAN_ENUM_5047,
448 	CHAN_ENUM_5052,
449 	CHAN_ENUM_5055,
450 	CHAN_ENUM_5057,
451 	CHAN_ENUM_5060,
452 	CHAN_ENUM_5080,
453 
454 	CHAN_ENUM_5180,
455 	CHAN_ENUM_5200,
456 	CHAN_ENUM_5220,
457 	CHAN_ENUM_5240,
458 	CHAN_ENUM_5260,
459 	CHAN_ENUM_5280,
460 	CHAN_ENUM_5300,
461 	CHAN_ENUM_5320,
462 	CHAN_ENUM_5500,
463 	CHAN_ENUM_5520,
464 	CHAN_ENUM_5540,
465 	CHAN_ENUM_5560,
466 	CHAN_ENUM_5580,
467 	CHAN_ENUM_5600,
468 	CHAN_ENUM_5620,
469 	CHAN_ENUM_5640,
470 	CHAN_ENUM_5660,
471 	CHAN_ENUM_5680,
472 	CHAN_ENUM_5700,
473 	CHAN_ENUM_5720,
474 	CHAN_ENUM_5745,
475 	CHAN_ENUM_5765,
476 	CHAN_ENUM_5785,
477 	CHAN_ENUM_5805,
478 	CHAN_ENUM_5825,
479 	CHAN_ENUM_5845,
480 
481 	CHAN_ENUM_5850,
482 	CHAN_ENUM_5855,
483 	CHAN_ENUM_5860,
484 	CHAN_ENUM_5865,
485 	CHAN_ENUM_5870,
486 	CHAN_ENUM_5875,
487 	CHAN_ENUM_5880,
488 	CHAN_ENUM_5885,
489 	CHAN_ENUM_5890,
490 	CHAN_ENUM_5895,
491 	CHAN_ENUM_5900,
492 	CHAN_ENUM_5905,
493 	CHAN_ENUM_5910,
494 	CHAN_ENUM_5915,
495 	CHAN_ENUM_5920,
496 
497 	NUM_CHANNELS,
498 
499 	MIN_24GHZ_CHANNEL = CHAN_ENUM_2412,
500 	MAX_24GHZ_CHANNEL = CHAN_ENUM_2484,
501 	NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
502 
503 	MIN_49GHZ_CHANNEL = CHAN_ENUM_4912,
504 	MAX_49GHZ_CHANNEL = CHAN_ENUM_5080,
505 	NUM_49GHZ_CHANNELS = (MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1),
506 
507 	MIN_5GHZ_CHANNEL = CHAN_ENUM_5180,
508 	MAX_5GHZ_CHANNEL = CHAN_ENUM_5920,
509 	NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1),
510 
511 	MIN_DSRC_CHANNEL = CHAN_ENUM_5850,
512 	MAX_DSRC_CHANNEL = CHAN_ENUM_5920,
513 	NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1),
514 
515 	INVALID_CHANNEL = 0xBAD,
516 };
517 #endif
518 
519 /**
520  * enum channel_state - channel state
521  * @CHANNEL_STATE_DISABLE: disabled state
522  * @CHANNEL_STATE_PASSIVE: passive state
523  * @CHANNEL_STATE_DFS: dfs state
524  * @CHANNEL_STATE_ENABLE: enabled state
525  * @CHANNEL_STATE_INVALID: invalid state
526  */
527 enum channel_state {
528 	CHANNEL_STATE_DISABLE,
529 	CHANNEL_STATE_PASSIVE,
530 	CHANNEL_STATE_DFS,
531 	CHANNEL_STATE_ENABLE,
532 	CHANNEL_STATE_INVALID,
533 };
534 
535 /**
536  * enum reg_domain: reg domain
537  * @REGDOMAIN_FCC: FCC domain
538  * @REGDOMAIN_ETSI: ETSI domain
539  * @REGDOMAIN_JAPAN: JAPAN domain
540  * @REGDOMAIN_WORLD: WORLD domain
541  * @REGDOMAIN_COUNT: Max domain
542  */
543 typedef enum {
544 	REGDOMAIN_FCC,
545 	REGDOMAIN_ETSI,
546 	REGDOMAIN_JAPAN,
547 	REGDOMAIN_WORLD,
548 	REGDOMAIN_COUNT
549 } v_REGDOMAIN_t;
550 
551 /**
552  * struct ch_params
553  * @ch_width: channel width
554  * @sec_ch_offset: secondary channel offset
555  * @center_freq_seg0: center freq for segment 0
556  * @center_freq_seg1: center freq for segment 1
557  */
558 struct ch_params {
559 	enum phy_ch_width ch_width;
560 	uint8_t sec_ch_offset;
561 	uint8_t center_freq_seg0;
562 	uint8_t center_freq_seg1;
563 };
564 
565 /**
566  * struct channel_power
567  * @chan_num: channel number
568  * @tx_power: TX power
569  */
570 struct channel_power {
571 	uint32_t chan_num;
572 	uint32_t tx_power;
573 };
574 
575 /**
576  * enum offset_t: channel offset
577  * @BW20: 20 mhz channel
578  * @BW40_LOW_PRIMARY: lower channel in 40 mhz
579  * @BW40_HIGH_PRIMARY: higher channel in 40 mhz
580  * @BW80: 80 mhz channel
581  * @BWALL: unknown bandwidth
582  */
583 enum offset_t {
584 	BW20 = 0,
585 	BW40_LOW_PRIMARY = 1,
586 	BW40_HIGH_PRIMARY = 3,
587 	BW80,
588 	BWALL,
589 	BW_INVALID = 0xFF
590 };
591 
592 /**
593  * struct reg_dmn_op_class_map_t: operating class
594  * @op_class: operating class number
595  * @ch_spacing: channel spacing
596  * @offset: offset
597  * @channels: channel set
598  */
599 struct reg_dmn_op_class_map_t {
600 	uint8_t op_class;
601 	uint8_t ch_spacing;
602 	enum offset_t offset;
603 	uint8_t channels[REG_MAX_CHANNELS_PER_OPERATING_CLASS];
604 };
605 
606 /**
607  * struct reg_dmn_supp_op_classes: operating classes
608  * @num_classes: number of classes
609  * @classes: classes
610  */
611 struct reg_dmn_supp_op_classes {
612 	uint8_t num_classes;
613 	uint8_t classes[REG_MAX_SUPP_OPER_CLASSES];
614 };
615 
616 /**
617  * struct reg_start_11d_scan_req: start 11d scan request
618  * @vdev_id: vdev id
619  * @scan_period_msec: scan duration in milli-seconds
620  * @start_interval_msec: offset duration to start the scan in milli-seconds
621  */
622 struct reg_start_11d_scan_req {
623 	uint8_t vdev_id;
624 	uint32_t scan_period_msec;
625 	uint32_t start_interval_msec;
626 };
627 
628 /**
629  * struct reg_stop_11d_scan_req: stop 11d scan request
630  * @vdev_id: vdev id
631  */
632 struct reg_stop_11d_scan_req {
633 	uint8_t vdev_id;
634 };
635 
636 /**
637  * struct reg_11d_new_country: regulatory 11d new coutry code
638  * @alpha2: new 11d alpha2
639  */
640 struct reg_11d_new_country {
641 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
642 };
643 
644 /**
645  * enum country_src: country source
646  * @SOURCE_QUERY: source query
647  * @SOURCE_CORE: source regulatory core
648  * @SOURCE_DRIVER: source driver
649  * @SOURCE_USERSPACE: source userspace
650  * @SOURCE_11D: source 11D
651  */
652 enum country_src {
653 	SOURCE_UNKNOWN,
654 	SOURCE_QUERY,
655 	SOURCE_CORE,
656 	SOURCE_DRIVER,
657 	SOURCE_USERSPACE,
658 	SOURCE_11D
659 };
660 
661 /**
662  * struct regulatory_channel
663  * @center_freq: center frequency
664  * @chan_num: channel number
665  * @state: channel state
666  * @chan_flags: channel flags
667  * @tx_power: TX powers
668  * @min_bw: min bandwidth
669  * @max_bw: max bandwidth
670  * @nol_chan: whether channel is nol
671  * @nol_history: Set NOL-History when STA vap detects RADAR.
672  */
673 struct regulatory_channel {
674 	uint32_t center_freq;
675 	uint32_t chan_num;
676 	enum channel_state state;
677 	uint32_t chan_flags;
678 	uint32_t tx_power;
679 	uint16_t min_bw;
680 	uint16_t max_bw;
681 	uint8_t ant_gain;
682 	bool nol_chan;
683 	bool nol_history;
684 };
685 
686 
687 /**
688  * struct regulatory: regulatory information
689  * @reg_domain: regulatory domain pair
690  * @eeprom_rd_ext: eeprom value
691  * @country_code: current country in integer
692  * @alpha2: current alpha2
693  * @def_country: default country alpha2
694  * @def_region: DFS region
695  * @ctl_2g: 2G CTL value
696  * @ctl_5g: 5G CTL value
697  * @reg_pair: pointer to regulatory pair
698  * @cc_src: country code src
699  * @reg_flags: kernel regulatory flags
700  */
701 struct regulatory {
702 	uint32_t reg_domain;
703 	uint32_t eeprom_rd_ext;
704 	uint16_t country_code;
705 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
706 	uint8_t ctl_2g;
707 	uint8_t ctl_5g;
708 	const void *regpair;
709 	enum country_src cc_src;
710 	uint32_t reg_flags;
711 };
712 
713 /**
714  * struct chan_map
715  * @center_freq: center freq in mhz
716  * @chan_num: channel number
717  * @min_bw: min bw
718  * @max_bw: max bw
719  */
720 struct chan_map {
721 	uint32_t center_freq;
722 	uint32_t chan_num;
723 	uint16_t min_bw;
724 	uint16_t max_bw;
725 };
726 
727 /**
728  * struct bonded_channel
729  * @start_ch: start channel
730  * @end_ch: end channel
731  */
732 struct bonded_channel {
733 	uint16_t start_ch;
734 	uint16_t end_ch;
735 };
736 
737 struct set_country {
738 	uint8_t country[REG_ALPHA2_LEN + 1];
739 	uint8_t pdev_id;
740 };
741 /**
742  * enum ht_sec_ch_offset
743  * @NO_SEC_CH: no secondary
744  * @LOW_PRIMARY_CH: low primary
745  * @HIGH_PRIMARY_CH: high primary
746  */
747 enum ht_sec_ch_offset {
748 	NO_SEC_CH = 0,
749 	LOW_PRIMARY_CH = 1,
750 	HIGH_PRIMARY_CH = 3,
751 };
752 
753 enum cc_setting_code {
754 	REG_SET_CC_STATUS_PASS = 0,
755 	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
756 	REG_INIT_ALPHA2_NOT_FOUND = 2,
757 	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
758 	REG_SET_CC_STATUS_NO_MEMORY = 4,
759 	REG_SET_CC_STATUS_FAIL = 5,
760 };
761 
762 /**
763  * struct cur_reg_rule
764  * @start_freq: start frequency
765  * @end_freq: end frequency
766  * @max_bw: maximum bandwidth
767  * @reg_power: regulatory power
768  * @ant_gain: antenna gain
769  * @flags: regulatory flags
770  */
771 struct cur_reg_rule {
772 	uint16_t start_freq;
773 	uint16_t end_freq;
774 	uint16_t max_bw;
775 	uint8_t reg_power;
776 	uint8_t ant_gain;
777 	uint16_t flags;
778 };
779 
780 /**
781  * struct cur_regulatory_info
782  * @psoc: psoc ptr
783  * @status_code: status value
784  * @num_phy: number of phy
785  * @phy_id: phy id
786  * @reg_dmn_pair: reg domain pair
787  * @ctry_code: country code
788  * @alpha2: country alpha2
789  * @offload_enabled: offload enabled
790  * @dfs_reg: dfs region
791  * @phybitmap: phy bit map
792  * @min_bw_2g: minimum 2G bw
793  * @max_bw_2g: maximum 2G bw
794  * @min_bw_5g: minimum 5G bw
795  * @max_bw_5g: maximum 5G bw
796  * @num_2g_reg_rules: number 2G reg rules
797  * @num_5g_reg_rules: number 5G reg rules
798  * @reg_rules_2g_ptr: ptr to 2G reg rules
799  * @reg_rules_5g_ptr: ptr to 5G reg rules
800  */
801 struct cur_regulatory_info {
802 	struct wlan_objmgr_psoc *psoc;
803 	enum cc_setting_code status_code;
804 	uint8_t num_phy;
805 	uint8_t phy_id;
806 	uint16_t reg_dmn_pair;
807 	uint16_t ctry_code;
808 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
809 	bool offload_enabled;
810 	enum dfs_reg dfs_region;
811 	uint32_t phybitmap;
812 	uint32_t min_bw_2g;
813 	uint32_t max_bw_2g;
814 	uint32_t min_bw_5g;
815 	uint32_t max_bw_5g;
816 	uint32_t num_2g_reg_rules;
817 	uint32_t num_5g_reg_rules;
818 	struct cur_reg_rule *reg_rules_2g_ptr;
819 	struct cur_reg_rule *reg_rules_5g_ptr;
820 };
821 
822 /**
823  * struct reg_rule_info
824  * @alpha2: alpha2 of reg rules
825  * @dfs_region: dfs region
826  * @num_of_reg_rules: number of reg rules
827  * @reg_rules: regulatory rules array
828  */
829 struct reg_rule_info {
830 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
831 	enum dfs_reg dfs_region;
832 	uint8_t num_of_reg_rules;
833 	struct cur_reg_rule reg_rules[MAX_REG_RULES];
834 };
835 
836 /**
837  * enum band_info
838  * @BAND_ALL:all bands
839  * @BAND_2G: 2G band
840  * @BAND_5G: 5G band
841  * @BAND_UNKNOWN: Unsupported band
842  */
843 enum band_info {
844 	BAND_ALL,
845 	BAND_2G,
846 	BAND_5G,
847 	BAND_UNKNOWN
848 };
849 
850 /**
851  * enum restart_beaconing_on_ch_avoid_rule: control the beaconing entity to
852  * move away from active LTE channels
853  * @CH_AVOID_RULE_DO_NOT_RESTART: Do not move from active LTE
854  *                              channels
855  * @CH_AVOID_RULE_RESTART: Move from active LTE channels
856  * @CH_AVOID_RULE_RESTART_24G_ONLY: move from 2.4G active LTE
857  *                                channels only
858  */
859 enum restart_beaconing_on_ch_avoid_rule {
860 	CH_AVOID_RULE_DO_NOT_RESTART,
861 	CH_AVOID_RULE_RESTART,
862 	CH_AVOID_RULE_RESTART_24G_ONLY,
863 };
864 
865 /**
866  * struct reg_config_vars
867  * @enable_11d_support: enable 11d support
868  * @scan_11d_interval: 11d scan interval in ms
869  * @userspace_ctry_priority: user priority
870  * @band_capability: band capability
871  * @dfs_disable: dfs disabled
872  * @indoor_channel_support: indoor channel support
873  * @force_ssc_disable_indoor_channel: Disable indoor channel on sap start
874  * @restart_beaconing: control the beaconing entity to move
875  * away from active LTE channels
876  * @enable_srd_chan_in_master_mode: SRD channel support in master mode
877  * @enable_11d_in_world_mode: enable 11d in world mode
878  */
879 struct reg_config_vars {
880 	uint32_t enable_11d_support;
881 	uint32_t scan_11d_interval;
882 	uint32_t userspace_ctry_priority;
883 	enum band_info band_capability;
884 	uint32_t dfs_enabled;
885 	uint32_t indoor_chan_enabled;
886 	uint32_t force_ssc_disable_indoor_channel;
887 	enum restart_beaconing_on_ch_avoid_rule restart_beaconing;
888 	bool enable_srd_chan_in_master_mode;
889 	bool enable_11d_in_world_mode;
890 };
891 
892 /**
893  * struct reg_freq_range
894  * @low_freq: low frequency
895  * @high_freq: high frequency
896  */
897 struct reg_freq_range {
898 	uint32_t low_freq;
899 	uint32_t high_freq;
900 };
901 
902 /**
903  * struct reg_sched_payload
904  * @psoc: psoc ptr
905  * @pdev: pdev ptr
906  */
907 struct reg_sched_payload {
908 	struct wlan_objmgr_psoc *psoc;
909 	struct wlan_objmgr_pdev *pdev;
910 };
911 
912 /**
913  * enum direction
914  * @NORTHBOUND: northbound
915  * @SOUTHBOUND: southbound
916  */
917 enum direction {
918 	NORTHBOUND,
919 	SOUTHBOUND,
920 };
921 
922 /**
923  * struct mas_chan_params
924  * @dfs_region: dfs region
925  * @phybitmap: phybitmap
926  * @mas_chan_list: master chan list
927  * @default_country: default country
928  * @current_country: current country
929  * @def_region_domain: default reg domain
930  * @def_country_code: default country code
931  * @reg_dmn_pair: reg domain pair
932  * @ctry_code: country code
933  * @reg_rules: regulatory rules
934  */
935 struct mas_chan_params {
936 	enum dfs_reg dfs_region;
937 	uint32_t phybitmap;
938 	struct regulatory_channel mas_chan_list[NUM_CHANNELS];
939 	char default_country[REG_ALPHA2_LEN + 1];
940 	char current_country[REG_ALPHA2_LEN + 1];
941 	uint16_t def_region_domain;
942 	uint16_t def_country_code;
943 	uint16_t reg_dmn_pair;
944 	uint16_t ctry_code;
945 	struct reg_rule_info reg_rules;
946 };
947 
948 /**
949  * enum cc_regdmn_flag: Regdomain flags
950  * @INVALID:       Invalid flag
951  * @CC_IS_SET:     Country code is set
952  * @REGDMN_IS_SET: Regdomain ID is set
953  * @ALPHA_IS_SET:  Country ISO is set
954  */
955 enum cc_regdmn_flag {
956 	INVALID_CC,
957 	CC_IS_SET,
958 	REGDMN_IS_SET,
959 	ALPHA_IS_SET,
960 };
961 
962 /**
963  * struct cc_regdmn_s: User country code or regdomain
964  * @country_code: Country code
965  * @regdmn_id:    Regdomain pair ID
966  * @alpha:        Country ISO
967  * @flags:        Regdomain flags
968  */
969 struct cc_regdmn_s {
970 	union {
971 		uint16_t country_code;
972 		uint16_t regdmn_id;
973 		uint8_t alpha[REG_ALPHA2_LEN + 1];
974 	} cc;
975 	uint8_t flags;
976 };
977 
978 /**
979  * struct cur_regdmn_info: Current regulatory info
980  * @regdmn_pair_id: Current regdomain pair ID
981  * @dmn_id_2g: 2GHz regdomain ID
982  * @dmn_id_5g: 5GHz regdomain ID
983  * @ctl_2g: 2GHz CTL value
984  * @ctl_5g: 5GHzCTL value
985  * @dfs_region: dfs region
986  */
987 struct cur_regdmn_info {
988 	uint16_t regdmn_pair_id;
989 	uint16_t dmn_id_2g;
990 	uint16_t dmn_id_5g;
991 	uint8_t ctl_2g;
992 	uint8_t ctl_5g;
993 	uint8_t dfs_region;
994 };
995 
996 /**
997  * struct ch_avoid_freq_type
998  * @start_freq: start freq
999  * @end_freq: end freq
1000  */
1001 struct ch_avoid_freq_type {
1002 	uint32_t start_freq;
1003 	uint32_t end_freq;
1004 };
1005 
1006 /**
1007  * struct ch_avoid_ind_type
1008  * @ch_avoid_range_cnt: count
1009  * @avoid_freq_range: avoid freq range array
1010  */
1011 struct ch_avoid_ind_type {
1012 	uint32_t ch_avoid_range_cnt;
1013 	struct ch_avoid_freq_type avoid_freq_range[CH_AVOID_MAX_RANGE];
1014 };
1015 
1016 /**
1017  * struct unsafe_ch_list
1018  * @ch_cnt: no.of channels
1019  * @ch_list: channel list
1020  */
1021 struct unsafe_ch_list {
1022 	uint16_t ch_cnt;
1023 	uint16_t ch_list[NUM_CHANNELS];
1024 };
1025 
1026 /**
1027  * struct avoid_freq_ind_data
1028  * @freq_list: frequency list
1029  * @chan_list: channel list
1030  */
1031 struct avoid_freq_ind_data {
1032 	struct ch_avoid_ind_type freq_list;
1033 	struct unsafe_ch_list chan_list;
1034 };
1035 
1036 #endif
1037