xref: /wlan-dirver/qca-wifi-host-cmn/umac/regulatory/dispatcher/inc/reg_services_public_struct.h (revision f28396d060cff5c6519f883cb28ae0116ce479f1)
1 /*
2  * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19  /**
20  * DOC: reg_services_public_struct.h
21  * This file contains regulatory data structures
22  */
23 
24 #ifndef __REG_SERVICES_PUBLIC_STRUCT_H_
25 #define __REG_SERVICES_PUBLIC_STRUCT_H_
26 
27 #define REG_SBS_SEPARATION_THRESHOLD 100
28 
29 #ifdef CONFIG_BAND_6GHZ
30 #define REG_MAX_CHANNELS_PER_OPERATING_CLASS  70
31 #else
32 #define REG_MAX_CHANNELS_PER_OPERATING_CLASS  25
33 #endif
34 
35 #define REG_MAX_SUPP_OPER_CLASSES 32
36 #define REG_MAX_CHAN_CHANGE_CBKS 30
37 #define MAX_STA_VDEV_CNT 4
38 #define INVALID_VDEV_ID 0xFF
39 #define INVALID_CHANNEL_NUM 0x0
40 #define CH_AVOID_MAX_RANGE   4
41 #define REG_ALPHA2_LEN 2
42 #define MAX_REG_RULES 10
43 
44 #define REGULATORY_CHAN_DISABLED     BIT(0)
45 #define REGULATORY_CHAN_NO_IR        BIT(1)
46 #define REGULATORY_CHAN_RADAR        BIT(3)
47 #define REGULATORY_CHAN_NO_OFDM      BIT(6)
48 #define REGULATORY_CHAN_INDOOR_ONLY  BIT(9)
49 #define REGULATORY_CHAN_AFC          BIT(13)
50 
51 #define REGULATORY_CHAN_NO_HT40      BIT(4)
52 #define REGULATORY_CHAN_NO_80MHZ     BIT(7)
53 #define REGULATORY_CHAN_NO_160MHZ    BIT(8)
54 #define REGULATORY_CHAN_NO_20MHZ     BIT(11)
55 #define REGULATORY_CHAN_NO_10MHZ     BIT(12)
56 
57 #define REGULATORY_PHYMODE_NO11A     BIT(0)
58 #define REGULATORY_PHYMODE_NO11B     BIT(1)
59 #define REGULATORY_PHYMODE_NO11G     BIT(2)
60 #define REGULATORY_CHAN_NO11N        BIT(3)
61 #define REGULATORY_PHYMODE_NO11AC    BIT(4)
62 #define REGULATORY_PHYMODE_NO11AX    BIT(5)
63 
64 /**
65  * enum dfs_reg - DFS region
66  * @DFS_UNINIT_REGION: un-initialized region
67  * @DFS_FCC_REGION: FCC region
68  * @DFS_ETSI_REGION: ETSI region
69  * @DFS_MKK_REGION: MKK region
70  * @DFS_CN_REGION: China region
71  * @DFS_KR_REGION: Korea region
72  * @DFS_MKK_REGION: MKKN region
73  * that supports updated W53 RADAR pattern
74  * detection.
75  * @DFS_UNDEF_REGION: Undefined region
76  */
77 
78 enum dfs_reg {
79 	DFS_UNINIT_REGION = 0,
80 	DFS_FCC_REGION = 1,
81 	DFS_ETSI_REGION = 2,
82 	DFS_MKK_REGION = 3,
83 	DFS_CN_REGION = 4,
84 	DFS_KR_REGION = 5,
85 	DFS_MKKN_REGION = 6,
86 	DFS_UNDEF_REGION = 0xFFFF,
87 };
88 
89 /** enum op_class_table_num
90  * OP_CLASS_US- Class corresponds to US
91  * OP_CLASS_EU- Class corresponds to EU
92  * OP_CLASS_JAPAN- Class corresponds to JAPAN
93  * OP_CLASS_GLOBAL- Class corresponds to GLOBAL
94  */
95 enum op_class_table_num {
96 	OP_CLASS_US = 1,
97 	OP_CLASS_EU,
98 	OP_CLASS_JAPAN,
99 	OP_CLASS_GLOBAL
100 };
101 
102 /**
103  * enum channel_enum - channel enumeration
104  * @CHAN_ENUM_2412: channel with freq 2412
105  * @CHAN_ENUM_2417: channel with freq 2417
106  * @CHAN_ENUM_2422: channel with freq 2422
107  * @CHAN_ENUM_2427: channel with freq 2427
108  * @CHAN_ENUM_2432: channel with freq 2432
109  * @CHAN_ENUM_2437: channel with freq 2437
110  * @CHAN_ENUM_2442: channel with freq 2442
111  * @CHAN_ENUM_2447: channel with freq 2447
112  * @CHAN_ENUM_2452: channel with freq 2452
113  * @CHAN_ENUM_2457: channel with freq 2457
114  * @CHAN_ENUM_2462: channel with freq 2462
115  * @CHAN_ENUM_2467: channel with freq 2467
116  * @CHAN_ENUM_2472: channel with freq 2472
117  * @CHAN_ENUM_2484: channel with freq 2484
118  * @CHAN_ENUM_4912: channel with freq 4912
119  * @CHAN_ENUM_4915: channel with freq 4915
120  * @CHAN_ENUM_4917: channel with freq 4917
121  * @CHAN_ENUM_4920: channel with freq 4920
122  * @CHAN_ENUM_4922: channel with freq 4922
123  * @CHAN_ENUM_4925: channel with freq 4925
124  * @CHAN_ENUM_4927: channel with freq 4927
125  * @CHAN_ENUM_4932: channel with freq 4932
126  * @CHAN_ENUM_4935: channel with freq 4935
127  * @CHAN_ENUM_4937: channel with freq 4937
128  * @CHAN_ENUM_4940: channel with freq 4940
129  * @CHAN_ENUM_4942: channel with freq 4942
130  * @CHAN_ENUM_4945: channel with freq 4945
131  * @CHAN_ENUM_4947: channel with freq 4947
132  * @CHAN_ENUM_4950: channel with freq 4950
133  * @CHAN_ENUM_4952: channel with freq 4952
134  * @CHAN_ENUM_4955: channel with freq 4955
135  * @CHAN_ENUM_4957: channel with freq 4957
136  * @CHAN_ENUM_4960: channel with freq 4960
137  * @CHAN_ENUM_4962: channel with freq 4962
138  * @CHAN_ENUM_4965: channel with freq 4965
139  * @CHAN_ENUM_4967: channel with freq 4967
140  * @CHAN_ENUM_4970: channel with freq 4970
141  * @CHAN_ENUM_4972: channel with freq 4972
142  * @CHAN_ENUM_4975: channel with freq 4975
143  * @CHAN_ENUM_4977: channel with freq 4977
144  * @CHAN_ENUM_4980: channel with freq 4980
145  * @CHAN_ENUM_4982: channel with freq 4982
146  * @CHAN_ENUM_4985: channel with freq 4985
147  * @CHAN_ENUM_4987: channel with freq 4987
148  * @CHAN_ENUM_5032: channel with freq 5032
149  * @CHAN_ENUM_5035: channel with freq 5035
150  * @CHAN_ENUM_5037: channel with freq 5037
151  * @CHAN_ENUM_5040: channel with freq 5040
152  * @CHAN_ENUM_5042: channel with freq 5042
153  * @CHAN_ENUM_5045: channel with freq 5045
154  * @CHAN_ENUM_5047: channel with freq 5047
155  * @CHAN_ENUM_5052: channel with freq 5052
156  * @CHAN_ENUM_5055: channel with freq 5055
157  * @CHAN_ENUM_5057: channel with freq 5057
158  * @CHAN_ENUM_5060: channel with freq 5060
159  * @CHAN_ENUM_5080: channel with freq 5080
160  * @CHAN_ENUM_5180: channel with freq 5180
161  * @CHAN_ENUM_5200: channel with freq 5200
162  * @CHAN_ENUM_5220: channel with freq 5220
163  * @CHAN_ENUM_5240: channel with freq 5240
164  * @CHAN_ENUM_5260: channel with freq 5260
165  * @CHAN_ENUM_5280: channel with freq 5280
166  * @CHAN_ENUM_5300: channel with freq 5300
167  * @CHAN_ENUM_5320: channel with freq 5320
168  * @CHAN_ENUM_5500: channel with freq 5500
169  * @CHAN_ENUM_5520: channel with freq 5520
170  * @CHAN_ENUM_5540: channel with freq 5540
171  * @CHAN_ENUM_5560: channel with freq 5560
172  * @CHAN_ENUM_5580: channel with freq 5580
173  * @CHAN_ENUM_5600: channel with freq 5600
174  * @CHAN_ENUM_5620: channel with freq 5620
175  * @CHAN_ENUM_5640: channel with freq 5640
176  * @CHAN_ENUM_5660: channel with freq 5660
177  * @CHAN_ENUM_5680: channel with freq 5680
178  * @CHAN_ENUM_5700: channel with freq 5700
179  * @CHAN_ENUM_5720: channel with freq 5720
180  * @CHAN_ENUM_5745: channel with freq 5745
181  * @CHAN_ENUM_5765: channel with freq 5765
182  * @CHAN_ENUM_5785: channel with freq 5785
183  * @CHAN_ENUM_5805: channel with freq 5805
184  * @CHAN_ENUM_5825: channel with freq 5825
185  * @CHAN_ENUM_5845: channel with freq 5845
186  * @CHAN_ENUM_5850: channel with freq 5850
187  * @CHAN_ENUM_5855: channel with freq 5855
188  * @CHAN_ENUM_5860: channel with freq 5860
189  * @CHAN_ENUM_5865: channel with freq 5865
190  * @CHAN_ENUM_5870: channel with freq 5870
191  * @CHAN_ENUM_5875: channel with freq 5875
192  * @CHAN_ENUM_5880: channel with freq 5880
193  * @CHAN_ENUM_5885: channel with freq 5885
194  * @CHAN_ENUM_5890: channel with freq 5890
195  * @CHAN_ENUM_5895: channel with freq 5895
196  * @CHAN_ENUM_5900: channel with freq 5900
197  * @CHAN_ENUM_5905: channel with freq 5905
198  * @CHAN_ENUM_5910: channel with freq 5910
199  * @CHAN_ENUM_5915: channel with freq 5915
200  * @CHAN_ENUM_5920: channel with freq 5920
201  * @CHAN_ENUM_5945: channel with freq 5945
202  * @CHAN_ENUM_5965: channel with freq 5965
203  * @CHAN_ENUM_5985: channel with freq 5985
204  * @CHAN_ENUM_6005: channel with freq 6005
205  * @CHAN_ENUM_6025: channel with freq 6025
206  * @CHAN_ENUM_6045: channel with freq 6045
207  * @CHAN_ENUM_6065: channel with freq 6065
208  * @CHAN_ENUM_6085: channel with freq 6085
209  * @CHAN_ENUM_6105: channel with freq 6105
210  * @CHAN_ENUM_6125: channel with freq 6125
211  * @CHAN_ENUM_6145: channel with freq 6145
212  * @CHAN_ENUM_6165: channel with freq 6165
213  * @CHAN_ENUM_6185: channel with freq 6185
214  * @CHAN_ENUM_6205: channel with freq 6205
215  * @CHAN_ENUM_6225: channel with freq 6225
216  * @CHAN_ENUM_6245: channel with freq 6245
217  * @CHAN_ENUM_6265: channel with freq 6265
218  * @CHAN_ENUM_6285: channel with freq 6285
219  * @CHAN_ENUM_6305: channel with freq 6305
220  * @CHAN_ENUM_6325: channel with freq 6325
221  * @CHAN_ENUM_6345: channel with freq 6345
222  * @CHAN_ENUM_6365: channel with freq 6365
223  * @CHAN_ENUM_6385: channel with freq 6385
224  * @CHAN_ENUM_6405: channel with freq 6405
225  * @CHAN_ENUM_6425: channel with freq 6425
226  * @CHAN_ENUM_6445: channel with freq 6445
227  * @CHAN_ENUM_6465: channel with freq 6465
228  * @CHAN_ENUM_6485: channel with freq 6485
229  * @CHAN_ENUM_6505: channel with freq 6505
230  * @CHAN_ENUM_6525: channel with freq 6525
231  * @CHAN_ENUM_6545: channel with freq 6545
232  * @CHAN_ENUM_6565: channel with freq 6565
233  * @CHAN_ENUM_6585: channel with freq 6585
234  * @CHAN_ENUM_6605: channel with freq 6605
235  * @CHAN_ENUM_6625: channel with freq 6625
236  * @CHAN_ENUM_6645: channel with freq 6645
237  * @CHAN_ENUM_6665: channel with freq 6665
238  * @CHAN_ENUM_6685: channel with freq 6685
239  * @CHAN_ENUM_6705: channel with freq 6705
240  * @CHAN_ENUM_6725: channel with freq 6725
241  * @CHAN_ENUM_6745: channel with freq 6745
242  * @CHAN_ENUM_6765: channel with freq 6765
243  * @CHAN_ENUM_6785: channel with freq 6785
244  * @CHAN_ENUM_6805: channel with freq 6805
245  * @CHAN_ENUM_6825: channel with freq 6825
246  * @CHAN_ENUM_6845: channel with freq 6845
247  * @CHAN_ENUM_6865: channel with freq 6865
248  * @CHAN_ENUM_6885: channel with freq 6885
249  * @CHAN_ENUM_6905: channel with freq 6905
250  * @CHAN_ENUM_6925: channel with freq 6925
251  * @CHAN_ENUM_6945: channel with freq 6945
252  * @CHAN_ENUM_6965: channel with freq 6965
253  * @CHAN_ENUM_6985: channel with freq 6985
254  * @CHAN_ENUM_7005: channel with freq 7005
255  * @CHAN_ENUM_7025: channel with freq 7025
256  * @CHAN_ENUM_7045: channel with freq 7045
257  * @CHAN_ENUM_7065: channel with freq 7065
258  * @CHAN_ENUM_7085: channel with freq 7085
259  * @CHAN_ENUM_7105: channel with freq 7105
260  */
261 enum channel_enum {
262 	CHAN_ENUM_2412,
263 	CHAN_ENUM_2417,
264 	CHAN_ENUM_2422,
265 	CHAN_ENUM_2427,
266 	CHAN_ENUM_2432,
267 	CHAN_ENUM_2437,
268 	CHAN_ENUM_2442,
269 	CHAN_ENUM_2447,
270 	CHAN_ENUM_2452,
271 	CHAN_ENUM_2457,
272 	CHAN_ENUM_2462,
273 	CHAN_ENUM_2467,
274 	CHAN_ENUM_2472,
275 	CHAN_ENUM_2484,
276 
277 	CHAN_ENUM_4912,
278 	CHAN_ENUM_4915,
279 	CHAN_ENUM_4917,
280 	CHAN_ENUM_4920,
281 	CHAN_ENUM_4922,
282 	CHAN_ENUM_4925,
283 	CHAN_ENUM_4927,
284 	CHAN_ENUM_4932,
285 	CHAN_ENUM_4935,
286 	CHAN_ENUM_4937,
287 	CHAN_ENUM_4940,
288 	CHAN_ENUM_4942,
289 	CHAN_ENUM_4945,
290 	CHAN_ENUM_4947,
291 	CHAN_ENUM_4950,
292 	CHAN_ENUM_4952,
293 	CHAN_ENUM_4955,
294 	CHAN_ENUM_4957,
295 	CHAN_ENUM_4960,
296 	CHAN_ENUM_4962,
297 	CHAN_ENUM_4965,
298 	CHAN_ENUM_4967,
299 	CHAN_ENUM_4970,
300 	CHAN_ENUM_4972,
301 	CHAN_ENUM_4975,
302 	CHAN_ENUM_4977,
303 	CHAN_ENUM_4980,
304 	CHAN_ENUM_4982,
305 	CHAN_ENUM_4985,
306 	CHAN_ENUM_4987,
307 	CHAN_ENUM_5032,
308 	CHAN_ENUM_5035,
309 	CHAN_ENUM_5037,
310 	CHAN_ENUM_5040,
311 	CHAN_ENUM_5042,
312 	CHAN_ENUM_5045,
313 	CHAN_ENUM_5047,
314 	CHAN_ENUM_5052,
315 	CHAN_ENUM_5055,
316 	CHAN_ENUM_5057,
317 	CHAN_ENUM_5060,
318 	CHAN_ENUM_5080,
319 
320 	CHAN_ENUM_5180,
321 	CHAN_ENUM_5200,
322 	CHAN_ENUM_5220,
323 	CHAN_ENUM_5240,
324 	CHAN_ENUM_5260,
325 	CHAN_ENUM_5280,
326 	CHAN_ENUM_5300,
327 	CHAN_ENUM_5320,
328 	CHAN_ENUM_5500,
329 	CHAN_ENUM_5520,
330 	CHAN_ENUM_5540,
331 	CHAN_ENUM_5560,
332 	CHAN_ENUM_5580,
333 	CHAN_ENUM_5600,
334 	CHAN_ENUM_5620,
335 	CHAN_ENUM_5640,
336 	CHAN_ENUM_5660,
337 	CHAN_ENUM_5680,
338 	CHAN_ENUM_5700,
339 	CHAN_ENUM_5720,
340 	CHAN_ENUM_5745,
341 	CHAN_ENUM_5765,
342 	CHAN_ENUM_5785,
343 	CHAN_ENUM_5805,
344 	CHAN_ENUM_5825,
345 	CHAN_ENUM_5845,
346 
347 	CHAN_ENUM_5850,
348 	CHAN_ENUM_5855,
349 	CHAN_ENUM_5860,
350 	CHAN_ENUM_5865,
351 	CHAN_ENUM_5870,
352 	CHAN_ENUM_5875,
353 	CHAN_ENUM_5880,
354 	CHAN_ENUM_5885,
355 	CHAN_ENUM_5890,
356 	CHAN_ENUM_5895,
357 	CHAN_ENUM_5900,
358 	CHAN_ENUM_5905,
359 	CHAN_ENUM_5910,
360 	CHAN_ENUM_5915,
361 	CHAN_ENUM_5920,
362 #ifdef CONFIG_BAND_6GHZ
363 	CHAN_ENUM_5945,
364 	CHAN_ENUM_5965,
365 	CHAN_ENUM_5985,
366 	CHAN_ENUM_6005,
367 	CHAN_ENUM_6025,
368 	CHAN_ENUM_6045,
369 	CHAN_ENUM_6065,
370 	CHAN_ENUM_6085,
371 	CHAN_ENUM_6105,
372 	CHAN_ENUM_6125,
373 	CHAN_ENUM_6145,
374 	CHAN_ENUM_6165,
375 	CHAN_ENUM_6185,
376 	CHAN_ENUM_6205,
377 	CHAN_ENUM_6225,
378 	CHAN_ENUM_6245,
379 	CHAN_ENUM_6265,
380 	CHAN_ENUM_6285,
381 	CHAN_ENUM_6305,
382 	CHAN_ENUM_6325,
383 	CHAN_ENUM_6345,
384 	CHAN_ENUM_6365,
385 	CHAN_ENUM_6385,
386 	CHAN_ENUM_6405,
387 	CHAN_ENUM_6425,
388 	CHAN_ENUM_6445,
389 	CHAN_ENUM_6465,
390 	CHAN_ENUM_6485,
391 	CHAN_ENUM_6505,
392 	CHAN_ENUM_6525,
393 	CHAN_ENUM_6545,
394 	CHAN_ENUM_6565,
395 	CHAN_ENUM_6585,
396 	CHAN_ENUM_6605,
397 	CHAN_ENUM_6625,
398 	CHAN_ENUM_6645,
399 	CHAN_ENUM_6665,
400 	CHAN_ENUM_6685,
401 	CHAN_ENUM_6705,
402 	CHAN_ENUM_6725,
403 	CHAN_ENUM_6745,
404 	CHAN_ENUM_6765,
405 	CHAN_ENUM_6785,
406 	CHAN_ENUM_6805,
407 	CHAN_ENUM_6825,
408 	CHAN_ENUM_6845,
409 	CHAN_ENUM_6865,
410 	CHAN_ENUM_6885,
411 	CHAN_ENUM_6905,
412 	CHAN_ENUM_6925,
413 	CHAN_ENUM_6945,
414 	CHAN_ENUM_6965,
415 	CHAN_ENUM_6985,
416 	CHAN_ENUM_7005,
417 	CHAN_ENUM_7025,
418 	CHAN_ENUM_7045,
419 	CHAN_ENUM_7065,
420 	CHAN_ENUM_7085,
421 	CHAN_ENUM_7105,
422 #endif /* CONFIG_BAND_6GHZ */
423 
424 	NUM_CHANNELS,
425 
426 	MIN_24GHZ_CHANNEL = CHAN_ENUM_2412,
427 	MAX_24GHZ_CHANNEL = CHAN_ENUM_2484,
428 	NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
429 
430 	MIN_49GHZ_CHANNEL = CHAN_ENUM_4912,
431 	MAX_49GHZ_CHANNEL = CHAN_ENUM_5080,
432 	NUM_49GHZ_CHANNELS = (MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1),
433 
434 	MIN_5GHZ_CHANNEL = CHAN_ENUM_5180,
435 	MAX_5GHZ_CHANNEL = CHAN_ENUM_5920,
436 	NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1),
437 
438 	MIN_DSRC_CHANNEL = CHAN_ENUM_5850,
439 	MAX_DSRC_CHANNEL = CHAN_ENUM_5920,
440 	NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1),
441 
442 	INVALID_CHANNEL = 0xBAD,
443 
444 #ifdef DISABLE_UNII_SHARED_BANDS
445 	MIN_UNII_1_BAND_CHANNEL = CHAN_ENUM_5180,
446 	MAX_UNII_1_BAND_CHANNEL = CHAN_ENUM_5240,
447 	NUM_UNII_1_BAND_CHANNELS = (MAX_UNII_1_BAND_CHANNEL -
448 				    MIN_UNII_1_BAND_CHANNEL + 1),
449 
450 	MIN_UNII_2A_BAND_CHANNEL = CHAN_ENUM_5260,
451 	MAX_UNII_2A_BAND_CHANNEL = CHAN_ENUM_5320,
452 	NUM_UNII_2A_BAND_CHANNELS = (MAX_UNII_2A_BAND_CHANNEL -
453 				     MIN_UNII_2A_BAND_CHANNEL + 1),
454 #endif
455 
456 #ifdef CONFIG_BAND_6GHZ
457 	MIN_6GHZ_CHANNEL = CHAN_ENUM_5945,
458 	MAX_6GHZ_CHANNEL = CHAN_ENUM_7105,
459 	NUM_6GHZ_CHANNELS = (MAX_6GHZ_CHANNEL - MIN_6GHZ_CHANNEL + 1),
460 #else
461 	MIN_6GHZ_CHANNEL = INVALID_CHANNEL,
462 	MAX_6GHZ_CHANNEL = INVALID_CHANNEL,
463 	NUM_6GHZ_CHANNELS = 0,
464 #endif /* CONFIG_BAND_6GHZ */
465 };
466 
467 /**
468  * enum channel_state - channel state
469  * @CHANNEL_STATE_DISABLE: disabled state
470  * @CHANNEL_STATE_PASSIVE: passive state
471  * @CHANNEL_STATE_DFS: dfs state
472  * @CHANNEL_STATE_ENABLE: enabled state
473  * @CHANNEL_STATE_INVALID: invalid state
474  */
475 enum channel_state {
476 	CHANNEL_STATE_DISABLE,
477 	CHANNEL_STATE_PASSIVE,
478 	CHANNEL_STATE_DFS,
479 	CHANNEL_STATE_ENABLE,
480 	CHANNEL_STATE_INVALID,
481 };
482 
483 /**
484  * enum reg_domain: reg domain
485  * @REGDOMAIN_FCC: FCC domain
486  * @REGDOMAIN_ETSI: ETSI domain
487  * @REGDOMAIN_JAPAN: JAPAN domain
488  * @REGDOMAIN_WORLD: WORLD domain
489  * @REGDOMAIN_COUNT: Max domain
490  */
491 typedef enum {
492 	REGDOMAIN_FCC,
493 	REGDOMAIN_ETSI,
494 	REGDOMAIN_JAPAN,
495 	REGDOMAIN_WORLD,
496 	REGDOMAIN_COUNT
497 } v_REGDOMAIN_t;
498 
499 /**
500  * enum ctl_value - CTL value
501  * @CTL_FCC: CTL FCC
502  * @CTL_MKK: CTL MKK
503  * @CTL_ETSI: CTL ETSI
504  * @CTL_KOR: CTL KOR
505  * @CTL_CHN: CTL CHINA
506  * @CTL_USER_DEF: CTL USER_DEF
507  * @CTL_NONE: CTL NONE
508  */
509 enum ctl_value {
510 	CTL_FCC = 0x10,
511 	CTL_ETSI = 0x30,
512 	CTL_MKK = 0x40,
513 	CTL_KOR = 0x50,
514 	CTL_CHN = 0x60,
515 	CTL_USER_DEF = 0x70,
516 	CTL_NONE = 0xff
517 };
518 
519 /**
520  * struct ch_params
521  * @ch_width: channel width
522  * @sec_ch_offset: secondary channel offset
523  * @center_freq_seg0: channel number for segment 0
524  * @center_freq_seg1: channel number segment 1
525  * @mhz_freq_seg0: Center frequency for segment 0
526  * @mhz_freq_seg1: Center frequency for segment 1
527  */
528 struct ch_params {
529 	enum phy_ch_width ch_width;
530 	uint8_t sec_ch_offset;
531 	uint8_t center_freq_seg0;
532 	uint8_t center_freq_seg1;
533 	qdf_freq_t mhz_freq_seg0;
534 	qdf_freq_t mhz_freq_seg1;
535 };
536 
537 /**
538  * struct channel_power
539  * @center_freq: Channel Center Frequency
540  * @chan_num: channel number
541  * @tx_power: TX power
542  */
543 struct channel_power {
544 	qdf_freq_t center_freq;
545 	uint8_t chan_num;
546 	uint32_t tx_power;
547 };
548 
549 /**
550  * enum offset_t: channel offset
551  * @BW20: 20 mhz channel
552  * @BW40_LOW_PRIMARY: lower channel in 40 mhz
553  * @BW40_HIGH_PRIMARY: higher channel in 40 mhz
554  * @BW80: 80 mhz channel
555  * @BWALL: unknown bandwidth
556  */
557 enum offset_t {
558 	BW20 = 0,
559 	BW40_LOW_PRIMARY = 1,
560 	BW40_HIGH_PRIMARY = 3,
561 	BW80,
562 	BWALL,
563 	BW_INVALID = 0xFF
564 };
565 
566 /**
567  * enum behav_limit - behavior limit
568  * @BEHAV_NONE: none
569  * @BEHAV_BW40_LOW_PRIMARY: BW40 low primary
570  * @BEHAV_BW40_HIGH_PRIMARY: BW40 high primary
571  * @BEHAV_BW80_PLUS: BW 80 plus
572  * @BEHAV_INVALID: invalid behavior
573  */
574 enum behav_limit {
575 	BEHAV_NONE,
576 	BEHAV_BW40_LOW_PRIMARY,
577 	BEHAV_BW40_HIGH_PRIMARY,
578 	BEHAV_BW80_PLUS,
579 	BEHAV_INVALID = 0xFF
580 };
581 
582 /**
583  * struct reg_dmn_op_class_map_t: operating class
584  * @op_class: operating class number
585  * @chan_spacing: channel spacing
586  * @offset: offset
587  * @behav_limit: OR of bitmaps of enum behav_limit
588  * @start_freq: starting frequency
589  * @channels: channel set
590  */
591 struct reg_dmn_op_class_map_t {
592 	uint8_t op_class;
593 	uint8_t chan_spacing;
594 	enum offset_t offset;
595 	uint16_t behav_limit;
596 	qdf_freq_t start_freq;
597 	uint8_t channels[REG_MAX_CHANNELS_PER_OPERATING_CLASS];
598 };
599 
600 /**
601  * struct regdmn_ap_cap_opclass_t: AP Cap operation class table
602  * @op_class: operating class number
603  * @ch_width: channel width in MHz
604  * @start_freq: Starting Frequency in MHz
605  * @behav_limit: OR of bitmaps of enum behav_limit
606  * @max_tx_pwr_dbm: Maximum tx power in dbm
607  * @num_supported_chan: Number of supported channels
608  * @num_non_supported_chan: Number of non-supported channels
609  * @sup_chan_list: Array of supported channel numbers
610  * @non_sup_chan_list: Array of non supported channel numbers
611  */
612 struct regdmn_ap_cap_opclass_t {
613 	uint8_t op_class;
614 	uint8_t ch_width;
615 	qdf_freq_t start_freq;
616 	uint16_t behav_limit;
617 	uint8_t max_tx_pwr_dbm;
618 	uint8_t num_supported_chan;
619 	uint8_t num_non_supported_chan;
620 	uint8_t sup_chan_list[REG_MAX_CHANNELS_PER_OPERATING_CLASS];
621 	uint8_t non_sup_chan_list[REG_MAX_CHANNELS_PER_OPERATING_CLASS];
622 };
623 
624 /**
625  * struct reg_dmn_supp_op_classes: operating classes
626  * @num_classes: number of classes
627  * @classes: classes
628  */
629 struct reg_dmn_supp_op_classes {
630 	uint8_t num_classes;
631 	uint8_t classes[REG_MAX_SUPP_OPER_CLASSES];
632 };
633 
634 /**
635  * struct reg_start_11d_scan_req: start 11d scan request
636  * @vdev_id: vdev id
637  * @scan_period_msec: scan duration in milli-seconds
638  * @start_interval_msec: offset duration to start the scan in milli-seconds
639  */
640 struct reg_start_11d_scan_req {
641 	uint8_t vdev_id;
642 	uint32_t scan_period_msec;
643 	uint32_t start_interval_msec;
644 };
645 
646 /**
647  * struct reg_stop_11d_scan_req: stop 11d scan request
648  * @vdev_id: vdev id
649  */
650 struct reg_stop_11d_scan_req {
651 	uint8_t vdev_id;
652 };
653 
654 /**
655  * struct reg_11d_new_country: regulatory 11d new coutry code
656  * @alpha2: new 11d alpha2
657  */
658 struct reg_11d_new_country {
659 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
660 };
661 
662 /**
663  * enum country_src: country source
664  * @SOURCE_QUERY: source query
665  * @SOURCE_CORE: source regulatory core
666  * @SOURCE_DRIVER: source driver
667  * @SOURCE_USERSPACE: source userspace
668  * @SOURCE_11D: source 11D
669  */
670 enum country_src {
671 	SOURCE_UNKNOWN,
672 	SOURCE_QUERY,
673 	SOURCE_CORE,
674 	SOURCE_DRIVER,
675 	SOURCE_USERSPACE,
676 	SOURCE_11D
677 };
678 
679 /**
680  * struct regulatory_channel
681  * @center_freq: center frequency
682  * @chan_num: channel number
683  * @state: channel state
684  * @chan_flags: channel flags
685  * @tx_power: TX powers
686  * @min_bw: min bandwidth
687  * @max_bw: max bandwidth
688  * @nol_chan: whether channel is nol
689  * @nol_history: Set NOL-History when STA vap detects RADAR.
690  */
691 struct regulatory_channel {
692 	qdf_freq_t center_freq;
693 	uint8_t chan_num;
694 	enum channel_state state;
695 	uint32_t chan_flags;
696 	uint32_t tx_power;
697 	uint16_t min_bw;
698 	uint16_t max_bw;
699 	uint8_t ant_gain;
700 	bool nol_chan;
701 	bool nol_history;
702 };
703 
704 /**
705  * struct regulatory: regulatory information
706  * @reg_domain: regulatory domain pair
707  * @eeprom_rd_ext: eeprom value
708  * @country_code: current country in integer
709  * @alpha2: current alpha2
710  * @def_country: default country alpha2
711  * @def_region: DFS region
712  * @ctl_2g: 2G CTL value
713  * @ctl_5g: 5G CTL value
714  * @reg_pair: pointer to regulatory pair
715  * @cc_src: country code src
716  * @reg_flags: kernel regulatory flags
717  */
718 struct regulatory {
719 	uint32_t reg_domain;
720 	uint32_t eeprom_rd_ext;
721 	uint16_t country_code;
722 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
723 	uint8_t ctl_2g;
724 	uint8_t ctl_5g;
725 	const void *regpair;
726 	enum country_src cc_src;
727 	uint32_t reg_flags;
728 };
729 
730 /**
731  * struct chan_map
732  * @center_freq: center freq in mhz
733  * @chan_num: channel number
734  * @min_bw: min bw
735  * @max_bw: max bw
736  */
737 struct chan_map {
738 	qdf_freq_t center_freq;
739 	uint8_t chan_num;
740 	uint16_t min_bw;
741 	uint16_t max_bw;
742 };
743 
744 /**
745  * struct bonded_channel
746  * @start_ch: start channel
747  * @end_ch: end channel
748  */
749 struct bonded_channel {
750 	uint8_t start_ch;
751 	uint8_t end_ch;
752 };
753 
754 /**
755  * struct bonded_channel_freq
756  * @start_freq: start channel frequency
757  * @end_freq: end channel frequency
758  */
759 struct bonded_channel_freq {
760 	uint16_t start_freq;
761 	uint16_t end_freq;
762 };
763 
764 struct set_country {
765 	uint8_t country[REG_ALPHA2_LEN + 1];
766 	uint8_t pdev_id;
767 };
768 /**
769  * enum ht_sec_ch_offset
770  * @NO_SEC_CH: no secondary
771  * @LOW_PRIMARY_CH: low primary
772  * @HIGH_PRIMARY_CH: high primary
773  */
774 enum ht_sec_ch_offset {
775 	NO_SEC_CH = 0,
776 	LOW_PRIMARY_CH = 1,
777 	HIGH_PRIMARY_CH = 3,
778 };
779 
780 enum cc_setting_code {
781 	REG_SET_CC_STATUS_PASS = 0,
782 	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
783 	REG_INIT_ALPHA2_NOT_FOUND = 2,
784 	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
785 	REG_SET_CC_STATUS_NO_MEMORY = 4,
786 	REG_SET_CC_STATUS_FAIL = 5,
787 };
788 
789 /**
790  * struct cur_reg_rule
791  * @start_freq: start frequency
792  * @end_freq: end frequency
793  * @max_bw: maximum bandwidth
794  * @reg_power: regulatory power
795  * @ant_gain: antenna gain
796  * @flags: regulatory flags
797  */
798 struct cur_reg_rule {
799 	uint16_t start_freq;
800 	uint16_t end_freq;
801 	uint16_t max_bw;
802 	uint8_t reg_power;
803 	uint8_t ant_gain;
804 	uint16_t flags;
805 };
806 
807 /**
808  * struct cur_regulatory_info
809  * @psoc: psoc ptr
810  * @status_code: status value
811  * @num_phy: number of phy
812  * @phy_id: phy id
813  * @reg_dmn_pair: reg domain pair
814  * @ctry_code: country code
815  * @alpha2: country alpha2
816  * @offload_enabled: offload enabled
817  * @dfs_reg: dfs region
818  * @phybitmap: phy bit map
819  * @min_bw_2g: minimum 2G bw
820  * @max_bw_2g: maximum 2G bw
821  * @min_bw_5g: minimum 5G bw
822  * @max_bw_5g: maximum 5G bw
823  * @num_2g_reg_rules: number 2G reg rules
824  * @num_5g_reg_rules: number 5G  and 6G reg rules
825  * @reg_rules_2g_ptr: ptr to 2G reg rules
826  * @reg_rules_5g_ptr: ptr to 5G reg rules
827  */
828 struct cur_regulatory_info {
829 	struct wlan_objmgr_psoc *psoc;
830 	enum cc_setting_code status_code;
831 	uint8_t num_phy;
832 	uint8_t phy_id;
833 	uint16_t reg_dmn_pair;
834 	uint16_t ctry_code;
835 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
836 	bool offload_enabled;
837 	enum dfs_reg dfs_region;
838 	uint32_t phybitmap;
839 	uint32_t min_bw_2g;
840 	uint32_t max_bw_2g;
841 	uint32_t min_bw_5g;
842 	uint32_t max_bw_5g;
843 	uint32_t num_2g_reg_rules;
844 	uint32_t num_5g_reg_rules;
845 	struct cur_reg_rule *reg_rules_2g_ptr;
846 	struct cur_reg_rule *reg_rules_5g_ptr;
847 };
848 
849 /**
850  * struct reg_rule_info
851  * @alpha2: alpha2 of reg rules
852  * @dfs_region: dfs region
853  * @num_of_reg_rules: number of reg rules
854  * @reg_rules: regulatory rules array
855  */
856 struct reg_rule_info {
857 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
858 	enum dfs_reg dfs_region;
859 	uint8_t num_of_reg_rules;
860 	struct cur_reg_rule reg_rules[MAX_REG_RULES];
861 };
862 
863 /**
864  * enum reg_reg_wifi_band
865  * @REG_BAND_2G: 2G band
866  * @REG_BAND_5G: 5G band
867  * @REG_BAND_6G: 6G band
868  * @REG_BAND_UNKNOWN: Unsupported band
869  */
870 enum reg_wifi_band {
871 	REG_BAND_2G,
872 	REG_BAND_5G,
873 	REG_BAND_6G,
874 	REG_BAND_UNKNOWN
875 };
876 
877 #ifdef DISABLE_UNII_SHARED_BANDS
878 /**
879  * enum reg_unii_band
880  * @REG_UNII_BAND_1: Disable UNII-1 band channels
881  * @REG_UNII_BAND_2A: Disable UNII-2A band channels
882  */
883 enum reg_unii_band {
884 	REG_UNII_BAND_1 = 0x0,
885 	REG_UNII_BAND_2A = 0x1,
886 };
887 #endif
888 
889 #define REG_BAND_MASK_ALL (BIT(REG_BAND_2G) | BIT(REG_BAND_5G) \
890 			  | BIT(REG_BAND_6G))
891 
892 /* Avoid the use of band_info as it does not support 6GHz band. Use
893  * reg_wifi_band, as it supports the 6GHz band
894  */
895 /**
896  * enum band_info
897  * @BAND_ALL:all bands
898  * @BAND_2G: 2G band
899  * @BAND_5G: 5G band
900  * @BAND_UNKNOWN: Unsupported band
901  */
902 enum band_info {
903 	BAND_ALL,
904 	BAND_2G,
905 	BAND_5G,
906 	BAND_UNKNOWN
907 };
908 
909 /**
910  * enum restart_beaconing_on_ch_avoid_rule: control the beaconing entity to
911  * move away from active LTE channels
912  * @CH_AVOID_RULE_DO_NOT_RESTART: Do not move from active LTE
913  *                              channels
914  * @CH_AVOID_RULE_RESTART: Move from active LTE channels
915  * @CH_AVOID_RULE_RESTART_24G_ONLY: move from 2.4G active LTE
916  *                                channels only
917  */
918 enum restart_beaconing_on_ch_avoid_rule {
919 	CH_AVOID_RULE_DO_NOT_RESTART,
920 	CH_AVOID_RULE_RESTART,
921 	CH_AVOID_RULE_RESTART_24G_ONLY,
922 };
923 
924 /**
925  * struct reg_config_vars
926  * @enable_11d_support: enable 11d support
927  * @scan_11d_interval: 11d scan interval in ms
928  * @userspace_ctry_priority: user priority
929  * @band_capability: band capability
930  * @dfs_disable: dfs disabled
931  * @indoor_channel_support: indoor channel support
932  * @force_ssc_disable_indoor_channel: Disable indoor channel on sap start
933  * @restart_beaconing: control the beaconing entity to move
934  * away from active LTE channels
935  * @enable_srd_chan_in_master_mode: SRD channel support in master mode
936  * @enable_11d_in_world_mode: enable 11d in world mode
937  */
938 struct reg_config_vars {
939 	uint32_t enable_11d_support;
940 	uint32_t scan_11d_interval;
941 	uint32_t userspace_ctry_priority;
942 	enum band_info band_capability;
943 	uint32_t dfs_enabled;
944 	uint32_t indoor_chan_enabled;
945 	uint32_t force_ssc_disable_indoor_channel;
946 	enum restart_beaconing_on_ch_avoid_rule restart_beaconing;
947 	bool enable_srd_chan_in_master_mode;
948 	bool enable_11d_in_world_mode;
949 };
950 
951 /**
952  * struct reg_freq_range
953  * @low_freq: low frequency
954  * @high_freq: high frequency
955  */
956 struct reg_freq_range {
957 	uint32_t low_freq;
958 	uint32_t high_freq;
959 };
960 
961 /**
962  * struct reg_sched_payload
963  * @psoc: psoc ptr
964  * @pdev: pdev ptr
965  */
966 struct reg_sched_payload {
967 	struct wlan_objmgr_psoc *psoc;
968 	struct wlan_objmgr_pdev *pdev;
969 };
970 
971 /**
972  * enum direction
973  * @NORTHBOUND: northbound
974  * @SOUTHBOUND: southbound
975  */
976 enum direction {
977 	NORTHBOUND,
978 	SOUTHBOUND,
979 };
980 
981 /**
982  * struct mas_chan_params
983  * @dfs_region: dfs region
984  * @phybitmap: phybitmap
985  * @mas_chan_list: master chan list
986  * @default_country: default country
987  * @current_country: current country
988  * @def_region_domain: default reg domain
989  * @def_country_code: default country code
990  * @reg_dmn_pair: reg domain pair
991  * @ctry_code: country code
992  * @reg_rules: regulatory rules
993  */
994 struct mas_chan_params {
995 	enum dfs_reg dfs_region;
996 	uint32_t phybitmap;
997 	struct regulatory_channel mas_chan_list[NUM_CHANNELS];
998 	char default_country[REG_ALPHA2_LEN + 1];
999 	char current_country[REG_ALPHA2_LEN + 1];
1000 	uint16_t def_region_domain;
1001 	uint16_t def_country_code;
1002 	uint16_t reg_dmn_pair;
1003 	uint16_t ctry_code;
1004 	struct reg_rule_info reg_rules;
1005 };
1006 
1007 /**
1008  * enum cc_regdmn_flag: Regdomain flags
1009  * @INVALID:       Invalid flag
1010  * @CC_IS_SET:     Country code is set
1011  * @REGDMN_IS_SET: Regdomain ID is set
1012  * @ALPHA_IS_SET:  Country ISO is set
1013  */
1014 enum cc_regdmn_flag {
1015 	INVALID_CC,
1016 	CC_IS_SET,
1017 	REGDMN_IS_SET,
1018 	ALPHA_IS_SET,
1019 };
1020 
1021 /**
1022  * struct cc_regdmn_s: User country code or regdomain
1023  * @country_code: Country code
1024  * @regdmn_id:    Regdomain pair ID
1025  * @alpha:        Country ISO
1026  * @flags:        Regdomain flags
1027  */
1028 struct cc_regdmn_s {
1029 	union {
1030 		uint16_t country_code;
1031 		uint16_t regdmn_id;
1032 		uint8_t alpha[REG_ALPHA2_LEN + 1];
1033 	} cc;
1034 	uint8_t flags;
1035 };
1036 
1037 /**
1038  * struct cur_regdmn_info: Current regulatory info
1039  * @regdmn_pair_id: Current regdomain pair ID
1040  * @dmn_id_2g: 2GHz regdomain ID
1041  * @dmn_id_5g: 5GHz regdomain ID
1042  * @ctl_2g: 2GHz CTL value
1043  * @ctl_5g: 5GHzCTL value
1044  * @dfs_region: dfs region
1045  */
1046 struct cur_regdmn_info {
1047 	uint16_t regdmn_pair_id;
1048 	uint16_t dmn_id_2g;
1049 	uint16_t dmn_id_5g;
1050 	uint8_t ctl_2g;
1051 	uint8_t ctl_5g;
1052 	uint8_t dfs_region;
1053 };
1054 
1055 /**
1056  * struct ch_avoid_freq_type
1057  * @start_freq: start freq
1058  * @end_freq: end freq
1059  */
1060 struct ch_avoid_freq_type {
1061 	qdf_freq_t start_freq;
1062 	qdf_freq_t end_freq;
1063 };
1064 
1065 /**
1066  * struct ch_avoid_ind_type
1067  * @ch_avoid_range_cnt: count
1068  * @avoid_freq_range: avoid freq range array
1069  */
1070 struct ch_avoid_ind_type {
1071 	uint32_t ch_avoid_range_cnt;
1072 	struct ch_avoid_freq_type avoid_freq_range[CH_AVOID_MAX_RANGE];
1073 };
1074 
1075 /**
1076  * struct unsafe_ch_list
1077  * @chan_cnt: no.of channels
1078  * @chan_freq_list: channel frequency list
1079  */
1080 struct unsafe_ch_list {
1081 	uint16_t chan_cnt;
1082 	uint16_t chan_freq_list[NUM_CHANNELS];
1083 };
1084 
1085 /**
1086  * struct avoid_freq_ind_data
1087  * @freq_list: frequency list
1088  * @chan_list: channel list
1089  */
1090 struct avoid_freq_ind_data {
1091 	struct ch_avoid_ind_type freq_list;
1092 	struct unsafe_ch_list chan_list;
1093 };
1094 
1095 #define FIVEG_STARTING_FREQ     5000
1096 #define TWOG_STARTING_FREQ      2407
1097 #define TWOG_CHAN_14_IN_MHZ     2484
1098 #define TWOG_CHAN_1_IN_MHZ      2412
1099 #define TWOG_CHAN_5_IN_MHZ      2432
1100 #define TWOG_CHAN_6_IN_MHZ      2437
1101 #define TWOG_CHAN_13_IN_MHZ     2472
1102 
1103 /**
1104  * struct reg_ctl_params - reg ctl and regd info
1105  * @regd: regdomain pair
1106  * @regd_2g: 2g sub domain code
1107  * @regd_5g: 5g sub domain code
1108  * @ctl_2g: 2g ctl info
1109  * @ctl_5g: 5g ctl info
1110  */
1111 struct reg_ctl_params {
1112 	uint32_t regd;
1113 	uint16_t regd_2g;
1114 	uint16_t regd_5g;
1115 	uint8_t ctl_2g;
1116 	uint8_t ctl_5g;
1117 };
1118 
1119 #endif
1120