1 /* 2 * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_public_struct.h 21 * This file contains regulatory data structures 22 */ 23 24 #ifndef __REG_SERVICES_PUBLIC_STRUCT_H_ 25 #define __REG_SERVICES_PUBLIC_STRUCT_H_ 26 27 #define REG_SBS_SEPARATION_THRESHOLD 100 28 #define REG_MAX_CHANNELS_PER_OPERATING_CLASS 25 29 #define REG_MAX_SUPP_OPER_CLASSES 32 30 #define REG_MAX_CHAN_CHANGE_CBKS 30 31 #define MAX_STA_VDEV_CNT 4 32 #define INVALID_VDEV_ID 0xFF 33 #define INVALID_CHANNEL_NUM 0xBAD 34 #define CH_AVOID_MAX_RANGE 4 35 #define REG_ALPHA2_LEN 2 36 #define MAX_REG_RULES 10 37 38 #define REGULATORY_CHAN_DISABLED BIT(0) 39 #define REGULATORY_CHAN_NO_IR BIT(1) 40 #define REGULATORY_CHAN_RADAR BIT(3) 41 #define REGULATORY_CHAN_NO_OFDM BIT(6) 42 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 43 44 #define REGULATORY_CHAN_NO_HT40 BIT(4) 45 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 46 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 47 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 48 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 49 50 #define REGULATORY_PHYMODE_NO11A BIT(0) 51 #define REGULATORY_PHYMODE_NO11B BIT(1) 52 #define REGULATORY_PHYMODE_NO11G BIT(2) 53 #define REGULATORY_CHAN_NO11N BIT(3) 54 #define REGULATORY_PHYMODE_NO11AC BIT(4) 55 #define REGULATORY_PHYMODE_NO11AX BIT(5) 56 57 /** 58 * enum dfs_reg - DFS region 59 * @DFS_UNINIT_REGION: un-initialized region 60 * @DFS_FCC_REGION: FCC region 61 * @DFS_ETSI_REGION: ETSI region 62 * @DFS_MKK_REGION: MKK region 63 * @DFS_CN_REGION: China region 64 * @DFS_KR_REGION: Korea region 65 * @DFS_UNDEF_REGION: Undefined region 66 */ 67 enum dfs_reg { 68 DFS_UNINIT_REGION = 0, 69 DFS_FCC_REGION = 1, 70 DFS_ETSI_REGION = 2, 71 DFS_MKK_REGION = 3, 72 DFS_CN_REGION = 4, 73 DFS_KR_REGION = 5, 74 DFS_UNDEF_REGION = 0xFFFF, 75 }; 76 77 /** enum op_class_table_num 78 * OP_CLASS_US- Class corresponds to US 79 * OP_CLASS_EU- Class corresponds to EU 80 * OP_CLASS_JAPAN- Class corresponds to JAPAN 81 * OP_CLASS_GLOBAL- Class corresponds to GLOBAL 82 */ 83 enum op_class_table_num { 84 OP_CLASS_US = 1, 85 OP_CLASS_EU, 86 OP_CLASS_JAPAN, 87 OP_CLASS_GLOBAL 88 }; 89 #ifdef CONFIG_LEGACY_CHAN_ENUM 90 91 /** 92 * enum channel_enum - channel enumeration 93 * @CHAN_ENUM_1: channel number 1 94 * @CHAN_ENUM_2: channel number 2 95 * @CHAN_ENUM_3: channel number 3 96 * @CHAN_ENUM_4: channel number 4 97 * @CHAN_ENUM_5: channel number 5 98 * @CHAN_ENUM_6: channel number 6 99 * @CHAN_ENUM_7: channel number 7 100 * @CHAN_ENUM_8: channel number 8 101 * @CHAN_ENUM_9: channel number 9 102 * @CHAN_ENUM_10: channel number 10 103 * @CHAN_ENUM_11: channel number 11 104 * @CHAN_ENUM_12: channel number 12 105 * @CHAN_ENUM_13: channel number 13 106 * @CHAN_ENUM_14: channel number 14 107 * @CHAN_ENUM_183: channel number 183 108 * @CHAN_ENUM_184: channel number 184 109 * @CHAN_ENUM_185: channel number 185 110 * @CHAN_ENUM_187: channel number 187 111 * @CHAN_ENUM_188: channel number 188 112 * @CHAN_ENUM_189: channel number 189 113 * @CHAN_ENUM_192: channel number 192 114 * @CHAN_ENUM_196: channel number 196 115 * @CHAN_ENUM_36: channel number 36 116 * @CHAN_ENUM_40: channel number 40 117 * @CHAN_ENUM_44: channel number 44 118 * @CHAN_ENUM_48: channel number 48 119 * @CHAN_ENUM_52: channel number 52 120 * @CHAN_ENUM_56: channel number 56 121 * @CHAN_ENUM_60: channel number 60 122 * @CHAN_ENUM_64: channel number 64 123 * @CHAN_ENUM_100: channel number 100 124 * @CHAN_ENUM_104: channel number 104 125 * @CHAN_ENUM_108: channel number 108 126 * @CHAN_ENUM_112: channel number 112 127 * @CHAN_ENUM_116: channel number 116 128 * @CHAN_ENUM_120: channel number 120 129 * @CHAN_ENUM_124: channel number 124 130 * @CHAN_ENUM_128: channel number 128 131 * @CHAN_ENUM_132: channel number 132 132 * @CHAN_ENUM_136: channel number 136 133 * @CHAN_ENUM_140: channel number 140 134 * @CHAN_ENUM_144: channel number 144 135 * @CHAN_ENUM_149: channel number 149 136 * @CHAN_ENUM_153: channel number 153 137 * @CHAN_ENUM_157: channel number 157 138 * @CHAN_ENUM_161: channel number 161 139 * @CHAN_ENUM_165: channel number 165 140 * @CHAN_ENUM_169: channel number 169 141 * @CHAN_ENUM_170: channel number 170 142 * @CHAN_ENUM_171: channel number 171 143 * @CHAN_ENUM_172: channel number 172 144 * @CHAN_ENUM_173: channel number 173 145 * @CHAN_ENUM_174: channel number 174 146 * @CHAN_ENUM_175: channel number 175 147 * @CHAN_ENUM_176: channel number 176 148 * @CHAN_ENUM_177: channel number 177 149 * @CHAN_ENUM_178: channel number 178 150 * @CHAN_ENUM_179: channel number 179 151 * @CHAN_ENUM_180: channel number 180 152 * @CHAN_ENUM_181: channel number 181 153 * @CHAN_ENUM_182: channel number 182 154 * @CHAN_ENUM_183: channel number 183 155 * @CHAN_ENUM_184: channel number 184 156 */ 157 158 #ifdef WLAN_FEATURE_DSRC 159 enum channel_enum { 160 CHAN_ENUM_1, 161 CHAN_ENUM_2, 162 CHAN_ENUM_3, 163 CHAN_ENUM_4, 164 CHAN_ENUM_5, 165 CHAN_ENUM_6, 166 CHAN_ENUM_7, 167 CHAN_ENUM_8, 168 CHAN_ENUM_9, 169 CHAN_ENUM_10, 170 CHAN_ENUM_11, 171 CHAN_ENUM_12, 172 CHAN_ENUM_13, 173 CHAN_ENUM_14, 174 175 CHAN_ENUM_36, 176 CHAN_ENUM_40, 177 CHAN_ENUM_44, 178 CHAN_ENUM_48, 179 CHAN_ENUM_52, 180 CHAN_ENUM_56, 181 CHAN_ENUM_60, 182 CHAN_ENUM_64, 183 184 CHAN_ENUM_100, 185 CHAN_ENUM_104, 186 CHAN_ENUM_108, 187 CHAN_ENUM_112, 188 CHAN_ENUM_116, 189 CHAN_ENUM_120, 190 CHAN_ENUM_124, 191 CHAN_ENUM_128, 192 CHAN_ENUM_132, 193 CHAN_ENUM_136, 194 CHAN_ENUM_140, 195 CHAN_ENUM_144, 196 197 CHAN_ENUM_149, 198 CHAN_ENUM_153, 199 CHAN_ENUM_157, 200 CHAN_ENUM_161, 201 CHAN_ENUM_165, 202 203 CHAN_ENUM_170, 204 CHAN_ENUM_171, 205 CHAN_ENUM_172, 206 CHAN_ENUM_173, 207 CHAN_ENUM_174, 208 CHAN_ENUM_175, 209 CHAN_ENUM_176, 210 CHAN_ENUM_177, 211 CHAN_ENUM_178, 212 CHAN_ENUM_179, 213 CHAN_ENUM_180, 214 CHAN_ENUM_181, 215 CHAN_ENUM_182, 216 CHAN_ENUM_183, 217 CHAN_ENUM_184, 218 219 NUM_CHANNELS, 220 221 MIN_24GHZ_CHANNEL = CHAN_ENUM_1, 222 MAX_24GHZ_CHANNEL = CHAN_ENUM_14, 223 NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1), 224 225 MIN_49GHZ_CHANNEL = INVALID_CHANNEL_NUM, 226 MAX_49GHZ_CHANNEL = INVALID_CHANNEL_NUM - 1, 227 NUM_49GHZ_CHANNELS = MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1, 228 229 MIN_5GHZ_CHANNEL = CHAN_ENUM_36, 230 MAX_5GHZ_CHANNEL = CHAN_ENUM_184, 231 NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1), 232 233 MIN_DSRC_CHANNEL = CHAN_ENUM_170, 234 MAX_DSRC_CHANNEL = CHAN_ENUM_184, 235 NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1), 236 237 INVALID_CHANNEL = 0xBAD, 238 }; 239 240 #else 241 enum channel_enum { 242 CHAN_ENUM_1, 243 CHAN_ENUM_2, 244 CHAN_ENUM_3, 245 CHAN_ENUM_4, 246 CHAN_ENUM_5, 247 CHAN_ENUM_6, 248 CHAN_ENUM_7, 249 CHAN_ENUM_8, 250 CHAN_ENUM_9, 251 CHAN_ENUM_10, 252 CHAN_ENUM_11, 253 CHAN_ENUM_12, 254 CHAN_ENUM_13, 255 CHAN_ENUM_14, 256 257 CHAN_ENUM_36, 258 CHAN_ENUM_40, 259 CHAN_ENUM_44, 260 CHAN_ENUM_48, 261 CHAN_ENUM_52, 262 CHAN_ENUM_56, 263 CHAN_ENUM_60, 264 CHAN_ENUM_64, 265 266 CHAN_ENUM_100, 267 CHAN_ENUM_104, 268 CHAN_ENUM_108, 269 CHAN_ENUM_112, 270 CHAN_ENUM_116, 271 CHAN_ENUM_120, 272 CHAN_ENUM_124, 273 CHAN_ENUM_128, 274 CHAN_ENUM_132, 275 CHAN_ENUM_136, 276 CHAN_ENUM_140, 277 CHAN_ENUM_144, 278 279 CHAN_ENUM_149, 280 CHAN_ENUM_153, 281 CHAN_ENUM_157, 282 CHAN_ENUM_161, 283 CHAN_ENUM_165, 284 CHAN_ENUM_169, 285 CHAN_ENUM_173, 286 287 NUM_CHANNELS, 288 289 MIN_24GHZ_CHANNEL = CHAN_ENUM_1, 290 MAX_24GHZ_CHANNEL = CHAN_ENUM_14, 291 NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1), 292 293 MIN_49GHZ_CHANNEL = INVALID_CHANNEL_NUM, 294 MAX_49GHZ_CHANNEL = INVALID_CHANNEL_NUM - 1, 295 NUM_49GHZ_CHANNELS = MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1, 296 297 MIN_5GHZ_CHANNEL = CHAN_ENUM_36, 298 299 MAX_5GHZ_CHANNEL = CHAN_ENUM_173, 300 301 NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1), 302 INVALID_CHANNEL = 0xBAD, 303 }; 304 #endif /* WLAN_FEATURE_DSRC */ 305 306 #else /* CONFIG_LEGACY_CHAN_ENUM */ 307 /** 308 * enum channel_enum - channel enumeration 309 * @CHAN_ENUM_2412: channel with freq 2412 310 * @CHAN_ENUM_2417: channel with freq 2417 311 * @CHAN_ENUM_2422: channel with freq 2422 312 * @CHAN_ENUM_2427: channel with freq 2427 313 * @CHAN_ENUM_2432: channel with freq 2432 314 * @CHAN_ENUM_2437: channel with freq 2437 315 * @CHAN_ENUM_2442: channel with freq 2442 316 * @CHAN_ENUM_2447: channel with freq 2447 317 * @CHAN_ENUM_2452: channel with freq 2452 318 * @CHAN_ENUM_2457: channel with freq 2457 319 * @CHAN_ENUM_2462: channel with freq 2462 320 * @CHAN_ENUM_2467: channel with freq 2467 321 * @CHAN_ENUM_2472: channel with freq 2472 322 * @CHAN_ENUM_2484: channel with freq 2484 323 * @CHAN_ENUM_4912: channel with freq 4912 324 * @CHAN_ENUM_4915: channel with freq 4915 325 * @CHAN_ENUM_4917: channel with freq 4917 326 * @CHAN_ENUM_4920: channel with freq 4920 327 * @CHAN_ENUM_4922: channel with freq 4922 328 * @CHAN_ENUM_4925: channel with freq 4925 329 * @CHAN_ENUM_4927: channel with freq 4927 330 * @CHAN_ENUM_4932: channel with freq 4932 331 * @CHAN_ENUM_4935: channel with freq 4935 332 * @CHAN_ENUM_4937: channel with freq 4937 333 * @CHAN_ENUM_4940: channel with freq 4940 334 * @CHAN_ENUM_4942: channel with freq 4942 335 * @CHAN_ENUM_4945: channel with freq 4945 336 * @CHAN_ENUM_4947: channel with freq 4947 337 * @CHAN_ENUM_4950: channel with freq 4950 338 * @CHAN_ENUM_4952: channel with freq 4952 339 * @CHAN_ENUM_4955: channel with freq 4955 340 * @CHAN_ENUM_4957: channel with freq 4957 341 * @CHAN_ENUM_4960: channel with freq 4960 342 * @CHAN_ENUM_4962: channel with freq 4962 343 * @CHAN_ENUM_4965: channel with freq 4965 344 * @CHAN_ENUM_4967: channel with freq 4967 345 * @CHAN_ENUM_4970: channel with freq 4970 346 * @CHAN_ENUM_4972: channel with freq 4972 347 * @CHAN_ENUM_4975: channel with freq 4975 348 * @CHAN_ENUM_4977: channel with freq 4977 349 * @CHAN_ENUM_4980: channel with freq 4980 350 * @CHAN_ENUM_4982: channel with freq 4982 351 * @CHAN_ENUM_4985: channel with freq 4985 352 * @CHAN_ENUM_4987: channel with freq 4987 353 * @CHAN_ENUM_5032: channel with freq 5032 354 * @CHAN_ENUM_5035: channel with freq 5035 355 * @CHAN_ENUM_5037: channel with freq 5037 356 * @CHAN_ENUM_5040: channel with freq 5040 357 * @CHAN_ENUM_5042: channel with freq 5042 358 * @CHAN_ENUM_5045: channel with freq 5045 359 * @CHAN_ENUM_5047: channel with freq 5047 360 * @CHAN_ENUM_5052: channel with freq 5052 361 * @CHAN_ENUM_5055: channel with freq 5055 362 * @CHAN_ENUM_5057: channel with freq 5057 363 * @CHAN_ENUM_5060: channel with freq 5060 364 * @CHAN_ENUM_5080: channel with freq 5080 365 * @CHAN_ENUM_5180: channel with freq 5180 366 * @CHAN_ENUM_5200: channel with freq 5200 367 * @CHAN_ENUM_5220: channel with freq 5220 368 * @CHAN_ENUM_5240: channel with freq 5240 369 * @CHAN_ENUM_5260: channel with freq 5260 370 * @CHAN_ENUM_5280: channel with freq 5280 371 * @CHAN_ENUM_5300: channel with freq 5300 372 * @CHAN_ENUM_5320: channel with freq 5320 373 * @CHAN_ENUM_5500: channel with freq 5500 374 * @CHAN_ENUM_5520: channel with freq 5520 375 * @CHAN_ENUM_5540: channel with freq 5540 376 * @CHAN_ENUM_5560: channel with freq 5560 377 * @CHAN_ENUM_5580: channel with freq 5580 378 * @CHAN_ENUM_5600: channel with freq 5600 379 * @CHAN_ENUM_5620: channel with freq 5620 380 * @CHAN_ENUM_5640: channel with freq 5640 381 * @CHAN_ENUM_5660: channel with freq 5660 382 * @CHAN_ENUM_5680: channel with freq 5680 383 * @CHAN_ENUM_5700: channel with freq 5700 384 * @CHAN_ENUM_5720: channel with freq 5720 385 * @CHAN_ENUM_5745: channel with freq 5745 386 * @CHAN_ENUM_5765: channel with freq 5765 387 * @CHAN_ENUM_5785: channel with freq 5785 388 * @CHAN_ENUM_5805: channel with freq 5805 389 * @CHAN_ENUM_5825: channel with freq 5825 390 * @CHAN_ENUM_5845: channel with freq 5845 391 * @CHAN_ENUM_5850: channel with freq 5850 392 * @CHAN_ENUM_5855: channel with freq 5855 393 * @CHAN_ENUM_5860: channel with freq 5860 394 * @CHAN_ENUM_5865: channel with freq 5865 395 * @CHAN_ENUM_5870: channel with freq 5870 396 * @CHAN_ENUM_5875: channel with freq 5875 397 * @CHAN_ENUM_5880: channel with freq 5880 398 * @CHAN_ENUM_5885: channel with freq 5885 399 * @CHAN_ENUM_5890: channel with freq 5890 400 * @CHAN_ENUM_5895: channel with freq 5895 401 * @CHAN_ENUM_5900: channel with freq 5900 402 * @CHAN_ENUM_5905: channel with freq 5905 403 * @CHAN_ENUM_5910: channel with freq 5910 404 * @CHAN_ENUM_5915: channel with freq 5915 405 * @CHAN_ENUM_5920: channel with freq 5920 406 */ 407 enum channel_enum { 408 CHAN_ENUM_2412, 409 CHAN_ENUM_2417, 410 CHAN_ENUM_2422, 411 CHAN_ENUM_2427, 412 CHAN_ENUM_2432, 413 CHAN_ENUM_2437, 414 CHAN_ENUM_2442, 415 CHAN_ENUM_2447, 416 CHAN_ENUM_2452, 417 CHAN_ENUM_2457, 418 CHAN_ENUM_2462, 419 CHAN_ENUM_2467, 420 CHAN_ENUM_2472, 421 CHAN_ENUM_2484, 422 423 CHAN_ENUM_4912, 424 CHAN_ENUM_4915, 425 CHAN_ENUM_4917, 426 CHAN_ENUM_4920, 427 CHAN_ENUM_4922, 428 CHAN_ENUM_4925, 429 CHAN_ENUM_4927, 430 CHAN_ENUM_4932, 431 CHAN_ENUM_4935, 432 CHAN_ENUM_4937, 433 CHAN_ENUM_4940, 434 CHAN_ENUM_4942, 435 CHAN_ENUM_4945, 436 CHAN_ENUM_4947, 437 CHAN_ENUM_4950, 438 CHAN_ENUM_4952, 439 CHAN_ENUM_4955, 440 CHAN_ENUM_4957, 441 CHAN_ENUM_4960, 442 CHAN_ENUM_4962, 443 CHAN_ENUM_4965, 444 CHAN_ENUM_4967, 445 CHAN_ENUM_4970, 446 CHAN_ENUM_4972, 447 CHAN_ENUM_4975, 448 CHAN_ENUM_4977, 449 CHAN_ENUM_4980, 450 CHAN_ENUM_4982, 451 CHAN_ENUM_4985, 452 CHAN_ENUM_4987, 453 CHAN_ENUM_5032, 454 CHAN_ENUM_5035, 455 CHAN_ENUM_5037, 456 CHAN_ENUM_5040, 457 CHAN_ENUM_5042, 458 CHAN_ENUM_5045, 459 CHAN_ENUM_5047, 460 CHAN_ENUM_5052, 461 CHAN_ENUM_5055, 462 CHAN_ENUM_5057, 463 CHAN_ENUM_5060, 464 CHAN_ENUM_5080, 465 466 CHAN_ENUM_5180, 467 CHAN_ENUM_5200, 468 CHAN_ENUM_5220, 469 CHAN_ENUM_5240, 470 CHAN_ENUM_5260, 471 CHAN_ENUM_5280, 472 CHAN_ENUM_5300, 473 CHAN_ENUM_5320, 474 CHAN_ENUM_5500, 475 CHAN_ENUM_5520, 476 CHAN_ENUM_5540, 477 CHAN_ENUM_5560, 478 CHAN_ENUM_5580, 479 CHAN_ENUM_5600, 480 CHAN_ENUM_5620, 481 CHAN_ENUM_5640, 482 CHAN_ENUM_5660, 483 CHAN_ENUM_5680, 484 CHAN_ENUM_5700, 485 CHAN_ENUM_5720, 486 CHAN_ENUM_5745, 487 CHAN_ENUM_5765, 488 CHAN_ENUM_5785, 489 CHAN_ENUM_5805, 490 CHAN_ENUM_5825, 491 CHAN_ENUM_5845, 492 493 CHAN_ENUM_5850, 494 CHAN_ENUM_5855, 495 CHAN_ENUM_5860, 496 CHAN_ENUM_5865, 497 CHAN_ENUM_5870, 498 CHAN_ENUM_5875, 499 CHAN_ENUM_5880, 500 CHAN_ENUM_5885, 501 CHAN_ENUM_5890, 502 CHAN_ENUM_5895, 503 CHAN_ENUM_5900, 504 CHAN_ENUM_5905, 505 CHAN_ENUM_5910, 506 CHAN_ENUM_5915, 507 CHAN_ENUM_5920, 508 509 NUM_CHANNELS, 510 511 MIN_24GHZ_CHANNEL = CHAN_ENUM_2412, 512 MAX_24GHZ_CHANNEL = CHAN_ENUM_2484, 513 NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1), 514 515 MIN_49GHZ_CHANNEL = CHAN_ENUM_4912, 516 MAX_49GHZ_CHANNEL = CHAN_ENUM_5080, 517 NUM_49GHZ_CHANNELS = (MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1), 518 519 MIN_5GHZ_CHANNEL = CHAN_ENUM_5180, 520 MAX_5GHZ_CHANNEL = CHAN_ENUM_5920, 521 NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1), 522 523 MIN_DSRC_CHANNEL = CHAN_ENUM_5850, 524 MAX_DSRC_CHANNEL = CHAN_ENUM_5920, 525 NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1), 526 527 INVALID_CHANNEL = 0xBAD, 528 }; 529 #endif 530 531 /** 532 * enum channel_state - channel state 533 * @CHANNEL_STATE_DISABLE: disabled state 534 * @CHANNEL_STATE_PASSIVE: passive state 535 * @CHANNEL_STATE_DFS: dfs state 536 * @CHANNEL_STATE_ENABLE: enabled state 537 * @CHANNEL_STATE_INVALID: invalid state 538 */ 539 enum channel_state { 540 CHANNEL_STATE_DISABLE, 541 CHANNEL_STATE_PASSIVE, 542 CHANNEL_STATE_DFS, 543 CHANNEL_STATE_ENABLE, 544 CHANNEL_STATE_INVALID, 545 }; 546 547 /** 548 * enum reg_domain: reg domain 549 * @REGDOMAIN_FCC: FCC domain 550 * @REGDOMAIN_ETSI: ETSI domain 551 * @REGDOMAIN_JAPAN: JAPAN domain 552 * @REGDOMAIN_WORLD: WORLD domain 553 * @REGDOMAIN_COUNT: Max domain 554 */ 555 typedef enum { 556 REGDOMAIN_FCC, 557 REGDOMAIN_ETSI, 558 REGDOMAIN_JAPAN, 559 REGDOMAIN_WORLD, 560 REGDOMAIN_COUNT 561 } v_REGDOMAIN_t; 562 563 /** 564 * enum ctl_value - CTL value 565 * @CTL_FCC: CTL FCC 566 * @CTL_MKK: CTL MKK 567 * @CTL_ETSI: CTL ETSI 568 * @CTL_KOR: CTL KOR 569 * @CTL_CHN: CTL CHINA 570 * @CTL_USER_DEF: CTL USER_DEF 571 * @CTL_NONE: CTL NONE 572 */ 573 enum ctl_value { 574 CTL_FCC = 0x10, 575 CTL_ETSI = 0x30, 576 CTL_MKK = 0x40, 577 CTL_KOR = 0x50, 578 CTL_CHN = 0x60, 579 CTL_USER_DEF = 0x70, 580 CTL_NONE = 0xff 581 }; 582 583 /** 584 * struct ch_params 585 * @ch_width: channel width 586 * @sec_ch_offset: secondary channel offset 587 * @center_freq_seg0: center freq for segment 0 588 * @center_freq_seg1: center freq for segment 1 589 */ 590 struct ch_params { 591 enum phy_ch_width ch_width; 592 uint8_t sec_ch_offset; 593 uint8_t center_freq_seg0; 594 uint8_t center_freq_seg1; 595 }; 596 597 /** 598 * struct channel_power 599 * @chan_num: channel number 600 * @tx_power: TX power 601 */ 602 struct channel_power { 603 uint32_t chan_num; 604 uint32_t tx_power; 605 }; 606 607 /** 608 * enum offset_t: channel offset 609 * @BW20: 20 mhz channel 610 * @BW40_LOW_PRIMARY: lower channel in 40 mhz 611 * @BW40_HIGH_PRIMARY: higher channel in 40 mhz 612 * @BW80: 80 mhz channel 613 * @BWALL: unknown bandwidth 614 */ 615 enum offset_t { 616 BW20 = 0, 617 BW40_LOW_PRIMARY = 1, 618 BW40_HIGH_PRIMARY = 3, 619 BW80, 620 BWALL, 621 BW_INVALID = 0xFF 622 }; 623 624 /** 625 * struct reg_dmn_op_class_map_t: operating class 626 * @op_class: operating class number 627 * @ch_spacing: channel spacing 628 * @offset: offset 629 * @channels: channel set 630 */ 631 struct reg_dmn_op_class_map_t { 632 uint8_t op_class; 633 uint8_t ch_spacing; 634 enum offset_t offset; 635 uint8_t channels[REG_MAX_CHANNELS_PER_OPERATING_CLASS]; 636 }; 637 638 /** 639 * struct reg_dmn_supp_op_classes: operating classes 640 * @num_classes: number of classes 641 * @classes: classes 642 */ 643 struct reg_dmn_supp_op_classes { 644 uint8_t num_classes; 645 uint8_t classes[REG_MAX_SUPP_OPER_CLASSES]; 646 }; 647 648 /** 649 * struct reg_start_11d_scan_req: start 11d scan request 650 * @vdev_id: vdev id 651 * @scan_period_msec: scan duration in milli-seconds 652 * @start_interval_msec: offset duration to start the scan in milli-seconds 653 */ 654 struct reg_start_11d_scan_req { 655 uint8_t vdev_id; 656 uint32_t scan_period_msec; 657 uint32_t start_interval_msec; 658 }; 659 660 /** 661 * struct reg_stop_11d_scan_req: stop 11d scan request 662 * @vdev_id: vdev id 663 */ 664 struct reg_stop_11d_scan_req { 665 uint8_t vdev_id; 666 }; 667 668 /** 669 * struct reg_11d_new_country: regulatory 11d new coutry code 670 * @alpha2: new 11d alpha2 671 */ 672 struct reg_11d_new_country { 673 uint8_t alpha2[REG_ALPHA2_LEN + 1]; 674 }; 675 676 /** 677 * enum country_src: country source 678 * @SOURCE_QUERY: source query 679 * @SOURCE_CORE: source regulatory core 680 * @SOURCE_DRIVER: source driver 681 * @SOURCE_USERSPACE: source userspace 682 * @SOURCE_11D: source 11D 683 */ 684 enum country_src { 685 SOURCE_UNKNOWN, 686 SOURCE_QUERY, 687 SOURCE_CORE, 688 SOURCE_DRIVER, 689 SOURCE_USERSPACE, 690 SOURCE_11D 691 }; 692 693 /** 694 * struct regulatory_channel 695 * @center_freq: center frequency 696 * @chan_num: channel number 697 * @state: channel state 698 * @chan_flags: channel flags 699 * @tx_power: TX powers 700 * @min_bw: min bandwidth 701 * @max_bw: max bandwidth 702 * @nol_chan: whether channel is nol 703 * @nol_history: Set NOL-History when STA vap detects RADAR. 704 */ 705 struct regulatory_channel { 706 uint32_t center_freq; 707 uint32_t chan_num; 708 enum channel_state state; 709 uint32_t chan_flags; 710 uint32_t tx_power; 711 uint16_t min_bw; 712 uint16_t max_bw; 713 uint8_t ant_gain; 714 bool nol_chan; 715 bool nol_history; 716 }; 717 718 719 /** 720 * struct regulatory: regulatory information 721 * @reg_domain: regulatory domain pair 722 * @eeprom_rd_ext: eeprom value 723 * @country_code: current country in integer 724 * @alpha2: current alpha2 725 * @def_country: default country alpha2 726 * @def_region: DFS region 727 * @ctl_2g: 2G CTL value 728 * @ctl_5g: 5G CTL value 729 * @reg_pair: pointer to regulatory pair 730 * @cc_src: country code src 731 * @reg_flags: kernel regulatory flags 732 */ 733 struct regulatory { 734 uint32_t reg_domain; 735 uint32_t eeprom_rd_ext; 736 uint16_t country_code; 737 uint8_t alpha2[REG_ALPHA2_LEN + 1]; 738 uint8_t ctl_2g; 739 uint8_t ctl_5g; 740 const void *regpair; 741 enum country_src cc_src; 742 uint32_t reg_flags; 743 }; 744 745 /** 746 * struct chan_map 747 * @center_freq: center freq in mhz 748 * @chan_num: channel number 749 * @min_bw: min bw 750 * @max_bw: max bw 751 */ 752 struct chan_map { 753 uint32_t center_freq; 754 uint32_t chan_num; 755 uint16_t min_bw; 756 uint16_t max_bw; 757 }; 758 759 /** 760 * struct bonded_channel 761 * @start_ch: start channel 762 * @end_ch: end channel 763 */ 764 struct bonded_channel { 765 uint16_t start_ch; 766 uint16_t end_ch; 767 }; 768 769 struct set_country { 770 uint8_t country[REG_ALPHA2_LEN + 1]; 771 uint8_t pdev_id; 772 }; 773 /** 774 * enum ht_sec_ch_offset 775 * @NO_SEC_CH: no secondary 776 * @LOW_PRIMARY_CH: low primary 777 * @HIGH_PRIMARY_CH: high primary 778 */ 779 enum ht_sec_ch_offset { 780 NO_SEC_CH = 0, 781 LOW_PRIMARY_CH = 1, 782 HIGH_PRIMARY_CH = 3, 783 }; 784 785 enum cc_setting_code { 786 REG_SET_CC_STATUS_PASS = 0, 787 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 788 REG_INIT_ALPHA2_NOT_FOUND = 2, 789 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 790 REG_SET_CC_STATUS_NO_MEMORY = 4, 791 REG_SET_CC_STATUS_FAIL = 5, 792 }; 793 794 /** 795 * struct cur_reg_rule 796 * @start_freq: start frequency 797 * @end_freq: end frequency 798 * @max_bw: maximum bandwidth 799 * @reg_power: regulatory power 800 * @ant_gain: antenna gain 801 * @flags: regulatory flags 802 */ 803 struct cur_reg_rule { 804 uint16_t start_freq; 805 uint16_t end_freq; 806 uint16_t max_bw; 807 uint8_t reg_power; 808 uint8_t ant_gain; 809 uint16_t flags; 810 }; 811 812 /** 813 * struct cur_regulatory_info 814 * @psoc: psoc ptr 815 * @status_code: status value 816 * @num_phy: number of phy 817 * @phy_id: phy id 818 * @reg_dmn_pair: reg domain pair 819 * @ctry_code: country code 820 * @alpha2: country alpha2 821 * @offload_enabled: offload enabled 822 * @dfs_reg: dfs region 823 * @phybitmap: phy bit map 824 * @min_bw_2g: minimum 2G bw 825 * @max_bw_2g: maximum 2G bw 826 * @min_bw_5g: minimum 5G bw 827 * @max_bw_5g: maximum 5G bw 828 * @num_2g_reg_rules: number 2G reg rules 829 * @num_5g_reg_rules: number 5G reg rules 830 * @reg_rules_2g_ptr: ptr to 2G reg rules 831 * @reg_rules_5g_ptr: ptr to 5G reg rules 832 */ 833 struct cur_regulatory_info { 834 struct wlan_objmgr_psoc *psoc; 835 enum cc_setting_code status_code; 836 uint8_t num_phy; 837 uint8_t phy_id; 838 uint16_t reg_dmn_pair; 839 uint16_t ctry_code; 840 uint8_t alpha2[REG_ALPHA2_LEN + 1]; 841 bool offload_enabled; 842 enum dfs_reg dfs_region; 843 uint32_t phybitmap; 844 uint32_t min_bw_2g; 845 uint32_t max_bw_2g; 846 uint32_t min_bw_5g; 847 uint32_t max_bw_5g; 848 uint32_t num_2g_reg_rules; 849 uint32_t num_5g_reg_rules; 850 struct cur_reg_rule *reg_rules_2g_ptr; 851 struct cur_reg_rule *reg_rules_5g_ptr; 852 }; 853 854 /** 855 * struct reg_rule_info 856 * @alpha2: alpha2 of reg rules 857 * @dfs_region: dfs region 858 * @num_of_reg_rules: number of reg rules 859 * @reg_rules: regulatory rules array 860 */ 861 struct reg_rule_info { 862 uint8_t alpha2[REG_ALPHA2_LEN + 1]; 863 enum dfs_reg dfs_region; 864 uint8_t num_of_reg_rules; 865 struct cur_reg_rule reg_rules[MAX_REG_RULES]; 866 }; 867 868 /** 869 * enum band_info 870 * @BAND_ALL:all bands 871 * @BAND_2G: 2G band 872 * @BAND_5G: 5G band 873 * @BAND_UNKNOWN: Unsupported band 874 */ 875 enum band_info { 876 BAND_ALL, 877 BAND_2G, 878 BAND_5G, 879 BAND_UNKNOWN 880 }; 881 882 /** 883 * enum restart_beaconing_on_ch_avoid_rule: control the beaconing entity to 884 * move away from active LTE channels 885 * @CH_AVOID_RULE_DO_NOT_RESTART: Do not move from active LTE 886 * channels 887 * @CH_AVOID_RULE_RESTART: Move from active LTE channels 888 * @CH_AVOID_RULE_RESTART_24G_ONLY: move from 2.4G active LTE 889 * channels only 890 */ 891 enum restart_beaconing_on_ch_avoid_rule { 892 CH_AVOID_RULE_DO_NOT_RESTART, 893 CH_AVOID_RULE_RESTART, 894 CH_AVOID_RULE_RESTART_24G_ONLY, 895 }; 896 897 /** 898 * struct reg_config_vars 899 * @enable_11d_support: enable 11d support 900 * @scan_11d_interval: 11d scan interval in ms 901 * @userspace_ctry_priority: user priority 902 * @band_capability: band capability 903 * @dfs_disable: dfs disabled 904 * @indoor_channel_support: indoor channel support 905 * @force_ssc_disable_indoor_channel: Disable indoor channel on sap start 906 * @restart_beaconing: control the beaconing entity to move 907 * away from active LTE channels 908 * @enable_srd_chan_in_master_mode: SRD channel support in master mode 909 * @enable_11d_in_world_mode: enable 11d in world mode 910 */ 911 struct reg_config_vars { 912 uint32_t enable_11d_support; 913 uint32_t scan_11d_interval; 914 uint32_t userspace_ctry_priority; 915 enum band_info band_capability; 916 uint32_t dfs_enabled; 917 uint32_t indoor_chan_enabled; 918 uint32_t force_ssc_disable_indoor_channel; 919 enum restart_beaconing_on_ch_avoid_rule restart_beaconing; 920 bool enable_srd_chan_in_master_mode; 921 bool enable_11d_in_world_mode; 922 }; 923 924 /** 925 * struct reg_freq_range 926 * @low_freq: low frequency 927 * @high_freq: high frequency 928 */ 929 struct reg_freq_range { 930 uint32_t low_freq; 931 uint32_t high_freq; 932 }; 933 934 /** 935 * struct reg_sched_payload 936 * @psoc: psoc ptr 937 * @pdev: pdev ptr 938 */ 939 struct reg_sched_payload { 940 struct wlan_objmgr_psoc *psoc; 941 struct wlan_objmgr_pdev *pdev; 942 }; 943 944 /** 945 * enum direction 946 * @NORTHBOUND: northbound 947 * @SOUTHBOUND: southbound 948 */ 949 enum direction { 950 NORTHBOUND, 951 SOUTHBOUND, 952 }; 953 954 /** 955 * struct mas_chan_params 956 * @dfs_region: dfs region 957 * @phybitmap: phybitmap 958 * @mas_chan_list: master chan list 959 * @default_country: default country 960 * @current_country: current country 961 * @def_region_domain: default reg domain 962 * @def_country_code: default country code 963 * @reg_dmn_pair: reg domain pair 964 * @ctry_code: country code 965 * @reg_rules: regulatory rules 966 */ 967 struct mas_chan_params { 968 enum dfs_reg dfs_region; 969 uint32_t phybitmap; 970 struct regulatory_channel mas_chan_list[NUM_CHANNELS]; 971 char default_country[REG_ALPHA2_LEN + 1]; 972 char current_country[REG_ALPHA2_LEN + 1]; 973 uint16_t def_region_domain; 974 uint16_t def_country_code; 975 uint16_t reg_dmn_pair; 976 uint16_t ctry_code; 977 struct reg_rule_info reg_rules; 978 }; 979 980 /** 981 * enum cc_regdmn_flag: Regdomain flags 982 * @INVALID: Invalid flag 983 * @CC_IS_SET: Country code is set 984 * @REGDMN_IS_SET: Regdomain ID is set 985 * @ALPHA_IS_SET: Country ISO is set 986 */ 987 enum cc_regdmn_flag { 988 INVALID_CC, 989 CC_IS_SET, 990 REGDMN_IS_SET, 991 ALPHA_IS_SET, 992 }; 993 994 /** 995 * struct cc_regdmn_s: User country code or regdomain 996 * @country_code: Country code 997 * @regdmn_id: Regdomain pair ID 998 * @alpha: Country ISO 999 * @flags: Regdomain flags 1000 */ 1001 struct cc_regdmn_s { 1002 union { 1003 uint16_t country_code; 1004 uint16_t regdmn_id; 1005 uint8_t alpha[REG_ALPHA2_LEN + 1]; 1006 } cc; 1007 uint8_t flags; 1008 }; 1009 1010 /** 1011 * struct cur_regdmn_info: Current regulatory info 1012 * @regdmn_pair_id: Current regdomain pair ID 1013 * @dmn_id_2g: 2GHz regdomain ID 1014 * @dmn_id_5g: 5GHz regdomain ID 1015 * @ctl_2g: 2GHz CTL value 1016 * @ctl_5g: 5GHzCTL value 1017 * @dfs_region: dfs region 1018 */ 1019 struct cur_regdmn_info { 1020 uint16_t regdmn_pair_id; 1021 uint16_t dmn_id_2g; 1022 uint16_t dmn_id_5g; 1023 uint8_t ctl_2g; 1024 uint8_t ctl_5g; 1025 uint8_t dfs_region; 1026 }; 1027 1028 /** 1029 * struct ch_avoid_freq_type 1030 * @start_freq: start freq 1031 * @end_freq: end freq 1032 */ 1033 struct ch_avoid_freq_type { 1034 uint32_t start_freq; 1035 uint32_t end_freq; 1036 }; 1037 1038 /** 1039 * struct ch_avoid_ind_type 1040 * @ch_avoid_range_cnt: count 1041 * @avoid_freq_range: avoid freq range array 1042 */ 1043 struct ch_avoid_ind_type { 1044 uint32_t ch_avoid_range_cnt; 1045 struct ch_avoid_freq_type avoid_freq_range[CH_AVOID_MAX_RANGE]; 1046 }; 1047 1048 /** 1049 * struct unsafe_ch_list 1050 * @ch_cnt: no.of channels 1051 * @ch_list: channel list 1052 */ 1053 struct unsafe_ch_list { 1054 uint16_t ch_cnt; 1055 uint16_t ch_list[NUM_CHANNELS]; 1056 }; 1057 1058 /** 1059 * struct avoid_freq_ind_data 1060 * @freq_list: frequency list 1061 * @chan_list: channel list 1062 */ 1063 struct avoid_freq_ind_data { 1064 struct ch_avoid_ind_type freq_list; 1065 struct unsafe_ch_list chan_list; 1066 }; 1067 1068 #endif 1069