xref: /wlan-dirver/qca-wifi-host-cmn/umac/regulatory/dispatcher/inc/reg_services_public_struct.h (revision a175314c51a4ce5cec2835cc8a8c7dc0c1810915)
1 /*
2  * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19  /**
20  * DOC: reg_services_public_struct.h
21  * This file contains regulatory data structures
22  */
23 
24 #ifndef __REG_SERVICES_PUBLIC_STRUCT_H_
25 #define __REG_SERVICES_PUBLIC_STRUCT_H_
26 
27 #include "../../core/src/reg_db.h"
28 
29 #define REG_SBS_SEPARATION_THRESHOLD 100
30 #define REG_MAX_CHANNELS_PER_OPERATING_CLASS  25
31 #define REG_MAX_SUPP_OPER_CLASSES 32
32 #define REG_MAX_CHAN_CHANGE_CBKS 30
33 #define MAX_STA_VDEV_CNT 4
34 #define INVALID_VDEV_ID 0xFF
35 #define INVALID_CHANNEL_NUM 0xBAD
36 #define CH_AVOID_MAX_RANGE   4
37 
38 #ifdef CONFIG_LEGACY_CHAN_ENUM
39 
40 /**
41  * enum channel_enum - channel enumeration
42  * @CHAN_ENUM_1:  channel number 1
43  * @CHAN_ENUM_2:  channel number 2
44  * @CHAN_ENUM_3:  channel number 3
45  * @CHAN_ENUM_4:  channel number 4
46  * @CHAN_ENUM_5:  channel number 5
47  * @CHAN_ENUM_6:  channel number 6
48  * @CHAN_ENUM_7:  channel number 7
49  * @CHAN_ENUM_8:  channel number 8
50  * @CHAN_ENUM_9:  channel number 9
51  * @CHAN_ENUM_10:  channel number 10
52  * @CHAN_ENUM_11:  channel number 11
53  * @CHAN_ENUM_12:  channel number 12
54  * @CHAN_ENUM_13:  channel number 13
55  * @CHAN_ENUM_14:  channel number 14
56  * @CHAN_ENUM_183:  channel number 183
57  * @CHAN_ENUM_184:  channel number 184
58  * @CHAN_ENUM_185:  channel number 185
59  * @CHAN_ENUM_187:  channel number 187
60  * @CHAN_ENUM_188:  channel number 188
61  * @CHAN_ENUM_189:  channel number 189
62  * @CHAN_ENUM_192:  channel number 192
63  * @CHAN_ENUM_196:  channel number 196
64  * @CHAN_ENUM_36:  channel number 36
65  * @CHAN_ENUM_40:  channel number 40
66  * @CHAN_ENUM_44:  channel number 44
67  * @CHAN_ENUM_48:  channel number 48
68  * @CHAN_ENUM_52:  channel number 52
69  * @CHAN_ENUM_56:  channel number 56
70  * @CHAN_ENUM_60:  channel number 60
71  * @CHAN_ENUM_64:  channel number 64
72  * @CHAN_ENUM_100:  channel number 100
73  * @CHAN_ENUM_104:  channel number 104
74  * @CHAN_ENUM_108:  channel number 108
75  * @CHAN_ENUM_112:  channel number 112
76  * @CHAN_ENUM_116:  channel number 116
77  * @CHAN_ENUM_120:  channel number 120
78  * @CHAN_ENUM_124:  channel number 124
79  * @CHAN_ENUM_128:  channel number 128
80  * @CHAN_ENUM_132:  channel number 132
81  * @CHAN_ENUM_136:  channel number 136
82  * @CHAN_ENUM_140:  channel number 140
83  * @CHAN_ENUM_144:  channel number 144
84  * @CHAN_ENUM_149:  channel number 149
85  * @CHAN_ENUM_153:  channel number 153
86  * @CHAN_ENUM_157:  channel number 157
87  * @CHAN_ENUM_161:  channel number 161
88  * @CHAN_ENUM_165:  channel number 165
89  * @CHAN_ENUM_169:  channel number 169
90  * @CHAN_ENUM_170:  channel number 170
91  * @CHAN_ENUM_171:  channel number 171
92  * @CHAN_ENUM_172:  channel number 172
93  * @CHAN_ENUM_173:  channel number 173
94  * @CHAN_ENUM_174:  channel number 174
95  * @CHAN_ENUM_175:  channel number 175
96  * @CHAN_ENUM_176:  channel number 176
97  * @CHAN_ENUM_177:  channel number 177
98  * @CHAN_ENUM_178:  channel number 178
99  * @CHAN_ENUM_179:  channel number 179
100  * @CHAN_ENUM_180:  channel number 180
101  * @CHAN_ENUM_181:  channel number 181
102  * @CHAN_ENUM_182:  channel number 182
103  * @CHAN_ENUM_183:  channel number 183
104  * @CHAN_ENUM_184:  channel number 184
105  */
106 enum channel_enum {
107 	CHAN_ENUM_1,
108 	CHAN_ENUM_2,
109 	CHAN_ENUM_3,
110 	CHAN_ENUM_4,
111 	CHAN_ENUM_5,
112 	CHAN_ENUM_6,
113 	CHAN_ENUM_7,
114 	CHAN_ENUM_8,
115 	CHAN_ENUM_9,
116 	CHAN_ENUM_10,
117 	CHAN_ENUM_11,
118 	CHAN_ENUM_12,
119 	CHAN_ENUM_13,
120 	CHAN_ENUM_14,
121 
122 	CHAN_ENUM_36,
123 	CHAN_ENUM_40,
124 	CHAN_ENUM_44,
125 	CHAN_ENUM_48,
126 	CHAN_ENUM_52,
127 	CHAN_ENUM_56,
128 	CHAN_ENUM_60,
129 	CHAN_ENUM_64,
130 
131 	CHAN_ENUM_100,
132 	CHAN_ENUM_104,
133 	CHAN_ENUM_108,
134 	CHAN_ENUM_112,
135 	CHAN_ENUM_116,
136 	CHAN_ENUM_120,
137 	CHAN_ENUM_124,
138 	CHAN_ENUM_128,
139 	CHAN_ENUM_132,
140 	CHAN_ENUM_136,
141 	CHAN_ENUM_140,
142 	CHAN_ENUM_144,
143 
144 	CHAN_ENUM_149,
145 	CHAN_ENUM_153,
146 	CHAN_ENUM_157,
147 	CHAN_ENUM_161,
148 	CHAN_ENUM_165,
149 #ifndef WLAN_FEATURE_DSRC
150 	CHAN_ENUM_169,
151 	CHAN_ENUM_173,
152 #else
153 	CHAN_ENUM_170,
154 	CHAN_ENUM_171,
155 	CHAN_ENUM_172,
156 	CHAN_ENUM_173,
157 	CHAN_ENUM_174,
158 	CHAN_ENUM_175,
159 	CHAN_ENUM_176,
160 	CHAN_ENUM_177,
161 	CHAN_ENUM_178,
162 	CHAN_ENUM_179,
163 	CHAN_ENUM_180,
164 	CHAN_ENUM_181,
165 	CHAN_ENUM_182,
166 	CHAN_ENUM_183,
167 	CHAN_ENUM_184,
168 #endif
169 
170 	NUM_CHANNELS,
171 
172 	MIN_24GHZ_CHANNEL = CHAN_ENUM_1,
173 	MAX_24GHZ_CHANNEL = CHAN_ENUM_14,
174 	NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
175 
176 	MIN_49GHZ_CHANNEL = INVALID_CHANNEL_NUM,
177 	MAX_49GHZ_CHANNEL = INVALID_CHANNEL_NUM - 1,
178 	NUM_49GHZ_CHANNELS = MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1,
179 
180 	MIN_5GHZ_CHANNEL = CHAN_ENUM_36,
181 #ifndef WLAN_FEATURE_DSRC
182 	MAX_5GHZ_CHANNEL = CHAN_ENUM_173,
183 #else
184 	MAX_5GHZ_CHANNEL = CHAN_ENUM_184,
185 #endif
186 	NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1),
187 
188 #ifdef WLAN_FEATURE_DSRC
189 	MIN_DSRC_CHANNEL = CHAN_ENUM_170,
190 	MAX_DSRC_CHANNEL = CHAN_ENUM_184,
191 	NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1),
192 #endif
193 
194 	INVALID_CHANNEL = 0xBAD,
195 };
196 
197 #else
198 /**
199  * enum channel_enum - channel enumeration
200  * @CHAN_ENUM_2412: channel with freq 2412
201  * @CHAN_ENUM_2417: channel with freq 2417
202  * @CHAN_ENUM_2422: channel with freq 2422
203  * @CHAN_ENUM_2427: channel with freq 2427
204  * @CHAN_ENUM_2432: channel with freq 2432
205  * @CHAN_ENUM_2437: channel with freq 2437
206  * @CHAN_ENUM_2442: channel with freq 2442
207  * @CHAN_ENUM_2447: channel with freq 2447
208  * @CHAN_ENUM_2452: channel with freq 2452
209  * @CHAN_ENUM_2457: channel with freq 2457
210  * @CHAN_ENUM_2462: channel with freq 2462
211  * @CHAN_ENUM_2467: channel with freq 2467
212  * @CHAN_ENUM_2472: channel with freq 2472
213  * @CHAN_ENUM_2484: channel with freq 2484
214  * @CHAN_ENUM_4912: channel with freq 4912
215  * @CHAN_ENUM_4915: channel with freq 4915
216  * @CHAN_ENUM_4917: channel with freq 4917
217  * @CHAN_ENUM_4920: channel with freq 4920
218  * @CHAN_ENUM_4922: channel with freq 4922
219  * @CHAN_ENUM_4925: channel with freq 4925
220  * @CHAN_ENUM_4927: channel with freq 4927
221  * @CHAN_ENUM_4932: channel with freq 4932
222  * @CHAN_ENUM_4935: channel with freq 4935
223  * @CHAN_ENUM_4937: channel with freq 4937
224  * @CHAN_ENUM_4940: channel with freq 4940
225  * @CHAN_ENUM_4942: channel with freq 4942
226  * @CHAN_ENUM_4945: channel with freq 4945
227  * @CHAN_ENUM_4947: channel with freq 4947
228  * @CHAN_ENUM_4950: channel with freq 4950
229  * @CHAN_ENUM_4952: channel with freq 4952
230  * @CHAN_ENUM_4955: channel with freq 4955
231  * @CHAN_ENUM_4957: channel with freq 4957
232  * @CHAN_ENUM_4960: channel with freq 4960
233  * @CHAN_ENUM_4962: channel with freq 4962
234  * @CHAN_ENUM_4965: channel with freq 4965
235  * @CHAN_ENUM_4967: channel with freq 4967
236  * @CHAN_ENUM_4970: channel with freq 4970
237  * @CHAN_ENUM_4972: channel with freq 4972
238  * @CHAN_ENUM_4975: channel with freq 4975
239  * @CHAN_ENUM_4977: channel with freq 4977
240  * @CHAN_ENUM_4980: channel with freq 4980
241  * @CHAN_ENUM_4982: channel with freq 4982
242  * @CHAN_ENUM_4985: channel with freq 4985
243  * @CHAN_ENUM_4987: channel with freq 4987
244  * @CHAN_ENUM_5032: channel with freq 5032
245  * @CHAN_ENUM_5035: channel with freq 5035
246  * @CHAN_ENUM_5037: channel with freq 5037
247  * @CHAN_ENUM_5040: channel with freq 5040
248  * @CHAN_ENUM_5042: channel with freq 5042
249  * @CHAN_ENUM_5045: channel with freq 5045
250  * @CHAN_ENUM_5047: channel with freq 5047
251  * @CHAN_ENUM_5052: channel with freq 5052
252  * @CHAN_ENUM_5055: channel with freq 5055
253  * @CHAN_ENUM_5057: channel with freq 5057
254  * @CHAN_ENUM_5060: channel with freq 5060
255  * @CHAN_ENUM_5080: channel with freq 5080
256  * @CHAN_ENUM_5180: channel with freq 5180
257  * @CHAN_ENUM_5200: channel with freq 5200
258  * @CHAN_ENUM_5220: channel with freq 5220
259  * @CHAN_ENUM_5240: channel with freq 5240
260  * @CHAN_ENUM_5260: channel with freq 5260
261  * @CHAN_ENUM_5280: channel with freq 5280
262  * @CHAN_ENUM_5300: channel with freq 5300
263  * @CHAN_ENUM_5320: channel with freq 5320
264  * @CHAN_ENUM_5500: channel with freq 5500
265  * @CHAN_ENUM_5520: channel with freq 5520
266  * @CHAN_ENUM_5540: channel with freq 5540
267  * @CHAN_ENUM_5560: channel with freq 5560
268  * @CHAN_ENUM_5580: channel with freq 5580
269  * @CHAN_ENUM_5600: channel with freq 5600
270  * @CHAN_ENUM_5620: channel with freq 5620
271  * @CHAN_ENUM_5640: channel with freq 5640
272  * @CHAN_ENUM_5660: channel with freq 5660
273  * @CHAN_ENUM_5680: channel with freq 5680
274  * @CHAN_ENUM_5700: channel with freq 5700
275  * @CHAN_ENUM_5720: channel with freq 5720
276  * @CHAN_ENUM_5745: channel with freq 5745
277  * @CHAN_ENUM_5765: channel with freq 5765
278  * @CHAN_ENUM_5785: channel with freq 5785
279  * @CHAN_ENUM_5805: channel with freq 5805
280  * @CHAN_ENUM_5825: channel with freq 5825
281  * @CHAN_ENUM_5845: channel with freq 5845
282  * @CHAN_ENUM_5850: channel with freq 5850
283  * @CHAN_ENUM_5855: channel with freq 5855
284  * @CHAN_ENUM_5860: channel with freq 5860
285  * @CHAN_ENUM_5865: channel with freq 5865
286  * @CHAN_ENUM_5870: channel with freq 5870
287  * @CHAN_ENUM_5875: channel with freq 5875
288  * @CHAN_ENUM_5880: channel with freq 5880
289  * @CHAN_ENUM_5885: channel with freq 5885
290  * @CHAN_ENUM_5890: channel with freq 5890
291  * @CHAN_ENUM_5895: channel with freq 5895
292  * @CHAN_ENUM_5900: channel with freq 5900
293  * @CHAN_ENUM_5905: channel with freq 5905
294  * @CHAN_ENUM_5910: channel with freq 5910
295  * @CHAN_ENUM_5915: channel with freq 5915
296  * @CHAN_ENUM_5920: channel with freq 5920
297  */
298 enum channel_enum {
299 	CHAN_ENUM_2412,
300 	CHAN_ENUM_2417,
301 	CHAN_ENUM_2422,
302 	CHAN_ENUM_2427,
303 	CHAN_ENUM_2432,
304 	CHAN_ENUM_2437,
305 	CHAN_ENUM_2442,
306 	CHAN_ENUM_2447,
307 	CHAN_ENUM_2452,
308 	CHAN_ENUM_2457,
309 	CHAN_ENUM_2462,
310 	CHAN_ENUM_2467,
311 	CHAN_ENUM_2472,
312 	CHAN_ENUM_2484,
313 
314 	CHAN_ENUM_4912,
315 	CHAN_ENUM_4915,
316 	CHAN_ENUM_4917,
317 	CHAN_ENUM_4920,
318 	CHAN_ENUM_4922,
319 	CHAN_ENUM_4925,
320 	CHAN_ENUM_4927,
321 	CHAN_ENUM_4932,
322 	CHAN_ENUM_4935,
323 	CHAN_ENUM_4937,
324 	CHAN_ENUM_4940,
325 	CHAN_ENUM_4942,
326 	CHAN_ENUM_4945,
327 	CHAN_ENUM_4947,
328 	CHAN_ENUM_4950,
329 	CHAN_ENUM_4952,
330 	CHAN_ENUM_4955,
331 	CHAN_ENUM_4957,
332 	CHAN_ENUM_4960,
333 	CHAN_ENUM_4962,
334 	CHAN_ENUM_4965,
335 	CHAN_ENUM_4967,
336 	CHAN_ENUM_4970,
337 	CHAN_ENUM_4972,
338 	CHAN_ENUM_4975,
339 	CHAN_ENUM_4977,
340 	CHAN_ENUM_4980,
341 	CHAN_ENUM_4982,
342 	CHAN_ENUM_4985,
343 	CHAN_ENUM_4987,
344 	CHAN_ENUM_5032,
345 	CHAN_ENUM_5035,
346 	CHAN_ENUM_5037,
347 	CHAN_ENUM_5040,
348 	CHAN_ENUM_5042,
349 	CHAN_ENUM_5045,
350 	CHAN_ENUM_5047,
351 	CHAN_ENUM_5052,
352 	CHAN_ENUM_5055,
353 	CHAN_ENUM_5057,
354 	CHAN_ENUM_5060,
355 	CHAN_ENUM_5080,
356 
357 	CHAN_ENUM_5180,
358 	CHAN_ENUM_5200,
359 	CHAN_ENUM_5220,
360 	CHAN_ENUM_5240,
361 	CHAN_ENUM_5260,
362 	CHAN_ENUM_5280,
363 	CHAN_ENUM_5300,
364 	CHAN_ENUM_5320,
365 	CHAN_ENUM_5500,
366 	CHAN_ENUM_5520,
367 	CHAN_ENUM_5540,
368 	CHAN_ENUM_5560,
369 	CHAN_ENUM_5580,
370 	CHAN_ENUM_5600,
371 	CHAN_ENUM_5620,
372 	CHAN_ENUM_5640,
373 	CHAN_ENUM_5660,
374 	CHAN_ENUM_5680,
375 	CHAN_ENUM_5700,
376 	CHAN_ENUM_5720,
377 	CHAN_ENUM_5745,
378 	CHAN_ENUM_5765,
379 	CHAN_ENUM_5785,
380 	CHAN_ENUM_5805,
381 	CHAN_ENUM_5825,
382 	CHAN_ENUM_5845,
383 
384 	CHAN_ENUM_5850,
385 	CHAN_ENUM_5855,
386 	CHAN_ENUM_5860,
387 	CHAN_ENUM_5865,
388 	CHAN_ENUM_5870,
389 	CHAN_ENUM_5875,
390 	CHAN_ENUM_5880,
391 	CHAN_ENUM_5885,
392 	CHAN_ENUM_5890,
393 	CHAN_ENUM_5895,
394 	CHAN_ENUM_5900,
395 	CHAN_ENUM_5905,
396 	CHAN_ENUM_5910,
397 	CHAN_ENUM_5915,
398 	CHAN_ENUM_5920,
399 
400 	NUM_CHANNELS,
401 
402 	MIN_24GHZ_CHANNEL = CHAN_ENUM_2412,
403 	MAX_24GHZ_CHANNEL = CHAN_ENUM_2484,
404 	NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
405 
406 	MIN_49GHZ_CHANNEL = CHAN_ENUM_4912,
407 	MAX_49GHZ_CHANNEL = CHAN_ENUM_5080,
408 	NUM_49GHZ_CHANNELS = (MAX_49GHZ_CHANNEL - MIN_49GHZ_CHANNEL + 1),
409 
410 	MIN_5GHZ_CHANNEL = CHAN_ENUM_5180,
411 	MAX_5GHZ_CHANNEL = CHAN_ENUM_5920,
412 	NUM_5GHZ_CHANNELS = (MAX_5GHZ_CHANNEL - MIN_5GHZ_CHANNEL + 1),
413 
414 	MIN_DSRC_CHANNEL = CHAN_ENUM_5850,
415 	MAX_DSRC_CHANNEL = CHAN_ENUM_5920,
416 	NUM_DSRC_CHANNELS = (MAX_DSRC_CHANNEL - MIN_DSRC_CHANNEL + 1),
417 
418 	INVALID_CHANNEL = 0xBAD,
419 };
420 #endif
421 
422 /**
423  * enum channel_state - channel state
424  * @CHANNEL_STATE_DISABLE: disabled state
425  * @CHANNEL_STATE_PASSIVE: passive state
426  * @CHANNEL_STATE_DFS: dfs state
427  * @CHANNEL_STATE_ENABLE: enabled state
428  * @CHANNEL_STATE_INVALID: invalid state
429  */
430 enum channel_state {
431 	CHANNEL_STATE_DISABLE,
432 	CHANNEL_STATE_PASSIVE,
433 	CHANNEL_STATE_DFS,
434 	CHANNEL_STATE_ENABLE,
435 	CHANNEL_STATE_INVALID,
436 };
437 
438 /**
439  * enum reg_domain: reg domain
440  * @REGDOMAIN_FCC: FCC domain
441  * @REGDOMAIN_ETSI: ETSI domain
442  * @REGDOMAIN_JAPAN: JAPAN domain
443  * @REGDOMAIN_WORLD: WORLD domain
444  * @REGDOMAIN_COUNT: Max domain
445  */
446 typedef enum {
447 	REGDOMAIN_FCC,
448 	REGDOMAIN_ETSI,
449 	REGDOMAIN_JAPAN,
450 	REGDOMAIN_WORLD,
451 	REGDOMAIN_COUNT
452 } v_REGDOMAIN_t;
453 
454 
455 /**
456  * enum phy_ch_width - channel width
457  * @CH_WIDTH_20MHZ: 20 mhz width
458  * @CH_WIDTH_40MHZ: 40 mhz width
459  * @CH_WIDTH_80MHZ: 80 mhz width
460  * @CH_WIDTH_160MHZ: 160 mhz width
461  * @CH_WIDTH_80P80HZ: 80+80 mhz width
462  * @CH_WIDTH_5MHZ: 5 mhz width
463  * @CH_WIDTH_10MHZ: 10 mhz width
464  * @CH_WIDTH_INVALID: invalid width
465  * @CH_WIDTH_MAX: max possible width
466  */
467 enum phy_ch_width {
468 	CH_WIDTH_20MHZ = 0,
469 	CH_WIDTH_40MHZ,
470 	CH_WIDTH_80MHZ,
471 	CH_WIDTH_160MHZ,
472 	CH_WIDTH_80P80MHZ,
473 	CH_WIDTH_5MHZ,
474 	CH_WIDTH_10MHZ,
475 	CH_WIDTH_INVALID,
476 	CH_WIDTH_MAX
477 };
478 
479 /**
480  * struct ch_params
481  * @ch_width: channel width
482  * @sec_ch_offset: secondary channel offset
483  * @center_freq_seg0: center freq for segment 0
484  * @center_freq_seg1: center freq for segment 1
485  */
486 struct ch_params {
487 	enum phy_ch_width ch_width;
488 	uint8_t sec_ch_offset;
489 	uint8_t center_freq_seg0;
490 	uint8_t center_freq_seg1;
491 };
492 
493 /**
494  * struct channel_power
495  * @chan_num: channel number
496  * @tx_power: TX power
497  */
498 struct channel_power {
499 	uint32_t chan_num;
500 	uint32_t tx_power;
501 };
502 
503 /**
504  * enum offset_t: channel offset
505  * @BW20: 20 mhz channel
506  * @BW40_LOW_PRIMARY: lower channel in 40 mhz
507  * @BW40_HIGH_PRIMARY: higher channel in 40 mhz
508  * @BW80: 80 mhz channel
509  * @BWALL: unknown bandwidth
510  */
511 enum offset_t {
512 	BW20 = 0,
513 	BW40_LOW_PRIMARY = 1,
514 	BW40_HIGH_PRIMARY = 3,
515 	BW80,
516 	BWALL
517 };
518 
519 /**
520  * struct reg_dmn_op_class_map_t: operating class
521  * @op_class: operating class number
522  * @ch_spacing: channel spacing
523  * @offset: offset
524  * @channels: channel set
525  */
526 struct reg_dmn_op_class_map_t {
527 	uint8_t op_class;
528 	uint8_t ch_spacing;
529 	enum offset_t offset;
530 	uint8_t channels[REG_MAX_CHANNELS_PER_OPERATING_CLASS];
531 };
532 
533 /**
534  * struct reg_dmn_supp_op_classes: operating classes
535  * @num_classes: number of classes
536  * @classes: classes
537  */
538 struct reg_dmn_supp_op_classes {
539 	uint8_t num_classes;
540 	uint8_t classes[REG_MAX_SUPP_OPER_CLASSES];
541 };
542 
543 /**
544  * struct reg_start_11d_scan_req: start 11d scan request
545  * @vdev_id: vdev id
546  * @scan_period_msec: scan duration in milli-seconds
547  * @start_interval_msec: offset duration to start the scan in milli-seconds
548  */
549 struct reg_start_11d_scan_req {
550 	uint8_t vdev_id;
551 	uint32_t scan_period_msec;
552 	uint32_t start_interval_msec;
553 };
554 
555 /**
556  * struct reg_stop_11d_scan_req: stop 11d scan request
557  * @vdev_id: vdev id
558  */
559 struct reg_stop_11d_scan_req {
560 	uint8_t vdev_id;
561 };
562 
563 /**
564  * struct reg_11d_new_country: regulatory 11d new coutry code
565  * @alpha2: new 11d alpha2
566  */
567 struct reg_11d_new_country {
568 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
569 };
570 
571 /**
572  * enum country_src: country source
573  * @SOURCE_QUERY: source query
574  * @SOURCE_CORE: source regulatory core
575  * @SOURCE_DRIVER: source driver
576  * @SOURCE_USERSPACE: source userspace
577  * @SOURCE_11D: source 11D
578  */
579 enum country_src {
580 	SOURCE_UNKNOWN,
581 	SOURCE_QUERY,
582 	SOURCE_CORE,
583 	SOURCE_DRIVER,
584 	SOURCE_USERSPACE,
585 	SOURCE_11D
586 };
587 
588 /**
589  * struct regulatory_channel
590  * @center_freq: center frequency
591  * @chan_num: channel number
592  * @state: channel state
593  * @chan_flags: channel flags
594  * @tx_power: TX powers
595  * @min_bw: min bandwidth
596  * @max_bw: max bandwidth
597  * @nol_chan: whether channel is nol
598  */
599 struct regulatory_channel {
600 	uint32_t center_freq;
601 	uint32_t chan_num;
602 	enum channel_state state;
603 	uint32_t chan_flags;
604 	uint32_t tx_power;
605 	uint16_t min_bw;
606 	uint16_t max_bw;
607 	uint8_t ant_gain;
608 	bool nol_chan;
609 };
610 
611 
612 /**
613  * struct regulatory: regulatory information
614  * @reg_domain: regulatory domain pair
615  * @eeprom_rd_ext: eeprom value
616  * @country_code: current country in integer
617  * @alpha2: current alpha2
618  * @def_country: default country alpha2
619  * @def_region: DFS region
620  * @ctl_2g: 2G CTL value
621  * @ctl_5g: 5G CTL value
622  * @reg_pair: pointer to regulatory pair
623  * @cc_src: country code src
624  * @reg_flags: kernel regulatory flags
625  */
626 struct regulatory {
627 	uint32_t reg_domain;
628 	uint32_t eeprom_rd_ext;
629 	uint16_t country_code;
630 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
631 	uint8_t ctl_2g;
632 	uint8_t ctl_5g;
633 	const void *regpair;
634 	enum country_src cc_src;
635 	uint32_t reg_flags;
636 };
637 
638 /**
639  * struct chan_map
640  * @center_freq: center freq in mhz
641  * @chan_num: channel number
642  * @min_bw: min bw
643  * @max_bw: max bw
644  */
645 struct chan_map {
646 	uint32_t center_freq;
647 	uint32_t chan_num;
648 	uint16_t min_bw;
649 	uint16_t max_bw;
650 };
651 
652 /**
653  * struct bonded_channel
654  * @start_ch: start channel
655  * @end_ch: end channel
656  */
657 struct bonded_channel {
658 	uint16_t start_ch;
659 	uint16_t end_ch;
660 };
661 
662 struct set_country {
663 	uint8_t country[REG_ALPHA2_LEN + 1];
664 	uint8_t pdev_id;
665 };
666 /**
667  * enum ht_sec_ch_offset
668  * @NO_SEC_CH: no secondary
669  * @LOW_PRIMARY_CH: low primary
670  * @HIGH_PRIMARY_CH: high primary
671  */
672 enum ht_sec_ch_offset {
673 	NO_SEC_CH = 0,
674 	LOW_PRIMARY_CH = 1,
675 	HIGH_PRIMARY_CH = 3,
676 };
677 
678 enum cc_setting_code {
679 	REG_SET_CC_STATUS_PASS = 0,
680 	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
681 	REG_INIT_ALPHA2_NOT_FOUND = 2,
682 	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
683 	REG_SET_CC_STATUS_NO_MEMORY = 4,
684 	REG_SET_CC_STATUS_FAIL = 5,
685 };
686 
687 /**
688  * struct cur_reg_rule
689  * @start_freq: start frequency
690  * @end_freq: end frequency
691  * @max_bw: maximum bandwidth
692  * @reg_power: regulatory power
693  * @ant_gain: antenna gain
694  * @flags: regulatory flags
695  */
696 struct cur_reg_rule {
697 	uint16_t start_freq;
698 	uint16_t end_freq;
699 	uint16_t max_bw;
700 	uint8_t reg_power;
701 	uint8_t ant_gain;
702 	uint16_t flags;
703 };
704 
705 /**
706  * struct cur_regulatory_info
707  * @psoc: psoc ptr
708  * @status_code: status value
709  * @num_phy: number of phy
710  * @phy_id: phy id
711  * @reg_dmn_pair: reg domain pair
712  * @ctry_code: country code
713  * @alpha2: country alpha2
714  * @offload_enabled: offload enabled
715  * @dfs_reg: dfs region
716  * @phybitmap: phy bit map
717  * @min_bw_2g: minimum 2G bw
718  * @max_bw_2g: maximum 2G bw
719  * @min_bw_5g: minimum 5G bw
720  * @max_bw_5g: maximum 5G bw
721  * @num_2g_reg_rules: number 2G reg rules
722  * @num_5g_reg_rules: number 5G reg rules
723  * @reg_rules_2g_ptr: ptr to 2G reg rules
724  * @reg_rules_5g_ptr: ptr to 5G reg rules
725  */
726 struct cur_regulatory_info {
727 	struct wlan_objmgr_psoc *psoc;
728 	enum cc_setting_code status_code;
729 	uint8_t num_phy;
730 	uint8_t phy_id;
731 	uint16_t reg_dmn_pair;
732 	uint16_t ctry_code;
733 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
734 	bool offload_enabled;
735 	enum dfs_reg dfs_region;
736 	uint32_t phybitmap;
737 	uint32_t min_bw_2g;
738 	uint32_t max_bw_2g;
739 	uint32_t min_bw_5g;
740 	uint32_t max_bw_5g;
741 	uint32_t num_2g_reg_rules;
742 	uint32_t num_5g_reg_rules;
743 	struct cur_reg_rule *reg_rules_2g_ptr;
744 	struct cur_reg_rule *reg_rules_5g_ptr;
745 };
746 
747 /**
748  * struct reg_rule_info
749  * @alpha2: alpha2 of reg rules
750  * @dfs_region: dfs region
751  * @num_of_reg_rules: number of reg rules
752  * @reg_rules_ptr: regulatory rules pointer
753  */
754 struct reg_rule_info {
755 	uint8_t alpha2[REG_ALPHA2_LEN + 1];
756 	enum dfs_reg dfs_region;
757 	uint8_t num_of_reg_rules;
758 	struct cur_reg_rule *reg_rules_ptr;
759 };
760 
761 /**
762  * enum band_info
763  * @BAND_ALL:all bands
764  * @BAND_2G: 2G band
765  * @BAND_5G: 5G band
766  * @BAND_UNKNOWN: Unsupported band
767  */
768 enum band_info {
769 	BAND_ALL,
770 	BAND_2G,
771 	BAND_5G,
772 	BAND_UNKNOWN
773 };
774 
775 /**
776  * enum restart_beaconing_on_ch_avoid_rule: control the beaconing entity to
777  * move away from active LTE channels
778  * @CH_AVOID_RULE_DO_NOT_RESTART: Do not move from active LTE
779  *                              channels
780  * @CH_AVOID_RULE_RESTART: Move from active LTE channels
781  * @CH_AVOID_RULE_RESTART_24G_ONLY: move from 2.4G active LTE
782  *                                channels only
783  */
784 enum restart_beaconing_on_ch_avoid_rule {
785 	CH_AVOID_RULE_DO_NOT_RESTART,
786 	CH_AVOID_RULE_RESTART,
787 	CH_AVOID_RULE_RESTART_24G_ONLY,
788 };
789 
790 /**
791  * struct reg_config_vars
792  * @enable_11d_support: enable 11d support
793  * @scan_11d_interval: 11d scan interval in ms
794  * @userspace_ctry_priority: user priority
795  * @band_capability: band capability
796  * @dfs_disable: dfs disabled
797  * @indoor_channel_support: indoor channel support
798  * @force_ssc_disable_indoor_channel: Disable indoor channel on sap start
799  * @restart_beaconing: control the beaconing entity to move
800  * away from active LTE channels
801  * @enable_srd_chan_in_master_mode: SRD channel support in master mode
802  */
803 struct reg_config_vars {
804 	uint32_t enable_11d_support;
805 	uint32_t scan_11d_interval;
806 	uint32_t userspace_ctry_priority;
807 	enum band_info band_capability;
808 	uint32_t dfs_enabled;
809 	uint32_t indoor_chan_enabled;
810 	uint32_t force_ssc_disable_indoor_channel;
811 	enum restart_beaconing_on_ch_avoid_rule restart_beaconing;
812 	bool enable_srd_chan_in_master_mode;
813 };
814 
815 /**
816  * struct reg_freq_range
817  * @low_freq: low frequency
818  * @high_freq: high frequency
819  */
820 struct reg_freq_range {
821 	uint32_t low_freq;
822 	uint32_t high_freq;
823 };
824 
825 /**
826  * struct reg_sched_payload
827  * @psoc: psoc ptr
828  * @pdev: pdev ptr
829  */
830 struct reg_sched_payload {
831 	struct wlan_objmgr_psoc *psoc;
832 	struct wlan_objmgr_pdev *pdev;
833 };
834 
835 /**
836  * enum direction
837  * @NORTHBOUND: northbound
838  * @SOUTHBOUND: southbound
839  */
840 enum direction {
841 	NORTHBOUND,
842 	SOUTHBOUND,
843 };
844 
845 /**
846  * struct mas_chan_params
847  * @dfs_region: dfs region
848  * @phybitmap: phybitmap
849  * @mas_chan_list: master chan list
850  * @default_country: default country
851  * @current_country: current country
852  * @def_region_domain: default reg domain
853  * @def_country_code: default country code
854  * @reg_dmn_pair: reg domain pair
855  * @ctry_code: country code
856  * @reg_rules: regulatory rules
857  */
858 struct mas_chan_params {
859 	enum dfs_reg dfs_region;
860 	uint32_t phybitmap;
861 	struct regulatory_channel mas_chan_list[NUM_CHANNELS];
862 	char default_country[REG_ALPHA2_LEN + 1];
863 	char current_country[REG_ALPHA2_LEN + 1];
864 	uint16_t def_region_domain;
865 	uint16_t def_country_code;
866 	uint16_t reg_dmn_pair;
867 	uint16_t ctry_code;
868 	struct reg_rule_info reg_rules;
869 };
870 
871 /**
872  * enum cc_regdmn_flag: Regdomain flags
873  * @INVALID:       Invalid flag
874  * @CC_IS_SET:     Country code is set
875  * @REGDMN_IS_SET: Regdomain ID is set
876  * @ALPHA_IS_SET:  Country ISO is set
877  */
878 enum cc_regdmn_flag {
879 	INVALID_CC,
880 	CC_IS_SET,
881 	REGDMN_IS_SET,
882 	ALPHA_IS_SET,
883 };
884 
885 /**
886  * struct cc_regdmn_s: User country code or regdomain
887  * @country_code: Country code
888  * @regdmn_id:    Regdomain pair ID
889  * @alpha:        Country ISO
890  * @flags:        Regdomain flags
891  */
892 struct cc_regdmn_s {
893 	union {
894 		uint16_t country_code;
895 		uint16_t regdmn_id;
896 		uint8_t alpha[REG_ALPHA2_LEN + 1];
897 	} cc;
898 	uint8_t flags;
899 };
900 
901 /**
902  * struct cur_regdmn_info: Current regulatory info
903  * @regdmn_pair_id: Current regdomain pair ID
904  * @dmn_id_2g: 2GHz regdomain ID
905  * @dmn_id_5g: 5GHz regdomain ID
906  * @ctl_2g: 2GHz CTL value
907  * @ctl_5g: 5GHzCTL value
908  * @dfs_region: dfs region
909  */
910 struct cur_regdmn_info {
911 	uint16_t regdmn_pair_id;
912 	uint16_t dmn_id_2g;
913 	uint16_t dmn_id_5g;
914 	uint8_t ctl_2g;
915 	uint8_t ctl_5g;
916 	uint8_t dfs_region;
917 };
918 
919 /**
920  * struct ch_avoid_freq_type
921  * @start_freq: start freq
922  * @end_freq: end freq
923  */
924 struct ch_avoid_freq_type {
925 	uint32_t start_freq;
926 	uint32_t end_freq;
927 };
928 
929 /**
930  * struct ch_avoid_ind_type
931  * @ch_avoid_range_cnt: count
932  * @avoid_freq_range: avoid freq range array
933  */
934 struct ch_avoid_ind_type {
935 	uint32_t ch_avoid_range_cnt;
936 	struct ch_avoid_freq_type avoid_freq_range[CH_AVOID_MAX_RANGE];
937 };
938 
939 /**
940  * struct unsafe_ch_list
941  * @ch_cnt: no.of channels
942  * @ch_list: channel list
943  */
944 struct unsafe_ch_list {
945 	uint16_t ch_cnt;
946 	uint16_t ch_list[NUM_CHANNELS];
947 };
948 
949 /**
950  * struct avoid_freq_ind_data
951  * @freq_list: frequency list
952  * @chan_list: channel list
953  */
954 struct avoid_freq_ind_data {
955 	struct ch_avoid_ind_type freq_list;
956 	struct unsafe_ch_list chan_list;
957 };
958 
959 #endif
960