xref: /wlan-dirver/qca-wifi-host-cmn/umac/regulatory/core/src/reg_services_common.c (revision fa47688f04ef001a6dcafaebdcc3c031f15ee75e)
1 /*
2  * Copyright (c) 2014-2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 /**
20  * DOC: reg_services_common.c
21  * This file defines regulatory component service functions
22  */
23 
24 #include <wlan_cmn.h>
25 #include <reg_services_public_struct.h>
26 #include <wlan_objmgr_psoc_obj.h>
27 #include <qdf_lock.h>
28 #include "reg_priv_objs.h"
29 #include "reg_getset.h"
30 #include "reg_callbacks.h"
31 #include "reg_services_common.h"
32 #include <wlan_objmgr_psoc_obj.h>
33 #include "reg_db.h"
34 #include "reg_db_parser.h"
35 #include "reg_build_chan_list.h"
36 #include <wlan_objmgr_pdev_obj.h>
37 
38 const struct chan_map *channel_map;
39 
40 static const struct bonded_channel bonded_chan_40mhz_list[] = {
41 	{36, 40},
42 	{44, 48},
43 	{52, 56},
44 	{60, 64},
45 	{100, 104},
46 	{108, 112},
47 	{116, 120},
48 	{124, 128},
49 	{132, 136},
50 	{140, 144},
51 	{149, 153},
52 	{157, 161}
53 };
54 
55 static const struct bonded_channel bonded_chan_80mhz_list[] = {
56 	{36, 48},
57 	{52, 64},
58 	{100, 112},
59 	{116, 128},
60 	{132, 144},
61 	{149, 161}
62 };
63 
64 static const struct bonded_channel bonded_chan_160mhz_list[] = {
65 	{36, 64},
66 	{100, 128}
67 };
68 
69 static const enum phy_ch_width get_next_lower_bw[] = {
70 	[CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ,
71 	[CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ,
72 	[CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ,
73 	[CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ,
74 	[CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ,
75 	[CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ,
76 	[CH_WIDTH_5MHZ] = CH_WIDTH_INVALID
77 };
78 
79 #ifdef CONFIG_LEGACY_CHAN_ENUM
80 static const struct chan_map channel_map_old[NUM_CHANNELS] = {
81 	[CHAN_ENUM_1] = {2412, 1, 2, 40},
82 	[CHAN_ENUM_2] = {2417, 2, 2, 40},
83 	[CHAN_ENUM_3] = {2422, 3, 2, 40},
84 	[CHAN_ENUM_4] = {2427, 4, 2, 40},
85 	[CHAN_ENUM_5] = {2432, 5, 2, 40},
86 	[CHAN_ENUM_6] = {2437, 6, 2, 40},
87 	[CHAN_ENUM_7] = {2442, 7, 2, 40},
88 	[CHAN_ENUM_8] = {2447, 8, 2, 40},
89 	[CHAN_ENUM_9] = {2452, 9, 2, 40},
90 	[CHAN_ENUM_10] = {2457, 10, 2, 40},
91 	[CHAN_ENUM_11] = {2462, 11, 2, 40},
92 	[CHAN_ENUM_12] = {2467, 12, 2, 40},
93 	[CHAN_ENUM_13] = {2472, 13, 2, 40},
94 	[CHAN_ENUM_14] = {2484, 14, 2, 40},
95 
96 	[CHAN_ENUM_36] = {5180, 36, 2, 160},
97 	[CHAN_ENUM_40] = {5200, 40, 2, 160},
98 	[CHAN_ENUM_44] = {5220, 44, 2, 160},
99 	[CHAN_ENUM_48] = {5240, 48, 2, 160},
100 	[CHAN_ENUM_52] = {5260, 52, 2, 160},
101 	[CHAN_ENUM_56] = {5280, 56, 2, 160},
102 	[CHAN_ENUM_60] = {5300, 60, 2, 160},
103 	[CHAN_ENUM_64] = {5320, 64, 2, 160},
104 
105 	[CHAN_ENUM_100] = {5500, 100, 2, 160},
106 	[CHAN_ENUM_104] = {5520, 104, 2, 160},
107 	[CHAN_ENUM_108] = {5540, 108, 2, 160},
108 	[CHAN_ENUM_112] = {5560, 112, 2, 160},
109 	[CHAN_ENUM_116] = {5580, 116, 2, 160},
110 	[CHAN_ENUM_120] = {5600, 120, 2, 160},
111 	[CHAN_ENUM_124] = {5620, 124, 2, 160},
112 	[CHAN_ENUM_128] = {5640, 128, 2, 160},
113 	[CHAN_ENUM_132] = {5660, 132, 2, 160},
114 	[CHAN_ENUM_136] = {5680, 136, 2, 160},
115 	[CHAN_ENUM_140] = {5700, 140, 2, 160},
116 	[CHAN_ENUM_144] = {5720, 144, 2, 160},
117 
118 	[CHAN_ENUM_149] = {5745, 149, 2, 160},
119 	[CHAN_ENUM_153] = {5765, 153, 2, 160},
120 	[CHAN_ENUM_157] = {5785, 157, 2, 160},
121 	[CHAN_ENUM_161] = {5805, 161, 2, 160},
122 	[CHAN_ENUM_165] = {5825, 165, 2, 160},
123 #ifndef WLAN_FEATURE_DSRC
124 	[CHAN_ENUM_169] = {5845, 169, 2, 20},
125 	[CHAN_ENUM_173] = {5865, 173, 2, 20},
126 #else
127 	[CHAN_ENUM_170] = {5852, 170, 2, 20},
128 	[CHAN_ENUM_171] = {5855, 171, 2, 20},
129 	[CHAN_ENUM_172] = {5860, 172, 2, 20},
130 	[CHAN_ENUM_173] = {5865, 173, 2, 20},
131 	[CHAN_ENUM_174] = {5870, 174, 2, 20},
132 	[CHAN_ENUM_175] = {5875, 175, 2, 20},
133 	[CHAN_ENUM_176] = {5880, 176, 2, 20},
134 	[CHAN_ENUM_177] = {5885, 177, 2, 20},
135 	[CHAN_ENUM_178] = {5890, 178, 2, 20},
136 	[CHAN_ENUM_179] = {5895, 179, 2, 20},
137 	[CHAN_ENUM_180] = {5900, 180, 2, 20},
138 	[CHAN_ENUM_181] = {5905, 181, 2, 20},
139 	[CHAN_ENUM_182] = {5910, 182, 2, 20},
140 	[CHAN_ENUM_183] = {5915, 183, 2, 20},
141 	[CHAN_ENUM_184] = {5920, 184, 2, 20},
142 #endif
143 };
144 
145 #else
146 static const struct chan_map channel_map_us[NUM_CHANNELS] = {
147 	[CHAN_ENUM_2412] = {2412, 1, 20, 40},
148 	[CHAN_ENUM_2417] = {2417, 2, 20, 40},
149 	[CHAN_ENUM_2422] = {2422, 3, 20, 40},
150 	[CHAN_ENUM_2427] = {2427, 4, 20, 40},
151 	[CHAN_ENUM_2432] = {2432, 5, 20, 40},
152 	[CHAN_ENUM_2437] = {2437, 6, 20, 40},
153 	[CHAN_ENUM_2442] = {2442, 7, 20, 40},
154 	[CHAN_ENUM_2447] = {2447, 8, 20, 40},
155 	[CHAN_ENUM_2452] = {2452, 9, 20, 40},
156 	[CHAN_ENUM_2457] = {2457, 10, 20, 40},
157 	[CHAN_ENUM_2462] = {2462, 11, 20, 40},
158 	[CHAN_ENUM_2467] = {2467, 12, 20, 40},
159 	[CHAN_ENUM_2472] = {2472, 13, 20, 40},
160 	[CHAN_ENUM_2484] = {2484, 14, 20, 20},
161 
162 	[CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20},
163 	[CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20},
164 	[CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20},
165 	[CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20},
166 	[CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20},
167 	[CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20},
168 	[CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20},
169 	[CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20},
170 	[CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20},
171 	[CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20},
172 	[CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20},
173 	[CHAN_ENUM_4942] = {4942, 1, 5, 5},
174 	[CHAN_ENUM_4945] = {4945, 11, 10, 10},
175 	[CHAN_ENUM_4947] = {4947, 2, 5, 5},
176 	[CHAN_ENUM_4950] = {4950, 20, 10, 20},
177 	[CHAN_ENUM_4952] = {4952, 3, 5, 5},
178 	[CHAN_ENUM_4955] = {4955, 21, 10, 20},
179 	[CHAN_ENUM_4957] = {4957, 4, 5, 5},
180 	[CHAN_ENUM_4960] = {4960, 22, 10, 20},
181 	[CHAN_ENUM_4962] = {4962, 5, 5, 5},
182 	[CHAN_ENUM_4965] = {4965, 23, 10, 20},
183 	[CHAN_ENUM_4967] = {4967, 6, 5, 5},
184 	[CHAN_ENUM_4970] = {4970, 24, 10, 20},
185 	[CHAN_ENUM_4972] = {4972, 7, 5, 5},
186 	[CHAN_ENUM_4975] = {4975, 25, 10, 20},
187 	[CHAN_ENUM_4977] = {4977, 8, 5, 5},
188 	[CHAN_ENUM_4980] = {4980, 26, 10, 20},
189 	[CHAN_ENUM_4982] = {4982, 9, 5, 5},
190 	[CHAN_ENUM_4985] = {4985, 19, 10, 10},
191 	[CHAN_ENUM_4987] = {4987, 10, 5, 5},
192 	[CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20},
193 	[CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20},
194 	[CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20},
195 	[CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20},
196 	[CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20},
197 	[CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20},
198 	[CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20},
199 	[CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20},
200 	[CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20},
201 	[CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20},
202 	[CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20},
203 	[CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20},
204 
205 	[CHAN_ENUM_5180] = {5180, 36, 2, 160},
206 	[CHAN_ENUM_5200] = {5200, 40, 2, 160},
207 	[CHAN_ENUM_5220] = {5220, 44, 2, 160},
208 	[CHAN_ENUM_5240] = {5240, 48, 2, 160},
209 	[CHAN_ENUM_5260] = {5260, 52, 2, 160},
210 	[CHAN_ENUM_5280] = {5280, 56, 2, 160},
211 	[CHAN_ENUM_5300] = {5300, 60, 2, 160},
212 	[CHAN_ENUM_5320] = {5320, 64, 2, 160},
213 	[CHAN_ENUM_5500] = {5500, 100, 2, 160},
214 	[CHAN_ENUM_5520] = {5520, 104, 2, 160},
215 	[CHAN_ENUM_5540] = {5540, 108, 2, 160},
216 	[CHAN_ENUM_5560] = {5560, 112, 2, 160},
217 	[CHAN_ENUM_5580] = {5580, 116, 2, 160},
218 	[CHAN_ENUM_5600] = {5600, 120, 2, 160},
219 	[CHAN_ENUM_5620] = {5620, 124, 2, 160},
220 	[CHAN_ENUM_5640] = {5640, 128, 2, 160},
221 	[CHAN_ENUM_5660] = {5660, 132, 2, 160},
222 	[CHAN_ENUM_5680] = {5680, 136, 2, 160},
223 	[CHAN_ENUM_5700] = {5700, 140, 2, 160},
224 	[CHAN_ENUM_5720] = {5720, 144, 2, 160},
225 	[CHAN_ENUM_5745] = {5745, 149, 2, 160},
226 	[CHAN_ENUM_5765] = {5765, 153, 2, 160},
227 	[CHAN_ENUM_5785] = {5785, 157, 2, 160},
228 	[CHAN_ENUM_5805] = {5805, 161, 2, 160},
229 	[CHAN_ENUM_5825] = {5825, 165, 2, 160},
230 	[CHAN_ENUM_5845] = {5845, 169, 2, 160},
231 	[CHAN_ENUM_5850] = {5850, 170, 2, 160},
232 	[CHAN_ENUM_5855] = {5855, 171, 2, 160},
233 	[CHAN_ENUM_5860] = {5860, 172, 2, 160},
234 	[CHAN_ENUM_5865] = {5865, 173, 2, 160},
235 	[CHAN_ENUM_5870] = {5870, 174, 2, 160},
236 	[CHAN_ENUM_5875] = {5875, 175, 2, 160},
237 	[CHAN_ENUM_5880] = {5880, 176, 2, 160},
238 	[CHAN_ENUM_5885] = {5885, 177, 2, 160},
239 	[CHAN_ENUM_5890] = {5890, 178, 2, 160},
240 	[CHAN_ENUM_5895] = {5895, 179, 2, 160},
241 	[CHAN_ENUM_5900] = {5900, 180, 2, 160},
242 	[CHAN_ENUM_5905] = {5905, 181, 2, 160},
243 	[CHAN_ENUM_5910] = {5910, 182, 2, 160},
244 	[CHAN_ENUM_5915] = {5915, 183, 2, 160},
245 	[CHAN_ENUM_5920] = {5920, 184, 2, 160},
246 };
247 
248 static const struct chan_map channel_map_eu[NUM_CHANNELS] = {
249 	[CHAN_ENUM_2412] = {2412, 1, 20, 40},
250 	[CHAN_ENUM_2417] = {2417, 2, 20, 40},
251 	[CHAN_ENUM_2422] = {2422, 3, 20, 40},
252 	[CHAN_ENUM_2427] = {2427, 4, 20, 40},
253 	[CHAN_ENUM_2432] = {2432, 5, 20, 40},
254 	[CHAN_ENUM_2437] = {2437, 6, 20, 40},
255 	[CHAN_ENUM_2442] = {2442, 7, 20, 40},
256 	[CHAN_ENUM_2447] = {2447, 8, 20, 40},
257 	[CHAN_ENUM_2452] = {2452, 9, 20, 40},
258 	[CHAN_ENUM_2457] = {2457, 10, 20, 40},
259 	[CHAN_ENUM_2462] = {2462, 11, 20, 40},
260 	[CHAN_ENUM_2467] = {2467, 12, 20, 40},
261 	[CHAN_ENUM_2472] = {2472, 13, 20, 40},
262 	[CHAN_ENUM_2484] = {2484, 14, 20, 20},
263 
264 	[CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20},
265 	[CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20},
266 	[CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20},
267 	[CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20},
268 	[CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20},
269 	[CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20},
270 	[CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20},
271 	[CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20},
272 	[CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20},
273 	[CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20},
274 	[CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20},
275 	[CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20},
276 	[CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20},
277 	[CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20},
278 	[CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20},
279 	[CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20},
280 	[CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20},
281 	[CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20},
282 	[CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20},
283 	[CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20},
284 	[CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20},
285 	[CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20},
286 	[CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20},
287 	[CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20},
288 	[CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20},
289 	[CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20},
290 	[CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20},
291 	[CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20},
292 	[CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20},
293 	[CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20},
294 	[CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20},
295 	[CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20},
296 	[CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20},
297 	[CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20},
298 	[CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20},
299 	[CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20},
300 	[CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20},
301 	[CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20},
302 	[CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20},
303 	[CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20},
304 	[CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20},
305 	[CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20},
306 
307 	[CHAN_ENUM_5180] = {5180, 36, 2, 160},
308 	[CHAN_ENUM_5200] = {5200, 40, 2, 160},
309 	[CHAN_ENUM_5220] = {5220, 44, 2, 160},
310 	[CHAN_ENUM_5240] = {5240, 48, 2, 160},
311 	[CHAN_ENUM_5260] = {5260, 52, 2, 160},
312 	[CHAN_ENUM_5280] = {5280, 56, 2, 160},
313 	[CHAN_ENUM_5300] = {5300, 60, 2, 160},
314 	[CHAN_ENUM_5320] = {5320, 64, 2, 160},
315 	[CHAN_ENUM_5500] = {5500, 100, 2, 160},
316 	[CHAN_ENUM_5520] = {5520, 104, 2, 160},
317 	[CHAN_ENUM_5540] = {5540, 108, 2, 160},
318 	[CHAN_ENUM_5560] = {5560, 112, 2, 160},
319 	[CHAN_ENUM_5580] = {5580, 116, 2, 160},
320 	[CHAN_ENUM_5600] = {5600, 120, 2, 160},
321 	[CHAN_ENUM_5620] = {5620, 124, 2, 160},
322 	[CHAN_ENUM_5640] = {5640, 128, 2, 160},
323 	[CHAN_ENUM_5660] = {5660, 132, 2, 160},
324 	[CHAN_ENUM_5680] = {5680, 136, 2, 160},
325 	[CHAN_ENUM_5700] = {5700, 140, 2, 160},
326 	[CHAN_ENUM_5720] = {5720, 144, 2, 160},
327 	[CHAN_ENUM_5745] = {5745, 149, 2, 160},
328 	[CHAN_ENUM_5765] = {5765, 153, 2, 160},
329 	[CHAN_ENUM_5785] = {5785, 157, 2, 160},
330 	[CHAN_ENUM_5805] = {5805, 161, 2, 160},
331 	[CHAN_ENUM_5825] = {5825, 165, 2, 160},
332 	[CHAN_ENUM_5845] = {5845, 169, 2, 160},
333 	[CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160},
334 	[CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160},
335 	[CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160},
336 	[CHAN_ENUM_5865] = {5865, 173, 2, 160},
337 	[CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160},
338 	[CHAN_ENUM_5875] = {5875, 175, 2, 160},
339 	[CHAN_ENUM_5880] = {5880, 176, 2, 160},
340 	[CHAN_ENUM_5885] = {5885, 177, 2, 160},
341 	[CHAN_ENUM_5890] = {5890, 178, 2, 160},
342 	[CHAN_ENUM_5895] = {5895, 179, 2, 160},
343 	[CHAN_ENUM_5900] = {5900, 180, 2, 160},
344 	[CHAN_ENUM_5905] = {5905, 181, 2, 160},
345 	[CHAN_ENUM_5910] = {5910, 182, 2, 160},
346 	[CHAN_ENUM_5915] = {5915, 183, 2, 160},
347 	[CHAN_ENUM_5920] = {5920, 184, 2, 160},
348 };
349 
350 static const struct chan_map channel_map_jp[NUM_CHANNELS] = {
351 	[CHAN_ENUM_2412] = {2412, 1, 20, 40},
352 	[CHAN_ENUM_2417] = {2417, 2, 20, 40},
353 	[CHAN_ENUM_2422] = {2422, 3, 20, 40},
354 	[CHAN_ENUM_2427] = {2427, 4, 20, 40},
355 	[CHAN_ENUM_2432] = {2432, 5, 20, 40},
356 	[CHAN_ENUM_2437] = {2437, 6, 20, 40},
357 	[CHAN_ENUM_2442] = {2442, 7, 20, 40},
358 	[CHAN_ENUM_2447] = {2447, 8, 20, 40},
359 	[CHAN_ENUM_2452] = {2452, 9, 20, 40},
360 	[CHAN_ENUM_2457] = {2457, 10, 20, 40},
361 	[CHAN_ENUM_2462] = {2462, 11, 20, 40},
362 	[CHAN_ENUM_2467] = {2467, 12, 20, 40},
363 	[CHAN_ENUM_2472] = {2472, 13, 20, 40},
364 	[CHAN_ENUM_2484] = {2484, 14, 20, 20},
365 
366 	[CHAN_ENUM_4912] = {4912, 182, 5, 5},
367 	[CHAN_ENUM_4915] = {4915, 183, 10, 10},
368 	[CHAN_ENUM_4917] = {4917, 183, 5, 5},
369 	[CHAN_ENUM_4920] = {4920, 184, 10, 20},
370 	[CHAN_ENUM_4922] = {4922, 184, 5, 5},
371 	[CHAN_ENUM_4925] = {4925, 185, 10, 10},
372 	[CHAN_ENUM_4927] = {4927, 185, 5, 5},
373 	[CHAN_ENUM_4932] = {4932, 186, 5, 5},
374 	[CHAN_ENUM_4935] = {4935, 187, 10, 10},
375 	[CHAN_ENUM_4937] = {4937, 187, 5, 5},
376 	[CHAN_ENUM_4940] = {4940, 188, 10, 20},
377 	[CHAN_ENUM_4942] = {4942, 188, 5, 5},
378 	[CHAN_ENUM_4945] = {4945, 189, 10, 10},
379 	[CHAN_ENUM_4947] = {4947, 189, 5, 5},
380 	[CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20},
381 	[CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20},
382 	[CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20},
383 	[CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20},
384 	[CHAN_ENUM_4960] = {4960, 192, 20, 20},
385 	[CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20},
386 	[CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20},
387 	[CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20},
388 	[CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20},
389 	[CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20},
390 	[CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20},
391 	[CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20},
392 	[CHAN_ENUM_4980] = {4980, 196, 20, 20},
393 	[CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20},
394 	[CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20},
395 	[CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20},
396 	[CHAN_ENUM_5032] = {5032, 6, 5, 5},
397 	[CHAN_ENUM_5035] = {5035, 7, 10, 10},
398 	[CHAN_ENUM_5037] = {5037, 7, 5, 5},
399 	[CHAN_ENUM_5040] = {5040, 8, 10, 20},
400 	[CHAN_ENUM_5042] = {5042, 8, 5, 5},
401 	[CHAN_ENUM_5045] = {5045, 9, 10, 10},
402 	[CHAN_ENUM_5047] = {5047, 9, 5, 5},
403 	[CHAN_ENUM_5052] = {5052, 10, 5, 5},
404 	[CHAN_ENUM_5055] = {5055, 11, 10, 10},
405 	[CHAN_ENUM_5057] = {5057, 11, 5, 5},
406 	[CHAN_ENUM_5060] = {5060, 12, 20, 20},
407 	[CHAN_ENUM_5080] = {5080, 16, 20, 20},
408 
409 	[CHAN_ENUM_5180] = {5180, 36, 2, 160},
410 	[CHAN_ENUM_5200] = {5200, 40, 2, 160},
411 	[CHAN_ENUM_5220] = {5220, 44, 2, 160},
412 	[CHAN_ENUM_5240] = {5240, 48, 2, 160},
413 	[CHAN_ENUM_5260] = {5260, 52, 2, 160},
414 	[CHAN_ENUM_5280] = {5280, 56, 2, 160},
415 	[CHAN_ENUM_5300] = {5300, 60, 2, 160},
416 	[CHAN_ENUM_5320] = {5320, 64, 2, 160},
417 	[CHAN_ENUM_5500] = {5500, 100, 2, 160},
418 	[CHAN_ENUM_5520] = {5520, 104, 2, 160},
419 	[CHAN_ENUM_5540] = {5540, 108, 2, 160},
420 	[CHAN_ENUM_5560] = {5560, 112, 2, 160},
421 	[CHAN_ENUM_5580] = {5580, 116, 2, 160},
422 	[CHAN_ENUM_5600] = {5600, 120, 2, 160},
423 	[CHAN_ENUM_5620] = {5620, 124, 2, 160},
424 	[CHAN_ENUM_5640] = {5640, 128, 2, 160},
425 	[CHAN_ENUM_5660] = {5660, 132, 2, 160},
426 	[CHAN_ENUM_5680] = {5680, 136, 2, 160},
427 	[CHAN_ENUM_5700] = {5700, 140, 2, 160},
428 	[CHAN_ENUM_5720] = {5720, 144, 2, 160},
429 	[CHAN_ENUM_5745] = {5745, 149, 2, 160},
430 	[CHAN_ENUM_5765] = {5765, 153, 2, 160},
431 	[CHAN_ENUM_5785] = {5785, 157, 2, 160},
432 	[CHAN_ENUM_5805] = {5805, 161, 2, 160},
433 	[CHAN_ENUM_5825] = {5825, 165, 2, 160},
434 	[CHAN_ENUM_5845] = {5845, 169, 2, 160},
435 	[CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160},
436 	[CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160},
437 	[CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160},
438 	[CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160},
439 	[CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160},
440 	[CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160},
441 	[CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160},
442 	[CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160},
443 	[CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160},
444 	[CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160},
445 	[CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160},
446 	[CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160},
447 	[CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160},
448 	[CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160},
449 	[CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160},
450 };
451 
452 static const struct chan_map channel_map_global[NUM_CHANNELS] = {
453 	[CHAN_ENUM_2412] = {2412, 1, 20, 40},
454 	[CHAN_ENUM_2417] = {2417, 2, 20, 40},
455 	[CHAN_ENUM_2422] = {2422, 3, 20, 40},
456 	[CHAN_ENUM_2427] = {2427, 4, 20, 40},
457 	[CHAN_ENUM_2432] = {2432, 5, 20, 40},
458 	[CHAN_ENUM_2437] = {2437, 6, 20, 40},
459 	[CHAN_ENUM_2442] = {2442, 7, 20, 40},
460 	[CHAN_ENUM_2447] = {2447, 8, 20, 40},
461 	[CHAN_ENUM_2452] = {2452, 9, 20, 40},
462 	[CHAN_ENUM_2457] = {2457, 10, 20, 40},
463 	[CHAN_ENUM_2462] = {2462, 11, 20, 40},
464 	[CHAN_ENUM_2467] = {2467, 12, 20, 40},
465 	[CHAN_ENUM_2472] = {2472, 13, 20, 40},
466 	[CHAN_ENUM_2484] = {2484, 14, 20, 20},
467 
468 	[CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20},
469 	[CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20},
470 	[CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20},
471 	[CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20},
472 	[CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20},
473 	[CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20},
474 	[CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20},
475 	[CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20},
476 	[CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20},
477 	[CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20},
478 	[CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20},
479 	[CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20},
480 	[CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20},
481 	[CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20},
482 	[CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20},
483 	[CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20},
484 	[CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20},
485 	[CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20},
486 	[CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20},
487 	[CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20},
488 	[CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20},
489 	[CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20},
490 	[CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20},
491 	[CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20},
492 	[CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20},
493 	[CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20},
494 	[CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20},
495 	[CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20},
496 	[CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20},
497 	[CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20},
498 	[CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20},
499 	[CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20},
500 	[CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20},
501 	[CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20},
502 	[CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20},
503 	[CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20},
504 	[CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20},
505 	[CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20},
506 	[CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20},
507 	[CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20},
508 	[CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20},
509 	[CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20},
510 
511 	[CHAN_ENUM_5180] = {5180, 36, 2, 160},
512 	[CHAN_ENUM_5200] = {5200, 40, 2, 160},
513 	[CHAN_ENUM_5220] = {5220, 44, 2, 160},
514 	[CHAN_ENUM_5240] = {5240, 48, 2, 160},
515 	[CHAN_ENUM_5260] = {5260, 52, 2, 160},
516 	[CHAN_ENUM_5280] = {5280, 56, 2, 160},
517 	[CHAN_ENUM_5300] = {5300, 60, 2, 160},
518 	[CHAN_ENUM_5320] = {5320, 64, 2, 160},
519 	[CHAN_ENUM_5500] = {5500, 100, 2, 160},
520 	[CHAN_ENUM_5520] = {5520, 104, 2, 160},
521 	[CHAN_ENUM_5540] = {5540, 108, 2, 160},
522 	[CHAN_ENUM_5560] = {5560, 112, 2, 160},
523 	[CHAN_ENUM_5580] = {5580, 116, 2, 160},
524 	[CHAN_ENUM_5600] = {5600, 120, 2, 160},
525 	[CHAN_ENUM_5620] = {5620, 124, 2, 160},
526 	[CHAN_ENUM_5640] = {5640, 128, 2, 160},
527 	[CHAN_ENUM_5660] = {5660, 132, 2, 160},
528 	[CHAN_ENUM_5680] = {5680, 136, 2, 160},
529 	[CHAN_ENUM_5700] = {5700, 140, 2, 160},
530 	[CHAN_ENUM_5720] = {5720, 144, 2, 160},
531 	[CHAN_ENUM_5745] = {5745, 149, 2, 160},
532 	[CHAN_ENUM_5765] = {5765, 153, 2, 160},
533 	[CHAN_ENUM_5785] = {5785, 157, 2, 160},
534 	[CHAN_ENUM_5805] = {5805, 161, 2, 160},
535 	[CHAN_ENUM_5825] = {5825, 165, 2, 160},
536 	[CHAN_ENUM_5845] = {5845, 169, 2, 160},
537 	[CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160},
538 	[CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160},
539 	[CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160},
540 	[CHAN_ENUM_5865] = {5865, 173, 2, 160},
541 	[CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160},
542 	[CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160},
543 	[CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160},
544 	[CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160},
545 	[CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160},
546 	[CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160},
547 	[CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160},
548 	[CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160},
549 	[CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160},
550 	[CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160},
551 	[CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160},
552 };
553 
554 static const struct chan_map channel_map_china[NUM_CHANNELS] = {
555 	[CHAN_ENUM_2412] = {2412, 1, 20, 40},
556 	[CHAN_ENUM_2417] = {2417, 2, 20, 40},
557 	[CHAN_ENUM_2422] = {2422, 3, 20, 40},
558 	[CHAN_ENUM_2427] = {2427, 4, 20, 40},
559 	[CHAN_ENUM_2432] = {2432, 5, 20, 40},
560 	[CHAN_ENUM_2437] = {2437, 6, 20, 40},
561 	[CHAN_ENUM_2442] = {2442, 7, 20, 40},
562 	[CHAN_ENUM_2447] = {2447, 8, 20, 40},
563 	[CHAN_ENUM_2452] = {2452, 9, 20, 40},
564 	[CHAN_ENUM_2457] = {2457, 10, 20, 40},
565 	[CHAN_ENUM_2462] = {2462, 11, 20, 40},
566 	[CHAN_ENUM_2467] = {2467, 12, 20, 40},
567 	[CHAN_ENUM_2472] = {2472, 13, 20, 40},
568 	[CHAN_ENUM_2484] = {2484, 14, 20, 20},
569 
570 	[CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20},
571 	[CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20},
572 	[CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20},
573 	[CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20},
574 	[CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20},
575 	[CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20},
576 	[CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20},
577 	[CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20},
578 	[CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20},
579 	[CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20},
580 	[CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20},
581 	[CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20},
582 	[CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20},
583 	[CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20},
584 	[CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20},
585 	[CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20},
586 	[CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20},
587 	[CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20},
588 	[CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20},
589 	[CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20},
590 	[CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20},
591 	[CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20},
592 	[CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20},
593 	[CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20},
594 	[CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20},
595 	[CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20},
596 	[CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20},
597 	[CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20},
598 	[CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20},
599 	[CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20},
600 	[CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20},
601 	[CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20},
602 	[CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20},
603 	[CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20},
604 	[CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20},
605 	[CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20},
606 	[CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20},
607 	[CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20},
608 	[CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20},
609 	[CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20},
610 	[CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20},
611 	[CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20},
612 
613 	[CHAN_ENUM_5180] = {5180, 36, 2, 160},
614 	[CHAN_ENUM_5200] = {5200, 40, 2, 160},
615 	[CHAN_ENUM_5220] = {5220, 44, 2, 160},
616 	[CHAN_ENUM_5240] = {5240, 48, 2, 160},
617 	[CHAN_ENUM_5260] = {5260, 52, 2, 160},
618 	[CHAN_ENUM_5280] = {5280, 56, 2, 160},
619 	[CHAN_ENUM_5300] = {5300, 60, 2, 160},
620 	[CHAN_ENUM_5320] = {5320, 64, 2, 160},
621 	[CHAN_ENUM_5500] = {5500, 100, 2, 160},
622 	[CHAN_ENUM_5520] = {5520, 104, 2, 160},
623 	[CHAN_ENUM_5540] = {5540, 108, 2, 160},
624 	[CHAN_ENUM_5560] = {5560, 112, 2, 160},
625 	[CHAN_ENUM_5580] = {5580, 116, 2, 160},
626 	[CHAN_ENUM_5600] = {5600, 120, 2, 160},
627 	[CHAN_ENUM_5620] = {5620, 124, 2, 160},
628 	[CHAN_ENUM_5640] = {5640, 128, 2, 160},
629 	[CHAN_ENUM_5660] = {5660, 132, 2, 160},
630 	[CHAN_ENUM_5680] = {5680, 136, 2, 160},
631 	[CHAN_ENUM_5700] = {5700, 140, 2, 160},
632 	[CHAN_ENUM_5720] = {5720, 144, 2, 160},
633 	[CHAN_ENUM_5745] = {5745, 149, 2, 160},
634 	[CHAN_ENUM_5765] = {5765, 153, 2, 160},
635 	[CHAN_ENUM_5785] = {5785, 157, 2, 160},
636 	[CHAN_ENUM_5805] = {5805, 161, 2, 160},
637 	[CHAN_ENUM_5825] = {5825, 165, 2, 160},
638 	[CHAN_ENUM_5845] = {5845, 169, 2, 160},
639 	[CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160},
640 	[CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160},
641 	[CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160},
642 	[CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160},
643 	[CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160},
644 	[CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160},
645 	[CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160},
646 	[CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160},
647 	[CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160},
648 	[CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160},
649 	[CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160},
650 	[CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160},
651 	[CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160},
652 	[CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160},
653 	[CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160},
654 };
655 #endif
656 
657 #ifdef CONFIG_LEGACY_CHAN_ENUM
658 void reg_init_channel_map(enum dfs_reg dfs_region)
659 {
660 	channel_map = channel_map_old;
661 }
662 #else
663 void reg_init_channel_map(enum dfs_reg dfs_region)
664 {
665 	switch (dfs_region) {
666 	case DFS_UNINIT_REGION:
667 	case DFS_UNDEF_REGION:
668 		channel_map = channel_map_global;
669 		break;
670 	case DFS_FCC_REGION:
671 		channel_map = channel_map_us;
672 		break;
673 	case DFS_ETSI_REGION:
674 		channel_map = channel_map_eu;
675 		break;
676 	case DFS_MKK_REGION:
677 		channel_map = channel_map_jp;
678 		break;
679 	case DFS_CN_REGION:
680 		channel_map = channel_map_china;
681 		break;
682 	case DFS_KR_REGION:
683 		channel_map = channel_map_eu;
684 		break;
685 	}
686 }
687 #endif
688 
689 uint16_t reg_get_bw_value(enum phy_ch_width bw)
690 {
691 	switch (bw) {
692 	case CH_WIDTH_20MHZ:
693 		return 20;
694 	case CH_WIDTH_40MHZ:
695 		return 40;
696 	case CH_WIDTH_80MHZ:
697 		return 80;
698 	case CH_WIDTH_160MHZ:
699 		return 160;
700 	case CH_WIDTH_80P80MHZ:
701 		return 160;
702 	case CH_WIDTH_INVALID:
703 		return 0;
704 	case CH_WIDTH_5MHZ:
705 		return 5;
706 	case CH_WIDTH_10MHZ:
707 		return 10;
708 	case CH_WIDTH_MAX:
709 		return 160;
710 	default:
711 		return 0;
712 	}
713 }
714 
715 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops(
716 		struct wlan_objmgr_psoc *psoc)
717 {
718 	return &((psoc->soc_cb.tx_ops.reg_ops));
719 }
720 
721 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev,
722 					   struct channel_power *ch_list,
723 					   uint8_t *num_chan)
724 {
725 	int i, count;
726 	struct regulatory_channel *reg_channels;
727 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
728 
729 	if (!num_chan || !ch_list) {
730 		reg_err("chan_list or num_ch is NULL");
731 		return QDF_STATUS_E_FAILURE;
732 	}
733 
734 	pdev_priv_obj = reg_get_pdev_obj(pdev);
735 
736 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
737 		reg_err("reg pdev priv obj is NULL");
738 		return QDF_STATUS_E_FAILURE;
739 	}
740 
741 	/* set the current channel list */
742 	reg_channels = pdev_priv_obj->cur_chan_list;
743 
744 	for (i = 0, count = 0; i < NUM_CHANNELS; i++) {
745 		if (reg_channels[i].state &&
746 		    reg_channels[i].state != REGULATORY_CHAN_DISABLED) {
747 			ch_list[count].chan_num =
748 				reg_channels[i].chan_num;
749 			ch_list[count++].tx_power =
750 				reg_channels[i].tx_power;
751 		}
752 	}
753 
754 	*num_chan = count;
755 
756 	return QDF_STATUS_SUCCESS;
757 }
758 
759 enum channel_enum reg_get_chan_enum(uint32_t chan_num)
760 {
761 	uint32_t count;
762 
763 	for (count = 0; count < NUM_CHANNELS; count++)
764 		if (channel_map[count].chan_num == chan_num)
765 			return count;
766 
767 	reg_err("invalid channel number %d", chan_num);
768 
769 	return INVALID_CHANNEL;
770 }
771 
772 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev,
773 					 uint32_t ch)
774 {
775 	enum channel_enum ch_idx;
776 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
777 
778 	ch_idx = reg_get_chan_enum(ch);
779 
780 	if (ch_idx == INVALID_CHANNEL)
781 		return CHANNEL_STATE_INVALID;
782 
783 	pdev_priv_obj = reg_get_pdev_obj(pdev);
784 
785 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
786 		reg_err("pdev reg obj is NULL");
787 		return CHANNEL_STATE_INVALID;
788 	}
789 
790 	return pdev_priv_obj->cur_chan_list[ch_idx].state;
791 }
792 
793 /**
794  * reg_get_5g_bonded_chan_array() - get ptr to bonded channel
795  * @pdev: Pointer to pdev structure
796  * @oper_ch: operating channel number
797  * @bonded_chan_ar: bonded channel array
798  * @array_size; Array size
799  * @bonded_chan_ptr_ptr: bonded channel ptr ptr
800  *
801  * Return: bonded channel state
802  */
803 static enum channel_state reg_get_5g_bonded_chan_array(
804 		struct wlan_objmgr_pdev *pdev,
805 		uint32_t oper_chan,
806 		const struct bonded_channel bonded_chan_ar[],
807 		uint16_t array_size,
808 		const struct bonded_channel **bonded_chan_ptr_ptr)
809 {
810 	int i;
811 	uint8_t chan_num;
812 	const struct bonded_channel *bonded_chan_ptr = NULL;
813 	enum channel_state chan_state = CHANNEL_STATE_INVALID;
814 	enum channel_state temp_chan_state;
815 
816 	for (i = 0; i < array_size; i++) {
817 		if ((oper_chan >= bonded_chan_ar[i].start_ch) &&
818 		    (oper_chan <= bonded_chan_ar[i].end_ch)) {
819 			bonded_chan_ptr = &bonded_chan_ar[i];
820 			break;
821 		}
822 	}
823 
824 	if (!bonded_chan_ptr)
825 		return chan_state;
826 
827 	*bonded_chan_ptr_ptr = bonded_chan_ptr;
828 	chan_num =  bonded_chan_ptr->start_ch;
829 	while (chan_num <= bonded_chan_ptr->end_ch) {
830 		temp_chan_state = reg_get_channel_state(pdev, chan_num);
831 		if (temp_chan_state < chan_state)
832 			chan_state = temp_chan_state;
833 		chan_num = chan_num + 4;
834 	}
835 
836 	return chan_state;
837 }
838 
839 /**
840  * reg_get_5g_bonded_channel() - get the 5G bonded channel state
841  * @pdev: Pointer to pdev structure
842  * @chan_num: channel number
843  * @ch_width: channel width
844  * @bonded_chan_ptr_ptr: bonded channel ptr ptr
845  *
846  * Return: channel state
847  */
848 static enum channel_state reg_get_5g_bonded_channel(
849 		struct wlan_objmgr_pdev *pdev, uint32_t chan_num,
850 		enum phy_ch_width ch_width,
851 		const struct bonded_channel **bonded_chan_ptr_ptr)
852 {
853 	if (ch_width == CH_WIDTH_80P80MHZ)
854 		return reg_get_5g_bonded_chan_array(pdev, chan_num,
855 				bonded_chan_80mhz_list,
856 				QDF_ARRAY_SIZE(bonded_chan_80mhz_list),
857 				bonded_chan_ptr_ptr);
858 	else if (ch_width == CH_WIDTH_160MHZ)
859 		return reg_get_5g_bonded_chan_array(pdev, chan_num,
860 				bonded_chan_160mhz_list,
861 				QDF_ARRAY_SIZE(bonded_chan_160mhz_list),
862 				bonded_chan_ptr_ptr);
863 	else if (ch_width == CH_WIDTH_80MHZ)
864 		return reg_get_5g_bonded_chan_array(pdev, chan_num,
865 				bonded_chan_80mhz_list,
866 				QDF_ARRAY_SIZE(bonded_chan_80mhz_list),
867 				bonded_chan_ptr_ptr);
868 	else if (ch_width == CH_WIDTH_40MHZ)
869 		return reg_get_5g_bonded_chan_array(pdev, chan_num,
870 				bonded_chan_40mhz_list,
871 				QDF_ARRAY_SIZE(bonded_chan_40mhz_list),
872 				bonded_chan_ptr_ptr);
873 	else
874 		return reg_get_channel_state(pdev, chan_num);
875 }
876 
877 enum channel_state reg_get_5g_bonded_channel_state(
878 		struct wlan_objmgr_pdev *pdev,
879 		uint8_t ch, enum phy_ch_width bw)
880 {
881 	enum channel_enum ch_indx;
882 	enum channel_state chan_state;
883 	struct regulatory_channel *reg_channels;
884 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
885 	bool bw_enabled = false;
886 	const struct bonded_channel *bonded_chan_ptr = NULL;
887 
888 	if (bw > CH_WIDTH_80P80MHZ) {
889 		reg_err("bw passed is not good");
890 		return CHANNEL_STATE_INVALID;
891 	}
892 
893 	chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr);
894 
895 	if ((chan_state == CHANNEL_STATE_INVALID) ||
896 	    (chan_state == CHANNEL_STATE_DISABLE))
897 		return chan_state;
898 
899 	pdev_priv_obj = reg_get_pdev_obj(pdev);
900 
901 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
902 		reg_err("pdev reg obj is NULL");
903 		return CHANNEL_STATE_INVALID;
904 	}
905 	reg_channels = pdev_priv_obj->cur_chan_list;
906 
907 	ch_indx = reg_get_chan_enum(ch);
908 	if (ch_indx == INVALID_CHANNEL)
909 		return CHANNEL_STATE_INVALID;
910 	if (bw == CH_WIDTH_5MHZ)
911 		bw_enabled = true;
912 	else if (bw == CH_WIDTH_10MHZ)
913 		bw_enabled = (reg_channels[ch_indx].min_bw <= 10) &&
914 			(reg_channels[ch_indx].max_bw >= 10);
915 	else if (bw == CH_WIDTH_20MHZ)
916 		bw_enabled = (reg_channels[ch_indx].min_bw <= 20) &&
917 			(reg_channels[ch_indx].max_bw >= 20);
918 	else if (bw == CH_WIDTH_40MHZ)
919 		bw_enabled = (reg_channels[ch_indx].min_bw <= 40) &&
920 			(reg_channels[ch_indx].max_bw >= 40);
921 	else if (bw == CH_WIDTH_80MHZ)
922 		bw_enabled = (reg_channels[ch_indx].min_bw <= 80) &&
923 			(reg_channels[ch_indx].max_bw >= 80);
924 	else if (bw == CH_WIDTH_160MHZ)
925 		bw_enabled = (reg_channels[ch_indx].min_bw <= 160) &&
926 			(reg_channels[ch_indx].max_bw >= 160);
927 	else if (bw == CH_WIDTH_80P80MHZ)
928 		bw_enabled = (reg_channels[ch_indx].min_bw <= 80) &&
929 			(reg_channels[ch_indx].max_bw >= 80);
930 
931 	if (bw_enabled)
932 		return chan_state;
933 	else
934 		return CHANNEL_STATE_DISABLE;
935 }
936 
937 enum channel_state reg_get_2g_bonded_channel_state(
938 		struct wlan_objmgr_pdev *pdev,
939 		uint8_t oper_ch, uint8_t sec_ch,
940 		enum phy_ch_width bw)
941 {
942 	enum channel_enum chan_idx;
943 	enum channel_state chan_state;
944 	struct regulatory_channel *reg_channels;
945 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
946 	bool bw_enabled = false;
947 	enum channel_state chan_state2 = CHANNEL_STATE_INVALID;
948 
949 	if (bw > CH_WIDTH_40MHZ)
950 		return CHANNEL_STATE_INVALID;
951 
952 	if (bw == CH_WIDTH_40MHZ) {
953 		if ((sec_ch + 4 != oper_ch) &&
954 		    (oper_ch + 4 != sec_ch))
955 			return CHANNEL_STATE_INVALID;
956 		chan_state2 = reg_get_channel_state(pdev, sec_ch);
957 		if (chan_state2 == CHANNEL_STATE_INVALID)
958 			return chan_state2;
959 	}
960 
961 	pdev_priv_obj = reg_get_pdev_obj(pdev);
962 
963 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
964 		reg_err("reg pdev priv obj is NULL");
965 		return CHANNEL_STATE_INVALID;
966 	}
967 
968 	reg_channels = pdev_priv_obj->cur_chan_list;
969 
970 	chan_state = reg_get_channel_state(pdev, oper_ch);
971 	if (chan_state2 < chan_state)
972 		chan_state = chan_state2;
973 
974 	if ((chan_state == CHANNEL_STATE_INVALID) ||
975 	    (chan_state == CHANNEL_STATE_DISABLE))
976 		return chan_state;
977 
978 	chan_idx = reg_get_chan_enum(oper_ch);
979 	if (chan_idx == INVALID_CHANNEL)
980 		return CHANNEL_STATE_INVALID;
981 	if (bw == CH_WIDTH_5MHZ)
982 		bw_enabled = true;
983 	else if (bw == CH_WIDTH_10MHZ)
984 		bw_enabled = (reg_channels[chan_idx].min_bw <= 10) &&
985 			(reg_channels[chan_idx].max_bw >= 10);
986 	else if (bw == CH_WIDTH_20MHZ)
987 		bw_enabled = (reg_channels[chan_idx].min_bw <= 20) &&
988 			(reg_channels[chan_idx].max_bw >= 20);
989 	else if (bw == CH_WIDTH_40MHZ)
990 		bw_enabled = (reg_channels[chan_idx].min_bw <= 40) &&
991 			(reg_channels[chan_idx].max_bw >= 40);
992 
993 	if (bw_enabled)
994 		return chan_state;
995 	else
996 		return CHANNEL_STATE_DISABLE;
997 
998 	return CHANNEL_STATE_ENABLE;
999 }
1000 
1001 /**
1002  * reg_combine_channel_states() - Get minimum of channel state1 and state2
1003  * @chan_state1: Channel state1
1004  * @chan_state2: Channel state2
1005  *
1006  * Return: Channel state
1007  */
1008 static enum channel_state reg_combine_channel_states(
1009 	enum channel_state chan_state1,
1010 	enum channel_state chan_state2)
1011 {
1012 	if ((chan_state1 == CHANNEL_STATE_INVALID) ||
1013 	    (chan_state2 == CHANNEL_STATE_INVALID))
1014 		return CHANNEL_STATE_INVALID;
1015 	else
1016 		return min(chan_state1, chan_state2);
1017 }
1018 
1019 /**
1020  * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth
1021  * @ch: channel number.
1022  * @ch_params: pointer to the channel parameters.
1023  *
1024  * Return: None
1025  */
1026 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev,
1027 				      uint8_t ch,
1028 				      struct ch_params *ch_params)
1029 {
1030 	/*
1031 	 * Set channel parameters like center frequency for a bonded channel
1032 	 * state. Also return the maximum bandwidth supported by the channel.
1033 	 */
1034 
1035 	enum phy_ch_width next_lower_bw;
1036 	enum channel_state chan_state = CHANNEL_STATE_ENABLE;
1037 	enum channel_state chan_state2 = CHANNEL_STATE_ENABLE;
1038 	const struct bonded_channel *bonded_chan_ptr = NULL;
1039 	const struct bonded_channel *bonded_chan_ptr2 = NULL;
1040 
1041 	if (!ch_params) {
1042 		reg_err("ch_params is NULL");
1043 		return;
1044 	}
1045 
1046 	if (ch_params->ch_width >= CH_WIDTH_MAX) {
1047 		if (ch_params->center_freq_seg1 != 0)
1048 			ch_params->ch_width = CH_WIDTH_80P80MHZ;
1049 		else
1050 			ch_params->ch_width = CH_WIDTH_160MHZ;
1051 	}
1052 	next_lower_bw = ch_params->ch_width;
1053 
1054 	while (ch_params->ch_width != CH_WIDTH_INVALID) {
1055 		ch_params->ch_width = next_lower_bw;
1056 		next_lower_bw = get_next_lower_bw[ch_params->ch_width];
1057 		bonded_chan_ptr = NULL;
1058 		bonded_chan_ptr2 = NULL;
1059 		chan_state = reg_get_5g_bonded_channel(
1060 				pdev, ch, ch_params->ch_width,
1061 				&bonded_chan_ptr);
1062 
1063 		chan_state = reg_get_5g_bonded_channel_state(
1064 				pdev, ch, ch_params->ch_width);
1065 
1066 		if (ch_params->ch_width == CH_WIDTH_80P80MHZ) {
1067 			chan_state2 = reg_get_5g_bonded_channel_state(
1068 					pdev, ch_params->center_freq_seg1 - 2,
1069 					CH_WIDTH_80MHZ);
1070 
1071 			chan_state = reg_combine_channel_states(
1072 					chan_state, chan_state2);
1073 		}
1074 
1075 		if ((chan_state != CHANNEL_STATE_ENABLE) &&
1076 		    (chan_state != CHANNEL_STATE_DFS))
1077 			continue;
1078 		if (ch_params->ch_width <= CH_WIDTH_20MHZ) {
1079 			ch_params->sec_ch_offset = NO_SEC_CH;
1080 			ch_params->center_freq_seg0 = ch;
1081 			break;
1082 		} else if (ch_params->ch_width >= CH_WIDTH_40MHZ) {
1083 			reg_get_5g_bonded_chan_array(
1084 					pdev, ch, bonded_chan_40mhz_list,
1085 					QDF_ARRAY_SIZE(bonded_chan_40mhz_list),
1086 					&bonded_chan_ptr2);
1087 			if (!bonded_chan_ptr || !bonded_chan_ptr2)
1088 				continue;
1089 			if (ch == bonded_chan_ptr2->start_ch)
1090 				ch_params->sec_ch_offset = LOW_PRIMARY_CH;
1091 			else
1092 				ch_params->sec_ch_offset = HIGH_PRIMARY_CH;
1093 
1094 			ch_params->center_freq_seg0 =
1095 				(bonded_chan_ptr->start_ch +
1096 				 bonded_chan_ptr->end_ch) / 2;
1097 			break;
1098 		}
1099 	}
1100 
1101 	if (ch_params->ch_width == CH_WIDTH_160MHZ) {
1102 		ch_params->center_freq_seg1 = ch_params->center_freq_seg0;
1103 		chan_state = reg_get_5g_bonded_channel(
1104 				pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr);
1105 		if (bonded_chan_ptr)
1106 			ch_params->center_freq_seg0 =
1107 				(bonded_chan_ptr->start_ch +
1108 				 bonded_chan_ptr->end_ch) / 2;
1109 	}
1110 
1111 	/* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */
1112 	if (!(ch_params->ch_width == CH_WIDTH_160MHZ ||
1113 	      ch_params->ch_width == CH_WIDTH_80P80MHZ))
1114 		ch_params->center_freq_seg1 = 0;
1115 
1116 	reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch,
1117 		  ch_params->ch_width, ch_params->center_freq_seg0,
1118 		  ch_params->center_freq_seg1);
1119 }
1120 
1121 /**
1122  * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters
1123  * @oper_ch: operating channel
1124  * @ch_params: channel parameters
1125  * @sec_ch_2g: 2.4G secondary channel
1126  *
1127  * Return: void
1128  */
1129 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev,
1130 				      uint16_t oper_ch,
1131 				      struct ch_params *ch_params,
1132 				      uint16_t sec_ch_2g)
1133 {
1134 	enum channel_state chan_state = CHANNEL_STATE_ENABLE;
1135 
1136 	if (ch_params->ch_width >= CH_WIDTH_MAX)
1137 		ch_params->ch_width = CH_WIDTH_40MHZ;
1138 	if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) {
1139 		if (oper_ch >= 1 && oper_ch <= 5)
1140 			sec_ch_2g = oper_ch + 4;
1141 		else if (oper_ch >= 6 && oper_ch <= 13)
1142 			sec_ch_2g = oper_ch - 4;
1143 	}
1144 
1145 	while (ch_params->ch_width != CH_WIDTH_INVALID) {
1146 		chan_state = reg_get_2g_bonded_channel_state(
1147 				pdev, oper_ch, sec_ch_2g, ch_params->ch_width);
1148 		if (chan_state == CHANNEL_STATE_ENABLE) {
1149 			if (ch_params->ch_width == CH_WIDTH_40MHZ) {
1150 				if (oper_ch < sec_ch_2g)
1151 					ch_params->sec_ch_offset =
1152 						LOW_PRIMARY_CH;
1153 				else
1154 					ch_params->sec_ch_offset =
1155 						HIGH_PRIMARY_CH;
1156 				ch_params->center_freq_seg0 =
1157 					(oper_ch + sec_ch_2g) / 2;
1158 			} else {
1159 				ch_params->sec_ch_offset = NO_SEC_CH;
1160 				ch_params->center_freq_seg0 = oper_ch;
1161 			}
1162 			break;
1163 		}
1164 
1165 		ch_params->ch_width = get_next_lower_bw[ch_params->ch_width];
1166 	}
1167 	/* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */
1168 	ch_params->center_freq_seg1 = 0;
1169 }
1170 
1171 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev,
1172 			    uint8_t ch, uint8_t sec_ch_2g,
1173 			    struct ch_params *ch_params)
1174 {
1175 	if (REG_IS_5GHZ_CH(ch))
1176 		reg_set_5g_channel_params(pdev, ch, ch_params);
1177 	else if  (REG_IS_24GHZ_CH(ch))
1178 		reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g);
1179 }
1180 
1181 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev,
1182 			     enum band_info *band)
1183 {
1184 	struct wlan_regulatory_pdev_priv_obj *pdev_reg;
1185 
1186 	pdev_reg = reg_get_pdev_obj(pdev);
1187 	if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) {
1188 		reg_err("pdev reg component is NULL");
1189 		return QDF_STATUS_E_INVAL;
1190 	}
1191 
1192 	*band = pdev_reg->band_capability;
1193 
1194 	return QDF_STATUS_SUCCESS;
1195 }
1196 
1197 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc,
1198 				    uint8_t *country_code)
1199 {
1200 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1201 
1202 	if (!country_code) {
1203 		reg_err("country_code is NULL");
1204 		return QDF_STATUS_E_INVAL;
1205 	}
1206 
1207 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1208 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1209 		reg_err("psoc reg component is NULL");
1210 		return QDF_STATUS_E_INVAL;
1211 	}
1212 
1213 	qdf_mem_copy(country_code, psoc_priv_obj->def_country,
1214 		     REG_ALPHA2_LEN + 1);
1215 
1216 	return QDF_STATUS_SUCCESS;
1217 }
1218 
1219 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev,
1220 				enum dfs_reg *dfs_reg)
1221 {
1222 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1223 
1224 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1225 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1226 		reg_err("reg component pdev priv is NULL");
1227 		return;
1228 	}
1229 
1230 	*dfs_reg = pdev_priv_obj->dfs_region;
1231 }
1232 
1233 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev,
1234 			enum dfs_reg dfs_reg)
1235 {
1236 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1237 
1238 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1239 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1240 		reg_err("psoc reg component is NULL");
1241 		return;
1242 	}
1243 
1244 	pdev_priv_obj->dfs_region = dfs_reg;
1245 
1246 	reg_init_channel_map(dfs_reg);
1247 }
1248 
1249 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev,
1250 				   uint32_t chan_num)
1251 {
1252 	enum channel_enum chan_enum;
1253 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1254 	struct regulatory_channel *reg_channels;
1255 
1256 	chan_enum = reg_get_chan_enum(chan_num);
1257 
1258 	if (chan_enum == INVALID_CHANNEL) {
1259 		reg_err("channel is invalid");
1260 		return QDF_STATUS_E_FAILURE;
1261 	}
1262 
1263 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1264 
1265 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1266 		reg_err("reg pdev priv obj is NULL");
1267 		return QDF_STATUS_E_FAILURE;
1268 	}
1269 
1270 	reg_channels = pdev_priv_obj->cur_chan_list;
1271 
1272 	return reg_channels[chan_enum].tx_power;
1273 }
1274 
1275 uint32_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev,
1276 			      uint32_t chan_num)
1277 {
1278 	enum channel_enum chan_enum;
1279 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1280 	struct regulatory_channel *reg_channels;
1281 
1282 	chan_enum = reg_get_chan_enum(chan_num);
1283 
1284 	if (chan_enum == INVALID_CHANNEL)
1285 		return CHANNEL_STATE_INVALID;
1286 
1287 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1288 
1289 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1290 		reg_err("reg pdev priv obj is NULL");
1291 		return QDF_STATUS_E_FAILURE;
1292 	}
1293 
1294 	reg_channels = pdev_priv_obj->cur_chan_list;
1295 
1296 	return reg_channels[chan_enum].center_freq;
1297 }
1298 
1299 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev,
1300 		   uint32_t chan)
1301 {
1302 	enum channel_state ch_state;
1303 
1304 	ch_state = reg_get_channel_state(pdev, chan);
1305 
1306 	return ch_state == CHANNEL_STATE_DFS;
1307 }
1308 
1309 uint32_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev,
1310 			  uint32_t freq)
1311 {
1312 	uint32_t count;
1313 	struct regulatory_channel *chan_list;
1314 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1315 
1316 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1317 
1318 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1319 		reg_err("reg pdev priv obj is NULL");
1320 		return QDF_STATUS_E_FAILURE;
1321 	}
1322 
1323 	chan_list = pdev_priv_obj->cur_chan_list;
1324 
1325 	for (count = 0; count < NUM_CHANNELS; count++)
1326 		if (chan_list[count].center_freq == freq)
1327 			return chan_list[count].chan_num;
1328 
1329 	reg_err("invalid frequency %d", freq);
1330 
1331 	return 0;
1332 }
1333 
1334 uint32_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev,
1335 			  uint32_t chan_num)
1336 {
1337 	uint32_t count;
1338 	struct regulatory_channel *chan_list;
1339 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1340 
1341 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1342 
1343 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1344 		reg_err("reg pdev priv obj is NULL");
1345 		return QDF_STATUS_E_FAILURE;
1346 	}
1347 
1348 	chan_list = pdev_priv_obj->cur_chan_list;
1349 
1350 	for (count = 0; count < NUM_CHANNELS; count++)
1351 		if (chan_list[count].chan_num == chan_num) {
1352 			if (reg_chan_in_range(chan_list,
1353 					      pdev_priv_obj->range_2g_low,
1354 					      pdev_priv_obj->range_2g_high,
1355 					      pdev_priv_obj->range_5g_low,
1356 					      pdev_priv_obj->range_5g_high,
1357 					      count)) {
1358 				return chan_list[count].center_freq;
1359 			}
1360 		}
1361 
1362 	reg_debug_rl("invalid channel %d", chan_num);
1363 
1364 	return 0;
1365 }
1366 
1367 #ifndef CONFIG_LEGACY_CHAN_ENUM
1368 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num)
1369 {
1370 	uint32_t freq = 0;
1371 
1372 	freq = reg_chan_to_freq(pdev, chan_num);
1373 
1374 	return REG_IS_49GHZ_FREQ(freq) ? true : false;
1375 }
1376 #else
1377 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num)
1378 {
1379 	return false;
1380 }
1381 #endif
1382 
1383 enum band_info reg_chan_to_band(uint32_t chan_num)
1384 {
1385 	if (chan_num <= 14)
1386 		return BAND_2G;
1387 
1388 	return BAND_5G;
1389 }
1390 
1391 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev,
1392 		       uint8_t *chan_list,
1393 		       uint8_t num_chan,
1394 		       bool nol_chan)
1395 {
1396 	enum channel_enum chan_enum;
1397 	struct regulatory_channel *mas_chan_list;
1398 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1399 	uint16_t i;
1400 
1401 	if (!num_chan || !chan_list) {
1402 		reg_err("chan_list or num_ch is NULL");
1403 		return;
1404 	}
1405 
1406 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1407 	if (!pdev_priv_obj) {
1408 		reg_err("reg psoc private obj is NULL");
1409 		return;
1410 	}
1411 
1412 	mas_chan_list = pdev_priv_obj->mas_chan_list;
1413 	for (i = 0; i < num_chan; i++) {
1414 		chan_enum = reg_get_chan_enum(chan_list[i]);
1415 		if (chan_enum == INVALID_CHANNEL) {
1416 			reg_err("Invalid ch in nol list, chan %d",
1417 				chan_list[i]);
1418 			continue;
1419 		}
1420 		mas_chan_list[chan_enum].nol_chan = nol_chan;
1421 	}
1422 
1423 	reg_compute_pdev_current_chan_list(pdev_priv_obj);
1424 }
1425 
1426 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev,
1427 				  uint16_t regdmn)
1428 {
1429 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1430 	struct cur_regulatory_info *reg_info;
1431 	uint16_t cc = -1;
1432 	uint16_t country_index = -1, regdmn_pair = -1;
1433 	struct wlan_objmgr_psoc *psoc;
1434 	QDF_STATUS err;
1435 
1436 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1437 	if (!pdev_priv_obj) {
1438 		reg_err("reg soc is NULL");
1439 		return QDF_STATUS_E_FAILURE;
1440 	}
1441 
1442 	reg_info = (struct cur_regulatory_info *)qdf_mem_malloc
1443 		(sizeof(struct cur_regulatory_info));
1444 	if (!reg_info) {
1445 		reg_err("reg info is NULL");
1446 		return QDF_STATUS_E_NOMEM;
1447 	}
1448 
1449 	psoc = wlan_pdev_get_psoc(pdev);
1450 	if (!psoc) {
1451 		reg_err("psoc is NULL");
1452 		return QDF_STATUS_E_INVAL;
1453 	}
1454 
1455 	reg_info->psoc = psoc;
1456 	reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev);
1457 
1458 	if (regdmn == 0) {
1459 		reg_get_default_country(&regdmn);
1460 		regdmn |= COUNTRY_ERD_FLAG;
1461 	}
1462 
1463 	if (regdmn & COUNTRY_ERD_FLAG) {
1464 		cc = regdmn & ~COUNTRY_ERD_FLAG;
1465 
1466 		reg_get_rdpair_from_country_code(cc,
1467 						 &country_index,
1468 						 &regdmn_pair);
1469 
1470 		err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair);
1471 		if (err == QDF_STATUS_E_FAILURE) {
1472 			reg_err("%s : Unable to set country code\n", __func__);
1473 			qdf_mem_free(reg_info->reg_rules_2g_ptr);
1474 			qdf_mem_free(reg_info->reg_rules_5g_ptr);
1475 			qdf_mem_free(reg_info);
1476 			return QDF_STATUS_E_FAILURE;
1477 		}
1478 
1479 		pdev_priv_obj->ctry_code = cc;
1480 
1481 	} else {
1482 		reg_get_rdpair_from_regdmn_id(regdmn, &regdmn_pair);
1483 
1484 		err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair);
1485 		if (err == QDF_STATUS_E_FAILURE) {
1486 			reg_err("%s : Unable to set country code\n", __func__);
1487 			qdf_mem_free(reg_info->reg_rules_2g_ptr);
1488 			qdf_mem_free(reg_info->reg_rules_5g_ptr);
1489 			qdf_mem_free(reg_info);
1490 			return QDF_STATUS_E_FAILURE;
1491 		}
1492 
1493 		pdev_priv_obj->reg_dmn_pair = regdmn;
1494 	}
1495 
1496 	reg_info->offload_enabled = false;
1497 	reg_process_master_chan_list(reg_info);
1498 
1499 	qdf_mem_free(reg_info->reg_rules_2g_ptr);
1500 	qdf_mem_free(reg_info->reg_rules_5g_ptr);
1501 	qdf_mem_free(reg_info);
1502 
1503 	return QDF_STATUS_SUCCESS;
1504 }
1505 
1506 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev,
1507 				 struct cc_regdmn_s *rd)
1508 {
1509 	struct cur_regulatory_info *reg_info;
1510 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1511 	uint16_t country_index = -1, regdmn_pair = -1;
1512 	struct wlan_objmgr_psoc *psoc;
1513 	struct wlan_lmac_if_reg_tx_ops *tx_ops;
1514 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1515 	uint8_t pdev_id;
1516 	QDF_STATUS err;
1517 
1518 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1519 	if (!pdev_priv_obj) {
1520 		reg_err(" pdev priv obj is NULL");
1521 		return QDF_STATUS_E_FAILURE;
1522 	}
1523 
1524 	psoc = wlan_pdev_get_psoc(pdev);
1525 	if (!psoc) {
1526 		reg_err("psoc is NULL");
1527 		return QDF_STATUS_E_INVAL;
1528 	}
1529 
1530 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1531 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1532 		reg_err("psoc reg component is NULL");
1533 		return QDF_STATUS_E_FAILURE;
1534 	}
1535 
1536 	if (psoc_priv_obj->offload_enabled) {
1537 		if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O'))
1538 			pdev_priv_obj->indoor_chan_enabled = false;
1539 		else
1540 			pdev_priv_obj->indoor_chan_enabled = true;
1541 
1542 		pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev);
1543 		tx_ops = reg_get_psoc_tx_ops(psoc);
1544 		if (tx_ops->set_user_country_code) {
1545 			psoc_priv_obj->new_init_ctry_pending[pdev_id] = true;
1546 			return tx_ops->set_user_country_code(psoc, pdev_id, rd);
1547 		}
1548 
1549 		return QDF_STATUS_E_FAILURE;
1550 	}
1551 
1552 	reg_info = (struct cur_regulatory_info *)qdf_mem_malloc
1553 		(sizeof(struct cur_regulatory_info));
1554 	if (!reg_info) {
1555 		reg_err("reg info is NULL");
1556 		return QDF_STATUS_E_NOMEM;
1557 	}
1558 
1559 	reg_info->psoc = psoc;
1560 	reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev);
1561 
1562 	if (rd->flags == CC_IS_SET) {
1563 		reg_get_rdpair_from_country_code(rd->cc.country_code,
1564 						 &country_index,
1565 						 &regdmn_pair);
1566 	} else if (rd->flags == ALPHA_IS_SET) {
1567 		reg_get_rdpair_from_country_iso(rd->cc.alpha,
1568 						&country_index,
1569 						&regdmn_pair);
1570 	} else if (rd->flags == REGDMN_IS_SET) {
1571 		reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id,
1572 					      &regdmn_pair);
1573 	}
1574 
1575 	err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair);
1576 	if (err == QDF_STATUS_E_FAILURE) {
1577 		reg_err("%s : Unable to set country code\n", __func__);
1578 		qdf_mem_free(reg_info->reg_rules_2g_ptr);
1579 		qdf_mem_free(reg_info->reg_rules_5g_ptr);
1580 		qdf_mem_free(reg_info);
1581 		return QDF_STATUS_E_FAILURE;
1582 	}
1583 
1584 	reg_info->offload_enabled = false;
1585 	reg_process_master_chan_list(reg_info);
1586 
1587 	qdf_mem_free(reg_info->reg_rules_2g_ptr);
1588 	qdf_mem_free(reg_info->reg_rules_5g_ptr);
1589 	qdf_mem_free(reg_info);
1590 
1591 	return QDF_STATUS_SUCCESS;
1592 }
1593 
1594 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev,
1595 			      struct cc_regdmn_s *rd)
1596 {
1597 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1598 
1599 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1600 	if (!pdev_priv_obj) {
1601 		reg_err("reg pdev priv is NULL");
1602 		return QDF_STATUS_E_FAILURE;
1603 	}
1604 
1605 	if (rd->flags == CC_IS_SET) {
1606 		rd->cc.country_code = pdev_priv_obj->ctry_code;
1607 	} else if (rd->flags == ALPHA_IS_SET) {
1608 		qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country,
1609 			     sizeof(rd->cc.alpha));
1610 	} else if (rd->flags == REGDMN_IS_SET) {
1611 		rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair;
1612 	}
1613 
1614 	return QDF_STATUS_SUCCESS;
1615 }
1616 
1617 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val)
1618 {
1619 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1620 
1621 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1622 
1623 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1624 		reg_err("psoc reg component is NULL");
1625 		return QDF_STATUS_E_FAILURE;
1626 	}
1627 
1628 	psoc_priv_obj->offload_enabled = val;
1629 
1630 	return QDF_STATUS_SUCCESS;
1631 }
1632 
1633 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev,
1634 				  struct cur_regdmn_info *cur_regdmn)
1635 {
1636 	struct wlan_objmgr_psoc *psoc;
1637 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1638 	uint16_t index;
1639 	int num_reg_dmn;
1640 	uint8_t phy_id;
1641 
1642 	psoc = wlan_pdev_get_psoc(pdev);
1643 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1644 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1645 		reg_err("soc reg component is NULL");
1646 		return QDF_STATUS_E_INVAL;
1647 	}
1648 
1649 	phy_id = wlan_objmgr_pdev_get_pdev_id(pdev);
1650 	cur_regdmn->regdmn_pair_id =
1651 		psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair;
1652 
1653 	reg_get_num_reg_dmn_pairs(&num_reg_dmn);
1654 	for (index = 0; index < num_reg_dmn; index++) {
1655 		if (g_reg_dmn_pairs[index].reg_dmn_pair_id ==
1656 				cur_regdmn->regdmn_pair_id)
1657 			break;
1658 	}
1659 
1660 	if (index == num_reg_dmn) {
1661 		reg_err("invalid regdomain");
1662 		return QDF_STATUS_E_FAILURE;
1663 	}
1664 
1665 	cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g;
1666 	cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g;
1667 	cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val;
1668 	cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val;
1669 	cur_regdmn->dfs_region =
1670 		regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region;
1671 
1672 	return QDF_STATUS_SUCCESS;
1673 }
1674 
1675 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev,
1676 			       bool enable_ch_144)
1677 {
1678 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1679 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1680 	struct wlan_objmgr_psoc *psoc;
1681 	struct wlan_lmac_if_reg_tx_ops *reg_tx_ops;
1682 	QDF_STATUS status;
1683 
1684 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1685 
1686 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1687 		reg_err("pdev reg component is NULL");
1688 		return QDF_STATUS_E_INVAL;
1689 	}
1690 
1691 	if (pdev_priv_obj->en_chan_144 == enable_ch_144) {
1692 		reg_info("chan 144 is already  %d", enable_ch_144);
1693 		return QDF_STATUS_SUCCESS;
1694 	}
1695 
1696 	psoc = wlan_pdev_get_psoc(pdev);
1697 	if (!psoc) {
1698 		reg_err("psoc is NULL");
1699 		return QDF_STATUS_E_INVAL;
1700 	}
1701 
1702 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1703 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1704 		reg_err("psoc reg component is NULL");
1705 		return QDF_STATUS_E_INVAL;
1706 	}
1707 
1708 	reg_debug("setting chan 144: %d", enable_ch_144);
1709 	pdev_priv_obj->en_chan_144 = enable_ch_144;
1710 
1711 	reg_compute_pdev_current_chan_list(pdev_priv_obj);
1712 
1713 	reg_tx_ops = reg_get_psoc_tx_ops(psoc);
1714 	if (reg_tx_ops->fill_umac_legacy_chanlist)
1715 		reg_tx_ops->fill_umac_legacy_chanlist(pdev,
1716 				pdev_priv_obj->cur_chan_list);
1717 
1718 	status = reg_send_scheduler_msg_sb(psoc, pdev);
1719 
1720 	return status;
1721 }
1722 
1723 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev)
1724 {
1725 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1726 
1727 	pdev_priv_obj = reg_get_pdev_obj(pdev);
1728 	if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) {
1729 		reg_err("pdev reg component is NULL");
1730 		return false;
1731 	}
1732 
1733 	return pdev_priv_obj->en_chan_144;
1734 }
1735 
1736 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap(
1737 						struct wlan_objmgr_psoc *psoc)
1738 {
1739 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1740 
1741 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1742 
1743 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1744 		reg_err("psoc reg component is NULL");
1745 		return NULL;
1746 	}
1747 
1748 	return psoc_priv_obj->reg_cap;
1749 }
1750 
1751 QDF_STATUS reg_set_hal_reg_cap(
1752 		struct wlan_objmgr_psoc *psoc,
1753 		struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap,
1754 		uint16_t phy_cnt)
1755 {
1756 	struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj;
1757 
1758 	psoc_priv_obj = reg_get_psoc_obj(psoc);
1759 
1760 	if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) {
1761 		reg_err("psoc reg component is NULL");
1762 		return QDF_STATUS_E_FAILURE;
1763 	}
1764 
1765 	if (phy_cnt > PSOC_MAX_PHY_REG_CAP) {
1766 		reg_err("phy cnt:%d is more than %d", phy_cnt,
1767 			PSOC_MAX_PHY_REG_CAP);
1768 		return QDF_STATUS_E_FAILURE;
1769 	}
1770 
1771 	qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap,
1772 		     phy_cnt *
1773 		     sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext));
1774 
1775 	return QDF_STATUS_SUCCESS;
1776 }
1777 
1778 bool reg_chan_in_range(struct regulatory_channel *chan_list,
1779 		       uint32_t low_freq_2g, uint32_t high_freq_2g,
1780 		       uint32_t low_freq_5g, uint32_t high_freq_5g,
1781 		       enum channel_enum ch_enum)
1782 {
1783 	uint32_t low_limit_2g = NUM_CHANNELS;
1784 	uint32_t high_limit_2g = NUM_CHANNELS;
1785 	uint32_t low_limit_5g = NUM_CHANNELS;
1786 	uint32_t high_limit_5g = NUM_CHANNELS;
1787 	bool chan_in_range;
1788 	enum channel_enum chan_enum;
1789 	uint16_t min_bw;
1790 	uint32_t center_freq;
1791 
1792 	for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) {
1793 		min_bw = chan_list[chan_enum].min_bw;
1794 		center_freq = chan_list[chan_enum].center_freq;
1795 
1796 		if ((center_freq - min_bw / 2) >= low_freq_2g) {
1797 			low_limit_2g = chan_enum;
1798 			break;
1799 		}
1800 	}
1801 
1802 	for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) {
1803 		min_bw = chan_list[chan_enum].min_bw;
1804 		center_freq = chan_list[chan_enum].center_freq;
1805 
1806 		if ((center_freq - min_bw / 2) >= low_freq_5g) {
1807 			low_limit_5g = chan_enum;
1808 			break;
1809 		}
1810 	}
1811 
1812 	for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) {
1813 		min_bw = chan_list[chan_enum].min_bw;
1814 		center_freq = chan_list[chan_enum].center_freq;
1815 
1816 		if (center_freq + min_bw / 2 <= high_freq_2g) {
1817 			high_limit_2g = chan_enum;
1818 			break;
1819 		}
1820 		if (chan_enum == 0)
1821 			break;
1822 	}
1823 
1824 	for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) {
1825 		min_bw = chan_list[chan_enum].min_bw;
1826 		center_freq = chan_list[chan_enum].center_freq;
1827 
1828 		if (center_freq + min_bw / 2 <= high_freq_5g) {
1829 			high_limit_5g = chan_enum;
1830 			break;
1831 		}
1832 		if (chan_enum == 0)
1833 			break;
1834 	}
1835 
1836 	chan_in_range = false;
1837 	if  ((low_limit_2g <= ch_enum) &&
1838 	     (high_limit_2g >= ch_enum) &&
1839 	     (low_limit_2g != NUM_CHANNELS) &&
1840 	     (high_limit_2g != NUM_CHANNELS))
1841 		chan_in_range = true;
1842 	if  ((low_limit_5g <= ch_enum) &&
1843 	     (high_limit_5g >= ch_enum) &&
1844 	     (low_limit_5g != NUM_CHANNELS) &&
1845 	     (high_limit_5g != NUM_CHANNELS))
1846 		chan_in_range = true;
1847 
1848 	if (chan_in_range)
1849 		return true;
1850 	else
1851 		return false;
1852 }
1853 
1854 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev,
1855 			       uint8_t *chan_list, uint8_t num_chan,
1856 			       bool nol_history_chan)
1857 {
1858 	enum channel_enum chan_enum;
1859 	struct regulatory_channel *mas_chan_list;
1860 	struct regulatory_channel *cur_chan_list;
1861 	struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj;
1862 	uint16_t i;
1863 
1864 	if (!num_chan || !chan_list) {
1865 		reg_err("chan_list or num_ch is NULL");
1866 		return;
1867 	}
1868 
1869 	pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj(
1870 			pdev, WLAN_UMAC_COMP_REGULATORY);
1871 
1872 	if (!pdev_priv_obj) {
1873 		reg_err("reg psoc private obj is NULL");
1874 		return;
1875 	}
1876 
1877 	mas_chan_list = pdev_priv_obj->mas_chan_list;
1878 	cur_chan_list = pdev_priv_obj->cur_chan_list;
1879 
1880 	for (i = 0; i < num_chan; i++) {
1881 		chan_enum = reg_get_chan_enum(chan_list[i]);
1882 		if (chan_enum == INVALID_CHANNEL) {
1883 			reg_err("Invalid ch in nol list, chan %d",
1884 				chan_list[i]);
1885 			continue;
1886 		}
1887 		mas_chan_list[chan_enum].nol_history = nol_history_chan;
1888 		cur_chan_list[chan_enum].nol_history = nol_history_chan;
1889 	}
1890 }
1891 
1892 bool reg_is_24ghz_ch(uint32_t chan)
1893 {
1894 	return REG_IS_24GHZ_CH(chan);
1895 }
1896 
1897 bool reg_is_5ghz_ch(uint32_t chan)
1898 {
1899 	return REG_IS_5GHZ_CH(chan);
1900 }
1901 
1902 bool reg_is_24ghz_ch_freq(uint32_t freq)
1903 {
1904 	return REG_IS_24GHZ_CH_FREQ(freq);
1905 }
1906 
1907 bool reg_is_5ghz_ch_freq(uint32_t freq)
1908 {
1909 	return REG_IS_5GHZ_FREQ(freq);
1910 }
1911 
1912 #ifndef CONFIG_LEGACY_CHAN_ENUM
1913 bool reg_is_49ghz_freq(uint32_t freq)
1914 {
1915 	return REG_IS_49GHZ_FREQ(freq);
1916 }
1917 #endif
1918 
1919 uint32_t reg_ch_num(uint32_t ch_enum)
1920 {
1921 	return REG_CH_NUM(ch_enum);
1922 }
1923 
1924 uint32_t reg_ch_to_freq(uint32_t ch_enum)
1925 {
1926 	return REG_CH_TO_FREQ(ch_enum);
1927 }
1928 
1929 bool reg_is_same_band_channels(uint32_t chan_num1, uint32_t chan_num2)
1930 {
1931 	return (chan_num1 && chan_num2 &&
1932 		(REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2)));
1933 }
1934 
1935 bool reg_is_channel_valid_5g_sbs(uint32_t curchan, uint32_t newchan)
1936 {
1937 	return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan);
1938 }
1939 
1940 uint32_t reg_min_24ghz_ch_num(void)
1941 {
1942 	return REG_MIN_24GHZ_CH_NUM;
1943 }
1944 
1945 uint32_t reg_max_24ghz_ch_num(void)
1946 {
1947 	return REG_MAX_24GHZ_CH_NUM;
1948 }
1949 
1950 uint32_t reg_min_5ghz_ch_num(void)
1951 {
1952 	return REG_MIN_5GHZ_CH_NUM;
1953 }
1954 
1955 uint32_t reg_max_5ghz_ch_num(void)
1956 {
1957 	return REG_MAX_5GHZ_CH_NUM;
1958 }
1959