1 /* 2 * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 #include <target_if.h> 38 39 const struct chan_map *channel_map; 40 #ifdef CONFIG_CHAN_NUM_API 41 static const struct bonded_channel bonded_chan_40mhz_list[] = { 42 {36, 40}, 43 {44, 48}, 44 {52, 56}, 45 {60, 64}, 46 {100, 104}, 47 {108, 112}, 48 {116, 120}, 49 {124, 128}, 50 {132, 136}, 51 {140, 144}, 52 {149, 153}, 53 {157, 161}, 54 {165, 169} 55 }; 56 57 static const struct bonded_channel bonded_chan_80mhz_list[] = { 58 {36, 48}, 59 {52, 64}, 60 {100, 112}, 61 {116, 128}, 62 {132, 144}, 63 {149, 161} 64 }; 65 66 static const struct bonded_channel bonded_chan_160mhz_list[] = { 67 {36, 64}, 68 {100, 128} 69 }; 70 #endif /* CONFIG_CHAN_NUM_API */ 71 72 #ifdef CONFIG_CHAN_FREQ_API 73 /* bonded_chan_40mhz_list_freq - List of 40MHz bonnded channel frequencies */ 74 static const struct bonded_channel_freq bonded_chan_40mhz_list_freq[] = { 75 {5180, 5200}, 76 {5220, 5240}, 77 {5260, 5280}, 78 {5300, 5320}, 79 {5500, 5520}, 80 {5540, 5560}, 81 {5580, 5600}, 82 {5620, 5640}, 83 {5660, 5680}, 84 {5700, 5720}, 85 {5745, 5765}, 86 {5785, 5805}, 87 {5825, 5845}, 88 #ifdef CONFIG_BAND_6GHZ 89 {5945, 5965}, 90 {5985, 6005}, 91 {6025, 6045}, 92 {6065, 6085}, 93 {6105, 6125}, 94 {6145, 6165}, 95 {6185, 6205}, 96 {6225, 6245}, 97 {6265, 6285}, 98 {6305, 6325}, 99 {6345, 6365}, 100 {6385, 6405}, 101 {6425, 6445}, 102 {6465, 6485}, 103 {6505, 6525}, 104 {6545, 6565}, 105 {6585, 6605}, 106 {6625, 6645}, 107 {6665, 6685}, 108 {6705, 6725}, 109 {6745, 6765}, 110 {6785, 6805}, 111 {6825, 6845}, 112 {6865, 6885}, 113 {6905, 6925}, 114 {6945, 6965}, 115 {6985, 7005}, 116 {7025, 7045}, 117 {7065, 7085} 118 #endif /*CONFIG_BAND_6GHZ*/ 119 }; 120 121 /* bonded_chan_80mhz_list_freq - List of 80MHz bonnded channel frequencies */ 122 static const struct bonded_channel_freq bonded_chan_80mhz_list_freq[] = { 123 {5180, 5240}, 124 {5260, 5320}, 125 {5500, 5560}, 126 {5580, 5640}, 127 {5660, 5720}, 128 {5745, 5805}, 129 #ifdef CONFIG_BAND_6GHZ 130 {5945, 6005}, 131 {6025, 6085}, 132 {6105, 6165}, 133 {6185, 6245}, 134 {6265, 6325}, 135 {6345, 6405}, 136 {6425, 6485}, 137 {6505, 6565}, 138 {6585, 6645}, 139 {6665, 6725}, 140 {6745, 6805}, 141 {6825, 6885}, 142 {6905, 6965}, 143 {6985, 7045} 144 #endif /*CONFIG_BAND_6GHZ*/ 145 }; 146 147 /* bonded_chan_160mhz_list_freq - List of 160MHz bonnded channel frequencies */ 148 static const struct bonded_channel_freq bonded_chan_160mhz_list_freq[] = { 149 {5180, 5320}, 150 {5500, 5640}, 151 #ifdef CONFIG_BAND_6GHZ 152 {5945, 6085}, 153 {6105, 6245}, 154 {6265, 6405}, 155 {6425, 6565}, 156 {6585, 6725}, 157 {6745, 6885}, 158 {6905, 7045} 159 #endif /*CONFIG_BAND_6GHZ*/ 160 }; 161 #endif /*CONFIG_CHAN_FREQ_API*/ 162 163 static const enum phy_ch_width get_next_lower_bw[] = { 164 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 165 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 166 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 167 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 168 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 169 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 170 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 171 }; 172 173 const struct chan_map channel_map_us[NUM_CHANNELS] = { 174 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 175 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 176 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 177 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 178 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 179 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 180 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 181 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 182 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 183 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 184 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 185 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 186 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 187 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 188 189 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 190 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 191 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 192 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 193 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 200 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 201 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 202 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 203 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 204 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 205 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 206 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 207 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 208 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 209 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 210 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 211 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 212 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 213 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 214 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 215 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 216 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 217 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 218 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 219 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 220 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 221 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 222 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 223 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 224 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 225 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 226 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 227 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 228 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 229 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 230 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 231 232 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 233 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 234 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 235 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 236 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 237 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 238 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 239 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 240 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 241 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 242 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 243 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 244 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 245 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 246 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 247 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 248 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 249 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 250 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 251 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 252 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 253 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 254 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 255 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 256 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 257 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 258 #ifdef WLAN_FEATURE_DSRC 259 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 260 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 261 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 262 #else 263 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 264 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 265 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 266 #endif 267 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 268 #ifdef WLAN_FEATURE_DSRC 269 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 270 #else 271 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 272 #endif 273 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 274 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 275 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 276 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 277 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 278 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 279 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 280 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 281 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 282 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 283 #ifdef CONFIG_BAND_6GHZ 284 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 285 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 286 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 287 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 288 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 289 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 290 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 291 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 292 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 293 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 294 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 295 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 296 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 297 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 298 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 299 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 300 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 301 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 302 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 303 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 304 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 305 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 306 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 307 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 308 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 309 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 310 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 311 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 312 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 313 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 314 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 315 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 316 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 317 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 318 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 319 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 320 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 321 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 322 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 323 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 324 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 325 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 326 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 327 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 328 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 329 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 330 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 331 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 332 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 333 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 334 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 335 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 336 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 337 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 338 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 339 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 340 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 341 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 342 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 343 #endif /* CONFIG_BAND_6GHZ */ 344 }; 345 346 const struct chan_map channel_map_eu[NUM_CHANNELS] = { 347 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 348 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 349 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 350 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 351 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 352 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 353 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 354 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 355 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 356 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 357 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 358 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 359 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 360 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 361 362 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 363 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 364 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 365 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 366 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 367 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 368 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 369 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 370 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 371 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 372 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 373 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 374 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 375 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 376 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 377 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 378 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 379 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 380 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 381 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 386 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 393 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 394 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 395 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 396 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 397 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 398 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 399 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 400 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 401 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 402 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 403 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 404 405 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 406 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 407 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 408 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 409 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 410 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 411 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 412 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 413 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 414 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 415 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 416 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 417 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 418 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 419 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 420 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 421 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 422 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 423 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 424 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 425 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 426 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 427 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 428 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 429 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 430 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 431 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 432 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 433 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 434 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 435 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 436 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 437 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 438 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 439 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 440 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 441 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 442 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 443 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 444 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 445 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 446 #ifdef CONFIG_BAND_6GHZ 447 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 448 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 449 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 450 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 451 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 452 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 453 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 454 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 455 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 456 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 457 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 458 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 459 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 460 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 461 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 462 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 463 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 464 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 465 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 466 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 467 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 468 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 469 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 470 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 471 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 472 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 473 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 474 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 475 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 476 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 477 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 478 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 479 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 480 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 481 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 482 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 483 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 484 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 485 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 486 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 487 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 488 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 489 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 490 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 491 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 492 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 493 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 494 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 495 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 496 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 497 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 498 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 499 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 500 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 501 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 502 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 503 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 504 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 505 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 506 #endif /* CONFIG_BAND_6GHZ */ 507 }; 508 509 const struct chan_map channel_map_jp[NUM_CHANNELS] = { 510 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 511 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 512 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 513 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 514 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 515 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 516 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 517 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 518 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 519 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 520 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 521 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 522 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 523 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 524 525 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 526 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 527 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 528 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 529 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 530 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 531 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 532 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 533 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 534 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 535 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 536 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 537 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 538 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 539 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 540 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 541 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 542 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 543 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 544 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 545 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 546 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 547 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 548 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 549 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 550 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 551 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 552 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 553 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 554 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 555 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 556 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 557 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 558 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 559 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 560 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 561 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 562 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 563 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 564 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 565 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 566 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 567 568 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 569 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 570 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 571 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 572 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 573 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 574 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 575 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 576 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 577 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 578 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 579 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 580 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 581 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 582 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 583 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 584 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 585 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 586 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 587 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 588 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 589 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 590 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 591 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 592 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 593 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 594 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 595 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 596 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 597 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 598 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 599 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 600 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 601 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 602 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 603 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 604 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 605 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 606 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 607 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 608 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 609 #ifdef CONFIG_BAND_6GHZ 610 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 611 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 612 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 613 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 614 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 615 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 616 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 617 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 618 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 619 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 620 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 621 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 622 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 623 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 624 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 625 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 626 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 627 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 628 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 629 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 630 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 631 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 632 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 633 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 634 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 635 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 636 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 637 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 638 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 639 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 640 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 641 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 642 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 643 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 644 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 645 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 646 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 647 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 648 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 649 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 650 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 651 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 652 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 653 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 654 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 655 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 656 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 657 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 658 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 659 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 660 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 661 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 662 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 663 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 664 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 665 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 666 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 667 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 668 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 669 #endif /* CONFIG_BAND_6GHZ */ 670 }; 671 672 const struct chan_map channel_map_global[NUM_CHANNELS] = { 673 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 674 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 675 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 676 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 677 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 678 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 679 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 680 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 681 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 682 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 683 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 684 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 685 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 686 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 687 688 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 689 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 690 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 691 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 692 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 693 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 694 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 695 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 696 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 697 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 698 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 699 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 700 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 701 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 702 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 703 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 704 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 705 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 706 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 707 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 708 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 709 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 710 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 711 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 712 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 713 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 714 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 715 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 716 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 717 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 718 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 719 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 720 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 721 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 722 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 723 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 724 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 725 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 726 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 727 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 728 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 729 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 730 731 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 732 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 733 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 734 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 735 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 736 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 737 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 738 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 739 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 740 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 741 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 742 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 743 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 744 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 745 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 746 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 747 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 748 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 749 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 750 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 751 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 752 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 753 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 754 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 755 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 756 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 757 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 758 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 759 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 760 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 761 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 762 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 763 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 764 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 765 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 766 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 767 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 768 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 769 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 770 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 771 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 772 #ifdef CONFIG_BAND_6GHZ 773 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 774 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 775 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 776 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 777 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 778 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 779 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 780 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 781 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 782 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 783 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 784 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 785 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 786 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 787 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 788 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 789 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 790 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 791 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 792 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 793 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 794 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 795 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 796 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 797 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 798 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 799 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 800 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 801 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 802 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 803 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 804 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 805 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 806 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 807 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 808 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 809 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 810 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 811 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 812 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 813 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 814 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 815 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 816 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 817 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 818 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 819 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 820 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 821 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 822 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 823 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 824 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 825 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 826 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 827 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 828 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 829 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 830 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 831 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 832 #endif /* CONFIG_BAND_6GHZ */ 833 }; 834 835 const struct chan_map channel_map_china[NUM_CHANNELS] = { 836 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 837 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 838 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 839 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 840 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 841 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 842 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 843 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 844 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 845 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 846 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 847 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 848 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 849 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 850 851 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 852 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 853 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 854 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 855 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 856 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 857 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 858 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 859 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 860 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 861 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 862 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 863 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 864 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 865 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 866 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 867 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 868 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 869 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 870 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 871 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 872 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 873 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 874 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 875 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 876 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 877 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 878 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 879 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 880 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 881 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 882 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 883 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 884 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 885 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 886 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 887 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 888 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 889 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 890 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 891 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 892 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 893 894 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 895 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 896 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 897 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 898 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 899 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 900 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 901 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 902 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 903 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 904 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 905 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 906 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 907 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 908 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 909 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 910 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 911 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 912 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 913 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 914 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 915 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 916 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 917 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 918 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 919 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 920 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 921 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 922 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 923 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 924 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 925 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 926 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 927 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 928 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 929 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 930 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 931 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 932 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 933 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 934 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 935 #ifdef CONFIG_BAND_6GHZ 936 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 937 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 938 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 939 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 940 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 941 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 942 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 943 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 944 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 945 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 946 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 947 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 948 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 949 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 950 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 951 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 952 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 953 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 954 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 955 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 956 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 957 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 958 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 959 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 960 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 961 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 962 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 963 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 964 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 965 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 966 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 967 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 968 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 969 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 970 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 971 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 972 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 973 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 974 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 975 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 976 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 977 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 978 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 979 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 980 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 981 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 982 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 983 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 984 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 985 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 986 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 987 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 988 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 989 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 990 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 991 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 992 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 993 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 994 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 995 #endif /* CONFIG_BAND_6GHZ */ 996 }; 997 998 void reg_init_channel_map(enum dfs_reg dfs_region) 999 { 1000 switch (dfs_region) { 1001 case DFS_UNINIT_REGION: 1002 case DFS_UNDEF_REGION: 1003 channel_map = channel_map_global; 1004 break; 1005 case DFS_FCC_REGION: 1006 channel_map = channel_map_us; 1007 break; 1008 case DFS_ETSI_REGION: 1009 channel_map = channel_map_eu; 1010 break; 1011 case DFS_MKK_REGION: 1012 case DFS_MKKN_REGION: 1013 channel_map = channel_map_jp; 1014 break; 1015 case DFS_CN_REGION: 1016 channel_map = channel_map_china; 1017 break; 1018 case DFS_KR_REGION: 1019 channel_map = channel_map_eu; 1020 break; 1021 } 1022 } 1023 1024 uint16_t reg_get_bw_value(enum phy_ch_width bw) 1025 { 1026 switch (bw) { 1027 case CH_WIDTH_20MHZ: 1028 return 20; 1029 case CH_WIDTH_40MHZ: 1030 return 40; 1031 case CH_WIDTH_80MHZ: 1032 return 80; 1033 case CH_WIDTH_160MHZ: 1034 return 160; 1035 case CH_WIDTH_80P80MHZ: 1036 return 160; 1037 case CH_WIDTH_INVALID: 1038 return 0; 1039 case CH_WIDTH_5MHZ: 1040 return 5; 1041 case CH_WIDTH_10MHZ: 1042 return 10; 1043 case CH_WIDTH_MAX: 1044 return 160; 1045 default: 1046 return 0; 1047 } 1048 } 1049 1050 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 1051 struct wlan_objmgr_psoc *psoc) 1052 { 1053 return &((psoc->soc_cb.tx_ops.reg_ops)); 1054 } 1055 1056 #ifdef CONFIG_CHAN_NUM_API 1057 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 1058 struct channel_power *ch_list, 1059 uint8_t *num_chan) 1060 { 1061 int i, count; 1062 struct regulatory_channel *reg_channels; 1063 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1064 1065 if (!num_chan || !ch_list) { 1066 reg_err("chan_list or num_ch is NULL"); 1067 return QDF_STATUS_E_FAILURE; 1068 } 1069 1070 pdev_priv_obj = reg_get_pdev_obj(pdev); 1071 1072 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1073 reg_err("reg pdev priv obj is NULL"); 1074 return QDF_STATUS_E_FAILURE; 1075 } 1076 1077 /* set the current channel list */ 1078 reg_channels = pdev_priv_obj->cur_chan_list; 1079 1080 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 1081 if (reg_channels[i].state && 1082 reg_channels[i].chan_flags != REGULATORY_CHAN_DISABLED) { 1083 ch_list[count].chan_num = 1084 reg_channels[i].chan_num; 1085 ch_list[count].center_freq = 1086 reg_channels[i].center_freq; 1087 ch_list[count++].tx_power = 1088 reg_channels[i].tx_power; 1089 } 1090 } 1091 1092 *num_chan = count; 1093 1094 return QDF_STATUS_SUCCESS; 1095 } 1096 1097 enum channel_enum reg_get_chan_enum(uint8_t chan_num) 1098 { 1099 uint32_t count; 1100 1101 for (count = 0; count < NUM_CHANNELS; count++) 1102 if (channel_map[count].chan_num == chan_num) 1103 return count; 1104 1105 reg_err("invalid channel number %d", chan_num); 1106 1107 return INVALID_CHANNEL; 1108 } 1109 1110 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 1111 uint8_t ch) 1112 { 1113 enum channel_enum ch_idx; 1114 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1115 1116 ch_idx = reg_get_chan_enum(ch); 1117 1118 if (ch_idx == INVALID_CHANNEL) 1119 return CHANNEL_STATE_INVALID; 1120 1121 pdev_priv_obj = reg_get_pdev_obj(pdev); 1122 1123 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1124 reg_err("pdev reg obj is NULL"); 1125 return CHANNEL_STATE_INVALID; 1126 } 1127 1128 return pdev_priv_obj->cur_chan_list[ch_idx].state; 1129 } 1130 1131 /** 1132 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 1133 * @pdev: Pointer to pdev structure 1134 * @oper_ch: operating channel number 1135 * @bonded_chan_ar: bonded channel array 1136 * @array_size; Array size 1137 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 1138 * 1139 * Return: bonded channel state 1140 */ 1141 static enum channel_state reg_get_5g_bonded_chan_array( 1142 struct wlan_objmgr_pdev *pdev, 1143 uint8_t oper_chan, 1144 const struct bonded_channel bonded_chan_ar[], 1145 uint16_t array_size, 1146 const struct bonded_channel **bonded_chan_ptr_ptr) 1147 { 1148 int i; 1149 uint8_t chan_num; 1150 const struct bonded_channel *bonded_chan_ptr = NULL; 1151 enum channel_state chan_state = CHANNEL_STATE_INVALID; 1152 enum channel_state temp_chan_state; 1153 1154 for (i = 0; i < array_size; i++) { 1155 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 1156 (oper_chan <= bonded_chan_ar[i].end_ch)) { 1157 bonded_chan_ptr = &bonded_chan_ar[i]; 1158 break; 1159 } 1160 } 1161 1162 if (!bonded_chan_ptr) 1163 return chan_state; 1164 1165 *bonded_chan_ptr_ptr = bonded_chan_ptr; 1166 chan_num = bonded_chan_ptr->start_ch; 1167 while (chan_num <= bonded_chan_ptr->end_ch) { 1168 temp_chan_state = reg_get_channel_state(pdev, chan_num); 1169 if (temp_chan_state < chan_state) 1170 chan_state = temp_chan_state; 1171 chan_num = chan_num + 4; 1172 } 1173 1174 return chan_state; 1175 } 1176 1177 enum channel_state reg_get_5g_bonded_channel( 1178 struct wlan_objmgr_pdev *pdev, uint8_t chan_num, 1179 enum phy_ch_width ch_width, 1180 const struct bonded_channel **bonded_chan_ptr_ptr) 1181 { 1182 if (ch_width == CH_WIDTH_80P80MHZ) 1183 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1184 bonded_chan_80mhz_list, 1185 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1186 bonded_chan_ptr_ptr); 1187 else if (ch_width == CH_WIDTH_160MHZ) 1188 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1189 bonded_chan_160mhz_list, 1190 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 1191 bonded_chan_ptr_ptr); 1192 else if (ch_width == CH_WIDTH_80MHZ) 1193 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1194 bonded_chan_80mhz_list, 1195 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1196 bonded_chan_ptr_ptr); 1197 else if (ch_width == CH_WIDTH_40MHZ) 1198 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1199 bonded_chan_40mhz_list, 1200 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1201 bonded_chan_ptr_ptr); 1202 else 1203 return reg_get_channel_state(pdev, chan_num); 1204 } 1205 1206 enum channel_state reg_get_5g_bonded_channel_state( 1207 struct wlan_objmgr_pdev *pdev, 1208 uint8_t ch, enum phy_ch_width bw) 1209 { 1210 enum channel_enum ch_indx; 1211 enum channel_state chan_state; 1212 struct regulatory_channel *reg_channels; 1213 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1214 bool bw_enabled = false; 1215 const struct bonded_channel *bonded_chan_ptr = NULL; 1216 1217 if (bw > CH_WIDTH_80P80MHZ) { 1218 reg_err("bw passed is not good"); 1219 return CHANNEL_STATE_INVALID; 1220 } 1221 1222 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 1223 1224 if ((chan_state == CHANNEL_STATE_INVALID) || 1225 (chan_state == CHANNEL_STATE_DISABLE)) 1226 return chan_state; 1227 1228 pdev_priv_obj = reg_get_pdev_obj(pdev); 1229 1230 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1231 reg_err("pdev reg obj is NULL"); 1232 return CHANNEL_STATE_INVALID; 1233 } 1234 reg_channels = pdev_priv_obj->cur_chan_list; 1235 1236 ch_indx = reg_get_chan_enum(ch); 1237 if (ch_indx == INVALID_CHANNEL) 1238 return CHANNEL_STATE_INVALID; 1239 if (bw == CH_WIDTH_5MHZ) 1240 bw_enabled = true; 1241 else if (bw == CH_WIDTH_10MHZ) 1242 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 1243 (reg_channels[ch_indx].max_bw >= 10); 1244 else if (bw == CH_WIDTH_20MHZ) 1245 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 1246 (reg_channels[ch_indx].max_bw >= 20); 1247 else if (bw == CH_WIDTH_40MHZ) 1248 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 1249 (reg_channels[ch_indx].max_bw >= 40); 1250 else if (bw == CH_WIDTH_80MHZ) 1251 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1252 (reg_channels[ch_indx].max_bw >= 80); 1253 else if (bw == CH_WIDTH_160MHZ) 1254 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 1255 (reg_channels[ch_indx].max_bw >= 160); 1256 else if (bw == CH_WIDTH_80P80MHZ) 1257 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1258 (reg_channels[ch_indx].max_bw >= 80); 1259 1260 if (bw_enabled) 1261 return chan_state; 1262 else 1263 return CHANNEL_STATE_DISABLE; 1264 } 1265 1266 enum channel_state reg_get_2g_bonded_channel_state( 1267 struct wlan_objmgr_pdev *pdev, 1268 uint8_t oper_ch, uint8_t sec_ch, 1269 enum phy_ch_width bw) 1270 { 1271 enum channel_enum chan_idx; 1272 enum channel_state chan_state; 1273 struct regulatory_channel *reg_channels; 1274 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1275 bool bw_enabled = false; 1276 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 1277 1278 if (bw > CH_WIDTH_40MHZ) 1279 return CHANNEL_STATE_INVALID; 1280 1281 if (bw == CH_WIDTH_40MHZ) { 1282 if ((sec_ch + 4 != oper_ch) && 1283 (oper_ch + 4 != sec_ch)) 1284 return CHANNEL_STATE_INVALID; 1285 chan_state2 = reg_get_channel_state(pdev, sec_ch); 1286 if (chan_state2 == CHANNEL_STATE_INVALID) 1287 return chan_state2; 1288 } 1289 1290 pdev_priv_obj = reg_get_pdev_obj(pdev); 1291 1292 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1293 reg_err("reg pdev priv obj is NULL"); 1294 return CHANNEL_STATE_INVALID; 1295 } 1296 1297 reg_channels = pdev_priv_obj->cur_chan_list; 1298 1299 chan_state = reg_get_channel_state(pdev, oper_ch); 1300 if (chan_state2 < chan_state) 1301 chan_state = chan_state2; 1302 1303 if ((chan_state == CHANNEL_STATE_INVALID) || 1304 (chan_state == CHANNEL_STATE_DISABLE)) 1305 return chan_state; 1306 1307 chan_idx = reg_get_chan_enum(oper_ch); 1308 if (chan_idx == INVALID_CHANNEL) 1309 return CHANNEL_STATE_INVALID; 1310 if (bw == CH_WIDTH_5MHZ) 1311 bw_enabled = true; 1312 else if (bw == CH_WIDTH_10MHZ) 1313 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 1314 (reg_channels[chan_idx].max_bw >= 10); 1315 else if (bw == CH_WIDTH_20MHZ) 1316 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 1317 (reg_channels[chan_idx].max_bw >= 20); 1318 else if (bw == CH_WIDTH_40MHZ) 1319 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 1320 (reg_channels[chan_idx].max_bw >= 40); 1321 1322 if (bw_enabled) 1323 return chan_state; 1324 else 1325 return CHANNEL_STATE_DISABLE; 1326 1327 return CHANNEL_STATE_ENABLE; 1328 } 1329 #endif /* CONFIG_CHAN_NUM_API */ 1330 1331 /** 1332 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1333 * @chan_state1: Channel state1 1334 * @chan_state2: Channel state2 1335 * 1336 * Return: Channel state 1337 */ 1338 static enum channel_state reg_combine_channel_states( 1339 enum channel_state chan_state1, 1340 enum channel_state chan_state2) 1341 { 1342 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1343 (chan_state2 == CHANNEL_STATE_INVALID)) 1344 return CHANNEL_STATE_INVALID; 1345 else 1346 return min(chan_state1, chan_state2); 1347 } 1348 1349 #ifdef CONFIG_CHAN_NUM_API 1350 /** 1351 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1352 * @ch: channel number. 1353 * @ch_params: pointer to the channel parameters. 1354 * 1355 * Return: None 1356 */ 1357 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1358 uint8_t ch, 1359 struct ch_params *ch_params) 1360 { 1361 /* 1362 * Set channel parameters like center frequency for a bonded channel 1363 * state. Also return the maximum bandwidth supported by the channel. 1364 */ 1365 1366 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1367 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1368 const struct bonded_channel *bonded_chan_ptr = NULL; 1369 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1370 1371 if (!ch_params) { 1372 reg_err("ch_params is NULL"); 1373 return; 1374 } 1375 1376 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1377 if (ch_params->center_freq_seg1 != 0) 1378 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1379 else 1380 ch_params->ch_width = CH_WIDTH_160MHZ; 1381 } 1382 1383 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1384 bonded_chan_ptr = NULL; 1385 bonded_chan_ptr2 = NULL; 1386 chan_state = reg_get_5g_bonded_channel( 1387 pdev, ch, ch_params->ch_width, 1388 &bonded_chan_ptr); 1389 1390 chan_state = reg_get_5g_bonded_channel_state( 1391 pdev, ch, ch_params->ch_width); 1392 1393 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1394 chan_state2 = reg_get_5g_bonded_channel_state( 1395 pdev, ch_params->center_freq_seg1 - 2, 1396 CH_WIDTH_80MHZ); 1397 1398 chan_state = reg_combine_channel_states( 1399 chan_state, chan_state2); 1400 } 1401 1402 if ((chan_state != CHANNEL_STATE_ENABLE) && 1403 (chan_state != CHANNEL_STATE_DFS)) 1404 goto update_bw; 1405 1406 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1407 ch_params->sec_ch_offset = NO_SEC_CH; 1408 ch_params->center_freq_seg0 = ch; 1409 break; 1410 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1411 reg_get_5g_bonded_chan_array( 1412 pdev, ch, bonded_chan_40mhz_list, 1413 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1414 &bonded_chan_ptr2); 1415 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1416 goto update_bw; 1417 if (ch == bonded_chan_ptr2->start_ch) 1418 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1419 else 1420 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1421 1422 ch_params->center_freq_seg0 = 1423 (bonded_chan_ptr->start_ch + 1424 bonded_chan_ptr->end_ch) / 2; 1425 break; 1426 } 1427 update_bw: 1428 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1429 } 1430 1431 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1432 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1433 chan_state = reg_get_5g_bonded_channel( 1434 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1435 if (bonded_chan_ptr) 1436 ch_params->center_freq_seg0 = 1437 (bonded_chan_ptr->start_ch + 1438 bonded_chan_ptr->end_ch) / 2; 1439 } 1440 1441 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1442 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1443 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1444 ch_params->center_freq_seg1 = 0; 1445 1446 reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1447 ch_params->ch_width, ch_params->center_freq_seg0, 1448 ch_params->center_freq_seg1); 1449 } 1450 1451 /** 1452 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1453 * @oper_ch: operating channel 1454 * @ch_params: channel parameters 1455 * @sec_ch_2g: 2.4G secondary channel 1456 * 1457 * Return: void 1458 */ 1459 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1460 uint16_t oper_ch, 1461 struct ch_params *ch_params, 1462 uint16_t sec_ch_2g) 1463 { 1464 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1465 1466 if (ch_params->ch_width >= CH_WIDTH_MAX) 1467 ch_params->ch_width = CH_WIDTH_40MHZ; 1468 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1469 if (oper_ch >= 1 && oper_ch <= 5) 1470 sec_ch_2g = oper_ch + 4; 1471 else if (oper_ch >= 6 && oper_ch <= 13) 1472 sec_ch_2g = oper_ch - 4; 1473 } 1474 1475 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1476 chan_state = reg_get_2g_bonded_channel_state( 1477 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1478 if (chan_state == CHANNEL_STATE_ENABLE) { 1479 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1480 if (oper_ch < sec_ch_2g) 1481 ch_params->sec_ch_offset = 1482 LOW_PRIMARY_CH; 1483 else 1484 ch_params->sec_ch_offset = 1485 HIGH_PRIMARY_CH; 1486 ch_params->center_freq_seg0 = 1487 (oper_ch + sec_ch_2g) / 2; 1488 } else { 1489 ch_params->sec_ch_offset = NO_SEC_CH; 1490 ch_params->center_freq_seg0 = oper_ch; 1491 } 1492 break; 1493 } 1494 1495 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1496 } 1497 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1498 ch_params->center_freq_seg1 = 0; 1499 } 1500 1501 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1502 uint8_t ch, uint8_t sec_ch_2g, 1503 struct ch_params *ch_params) 1504 { 1505 if (REG_IS_5GHZ_CH(ch)) 1506 reg_set_5g_channel_params(pdev, ch, ch_params); 1507 else if (REG_IS_24GHZ_CH(ch)) 1508 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1509 } 1510 #endif /* CONFIG_CHAN_NUM_API */ 1511 1512 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1513 enum band_info *band) 1514 { 1515 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1516 1517 pdev_reg = reg_get_pdev_obj(pdev); 1518 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1519 reg_err("pdev reg component is NULL"); 1520 return QDF_STATUS_E_INVAL; 1521 } 1522 1523 *band = pdev_reg->band_capability; 1524 1525 return QDF_STATUS_SUCCESS; 1526 } 1527 1528 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1529 uint8_t *country_code) 1530 { 1531 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1532 1533 if (!country_code) { 1534 reg_err("country_code is NULL"); 1535 return QDF_STATUS_E_INVAL; 1536 } 1537 1538 psoc_priv_obj = reg_get_psoc_obj(psoc); 1539 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1540 reg_err("psoc reg component is NULL"); 1541 return QDF_STATUS_E_INVAL; 1542 } 1543 1544 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1545 REG_ALPHA2_LEN + 1); 1546 1547 return QDF_STATUS_SUCCESS; 1548 } 1549 1550 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1551 enum dfs_reg *dfs_reg) 1552 { 1553 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1554 1555 pdev_priv_obj = reg_get_pdev_obj(pdev); 1556 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1557 reg_err("reg component pdev priv is NULL"); 1558 return; 1559 } 1560 1561 *dfs_reg = pdev_priv_obj->dfs_region; 1562 } 1563 1564 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1565 enum dfs_reg dfs_reg) 1566 { 1567 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1568 1569 pdev_priv_obj = reg_get_pdev_obj(pdev); 1570 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1571 reg_err("psoc reg component is NULL"); 1572 return; 1573 } 1574 1575 pdev_priv_obj->dfs_region = dfs_reg; 1576 1577 reg_init_channel_map(dfs_reg); 1578 } 1579 1580 #ifdef CONFIG_CHAN_NUM_API 1581 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1582 uint8_t chan_num) 1583 { 1584 enum channel_enum chan_enum; 1585 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1586 struct regulatory_channel *reg_channels; 1587 1588 chan_enum = reg_get_chan_enum(chan_num); 1589 1590 if (chan_enum == INVALID_CHANNEL) { 1591 reg_err("channel is invalid"); 1592 return QDF_STATUS_E_FAILURE; 1593 } 1594 1595 pdev_priv_obj = reg_get_pdev_obj(pdev); 1596 1597 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1598 reg_err("reg pdev priv obj is NULL"); 1599 return QDF_STATUS_E_FAILURE; 1600 } 1601 1602 reg_channels = pdev_priv_obj->cur_chan_list; 1603 1604 return reg_channels[chan_enum].tx_power; 1605 } 1606 1607 qdf_freq_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1608 uint8_t chan_num) 1609 { 1610 enum channel_enum chan_enum; 1611 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1612 struct regulatory_channel *reg_channels; 1613 1614 chan_enum = reg_get_chan_enum(chan_num); 1615 1616 if (chan_enum == INVALID_CHANNEL) 1617 return CHANNEL_STATE_INVALID; 1618 1619 pdev_priv_obj = reg_get_pdev_obj(pdev); 1620 1621 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1622 reg_err("reg pdev priv obj is NULL"); 1623 return QDF_STATUS_E_FAILURE; 1624 } 1625 1626 reg_channels = pdev_priv_obj->cur_chan_list; 1627 1628 return reg_channels[chan_enum].center_freq; 1629 } 1630 1631 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1632 uint8_t chan) 1633 { 1634 enum channel_state ch_state; 1635 1636 ch_state = reg_get_channel_state(pdev, chan); 1637 1638 return ch_state == CHANNEL_STATE_DFS; 1639 } 1640 #endif /* CONFIG_CHAN_NUM_API */ 1641 1642 uint8_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1643 qdf_freq_t freq) 1644 { 1645 uint32_t count; 1646 struct regulatory_channel *chan_list; 1647 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1648 1649 if (freq == 0) { 1650 reg_err_rl("Invalid frequency %d", freq); 1651 return 0; 1652 } 1653 1654 pdev_priv_obj = reg_get_pdev_obj(pdev); 1655 1656 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1657 reg_err("reg pdev priv obj is NULL"); 1658 return 0; 1659 } 1660 1661 chan_list = pdev_priv_obj->mas_chan_list; 1662 for (count = 0; count < NUM_CHANNELS; count++) { 1663 if (chan_list[count].center_freq >= freq) 1664 break; 1665 } 1666 1667 if (count == NUM_CHANNELS) 1668 goto end; 1669 1670 if (chan_list[count].center_freq == freq) 1671 return chan_list[count].chan_num; 1672 1673 if (count == 0) 1674 goto end; 1675 1676 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1677 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1678 reg_err("Frequency %d invalid in current reg domain", freq); 1679 return 0; 1680 } 1681 1682 return (chan_list[count - 1].chan_num + 1683 (freq - chan_list[count - 1].center_freq) / 5); 1684 1685 end: 1686 reg_err_rl("invalid frequency %d", freq); 1687 return 0; 1688 } 1689 1690 static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1691 uint8_t chan_num, 1692 enum channel_enum min_chan_range, 1693 enum channel_enum max_chan_range) 1694 { 1695 uint16_t count; 1696 struct regulatory_channel *chan_list; 1697 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1698 1699 pdev_priv_obj = reg_get_pdev_obj(pdev); 1700 1701 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1702 reg_err("reg pdev priv obj is NULL"); 1703 return 0; 1704 } 1705 1706 chan_list = pdev_priv_obj->mas_chan_list; 1707 1708 for (count = min_chan_range; count <= max_chan_range; count++) { 1709 if (REG_IS_49GHZ_FREQ(chan_list[count].center_freq)) { 1710 if (chan_list[count].chan_num == chan_num) 1711 break; 1712 continue; 1713 } else if ((chan_list[count].chan_num >= chan_num) && 1714 (chan_list[count].chan_num != INVALID_CHANNEL_NUM)) 1715 break; 1716 } 1717 1718 if (count == max_chan_range + 1) 1719 goto end; 1720 1721 if (chan_list[count].chan_num == chan_num) { 1722 if (chan_list[count].chan_flags & REGULATORY_CHAN_DISABLED) 1723 reg_err("Channel %d disabled in current reg domain", 1724 chan_num); 1725 return chan_list[count].center_freq; 1726 } 1727 1728 if (count == min_chan_range) 1729 goto end; 1730 1731 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1732 REG_IS_49GHZ_FREQ(chan_list[count - 1].center_freq) || 1733 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1734 reg_err("Channel %d invalid in current reg domain", 1735 chan_num); 1736 return 0; 1737 } 1738 1739 return (chan_list[count - 1].center_freq + 1740 (chan_num - chan_list[count - 1].chan_num) * 5); 1741 1742 end: 1743 1744 reg_debug_rl("Invalid channel %d", chan_num); 1745 return 0; 1746 } 1747 1748 uint16_t reg_legacy_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1749 uint8_t chan_num) 1750 { 1751 uint16_t min_chan_range = MIN_24GHZ_CHANNEL; 1752 uint16_t max_chan_range = MAX_5GHZ_CHANNEL; 1753 1754 if (chan_num == 0) { 1755 reg_err_rl("Invalid channel %d", chan_num); 1756 return 0; 1757 } 1758 1759 return reg_compute_chan_to_freq(pdev, chan_num, 1760 min_chan_range, 1761 max_chan_range); 1762 } 1763 1764 #ifdef CONFIG_CHAN_NUM_API 1765 qdf_freq_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1766 uint8_t chan_num) 1767 { 1768 uint32_t count; 1769 struct regulatory_channel *chan_list; 1770 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1771 1772 if (chan_num == 0) { 1773 reg_err_rl("Invalid channel %d", chan_num); 1774 return 0; 1775 } 1776 1777 pdev_priv_obj = reg_get_pdev_obj(pdev); 1778 1779 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1780 reg_err("reg pdev priv obj is NULL"); 1781 return 0; 1782 } 1783 1784 chan_list = pdev_priv_obj->cur_chan_list; 1785 for (count = 0; count < NUM_CHANNELS; count++) 1786 if (chan_list[count].chan_num == chan_num) { 1787 if (reg_chan_in_range(chan_list, 1788 pdev_priv_obj->range_2g_low, 1789 pdev_priv_obj->range_2g_high, 1790 pdev_priv_obj->range_5g_low, 1791 pdev_priv_obj->range_5g_high, 1792 count)) { 1793 return chan_list[count].center_freq; 1794 } 1795 } 1796 1797 reg_debug_rl("invalid channel %d", chan_num); 1798 return 0; 1799 } 1800 1801 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1802 { 1803 qdf_freq_t freq = 0; 1804 1805 freq = reg_chan_to_freq(pdev, chan_num); 1806 1807 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1808 } 1809 1810 enum band_info reg_chan_to_band(uint8_t chan_num) 1811 { 1812 if (chan_num <= 14) 1813 return BAND_2G; 1814 1815 return BAND_5G; 1816 } 1817 1818 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1819 uint8_t *chan_list, 1820 uint8_t num_chan, 1821 bool nol_chan) 1822 { 1823 enum channel_enum chan_enum; 1824 struct regulatory_channel *mas_chan_list; 1825 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1826 uint16_t i; 1827 1828 if (!num_chan || !chan_list) { 1829 reg_err("chan_list or num_ch is NULL"); 1830 return; 1831 } 1832 1833 pdev_priv_obj = reg_get_pdev_obj(pdev); 1834 if (!pdev_priv_obj) { 1835 reg_err("reg psoc private obj is NULL"); 1836 return; 1837 } 1838 1839 mas_chan_list = pdev_priv_obj->mas_chan_list; 1840 for (i = 0; i < num_chan; i++) { 1841 chan_enum = reg_get_chan_enum(chan_list[i]); 1842 if (chan_enum == INVALID_CHANNEL) { 1843 reg_err("Invalid ch in nol list, chan %d", 1844 chan_list[i]); 1845 continue; 1846 } 1847 mas_chan_list[chan_enum].nol_chan = nol_chan; 1848 } 1849 1850 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1851 } 1852 #endif /* CONFIG_CHAN_NUM_API */ 1853 1854 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1855 uint16_t regdmn) 1856 { 1857 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1858 struct cur_regulatory_info *reg_info; 1859 uint16_t cc = -1; 1860 uint16_t country_index = -1, regdmn_pair = -1; 1861 struct wlan_objmgr_psoc *psoc; 1862 QDF_STATUS err; 1863 1864 pdev_priv_obj = reg_get_pdev_obj(pdev); 1865 if (!pdev_priv_obj) { 1866 reg_err("reg soc is NULL"); 1867 return QDF_STATUS_E_FAILURE; 1868 } 1869 1870 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1871 (sizeof(struct cur_regulatory_info)); 1872 if (!reg_info) { 1873 reg_err("reg info is NULL"); 1874 return QDF_STATUS_E_NOMEM; 1875 } 1876 1877 psoc = wlan_pdev_get_psoc(pdev); 1878 if (!psoc) { 1879 reg_err("psoc is NULL"); 1880 return QDF_STATUS_E_INVAL; 1881 } 1882 1883 reg_info->psoc = psoc; 1884 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1885 1886 if (regdmn == 0) { 1887 reg_get_default_country(®dmn); 1888 regdmn |= COUNTRY_ERD_FLAG; 1889 } 1890 1891 if (regdmn & COUNTRY_ERD_FLAG) { 1892 cc = regdmn & ~COUNTRY_ERD_FLAG; 1893 1894 reg_get_rdpair_from_country_code(cc, 1895 &country_index, 1896 ®dmn_pair); 1897 1898 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1899 if (err == QDF_STATUS_E_FAILURE) { 1900 reg_err("%s : Unable to set country code\n", __func__); 1901 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1902 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1903 qdf_mem_free(reg_info); 1904 return QDF_STATUS_E_FAILURE; 1905 } 1906 1907 pdev_priv_obj->ctry_code = cc; 1908 1909 } else { 1910 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1911 1912 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1913 if (err == QDF_STATUS_E_FAILURE) { 1914 reg_err("%s : Unable to set country code\n", __func__); 1915 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1916 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1917 qdf_mem_free(reg_info); 1918 return QDF_STATUS_E_FAILURE; 1919 } 1920 1921 pdev_priv_obj->reg_dmn_pair = regdmn; 1922 } 1923 1924 reg_info->offload_enabled = false; 1925 reg_process_master_chan_list(reg_info); 1926 1927 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1928 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1929 qdf_mem_free(reg_info); 1930 1931 return QDF_STATUS_SUCCESS; 1932 } 1933 1934 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1935 struct cc_regdmn_s *rd) 1936 { 1937 struct cur_regulatory_info *reg_info; 1938 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1939 uint16_t country_index = -1, regdmn_pair = -1; 1940 struct wlan_objmgr_psoc *psoc; 1941 struct wlan_lmac_if_reg_tx_ops *tx_ops; 1942 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1943 uint8_t pdev_id; 1944 QDF_STATUS err; 1945 1946 pdev_priv_obj = reg_get_pdev_obj(pdev); 1947 if (!pdev_priv_obj) { 1948 reg_err(" pdev priv obj is NULL"); 1949 return QDF_STATUS_E_FAILURE; 1950 } 1951 1952 psoc = wlan_pdev_get_psoc(pdev); 1953 if (!psoc) { 1954 reg_err("psoc is NULL"); 1955 return QDF_STATUS_E_INVAL; 1956 } 1957 1958 psoc_priv_obj = reg_get_psoc_obj(psoc); 1959 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1960 reg_err("psoc reg component is NULL"); 1961 return QDF_STATUS_E_FAILURE; 1962 } 1963 1964 if (psoc_priv_obj->offload_enabled) { 1965 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 1966 pdev_priv_obj->indoor_chan_enabled = false; 1967 else 1968 pdev_priv_obj->indoor_chan_enabled = true; 1969 1970 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1971 tx_ops = reg_get_psoc_tx_ops(psoc); 1972 if (tx_ops->set_user_country_code) { 1973 psoc_priv_obj->new_init_ctry_pending[pdev_id] = true; 1974 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 1975 } 1976 1977 return QDF_STATUS_E_FAILURE; 1978 } 1979 1980 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1981 (sizeof(struct cur_regulatory_info)); 1982 if (!reg_info) { 1983 reg_err("reg info is NULL"); 1984 return QDF_STATUS_E_NOMEM; 1985 } 1986 1987 reg_info->psoc = psoc; 1988 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1989 1990 if (rd->flags == CC_IS_SET) { 1991 reg_get_rdpair_from_country_code(rd->cc.country_code, 1992 &country_index, 1993 ®dmn_pair); 1994 } else if (rd->flags == ALPHA_IS_SET) { 1995 reg_get_rdpair_from_country_iso(rd->cc.alpha, 1996 &country_index, 1997 ®dmn_pair); 1998 } else if (rd->flags == REGDMN_IS_SET) { 1999 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 2000 ®dmn_pair); 2001 } 2002 2003 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 2004 if (err == QDF_STATUS_E_FAILURE) { 2005 reg_err("%s : Unable to set country code\n", __func__); 2006 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2007 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2008 qdf_mem_free(reg_info); 2009 return QDF_STATUS_E_FAILURE; 2010 } 2011 2012 reg_info->offload_enabled = false; 2013 reg_process_master_chan_list(reg_info); 2014 2015 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2016 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2017 qdf_mem_free(reg_info); 2018 2019 return QDF_STATUS_SUCCESS; 2020 } 2021 2022 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 2023 struct cc_regdmn_s *rd) 2024 { 2025 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2026 2027 pdev_priv_obj = reg_get_pdev_obj(pdev); 2028 if (!pdev_priv_obj) { 2029 reg_err("reg pdev priv is NULL"); 2030 return QDF_STATUS_E_FAILURE; 2031 } 2032 2033 if (rd->flags == CC_IS_SET) { 2034 rd->cc.country_code = pdev_priv_obj->ctry_code; 2035 } else if (rd->flags == ALPHA_IS_SET) { 2036 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 2037 sizeof(rd->cc.alpha)); 2038 } else if (rd->flags == REGDMN_IS_SET) { 2039 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 2040 } 2041 2042 return QDF_STATUS_SUCCESS; 2043 } 2044 2045 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 2046 { 2047 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2048 2049 psoc_priv_obj = reg_get_psoc_obj(psoc); 2050 2051 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2052 reg_err("psoc reg component is NULL"); 2053 return QDF_STATUS_E_FAILURE; 2054 } 2055 2056 psoc_priv_obj->offload_enabled = val; 2057 2058 return QDF_STATUS_SUCCESS; 2059 } 2060 2061 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 2062 struct cur_regdmn_info *cur_regdmn) 2063 { 2064 struct wlan_objmgr_psoc *psoc; 2065 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2066 uint16_t index; 2067 int num_reg_dmn; 2068 uint8_t phy_id; 2069 2070 psoc = wlan_pdev_get_psoc(pdev); 2071 psoc_priv_obj = reg_get_psoc_obj(psoc); 2072 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2073 reg_err("soc reg component is NULL"); 2074 return QDF_STATUS_E_INVAL; 2075 } 2076 2077 phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2078 cur_regdmn->regdmn_pair_id = 2079 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 2080 2081 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 2082 for (index = 0; index < num_reg_dmn; index++) { 2083 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 2084 cur_regdmn->regdmn_pair_id) 2085 break; 2086 } 2087 2088 if (index == num_reg_dmn) { 2089 reg_err_rl("invalid regdomain"); 2090 return QDF_STATUS_E_FAILURE; 2091 } 2092 2093 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 2094 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 2095 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 2096 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 2097 cur_regdmn->dfs_region = 2098 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 2099 2100 return QDF_STATUS_SUCCESS; 2101 } 2102 2103 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 2104 bool enable_ch_144) 2105 { 2106 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2107 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2108 struct wlan_objmgr_psoc *psoc; 2109 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2110 QDF_STATUS status; 2111 2112 pdev_priv_obj = reg_get_pdev_obj(pdev); 2113 2114 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2115 reg_err("pdev reg component is NULL"); 2116 return QDF_STATUS_E_INVAL; 2117 } 2118 2119 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 2120 reg_info("chan 144 is already %d", enable_ch_144); 2121 return QDF_STATUS_SUCCESS; 2122 } 2123 2124 psoc = wlan_pdev_get_psoc(pdev); 2125 if (!psoc) { 2126 reg_err("psoc is NULL"); 2127 return QDF_STATUS_E_INVAL; 2128 } 2129 2130 psoc_priv_obj = reg_get_psoc_obj(psoc); 2131 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2132 reg_err("psoc reg component is NULL"); 2133 return QDF_STATUS_E_INVAL; 2134 } 2135 2136 reg_debug("setting chan 144: %d", enable_ch_144); 2137 pdev_priv_obj->en_chan_144 = enable_ch_144; 2138 2139 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2140 2141 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2142 if (reg_tx_ops->fill_umac_legacy_chanlist) 2143 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2144 pdev_priv_obj->cur_chan_list); 2145 2146 status = reg_send_scheduler_msg_sb(psoc, pdev); 2147 2148 return status; 2149 } 2150 2151 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 2152 { 2153 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2154 2155 pdev_priv_obj = reg_get_pdev_obj(pdev); 2156 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2157 reg_err("pdev reg component is NULL"); 2158 return false; 2159 } 2160 2161 return pdev_priv_obj->en_chan_144; 2162 } 2163 2164 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 2165 struct wlan_objmgr_psoc *psoc) 2166 { 2167 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2168 2169 psoc_priv_obj = reg_get_psoc_obj(psoc); 2170 2171 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2172 reg_err("psoc reg component is NULL"); 2173 return NULL; 2174 } 2175 2176 return psoc_priv_obj->reg_cap; 2177 } 2178 2179 QDF_STATUS reg_set_hal_reg_cap( 2180 struct wlan_objmgr_psoc *psoc, 2181 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 2182 uint16_t phy_cnt) 2183 { 2184 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2185 2186 psoc_priv_obj = reg_get_psoc_obj(psoc); 2187 2188 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2189 reg_err("psoc reg component is NULL"); 2190 return QDF_STATUS_E_FAILURE; 2191 } 2192 2193 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 2194 reg_err("phy cnt:%d is more than %d", phy_cnt, 2195 PSOC_MAX_PHY_REG_CAP); 2196 return QDF_STATUS_E_FAILURE; 2197 } 2198 2199 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 2200 phy_cnt * 2201 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 2202 2203 return QDF_STATUS_SUCCESS; 2204 } 2205 2206 bool reg_chan_in_range(struct regulatory_channel *chan_list, 2207 qdf_freq_t low_freq_2g, qdf_freq_t high_freq_2g, 2208 qdf_freq_t low_freq_5g, qdf_freq_t high_freq_5g, 2209 enum channel_enum ch_enum) 2210 { 2211 uint32_t low_limit_2g = NUM_CHANNELS; 2212 uint32_t high_limit_2g = NUM_CHANNELS; 2213 uint32_t low_limit_5g = NUM_CHANNELS; 2214 uint32_t high_limit_5g = NUM_CHANNELS; 2215 bool chan_in_range; 2216 enum channel_enum chan_enum; 2217 uint16_t min_bw; 2218 qdf_freq_t center_freq; 2219 2220 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2221 min_bw = chan_list[chan_enum].min_bw; 2222 center_freq = chan_list[chan_enum].center_freq; 2223 2224 if ((center_freq - min_bw / 2) >= low_freq_2g) { 2225 low_limit_2g = chan_enum; 2226 break; 2227 } 2228 } 2229 2230 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2231 min_bw = chan_list[chan_enum].min_bw; 2232 center_freq = chan_list[chan_enum].center_freq; 2233 2234 if ((center_freq - min_bw / 2) >= low_freq_5g) { 2235 low_limit_5g = chan_enum; 2236 break; 2237 } 2238 } 2239 2240 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2241 min_bw = chan_list[chan_enum].min_bw; 2242 center_freq = chan_list[chan_enum].center_freq; 2243 2244 if (center_freq + min_bw / 2 <= high_freq_2g) { 2245 high_limit_2g = chan_enum; 2246 break; 2247 } 2248 if (chan_enum == 0) 2249 break; 2250 } 2251 2252 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2253 min_bw = chan_list[chan_enum].min_bw; 2254 center_freq = chan_list[chan_enum].center_freq; 2255 2256 if (center_freq + min_bw / 2 <= high_freq_5g) { 2257 high_limit_5g = chan_enum; 2258 break; 2259 } 2260 if (chan_enum == 0) 2261 break; 2262 } 2263 2264 chan_in_range = false; 2265 if ((low_limit_2g <= ch_enum) && 2266 (high_limit_2g >= ch_enum) && 2267 (low_limit_2g != NUM_CHANNELS) && 2268 (high_limit_2g != NUM_CHANNELS)) 2269 chan_in_range = true; 2270 if ((low_limit_5g <= ch_enum) && 2271 (high_limit_5g >= ch_enum) && 2272 (low_limit_5g != NUM_CHANNELS) && 2273 (high_limit_5g != NUM_CHANNELS)) 2274 chan_in_range = true; 2275 2276 if (chan_in_range) 2277 return true; 2278 else 2279 return false; 2280 } 2281 2282 #ifdef CONFIG_CHAN_NUM_API 2283 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 2284 uint8_t *chan_list, uint8_t num_chan, 2285 bool nol_history_chan) 2286 { 2287 enum channel_enum chan_enum; 2288 struct regulatory_channel *mas_chan_list; 2289 struct regulatory_channel *cur_chan_list; 2290 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2291 uint16_t i; 2292 2293 if (!num_chan || !chan_list) { 2294 reg_err("chan_list or num_ch is NULL"); 2295 return; 2296 } 2297 2298 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 2299 pdev, WLAN_UMAC_COMP_REGULATORY); 2300 2301 if (!pdev_priv_obj) { 2302 reg_err("reg psoc private obj is NULL"); 2303 return; 2304 } 2305 2306 mas_chan_list = pdev_priv_obj->mas_chan_list; 2307 cur_chan_list = pdev_priv_obj->cur_chan_list; 2308 2309 for (i = 0; i < num_chan; i++) { 2310 chan_enum = reg_get_chan_enum(chan_list[i]); 2311 if (chan_enum == INVALID_CHANNEL) { 2312 reg_err("Invalid ch in nol list, chan %d", 2313 chan_list[i]); 2314 continue; 2315 } 2316 mas_chan_list[chan_enum].nol_history = nol_history_chan; 2317 cur_chan_list[chan_enum].nol_history = nol_history_chan; 2318 } 2319 } 2320 2321 bool reg_is_24ghz_ch(uint32_t chan) 2322 { 2323 return REG_IS_24GHZ_CH(chan); 2324 } 2325 2326 bool reg_is_5ghz_ch(uint32_t chan) 2327 { 2328 return REG_IS_5GHZ_CH(chan); 2329 } 2330 #endif /* CONFIG_CHAN_NUM_API */ 2331 2332 bool reg_is_24ghz_ch_freq(uint32_t freq) 2333 { 2334 return REG_IS_24GHZ_CH_FREQ(freq); 2335 } 2336 2337 bool reg_is_5ghz_ch_freq(uint32_t freq) 2338 { 2339 return REG_IS_5GHZ_FREQ(freq); 2340 } 2341 2342 /** 2343 * BAND_2G_PRESENT() - Check if REG_BAND_2G is set in the band_mask 2344 * @band_mask: Bitmask for bands 2345 * 2346 * Return: True if REG_BAND_2G is set in the band_mask, else false 2347 */ 2348 static inline bool BAND_2G_PRESENT(uint8_t band_mask) 2349 { 2350 return !!(band_mask & (BIT(REG_BAND_2G))); 2351 } 2352 2353 /** 2354 * BAND_5G_PRESENT() - Check if REG_BAND_5G is set in the band_mask 2355 * @band_mask: Bitmask for bands 2356 * 2357 * Return: True if REG_BAND_5G is set in the band_mask, else false 2358 */ 2359 static inline bool BAND_5G_PRESENT(uint8_t band_mask) 2360 { 2361 return !!(band_mask & (BIT(REG_BAND_5G))); 2362 } 2363 2364 #ifdef CONFIG_BAND_6GHZ 2365 bool reg_is_6ghz_chan_freq(uint16_t freq) 2366 { 2367 return REG_IS_6GHZ_FREQ(freq); 2368 } 2369 2370 uint16_t reg_min_6ghz_chan_freq(void) 2371 { 2372 return REG_MIN_6GHZ_CHAN_FREQ; 2373 } 2374 2375 uint16_t reg_max_6ghz_chan_freq(void) 2376 { 2377 return REG_MAX_6GHZ_CHAN_FREQ; 2378 } 2379 2380 bool reg_is_6ghz_psc_chan_freq(uint16_t freq) 2381 { 2382 if (!REG_IS_6GHZ_FREQ(freq)) { 2383 reg_debug(" Channel frequency is not a 6GHz frequency"); 2384 return false; 2385 } 2386 2387 if (!(((freq - SIXG_STARTING_FREQ) + (FREQ_LEFT_SHIFT)) % 2388 (FREQ_TO_CHAN_SCALE * NUM_80MHZ_BAND_IN_6G))) { 2389 return true; 2390 } 2391 2392 reg_debug_rl("Channel freq %d MHz is not a 6GHz PSC frequency", freq); 2393 2394 return false; 2395 } 2396 2397 /** 2398 * BAND_6G_PRESENT() - Check if REG_BAND_6G is set in the band_mask 2399 * @band_mask: Bitmask for bands 2400 * 2401 * Return: True if REG_BAND_6G is set in the band_mask, else false 2402 */ 2403 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2404 { 2405 return !!(band_mask & (BIT(REG_BAND_6G))); 2406 } 2407 #else 2408 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2409 { 2410 return false; 2411 } 2412 #endif /* CONFIG_BAND_6GHZ */ 2413 2414 uint16_t 2415 reg_get_band_channel_list(struct wlan_objmgr_pdev *pdev, 2416 uint8_t band_mask, 2417 struct regulatory_channel *channel_list) 2418 { 2419 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2420 struct regulatory_channel *cur_chan_list; 2421 uint16_t i, num_channels = 0; 2422 2423 pdev_priv_obj = reg_get_pdev_obj(pdev); 2424 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2425 reg_err("reg pdev priv obj is NULL"); 2426 return 0; 2427 } 2428 2429 cur_chan_list = pdev_priv_obj->cur_chan_list; 2430 2431 if (BAND_2G_PRESENT(band_mask)) { 2432 for (i = MIN_24GHZ_CHANNEL; i <= MAX_24GHZ_CHANNEL; i++) { 2433 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2434 !(cur_chan_list[i].chan_flags & 2435 REGULATORY_CHAN_DISABLED)) { 2436 channel_list[num_channels] = cur_chan_list[i]; 2437 num_channels++; 2438 } 2439 } 2440 } 2441 if (BAND_5G_PRESENT(band_mask)) { 2442 for (i = MIN_49GHZ_CHANNEL; i <= MAX_5GHZ_CHANNEL; i++) { 2443 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2444 !(cur_chan_list[i].chan_flags & 2445 REGULATORY_CHAN_DISABLED)) { 2446 channel_list[num_channels] = cur_chan_list[i]; 2447 num_channels++; 2448 } 2449 } 2450 } 2451 if (BAND_6G_PRESENT(band_mask)) { 2452 for (i = MIN_6GHZ_CHANNEL; i <= MAX_6GHZ_CHANNEL; i++) { 2453 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2454 !(cur_chan_list[i].chan_flags & 2455 REGULATORY_CHAN_DISABLED)) { 2456 channel_list[num_channels] = cur_chan_list[i]; 2457 num_channels++; 2458 } 2459 } 2460 } 2461 2462 if (!num_channels) { 2463 reg_err("Failed to retrieve the channel list"); 2464 return 0; 2465 } 2466 2467 return num_channels; 2468 } 2469 2470 qdf_freq_t reg_chan_band_to_freq(struct wlan_objmgr_pdev *pdev, 2471 uint8_t chan_num, 2472 uint8_t band_mask) 2473 { 2474 enum channel_enum min_chan, max_chan; 2475 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2476 uint16_t freq; 2477 2478 if (chan_num == 0) { 2479 reg_err_rl("Invalid channel %d", chan_num); 2480 return 0; 2481 } 2482 2483 pdev_priv_obj = reg_get_pdev_obj(pdev); 2484 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2485 reg_err("reg pdev priv obj is NULL"); 2486 return 0; 2487 } 2488 2489 if (BAND_6G_PRESENT(band_mask)) { 2490 if (BAND_2G_PRESENT(band_mask) || 2491 BAND_5G_PRESENT(band_mask)) { 2492 reg_err("Incorrect band_mask %x", band_mask); 2493 return 0; 2494 } 2495 2496 min_chan = MIN_6GHZ_CHANNEL; 2497 max_chan = MAX_6GHZ_CHANNEL; 2498 return reg_compute_chan_to_freq(pdev, chan_num, 2499 min_chan, 2500 max_chan); 2501 } else { 2502 if (BAND_2G_PRESENT(band_mask)) { 2503 min_chan = MIN_24GHZ_CHANNEL; 2504 max_chan = MAX_24GHZ_CHANNEL; 2505 freq = reg_compute_chan_to_freq(pdev, chan_num, 2506 min_chan, 2507 max_chan); 2508 if (freq != 0) 2509 return freq; 2510 } 2511 2512 if (BAND_5G_PRESENT(band_mask)) { 2513 min_chan = MIN_49GHZ_CHANNEL; 2514 max_chan = MAX_5GHZ_CHANNEL; 2515 2516 return reg_compute_chan_to_freq(pdev, chan_num, 2517 min_chan, 2518 max_chan); 2519 } 2520 2521 reg_err("Incorrect band_mask %x", band_mask); 2522 return 0; 2523 } 2524 } 2525 2526 bool reg_is_49ghz_freq(qdf_freq_t freq) 2527 { 2528 return REG_IS_49GHZ_FREQ(freq); 2529 } 2530 2531 qdf_freq_t reg_ch_num(uint32_t ch_enum) 2532 { 2533 return REG_CH_NUM(ch_enum); 2534 } 2535 2536 qdf_freq_t reg_ch_to_freq(uint32_t ch_enum) 2537 { 2538 return REG_CH_TO_FREQ(ch_enum); 2539 } 2540 2541 #ifdef CONFIG_CHAN_NUM_API 2542 bool reg_is_same_band_channels(uint8_t chan_num1, uint8_t chan_num2) 2543 { 2544 return (chan_num1 && chan_num2 && 2545 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 2546 } 2547 2548 bool reg_is_channel_valid_5g_sbs(uint8_t curchan, uint8_t newchan) 2549 { 2550 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 2551 } 2552 2553 uint8_t reg_min_24ghz_ch_num(void) 2554 { 2555 return REG_MIN_24GHZ_CH_NUM; 2556 } 2557 2558 uint8_t reg_max_24ghz_ch_num(void) 2559 { 2560 return REG_MAX_24GHZ_CH_NUM; 2561 } 2562 2563 uint8_t reg_min_5ghz_ch_num(void) 2564 { 2565 return REG_MIN_5GHZ_CH_NUM; 2566 } 2567 2568 uint8_t reg_max_5ghz_ch_num(void) 2569 { 2570 return REG_MAX_5GHZ_CH_NUM; 2571 } 2572 #endif /* CONFIG_CHAN_NUM_API */ 2573 2574 #ifdef CONFIG_CHAN_FREQ_API 2575 qdf_freq_t reg_min_24ghz_chan_freq(void) 2576 { 2577 return REG_MIN_24GHZ_CH_FREQ; 2578 } 2579 2580 qdf_freq_t reg_max_24ghz_chan_freq(void) 2581 { 2582 return REG_MAX_24GHZ_CH_FREQ; 2583 } 2584 2585 qdf_freq_t reg_min_5ghz_chan_freq(void) 2586 { 2587 return REG_MIN_5GHZ_CH_FREQ; 2588 } 2589 2590 qdf_freq_t reg_max_5ghz_chan_freq(void) 2591 { 2592 return REG_MAX_5GHZ_CH_FREQ; 2593 } 2594 #endif /* CONFIG_CHAN_FREQ_API */ 2595 2596 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 2597 bool enable) 2598 { 2599 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2600 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2601 struct wlan_objmgr_psoc *psoc; 2602 QDF_STATUS status; 2603 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2604 2605 pdev_priv_obj = reg_get_pdev_obj(pdev); 2606 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2607 reg_err("pdev reg component is NULL"); 2608 return QDF_STATUS_E_INVAL; 2609 } 2610 2611 if (pdev_priv_obj->dfs_enabled == enable) { 2612 reg_info("dfs_enabled is already set to %d", enable); 2613 return QDF_STATUS_SUCCESS; 2614 } 2615 2616 psoc = wlan_pdev_get_psoc(pdev); 2617 if (!psoc) { 2618 reg_err("psoc is NULL"); 2619 return QDF_STATUS_E_INVAL; 2620 } 2621 2622 psoc_priv_obj = reg_get_psoc_obj(psoc); 2623 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2624 reg_err("psoc reg component is NULL"); 2625 return QDF_STATUS_E_INVAL; 2626 } 2627 2628 reg_info("setting dfs_enabled: %d", enable); 2629 2630 pdev_priv_obj->dfs_enabled = enable; 2631 2632 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2633 2634 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2635 2636 /* Fill the ic channel list with the updated current channel 2637 * chan list. 2638 */ 2639 if (reg_tx_ops->fill_umac_legacy_chanlist) 2640 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2641 pdev_priv_obj->cur_chan_list); 2642 2643 status = reg_send_scheduler_msg_sb(psoc, pdev); 2644 2645 return status; 2646 } 2647 2648 bool reg_is_regdmn_en302502_applicable(struct wlan_objmgr_pdev *pdev) 2649 { 2650 struct cur_regdmn_info cur_reg_dmn; 2651 QDF_STATUS status; 2652 2653 status = reg_get_curr_regdomain(pdev, &cur_reg_dmn); 2654 if (status != QDF_STATUS_SUCCESS) { 2655 reg_err("Failed to get reg domain"); 2656 return false; 2657 } 2658 2659 return reg_en302_502_regdmn(cur_reg_dmn.regdmn_pair_id); 2660 } 2661 2662 QDF_STATUS reg_modify_pdev_chan_range(struct wlan_objmgr_pdev *pdev) 2663 { 2664 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2665 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2666 struct wlan_objmgr_psoc *psoc; 2667 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2668 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap_ptr; 2669 uint32_t cnt; 2670 uint32_t phy_id; 2671 enum direction dir; 2672 QDF_STATUS status = QDF_STATUS_SUCCESS; 2673 struct target_pdev_info *tgt_pdev; 2674 2675 tgt_pdev = wlan_pdev_get_tgt_if_handle(pdev); 2676 phy_id = (uint32_t)target_pdev_get_phy_idx(tgt_pdev); 2677 pdev_priv_obj = reg_get_pdev_obj(pdev); 2678 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2679 reg_err("pdev reg component is NULL"); 2680 return QDF_STATUS_E_INVAL; 2681 } 2682 2683 psoc = wlan_pdev_get_psoc(pdev); 2684 if (!psoc) { 2685 reg_err("psoc is NULL"); 2686 return QDF_STATUS_E_INVAL; 2687 } 2688 2689 psoc_priv_obj = reg_get_psoc_obj(psoc); 2690 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2691 reg_err("psoc reg component is NULL"); 2692 return QDF_STATUS_E_INVAL; 2693 } 2694 2695 reg_cap_ptr = psoc_priv_obj->reg_cap; 2696 2697 for (cnt = 0; cnt < PSOC_MAX_PHY_REG_CAP; cnt++) { 2698 if (!reg_cap_ptr) { 2699 qdf_mem_free(pdev_priv_obj); 2700 reg_err("reg cap ptr is NULL"); 2701 return QDF_STATUS_E_FAULT; 2702 } 2703 2704 if (reg_cap_ptr->phy_id == phy_id) 2705 break; 2706 reg_cap_ptr++; 2707 } 2708 2709 if (cnt == PSOC_MAX_PHY_REG_CAP) { 2710 qdf_mem_free(pdev_priv_obj); 2711 reg_err("extended capabilities not found for pdev"); 2712 return QDF_STATUS_E_FAULT; 2713 } 2714 2715 if (psoc_priv_obj->offload_enabled) { 2716 dir = NORTHBOUND; 2717 } else { 2718 dir = SOUTHBOUND; 2719 } 2720 2721 pdev_priv_obj->range_2g_low = reg_cap_ptr->low_2ghz_chan; 2722 pdev_priv_obj->range_2g_high = reg_cap_ptr->high_2ghz_chan; 2723 pdev_priv_obj->range_5g_low = reg_cap_ptr->low_5ghz_chan; 2724 pdev_priv_obj->range_5g_high = reg_cap_ptr->high_5ghz_chan; 2725 pdev_priv_obj->wireless_modes = reg_cap_ptr->wireless_modes; 2726 2727 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2728 2729 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2730 2731 /* Fill the ic channel list with the updated current channel 2732 * chan list. 2733 */ 2734 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2735 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2736 pdev_priv_obj->cur_chan_list); 2737 2738 } else { 2739 if (dir == NORTHBOUND) 2740 status = reg_send_scheduler_msg_nb(psoc, pdev); 2741 else 2742 status = reg_send_scheduler_msg_sb(psoc, pdev); 2743 } 2744 2745 return status; 2746 } 2747 2748 #ifdef DISABLE_UNII_SHARED_BANDS 2749 /** 2750 * reg_is_reg_unii_band_1_or_reg_unii_band_2a() - Check the input bitmap 2751 * @unii_5g_bitmap: 5G UNII band bitmap 2752 * 2753 * This function checks if either REG_UNII_BAND_1 or REG_UNII_BAND_2A, 2754 * are present in the 5G UNII band bitmap. 2755 * 2756 * Return: Return true if REG_UNII_BAND_1 or REG_UNII_BAND_2A, are present in 2757 * the UNII 5g bitmap else return false. 2758 */ 2759 static bool 2760 reg_is_reg_unii_band_1_or_reg_unii_band_2a(uint8_t unii_5g_bitmap) 2761 { 2762 if (!unii_5g_bitmap) 2763 return false; 2764 2765 return ((unii_5g_bitmap & (BIT(REG_UNII_BAND_1) | 2766 BIT(REG_UNII_BAND_2A))) == unii_5g_bitmap); 2767 } 2768 2769 QDF_STATUS reg_disable_chan_coex(struct wlan_objmgr_pdev *pdev, 2770 uint8_t unii_5g_bitmap) 2771 { 2772 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2773 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2774 struct wlan_objmgr_psoc *psoc; 2775 2776 psoc = wlan_pdev_get_psoc(pdev); 2777 if (!psoc) { 2778 reg_err("psoc is NULL"); 2779 return QDF_STATUS_E_INVAL; 2780 } 2781 2782 pdev_priv_obj = reg_get_pdev_obj(pdev); 2783 2784 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2785 reg_err_rl("reg pdev priv obj is NULL"); 2786 return QDF_STATUS_E_FAILURE; 2787 } 2788 2789 if (unii_5g_bitmap && 2790 !reg_is_reg_unii_band_1_or_reg_unii_band_2a(unii_5g_bitmap)) { 2791 reg_err_rl("Invalid unii_5g_bitmap = %d", unii_5g_bitmap); 2792 return QDF_STATUS_E_FAILURE; 2793 } 2794 2795 if (pdev_priv_obj->unii_5g_bitmap == unii_5g_bitmap) { 2796 reg_debug_rl("UNII bitmask for 5G channels is already set %d", 2797 unii_5g_bitmap); 2798 return QDF_STATUS_SUCCESS; 2799 } 2800 2801 reg_debug_rl("Setting UNII bitmask for 5G: %d", unii_5g_bitmap); 2802 pdev_priv_obj->unii_5g_bitmap = unii_5g_bitmap; 2803 2804 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2805 2806 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2807 2808 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2809 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2810 pdev_priv_obj->cur_chan_list); 2811 } 2812 2813 return QDF_STATUS_SUCCESS; 2814 } 2815 #endif 2816 2817 #ifdef CONFIG_CHAN_FREQ_API 2818 QDF_STATUS reg_get_channel_list_with_power_for_freq(struct wlan_objmgr_pdev 2819 *pdev, 2820 struct channel_power 2821 *ch_list, 2822 uint8_t *num_chan) 2823 { 2824 int i, count; 2825 struct regulatory_channel *reg_channels; 2826 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2827 2828 if (!num_chan || !ch_list) { 2829 reg_err("chan_list or num_ch is NULL"); 2830 return QDF_STATUS_E_FAILURE; 2831 } 2832 2833 pdev_priv_obj = reg_get_pdev_obj(pdev); 2834 2835 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2836 reg_err("reg pdev priv obj is NULL"); 2837 return QDF_STATUS_E_FAILURE; 2838 } 2839 2840 /* set the current channel list */ 2841 reg_channels = pdev_priv_obj->cur_chan_list; 2842 2843 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 2844 if (reg_channels[i].state && 2845 !(reg_channels[i].chan_flags & REGULATORY_CHAN_DISABLED)) { 2846 ch_list[count].center_freq = 2847 reg_channels[i].center_freq; 2848 ch_list[count++].tx_power = 2849 reg_channels[i].tx_power; 2850 } 2851 } 2852 2853 *num_chan = count; 2854 2855 return QDF_STATUS_SUCCESS; 2856 } 2857 2858 enum channel_enum reg_get_chan_enum_for_freq(qdf_freq_t freq) 2859 { 2860 uint32_t count; 2861 2862 for (count = 0; count < NUM_CHANNELS; count++) 2863 if (channel_map[count].center_freq == freq) 2864 return count; 2865 2866 reg_err("invalid channel center frequency %d", freq); 2867 2868 return INVALID_CHANNEL; 2869 } 2870 2871 bool 2872 reg_is_freq_present_in_cur_chan_list(struct wlan_objmgr_pdev *pdev, 2873 qdf_freq_t freq) 2874 { 2875 enum channel_enum chan_enum; 2876 struct regulatory_channel *cur_chan_list; 2877 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2878 2879 pdev_priv_obj = reg_get_pdev_obj(pdev); 2880 2881 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2882 reg_err_rl("pdev reg obj is NULL"); 2883 return false; 2884 } 2885 2886 cur_chan_list = pdev_priv_obj->cur_chan_list; 2887 2888 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) 2889 if (cur_chan_list[chan_enum].center_freq == freq) 2890 if ((cur_chan_list[chan_enum].state != 2891 CHANNEL_STATE_DISABLE) && 2892 !(cur_chan_list[chan_enum].chan_flags & 2893 REGULATORY_CHAN_DISABLED)) 2894 return true; 2895 2896 reg_debug_rl("Channel center frequency %d not found", freq); 2897 2898 return false; 2899 } 2900 2901 enum channel_state reg_get_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2902 qdf_freq_t freq) 2903 { 2904 enum channel_enum ch_idx; 2905 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2906 2907 ch_idx = reg_get_chan_enum_for_freq(freq); 2908 2909 if (ch_idx == INVALID_CHANNEL) 2910 return CHANNEL_STATE_INVALID; 2911 2912 pdev_priv_obj = reg_get_pdev_obj(pdev); 2913 2914 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2915 reg_err("pdev reg obj is NULL"); 2916 return CHANNEL_STATE_INVALID; 2917 } 2918 2919 return pdev_priv_obj->cur_chan_list[ch_idx].state; 2920 } 2921 2922 /** 2923 * reg_get_5g_bonded_chan_array_for_freq()- Return the channel state for a 2924 * 5G or 6G channel frequency based on the bonded channel. 2925 * @pdev: Pointer to pdev. 2926 * @freq: Channel center frequency. 2927 * @bonded_chan_ar: Array of bonded channel frequencies. 2928 * @array_size: Array size. 2929 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2930 * 2931 * Return: Channel State 2932 */ 2933 static enum channel_state 2934 reg_get_5g_bonded_chan_array_for_freq(struct wlan_objmgr_pdev *pdev, 2935 uint16_t freq, 2936 const struct bonded_channel_freq 2937 bonded_chan_ar[], 2938 uint16_t array_size, 2939 const struct bonded_channel_freq 2940 **bonded_chan_ptr_ptr) 2941 { 2942 int i; 2943 uint16_t chan_cfreq; 2944 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2945 enum channel_state chan_state = CHANNEL_STATE_INVALID; 2946 enum channel_state temp_chan_state; 2947 2948 for (i = 0; i < array_size; i++) { 2949 if ((freq >= bonded_chan_ar[i].start_freq) && 2950 (freq <= bonded_chan_ar[i].end_freq)) { 2951 bonded_chan_ptr = &bonded_chan_ar[i]; 2952 break; 2953 } 2954 } 2955 2956 if (!bonded_chan_ptr) 2957 return chan_state; 2958 2959 *bonded_chan_ptr_ptr = bonded_chan_ptr; 2960 chan_cfreq = bonded_chan_ptr->start_freq; 2961 while (chan_cfreq <= bonded_chan_ptr->end_freq) { 2962 temp_chan_state = reg_get_channel_state_for_freq(pdev, 2963 chan_cfreq); 2964 if (temp_chan_state < chan_state) 2965 chan_state = temp_chan_state; 2966 chan_cfreq = chan_cfreq + 20; 2967 } 2968 2969 return chan_state; 2970 } 2971 2972 /** 2973 * reg_get_5g_bonded_channel_for_freq()- Return the channel state for a 2974 * 5G or 6G channel frequency based on the channel width and bonded channel 2975 * @pdev: Pointer to pdev. 2976 * @freq: Channel center frequency. 2977 * @ch_width: Channel Width. 2978 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2979 * 2980 * Return: Channel State 2981 */ 2982 enum channel_state 2983 reg_get_5g_bonded_channel_for_freq(struct wlan_objmgr_pdev *pdev, 2984 uint16_t freq, 2985 enum phy_ch_width ch_width, 2986 const struct bonded_channel_freq 2987 **bonded_chan_ptr_ptr) 2988 2989 { 2990 if (ch_width == CH_WIDTH_80P80MHZ) 2991 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2992 bonded_chan_80mhz_list_freq, 2993 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2994 bonded_chan_ptr_ptr); 2995 else if (ch_width == CH_WIDTH_160MHZ) 2996 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2997 bonded_chan_160mhz_list_freq, 2998 QDF_ARRAY_SIZE(bonded_chan_160mhz_list_freq), 2999 bonded_chan_ptr_ptr); 3000 else if (ch_width == CH_WIDTH_80MHZ) 3001 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 3002 bonded_chan_80mhz_list_freq, 3003 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 3004 bonded_chan_ptr_ptr); 3005 else if (ch_width == CH_WIDTH_40MHZ) 3006 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 3007 bonded_chan_40mhz_list_freq, 3008 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3009 bonded_chan_ptr_ptr); 3010 else 3011 return reg_get_channel_state_for_freq(pdev, freq); 3012 } 3013 3014 enum channel_state 3015 reg_get_5g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3016 qdf_freq_t freq, 3017 enum phy_ch_width bw) 3018 { 3019 enum channel_enum ch_indx; 3020 enum channel_state chan_state; 3021 struct regulatory_channel *reg_channels; 3022 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3023 bool bw_enabled = false; 3024 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3025 3026 if (bw > CH_WIDTH_80P80MHZ) { 3027 reg_err("bw passed is not good"); 3028 return CHANNEL_STATE_INVALID; 3029 } 3030 3031 chan_state = reg_get_5g_bonded_channel_for_freq(pdev, freq, bw, 3032 &bonded_chan_ptr); 3033 3034 if ((chan_state == CHANNEL_STATE_INVALID) || 3035 (chan_state == CHANNEL_STATE_DISABLE)) 3036 return chan_state; 3037 3038 pdev_priv_obj = reg_get_pdev_obj(pdev); 3039 3040 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3041 reg_err("pdev reg obj is NULL"); 3042 return CHANNEL_STATE_INVALID; 3043 } 3044 reg_channels = pdev_priv_obj->cur_chan_list; 3045 3046 ch_indx = reg_get_chan_enum_for_freq(freq); 3047 if (ch_indx == INVALID_CHANNEL) 3048 return CHANNEL_STATE_INVALID; 3049 if (bw == CH_WIDTH_5MHZ) 3050 bw_enabled = true; 3051 else if (bw == CH_WIDTH_10MHZ) 3052 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 3053 (reg_channels[ch_indx].max_bw >= 10); 3054 else if (bw == CH_WIDTH_20MHZ) 3055 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 3056 (reg_channels[ch_indx].max_bw >= 20); 3057 else if (bw == CH_WIDTH_40MHZ) 3058 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 3059 (reg_channels[ch_indx].max_bw >= 40); 3060 else if (bw == CH_WIDTH_80MHZ) 3061 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3062 (reg_channels[ch_indx].max_bw >= 80); 3063 else if (bw == CH_WIDTH_160MHZ) 3064 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 3065 (reg_channels[ch_indx].max_bw >= 160); 3066 else if (bw == CH_WIDTH_80P80MHZ) 3067 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3068 (reg_channels[ch_indx].max_bw >= 80); 3069 3070 if (bw_enabled) 3071 return chan_state; 3072 else 3073 return CHANNEL_STATE_DISABLE; 3074 } 3075 3076 enum channel_state 3077 reg_get_2g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3078 qdf_freq_t oper_ch_freq, 3079 qdf_freq_t sec_ch_freq, 3080 enum phy_ch_width bw) 3081 { 3082 enum channel_enum chan_idx; 3083 enum channel_state chan_state; 3084 struct regulatory_channel *reg_channels; 3085 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3086 bool bw_enabled = false; 3087 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 3088 3089 if (bw > CH_WIDTH_40MHZ) 3090 return CHANNEL_STATE_INVALID; 3091 3092 if (bw == CH_WIDTH_40MHZ) { 3093 if ((sec_ch_freq + 20 != oper_ch_freq) && 3094 (oper_ch_freq + 20 != sec_ch_freq)) 3095 return CHANNEL_STATE_INVALID; 3096 chan_state2 = reg_get_channel_state_for_freq(pdev, sec_ch_freq); 3097 if (chan_state2 == CHANNEL_STATE_INVALID) 3098 return chan_state2; 3099 } 3100 3101 pdev_priv_obj = reg_get_pdev_obj(pdev); 3102 3103 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3104 reg_err("reg pdev priv obj is NULL"); 3105 return CHANNEL_STATE_INVALID; 3106 } 3107 3108 reg_channels = pdev_priv_obj->cur_chan_list; 3109 3110 chan_state = reg_get_channel_state_for_freq(pdev, oper_ch_freq); 3111 if (chan_state2 < chan_state) 3112 chan_state = chan_state2; 3113 3114 if ((chan_state == CHANNEL_STATE_INVALID) || 3115 (chan_state == CHANNEL_STATE_DISABLE)) 3116 return chan_state; 3117 3118 chan_idx = reg_get_chan_enum_for_freq(oper_ch_freq); 3119 if (chan_idx == INVALID_CHANNEL) 3120 return CHANNEL_STATE_INVALID; 3121 if (bw == CH_WIDTH_5MHZ) 3122 bw_enabled = true; 3123 else if (bw == CH_WIDTH_10MHZ) 3124 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 3125 (reg_channels[chan_idx].max_bw >= 10); 3126 else if (bw == CH_WIDTH_20MHZ) 3127 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 3128 (reg_channels[chan_idx].max_bw >= 20); 3129 else if (bw == CH_WIDTH_40MHZ) 3130 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 3131 (reg_channels[chan_idx].max_bw >= 40); 3132 3133 if (bw_enabled) 3134 return chan_state; 3135 else 3136 return CHANNEL_STATE_DISABLE; 3137 3138 return CHANNEL_STATE_ENABLE; 3139 } 3140 3141 /** 3142 * reg_set_5g_channel_params_for_freq()- Set channel parameters like center 3143 * frequency for a bonded channel state. Also return the maximum bandwidth 3144 * supported by the channel. 3145 * @pdev: Pointer to pdev. 3146 * @freq: Channel center frequency. 3147 * ch_params: Pointer to ch_params. 3148 * 3149 * Return: void 3150 */ 3151 static void reg_set_5g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3152 uint16_t freq, 3153 struct ch_params *ch_params) 3154 { 3155 /* 3156 * Set channel parameters like center frequency for a bonded channel 3157 * state. Also return the maximum bandwidth supported by the channel. 3158 */ 3159 3160 enum phy_ch_width next_lower_bw; 3161 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3162 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 3163 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3164 const struct bonded_channel_freq *bonded_chan_ptr2 = NULL; 3165 3166 if (!ch_params) { 3167 reg_err("ch_params is NULL"); 3168 return; 3169 } 3170 3171 if (ch_params->ch_width >= CH_WIDTH_MAX) { 3172 if (ch_params->mhz_freq_seg1 != 0) 3173 ch_params->ch_width = CH_WIDTH_80P80MHZ; 3174 else 3175 ch_params->ch_width = CH_WIDTH_160MHZ; 3176 } 3177 next_lower_bw = ch_params->ch_width; 3178 3179 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3180 ch_params->ch_width = next_lower_bw; 3181 next_lower_bw = get_next_lower_bw[ch_params->ch_width]; 3182 bonded_chan_ptr = NULL; 3183 bonded_chan_ptr2 = NULL; 3184 chan_state = reg_get_5g_bonded_channel_for_freq( 3185 pdev, freq, ch_params->ch_width, 3186 &bonded_chan_ptr); 3187 3188 chan_state = reg_get_5g_bonded_channel_state_for_freq( 3189 pdev, freq, ch_params->ch_width); 3190 3191 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 3192 chan_state2 = reg_get_5g_bonded_channel_state_for_freq( 3193 pdev, ch_params->mhz_freq_seg1 - 3194 NEAREST_20MHZ_CHAN_FREQ_OFFSET, 3195 CH_WIDTH_80MHZ); 3196 3197 chan_state = reg_combine_channel_states( 3198 chan_state, chan_state2); 3199 } 3200 3201 if ((chan_state != CHANNEL_STATE_ENABLE) && 3202 (chan_state != CHANNEL_STATE_DFS)) 3203 continue; 3204 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 3205 ch_params->sec_ch_offset = NO_SEC_CH; 3206 ch_params->mhz_freq_seg0 = freq; 3207 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3208 ch_params->center_freq_seg0 = 3209 (ch_params->mhz_freq_seg0 - 3210 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3211 else 3212 ch_params->center_freq_seg0 = 3213 (ch_params->mhz_freq_seg0 - 3214 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3215 break; 3216 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 3217 reg_get_5g_bonded_chan_array_for_freq( 3218 pdev, freq, bonded_chan_40mhz_list_freq, 3219 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3220 &bonded_chan_ptr2); 3221 if (!bonded_chan_ptr || !bonded_chan_ptr2) 3222 continue; 3223 if (freq == bonded_chan_ptr2->start_freq) 3224 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 3225 else 3226 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 3227 3228 ch_params->mhz_freq_seg0 = 3229 (bonded_chan_ptr->start_freq + 3230 bonded_chan_ptr->end_freq) / 2; 3231 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3232 ch_params->center_freq_seg0 = 3233 (ch_params->mhz_freq_seg0 - 3234 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3235 else 3236 ch_params->center_freq_seg0 = 3237 (ch_params->mhz_freq_seg0 - 3238 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3239 break; 3240 } 3241 } 3242 3243 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 3244 ch_params->mhz_freq_seg1 = ch_params->mhz_freq_seg0; 3245 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg1)) 3246 ch_params->center_freq_seg1 = 3247 (ch_params->mhz_freq_seg1 - SIXG_STARTING_FREQ) / 3248 FREQ_TO_CHAN_SCALE; 3249 else 3250 ch_params->center_freq_seg1 = 3251 (ch_params->mhz_freq_seg1 - FIVEG_STARTING_FREQ) / 3252 FREQ_TO_CHAN_SCALE; 3253 chan_state = reg_get_5g_bonded_channel_for_freq( 3254 pdev, freq, CH_WIDTH_80MHZ, &bonded_chan_ptr); 3255 if (bonded_chan_ptr) { 3256 ch_params->mhz_freq_seg0 = 3257 (bonded_chan_ptr->start_freq + 3258 bonded_chan_ptr->end_freq) / 2; 3259 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3260 ch_params->center_freq_seg0 = 3261 (ch_params->mhz_freq_seg0 - 3262 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3263 else 3264 ch_params->center_freq_seg0 = 3265 (ch_params->mhz_freq_seg0 - 3266 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3267 } 3268 } 3269 3270 /* Overwrite mhz_freq_seg1 to 0 for non 160 and 80+80 width */ 3271 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 3272 ch_params->ch_width == CH_WIDTH_80P80MHZ)) { 3273 ch_params->mhz_freq_seg1 = 0; 3274 ch_params->center_freq_seg1 = 0; 3275 } 3276 } 3277 3278 /** 3279 * reg_set_2g_channel_params_for_freq() - set the 2.4G bonded channel parameters 3280 * @oper_freq: operating channel 3281 * @ch_params: channel parameters 3282 * @sec_ch_2g_freq: 2.4G secondary channel 3283 * 3284 * Return: void 3285 */ 3286 static void reg_set_2g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3287 uint16_t oper_freq, 3288 struct ch_params *ch_params, 3289 uint16_t sec_ch_2g_freq) 3290 { 3291 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3292 3293 if (ch_params->ch_width >= CH_WIDTH_MAX) 3294 ch_params->ch_width = CH_WIDTH_40MHZ; 3295 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g_freq) { 3296 if (oper_freq >= TWOG_CHAN_1_IN_MHZ && oper_freq <= 3297 TWOG_CHAN_5_IN_MHZ) 3298 sec_ch_2g_freq = oper_freq + 20; 3299 else if (oper_freq >= TWOG_CHAN_6_IN_MHZ && oper_freq <= 3300 TWOG_CHAN_13_IN_MHZ) 3301 sec_ch_2g_freq = oper_freq - 20; 3302 } 3303 3304 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3305 chan_state = 3306 reg_get_2g_bonded_channel_state_for_freq(pdev, oper_freq, 3307 sec_ch_2g_freq, 3308 ch_params->ch_width); 3309 if (chan_state == CHANNEL_STATE_ENABLE) { 3310 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 3311 if (oper_freq < sec_ch_2g_freq) 3312 ch_params->sec_ch_offset = 3313 LOW_PRIMARY_CH; 3314 else 3315 ch_params->sec_ch_offset = 3316 HIGH_PRIMARY_CH; 3317 ch_params->mhz_freq_seg0 = 3318 (oper_freq + sec_ch_2g_freq) / 2; 3319 if (ch_params->mhz_freq_seg0 == 3320 TWOG_CHAN_14_IN_MHZ) 3321 ch_params->center_freq_seg0 = 14; 3322 else 3323 ch_params->center_freq_seg0 = 3324 (ch_params->mhz_freq_seg0 - 3325 TWOG_STARTING_FREQ) / 3326 FREQ_TO_CHAN_SCALE; 3327 } else { 3328 ch_params->sec_ch_offset = NO_SEC_CH; 3329 ch_params->mhz_freq_seg0 = oper_freq; 3330 if (ch_params->mhz_freq_seg0 == 3331 TWOG_CHAN_14_IN_MHZ) 3332 ch_params->center_freq_seg0 = 14; 3333 else 3334 ch_params->center_freq_seg0 = 3335 (ch_params->mhz_freq_seg0 - 3336 TWOG_STARTING_FREQ) / 3337 FREQ_TO_CHAN_SCALE; 3338 } 3339 break; 3340 } 3341 3342 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3343 } 3344 /* Overwrite mhz_freq_seg1 and center_freq_seg1 to 0 for 2.4 Ghz */ 3345 ch_params->mhz_freq_seg1 = 0; 3346 ch_params->center_freq_seg1 = 0; 3347 } 3348 3349 void reg_set_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3350 qdf_freq_t freq, 3351 qdf_freq_t sec_ch_2g_freq, 3352 struct ch_params *ch_params) 3353 { 3354 if (reg_is_5ghz_ch_freq(freq) || reg_is_6ghz_chan_freq(freq)) 3355 reg_set_5g_channel_params_for_freq(pdev, freq, ch_params); 3356 else if (reg_is_24ghz_ch_freq(freq)) 3357 reg_set_2g_channel_params_for_freq(pdev, freq, ch_params, 3358 sec_ch_2g_freq); 3359 } 3360 3361 uint8_t reg_get_channel_reg_power_for_freq(struct wlan_objmgr_pdev *pdev, 3362 qdf_freq_t freq) 3363 { 3364 enum channel_enum chan_enum; 3365 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3366 struct regulatory_channel *reg_channels; 3367 3368 chan_enum = reg_get_chan_enum_for_freq(freq); 3369 3370 if (chan_enum == INVALID_CHANNEL) { 3371 reg_err("channel is invalid"); 3372 return QDF_STATUS_E_FAILURE; 3373 } 3374 3375 pdev_priv_obj = reg_get_pdev_obj(pdev); 3376 3377 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3378 reg_err("reg pdev priv obj is NULL"); 3379 return QDF_STATUS_E_FAILURE; 3380 } 3381 3382 reg_channels = pdev_priv_obj->cur_chan_list; 3383 3384 return reg_channels[chan_enum].tx_power; 3385 } 3386 3387 bool reg_is_dfs_for_freq(struct wlan_objmgr_pdev *pdev, qdf_freq_t freq) 3388 { 3389 enum channel_state ch_state; 3390 3391 ch_state = reg_get_channel_state_for_freq(pdev, freq); 3392 3393 return ch_state == CHANNEL_STATE_DFS; 3394 } 3395 3396 void reg_update_nol_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3397 uint16_t *chan_freq_list, 3398 uint8_t num_chan, 3399 bool nol_chan) 3400 { 3401 enum channel_enum chan_enum; 3402 struct regulatory_channel *mas_chan_list; 3403 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3404 struct wlan_objmgr_psoc *psoc; 3405 uint16_t i; 3406 3407 if (!num_chan || !chan_freq_list) { 3408 reg_err("chan_freq_list or num_ch is NULL"); 3409 return; 3410 } 3411 3412 psoc = wlan_pdev_get_psoc(pdev); 3413 3414 pdev_priv_obj = reg_get_pdev_obj(pdev); 3415 if (!pdev_priv_obj) { 3416 reg_err("reg pdev private obj is NULL"); 3417 return; 3418 } 3419 3420 mas_chan_list = pdev_priv_obj->mas_chan_list; 3421 for (i = 0; i < num_chan; i++) { 3422 chan_enum = reg_get_chan_enum_for_freq(chan_freq_list[i]); 3423 if (chan_enum == INVALID_CHANNEL) { 3424 reg_err("Invalid freq in nol list, freq %d", 3425 chan_freq_list[i]); 3426 continue; 3427 } 3428 mas_chan_list[chan_enum].nol_chan = nol_chan; 3429 } 3430 3431 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3432 3433 reg_send_scheduler_msg_sb(psoc, pdev); 3434 } 3435 3436 void reg_update_nol_history_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3437 uint16_t *chan_list, 3438 uint8_t num_chan, 3439 bool nol_history_chan) 3440 { 3441 enum channel_enum chan_enum; 3442 struct regulatory_channel *mas_chan_list; 3443 struct regulatory_channel *cur_chan_list; 3444 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3445 uint16_t i; 3446 3447 if (!num_chan || !chan_list) { 3448 reg_err("chan_list or num_ch is NULL"); 3449 return; 3450 } 3451 3452 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 3453 pdev, WLAN_UMAC_COMP_REGULATORY); 3454 3455 if (!pdev_priv_obj) { 3456 reg_err("reg psoc private obj is NULL"); 3457 return; 3458 } 3459 3460 mas_chan_list = pdev_priv_obj->mas_chan_list; 3461 cur_chan_list = pdev_priv_obj->cur_chan_list; 3462 3463 for (i = 0; i < num_chan; i++) { 3464 chan_enum = reg_get_chan_enum_for_freq(chan_list[i]); 3465 if (chan_enum == INVALID_CHANNEL) { 3466 reg_err("Invalid ch in nol list, chan %d", 3467 chan_list[i]); 3468 continue; 3469 } 3470 mas_chan_list[chan_enum].nol_history = nol_history_chan; 3471 cur_chan_list[chan_enum].nol_history = nol_history_chan; 3472 } 3473 } 3474 3475 static inline bool REG_IS_FREQUENCY_VALID_5G_SBS(qdf_freq_t curfreq, 3476 qdf_freq_t newfreq) 3477 { 3478 return ((curfreq) > (newfreq) ? 3479 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3480 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3481 > REG_SBS_SEPARATION_THRESHOLD : 3482 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3483 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3484 > REG_SBS_SEPARATION_THRESHOLD); 3485 } 3486 3487 bool reg_is_frequency_valid_5g_sbs(qdf_freq_t curfreq, qdf_freq_t newfreq) 3488 { 3489 return REG_IS_FREQUENCY_VALID_5G_SBS(curfreq, newfreq); 3490 } 3491 3492 qdf_freq_t reg_min_chan_freq(void) 3493 { 3494 return channel_map[MIN_24GHZ_CHANNEL].center_freq; 3495 } 3496 3497 qdf_freq_t reg_max_chan_freq(void) 3498 { 3499 return channel_map[NUM_CHANNELS - 1].center_freq; 3500 } 3501 3502 bool reg_is_same_band_freqs(qdf_freq_t freq1, qdf_freq_t freq2) 3503 { 3504 return (freq1 && freq2 && ((REG_IS_6GHZ_FREQ(freq1) && 3505 REG_IS_6GHZ_FREQ(freq2)) || 3506 (REG_IS_5GHZ_FREQ(freq1) && 3507 REG_IS_5GHZ_FREQ(freq2)) || 3508 (REG_IS_24GHZ_CH_FREQ(freq1) && 3509 REG_IS_24GHZ_CH_FREQ(freq2)))); 3510 } 3511 3512 enum reg_wifi_band reg_freq_to_band(qdf_freq_t freq) 3513 { 3514 if (REG_IS_24GHZ_CH_FREQ(freq)) 3515 return REG_BAND_2G; 3516 else if (REG_IS_5GHZ_FREQ(freq) || REG_IS_49GHZ_FREQ(freq)) 3517 return REG_BAND_5G; 3518 else if (REG_IS_6GHZ_FREQ(freq)) 3519 return REG_BAND_6G; 3520 return REG_BAND_UNKNOWN; 3521 } 3522 3523 #endif /* CONFIG_CHAN_FREQ_API */ 3524 3525 uint8_t reg_get_max_tx_power(struct wlan_objmgr_pdev *pdev) 3526 { 3527 struct regulatory_channel *cur_chan_list; 3528 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3529 uint8_t i, max_tx_power = 0; 3530 3531 pdev_priv_obj = reg_get_pdev_obj(pdev); 3532 3533 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3534 reg_err("reg pdev private obj is NULL"); 3535 return QDF_STATUS_E_FAILURE; 3536 } 3537 3538 cur_chan_list = pdev_priv_obj->cur_chan_list; 3539 3540 for (i = 0; i < NUM_CHANNELS; i++) { 3541 if (cur_chan_list[i].state != CHANNEL_STATE_DISABLE && 3542 cur_chan_list[i].chan_flags != REGULATORY_CHAN_DISABLED) { 3543 if (cur_chan_list[i].tx_power > max_tx_power) 3544 max_tx_power = cur_chan_list[i].tx_power; 3545 } 3546 } 3547 3548 if (!max_tx_power) 3549 reg_err_rl("max_tx_power is zero"); 3550 3551 return max_tx_power; 3552 } 3553 3554 QDF_STATUS reg_set_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3555 { 3556 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3557 3558 psoc_reg = reg_get_psoc_obj(psoc); 3559 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) { 3560 reg_err("psoc reg component is NULL"); 3561 return QDF_STATUS_E_INVAL; 3562 } 3563 3564 psoc_reg->ignore_fw_reg_offload_ind = true; 3565 return QDF_STATUS_SUCCESS; 3566 } 3567 3568 bool reg_get_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3569 { 3570 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3571 3572 psoc_reg = reg_get_psoc_obj(psoc); 3573 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) 3574 return false; 3575 3576 return psoc_reg->ignore_fw_reg_offload_ind; 3577 } 3578 3579 QDF_STATUS reg_set_6ghz_supported(struct wlan_objmgr_psoc *psoc, bool val) 3580 { 3581 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3582 3583 psoc_priv_obj = reg_get_psoc_obj(psoc); 3584 3585 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3586 reg_err("psoc reg component is NULL"); 3587 return QDF_STATUS_E_FAILURE; 3588 } 3589 3590 psoc_priv_obj->six_ghz_supported = val; 3591 3592 return QDF_STATUS_SUCCESS; 3593 } 3594 3595 bool reg_is_6ghz_op_class(struct wlan_objmgr_pdev *pdev, uint8_t op_class) 3596 { 3597 return ((op_class >= MIN_6GHZ_OPER_CLASS) && 3598 (op_class <= MAX_6GHZ_OPER_CLASS)); 3599 } 3600 3601 bool reg_is_6ghz_supported(struct wlan_objmgr_pdev *pdev) 3602 { 3603 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3604 struct wlan_objmgr_psoc *psoc; 3605 3606 psoc = wlan_pdev_get_psoc(pdev); 3607 if (!psoc) { 3608 reg_err_rl("psoc is NULL"); 3609 return false; 3610 } 3611 3612 psoc_priv_obj = reg_get_psoc_obj(psoc); 3613 3614 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3615 reg_err("psoc reg component is NULL"); 3616 return false; 3617 } 3618 3619 return psoc_priv_obj->six_ghz_supported; 3620 } 3621 3622 #ifdef DISABLE_UNII_SHARED_BANDS 3623 QDF_STATUS 3624 reg_get_unii_5g_bitmap(struct wlan_objmgr_pdev *pdev, uint8_t *bitmap) 3625 { 3626 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3627 3628 pdev_priv_obj = reg_get_pdev_obj(pdev); 3629 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3630 reg_err_rl("pdev reg component is NULL"); 3631 return QDF_STATUS_E_FAILURE; 3632 } 3633 *bitmap = pdev_priv_obj->unii_5g_bitmap; 3634 3635 return QDF_STATUS_SUCCESS; 3636 } 3637 #endif 3638