1 /* 2 * Copyright (c) 2014-2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 38 const struct chan_map *channel_map; 39 40 static const struct bonded_channel bonded_chan_40mhz_list[] = { 41 {36, 40}, 42 {44, 48}, 43 {52, 56}, 44 {60, 64}, 45 {100, 104}, 46 {108, 112}, 47 {116, 120}, 48 {124, 128}, 49 {132, 136}, 50 {140, 144}, 51 {149, 153}, 52 {157, 161}, 53 {165, 169} 54 }; 55 56 static const struct bonded_channel bonded_chan_80mhz_list[] = { 57 {36, 48}, 58 {52, 64}, 59 {100, 112}, 60 {116, 128}, 61 {132, 144}, 62 {149, 161} 63 }; 64 65 static const struct bonded_channel bonded_chan_160mhz_list[] = { 66 {36, 64}, 67 {100, 128} 68 }; 69 70 static const enum phy_ch_width get_next_lower_bw[] = { 71 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 72 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 73 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 74 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 75 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 76 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 77 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 78 }; 79 80 #ifdef CONFIG_LEGACY_CHAN_ENUM 81 static const struct chan_map channel_map_old[NUM_CHANNELS] = { 82 [CHAN_ENUM_1] = {2412, 1, 2, 40}, 83 [CHAN_ENUM_2] = {2417, 2, 2, 40}, 84 [CHAN_ENUM_3] = {2422, 3, 2, 40}, 85 [CHAN_ENUM_4] = {2427, 4, 2, 40}, 86 [CHAN_ENUM_5] = {2432, 5, 2, 40}, 87 [CHAN_ENUM_6] = {2437, 6, 2, 40}, 88 [CHAN_ENUM_7] = {2442, 7, 2, 40}, 89 [CHAN_ENUM_8] = {2447, 8, 2, 40}, 90 [CHAN_ENUM_9] = {2452, 9, 2, 40}, 91 [CHAN_ENUM_10] = {2457, 10, 2, 40}, 92 [CHAN_ENUM_11] = {2462, 11, 2, 40}, 93 [CHAN_ENUM_12] = {2467, 12, 2, 40}, 94 [CHAN_ENUM_13] = {2472, 13, 2, 40}, 95 [CHAN_ENUM_14] = {2484, 14, 2, 40}, 96 97 [CHAN_ENUM_36] = {5180, 36, 2, 160}, 98 [CHAN_ENUM_40] = {5200, 40, 2, 160}, 99 [CHAN_ENUM_44] = {5220, 44, 2, 160}, 100 [CHAN_ENUM_48] = {5240, 48, 2, 160}, 101 [CHAN_ENUM_52] = {5260, 52, 2, 160}, 102 [CHAN_ENUM_56] = {5280, 56, 2, 160}, 103 [CHAN_ENUM_60] = {5300, 60, 2, 160}, 104 [CHAN_ENUM_64] = {5320, 64, 2, 160}, 105 106 [CHAN_ENUM_100] = {5500, 100, 2, 160}, 107 [CHAN_ENUM_104] = {5520, 104, 2, 160}, 108 [CHAN_ENUM_108] = {5540, 108, 2, 160}, 109 [CHAN_ENUM_112] = {5560, 112, 2, 160}, 110 [CHAN_ENUM_116] = {5580, 116, 2, 160}, 111 [CHAN_ENUM_120] = {5600, 120, 2, 160}, 112 [CHAN_ENUM_124] = {5620, 124, 2, 160}, 113 [CHAN_ENUM_128] = {5640, 128, 2, 160}, 114 [CHAN_ENUM_132] = {5660, 132, 2, 160}, 115 [CHAN_ENUM_136] = {5680, 136, 2, 160}, 116 [CHAN_ENUM_140] = {5700, 140, 2, 160}, 117 [CHAN_ENUM_144] = {5720, 144, 2, 160}, 118 119 [CHAN_ENUM_149] = {5745, 149, 2, 160}, 120 [CHAN_ENUM_153] = {5765, 153, 2, 160}, 121 [CHAN_ENUM_157] = {5785, 157, 2, 160}, 122 [CHAN_ENUM_161] = {5805, 161, 2, 160}, 123 [CHAN_ENUM_165] = {5825, 165, 2, 160}, 124 #ifndef WLAN_FEATURE_DSRC 125 [CHAN_ENUM_169] = {5845, 169, 2, 40}, 126 [CHAN_ENUM_173] = {5865, 173, 2, 20}, 127 #else 128 [CHAN_ENUM_170] = {5852, 170, 2, 20}, 129 [CHAN_ENUM_171] = {5855, 171, 2, 20}, 130 [CHAN_ENUM_172] = {5860, 172, 2, 20}, 131 [CHAN_ENUM_173] = {5865, 173, 2, 20}, 132 [CHAN_ENUM_174] = {5870, 174, 2, 20}, 133 [CHAN_ENUM_175] = {5875, 175, 2, 20}, 134 [CHAN_ENUM_176] = {5880, 176, 2, 20}, 135 [CHAN_ENUM_177] = {5885, 177, 2, 20}, 136 [CHAN_ENUM_178] = {5890, 178, 2, 20}, 137 [CHAN_ENUM_179] = {5895, 179, 2, 20}, 138 [CHAN_ENUM_180] = {5900, 180, 2, 20}, 139 [CHAN_ENUM_181] = {5905, 181, 2, 20}, 140 [CHAN_ENUM_182] = {5910, 182, 2, 20}, 141 [CHAN_ENUM_183] = {5915, 183, 2, 20}, 142 [CHAN_ENUM_184] = {5920, 184, 2, 20}, 143 #endif 144 }; 145 146 #else 147 static const struct chan_map channel_map_us[NUM_CHANNELS] = { 148 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 149 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 150 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 151 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 152 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 153 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 154 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 155 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 156 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 157 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 158 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 159 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 160 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 161 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 162 163 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 164 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 165 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 166 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 167 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 168 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 169 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 170 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 171 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 172 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 173 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 174 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 175 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 176 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 177 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 178 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 179 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 180 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 181 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 182 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 183 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 184 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 185 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 186 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 187 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 188 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 189 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 190 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 191 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 192 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 193 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 200 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 201 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 202 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 203 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 204 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 205 206 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 207 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 208 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 209 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 210 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 211 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 212 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 213 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 214 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 215 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 216 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 217 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 218 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 219 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 220 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 221 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 222 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 223 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 224 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 225 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 226 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 227 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 228 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 229 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 230 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 231 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 232 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 233 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 234 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 235 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 236 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 237 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 238 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 239 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 240 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 241 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 242 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 243 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 244 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 245 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 246 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 247 }; 248 249 static const struct chan_map channel_map_eu[NUM_CHANNELS] = { 250 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 251 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 252 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 253 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 254 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 255 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 256 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 257 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 258 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 259 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 260 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 261 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 262 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 263 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 264 265 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 266 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 267 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 268 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 269 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 270 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 271 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 272 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 273 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 274 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 275 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 276 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 277 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 278 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 279 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 280 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 281 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 282 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 283 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 284 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 285 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 286 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 287 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 288 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 289 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 290 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 291 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 292 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 293 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 294 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 295 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 296 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 297 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 298 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 299 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 300 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 301 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 302 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 303 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 304 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 305 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 306 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 307 308 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 309 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 310 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 311 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 312 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 313 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 314 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 315 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 316 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 317 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 318 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 319 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 320 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 321 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 322 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 323 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 324 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 325 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 326 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 327 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 328 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 329 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 330 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 331 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 332 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 333 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 334 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 335 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 336 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 337 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 338 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 339 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 340 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 341 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 342 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 343 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 344 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 345 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 346 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 347 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 348 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 349 }; 350 351 static const struct chan_map channel_map_jp[NUM_CHANNELS] = { 352 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 353 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 354 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 355 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 356 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 357 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 358 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 359 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 360 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 361 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 362 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 363 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 364 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 365 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 366 367 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 368 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 369 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 370 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 371 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 372 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 373 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 374 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 375 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 376 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 377 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 378 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 379 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 380 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 381 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 386 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 393 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 394 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 395 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 396 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 397 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 398 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 399 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 400 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 401 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 402 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 403 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 404 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 405 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 406 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 407 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 408 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 409 410 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 411 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 412 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 413 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 414 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 415 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 416 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 417 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 418 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 419 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 420 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 421 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 422 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 423 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 424 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 425 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 426 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 427 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 428 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 429 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 430 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 431 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 432 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 433 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 434 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 435 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 436 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 437 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 438 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 439 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 440 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 441 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 442 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 443 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 444 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 445 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 446 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 447 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 448 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 449 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 450 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 451 }; 452 453 static const struct chan_map channel_map_global[NUM_CHANNELS] = { 454 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 455 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 456 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 457 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 458 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 459 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 460 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 461 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 462 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 463 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 464 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 465 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 466 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 467 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 468 469 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 470 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 471 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 472 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 473 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 474 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 475 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 476 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 477 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 478 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 479 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 480 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 481 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 482 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 483 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 484 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 485 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 486 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 487 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 488 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 489 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 490 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 491 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 492 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 493 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 494 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 495 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 496 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 497 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 498 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 499 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 500 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 501 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 502 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 503 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 504 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 505 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 506 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 507 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 508 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 509 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 510 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 511 512 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 513 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 514 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 515 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 516 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 517 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 518 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 519 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 520 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 521 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 522 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 523 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 524 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 525 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 526 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 527 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 528 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 529 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 530 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 531 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 532 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 533 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 534 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 535 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 536 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 537 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 538 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 539 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 540 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 541 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 542 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 543 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 544 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 545 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 546 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 547 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 548 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 549 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 550 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 551 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 552 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 553 }; 554 555 static const struct chan_map channel_map_china[NUM_CHANNELS] = { 556 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 557 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 558 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 559 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 560 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 561 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 562 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 563 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 564 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 565 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 566 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 567 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 568 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 569 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 570 571 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 572 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 573 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 574 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 575 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 576 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 577 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 578 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 579 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 580 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 581 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 582 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 583 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 584 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 585 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 586 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 587 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 588 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 589 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 590 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 591 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 592 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 593 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 594 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 595 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 596 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 597 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 598 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 599 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 600 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 601 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 602 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 603 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 604 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 605 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 606 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 607 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 608 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 609 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 610 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 611 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 612 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 613 614 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 615 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 616 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 617 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 618 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 619 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 620 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 621 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 622 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 623 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 624 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 625 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 626 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 627 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 628 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 629 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 630 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 631 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 632 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 633 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 634 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 635 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 636 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 637 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 638 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 639 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 640 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 641 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 642 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 643 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 644 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 645 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 646 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 647 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 648 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 649 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 650 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 651 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 652 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 653 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 654 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 655 }; 656 #endif 657 658 #ifdef CONFIG_LEGACY_CHAN_ENUM 659 void reg_init_channel_map(enum dfs_reg dfs_region) 660 { 661 channel_map = channel_map_old; 662 } 663 #else 664 void reg_init_channel_map(enum dfs_reg dfs_region) 665 { 666 switch (dfs_region) { 667 case DFS_UNINIT_REGION: 668 case DFS_UNDEF_REGION: 669 channel_map = channel_map_global; 670 break; 671 case DFS_FCC_REGION: 672 channel_map = channel_map_us; 673 break; 674 case DFS_ETSI_REGION: 675 channel_map = channel_map_eu; 676 break; 677 case DFS_MKK_REGION: 678 channel_map = channel_map_jp; 679 break; 680 case DFS_CN_REGION: 681 channel_map = channel_map_china; 682 break; 683 case DFS_KR_REGION: 684 channel_map = channel_map_eu; 685 break; 686 } 687 } 688 #endif 689 690 uint16_t reg_get_bw_value(enum phy_ch_width bw) 691 { 692 switch (bw) { 693 case CH_WIDTH_20MHZ: 694 return 20; 695 case CH_WIDTH_40MHZ: 696 return 40; 697 case CH_WIDTH_80MHZ: 698 return 80; 699 case CH_WIDTH_160MHZ: 700 return 160; 701 case CH_WIDTH_80P80MHZ: 702 return 160; 703 case CH_WIDTH_INVALID: 704 return 0; 705 case CH_WIDTH_5MHZ: 706 return 5; 707 case CH_WIDTH_10MHZ: 708 return 10; 709 case CH_WIDTH_MAX: 710 return 160; 711 default: 712 return 0; 713 } 714 } 715 716 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 717 struct wlan_objmgr_psoc *psoc) 718 { 719 return &((psoc->soc_cb.tx_ops.reg_ops)); 720 } 721 722 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 723 struct channel_power *ch_list, 724 uint8_t *num_chan) 725 { 726 int i, count; 727 struct regulatory_channel *reg_channels; 728 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 729 730 if (!num_chan || !ch_list) { 731 reg_err("chan_list or num_ch is NULL"); 732 return QDF_STATUS_E_FAILURE; 733 } 734 735 pdev_priv_obj = reg_get_pdev_obj(pdev); 736 737 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 738 reg_err("reg pdev priv obj is NULL"); 739 return QDF_STATUS_E_FAILURE; 740 } 741 742 /* set the current channel list */ 743 reg_channels = pdev_priv_obj->cur_chan_list; 744 745 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 746 if (reg_channels[i].state && 747 reg_channels[i].state != REGULATORY_CHAN_DISABLED) { 748 ch_list[count].chan_num = 749 reg_channels[i].chan_num; 750 ch_list[count++].tx_power = 751 reg_channels[i].tx_power; 752 } 753 } 754 755 *num_chan = count; 756 757 return QDF_STATUS_SUCCESS; 758 } 759 760 enum channel_enum reg_get_chan_enum(uint32_t chan_num) 761 { 762 uint32_t count; 763 764 for (count = 0; count < NUM_CHANNELS; count++) 765 if (channel_map[count].chan_num == chan_num) 766 return count; 767 768 reg_err("invalid channel number %d", chan_num); 769 770 return INVALID_CHANNEL; 771 } 772 773 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 774 uint32_t ch) 775 { 776 enum channel_enum ch_idx; 777 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 778 779 ch_idx = reg_get_chan_enum(ch); 780 781 if (ch_idx == INVALID_CHANNEL) 782 return CHANNEL_STATE_INVALID; 783 784 pdev_priv_obj = reg_get_pdev_obj(pdev); 785 786 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 787 reg_err("pdev reg obj is NULL"); 788 return CHANNEL_STATE_INVALID; 789 } 790 791 return pdev_priv_obj->cur_chan_list[ch_idx].state; 792 } 793 794 /** 795 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 796 * @pdev: Pointer to pdev structure 797 * @oper_ch: operating channel number 798 * @bonded_chan_ar: bonded channel array 799 * @array_size; Array size 800 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 801 * 802 * Return: bonded channel state 803 */ 804 static enum channel_state reg_get_5g_bonded_chan_array( 805 struct wlan_objmgr_pdev *pdev, 806 uint32_t oper_chan, 807 const struct bonded_channel bonded_chan_ar[], 808 uint16_t array_size, 809 const struct bonded_channel **bonded_chan_ptr_ptr) 810 { 811 int i; 812 uint8_t chan_num; 813 const struct bonded_channel *bonded_chan_ptr = NULL; 814 enum channel_state chan_state = CHANNEL_STATE_INVALID; 815 enum channel_state temp_chan_state; 816 817 for (i = 0; i < array_size; i++) { 818 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 819 (oper_chan <= bonded_chan_ar[i].end_ch)) { 820 bonded_chan_ptr = &bonded_chan_ar[i]; 821 break; 822 } 823 } 824 825 if (!bonded_chan_ptr) 826 return chan_state; 827 828 *bonded_chan_ptr_ptr = bonded_chan_ptr; 829 chan_num = bonded_chan_ptr->start_ch; 830 while (chan_num <= bonded_chan_ptr->end_ch) { 831 temp_chan_state = reg_get_channel_state(pdev, chan_num); 832 if (temp_chan_state < chan_state) 833 chan_state = temp_chan_state; 834 chan_num = chan_num + 4; 835 } 836 837 return chan_state; 838 } 839 840 /** 841 * reg_get_5g_bonded_channel() - get the 5G bonded channel state 842 * @pdev: Pointer to pdev structure 843 * @chan_num: channel number 844 * @ch_width: channel width 845 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 846 * 847 * Return: channel state 848 */ 849 static enum channel_state reg_get_5g_bonded_channel( 850 struct wlan_objmgr_pdev *pdev, uint32_t chan_num, 851 enum phy_ch_width ch_width, 852 const struct bonded_channel **bonded_chan_ptr_ptr) 853 { 854 if (ch_width == CH_WIDTH_80P80MHZ) 855 return reg_get_5g_bonded_chan_array(pdev, chan_num, 856 bonded_chan_80mhz_list, 857 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 858 bonded_chan_ptr_ptr); 859 else if (ch_width == CH_WIDTH_160MHZ) 860 return reg_get_5g_bonded_chan_array(pdev, chan_num, 861 bonded_chan_160mhz_list, 862 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 863 bonded_chan_ptr_ptr); 864 else if (ch_width == CH_WIDTH_80MHZ) 865 return reg_get_5g_bonded_chan_array(pdev, chan_num, 866 bonded_chan_80mhz_list, 867 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 868 bonded_chan_ptr_ptr); 869 else if (ch_width == CH_WIDTH_40MHZ) 870 return reg_get_5g_bonded_chan_array(pdev, chan_num, 871 bonded_chan_40mhz_list, 872 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 873 bonded_chan_ptr_ptr); 874 else 875 return reg_get_channel_state(pdev, chan_num); 876 } 877 878 enum channel_state reg_get_5g_bonded_channel_state( 879 struct wlan_objmgr_pdev *pdev, 880 uint8_t ch, enum phy_ch_width bw) 881 { 882 enum channel_enum ch_indx; 883 enum channel_state chan_state; 884 struct regulatory_channel *reg_channels; 885 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 886 bool bw_enabled = false; 887 const struct bonded_channel *bonded_chan_ptr = NULL; 888 889 if (bw > CH_WIDTH_80P80MHZ) { 890 reg_err("bw passed is not good"); 891 return CHANNEL_STATE_INVALID; 892 } 893 894 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 895 896 if ((chan_state == CHANNEL_STATE_INVALID) || 897 (chan_state == CHANNEL_STATE_DISABLE)) 898 return chan_state; 899 900 pdev_priv_obj = reg_get_pdev_obj(pdev); 901 902 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 903 reg_err("pdev reg obj is NULL"); 904 return CHANNEL_STATE_INVALID; 905 } 906 reg_channels = pdev_priv_obj->cur_chan_list; 907 908 ch_indx = reg_get_chan_enum(ch); 909 if (ch_indx == INVALID_CHANNEL) 910 return CHANNEL_STATE_INVALID; 911 if (bw == CH_WIDTH_5MHZ) 912 bw_enabled = true; 913 else if (bw == CH_WIDTH_10MHZ) 914 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 915 (reg_channels[ch_indx].max_bw >= 10); 916 else if (bw == CH_WIDTH_20MHZ) 917 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 918 (reg_channels[ch_indx].max_bw >= 20); 919 else if (bw == CH_WIDTH_40MHZ) 920 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 921 (reg_channels[ch_indx].max_bw >= 40); 922 else if (bw == CH_WIDTH_80MHZ) 923 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 924 (reg_channels[ch_indx].max_bw >= 80); 925 else if (bw == CH_WIDTH_160MHZ) 926 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 927 (reg_channels[ch_indx].max_bw >= 160); 928 else if (bw == CH_WIDTH_80P80MHZ) 929 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 930 (reg_channels[ch_indx].max_bw >= 80); 931 932 if (bw_enabled) 933 return chan_state; 934 else 935 return CHANNEL_STATE_DISABLE; 936 } 937 938 enum channel_state reg_get_2g_bonded_channel_state( 939 struct wlan_objmgr_pdev *pdev, 940 uint8_t oper_ch, uint8_t sec_ch, 941 enum phy_ch_width bw) 942 { 943 enum channel_enum chan_idx; 944 enum channel_state chan_state; 945 struct regulatory_channel *reg_channels; 946 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 947 bool bw_enabled = false; 948 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 949 950 if (bw > CH_WIDTH_40MHZ) 951 return CHANNEL_STATE_INVALID; 952 953 if (bw == CH_WIDTH_40MHZ) { 954 if ((sec_ch + 4 != oper_ch) && 955 (oper_ch + 4 != sec_ch)) 956 return CHANNEL_STATE_INVALID; 957 chan_state2 = reg_get_channel_state(pdev, sec_ch); 958 if (chan_state2 == CHANNEL_STATE_INVALID) 959 return chan_state2; 960 } 961 962 pdev_priv_obj = reg_get_pdev_obj(pdev); 963 964 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 965 reg_err("reg pdev priv obj is NULL"); 966 return CHANNEL_STATE_INVALID; 967 } 968 969 reg_channels = pdev_priv_obj->cur_chan_list; 970 971 chan_state = reg_get_channel_state(pdev, oper_ch); 972 if (chan_state2 < chan_state) 973 chan_state = chan_state2; 974 975 if ((chan_state == CHANNEL_STATE_INVALID) || 976 (chan_state == CHANNEL_STATE_DISABLE)) 977 return chan_state; 978 979 chan_idx = reg_get_chan_enum(oper_ch); 980 if (chan_idx == INVALID_CHANNEL) 981 return CHANNEL_STATE_INVALID; 982 if (bw == CH_WIDTH_5MHZ) 983 bw_enabled = true; 984 else if (bw == CH_WIDTH_10MHZ) 985 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 986 (reg_channels[chan_idx].max_bw >= 10); 987 else if (bw == CH_WIDTH_20MHZ) 988 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 989 (reg_channels[chan_idx].max_bw >= 20); 990 else if (bw == CH_WIDTH_40MHZ) 991 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 992 (reg_channels[chan_idx].max_bw >= 40); 993 994 if (bw_enabled) 995 return chan_state; 996 else 997 return CHANNEL_STATE_DISABLE; 998 999 return CHANNEL_STATE_ENABLE; 1000 } 1001 1002 /** 1003 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1004 * @chan_state1: Channel state1 1005 * @chan_state2: Channel state2 1006 * 1007 * Return: Channel state 1008 */ 1009 static enum channel_state reg_combine_channel_states( 1010 enum channel_state chan_state1, 1011 enum channel_state chan_state2) 1012 { 1013 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1014 (chan_state2 == CHANNEL_STATE_INVALID)) 1015 return CHANNEL_STATE_INVALID; 1016 else 1017 return min(chan_state1, chan_state2); 1018 } 1019 1020 /** 1021 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1022 * @ch: channel number. 1023 * @ch_params: pointer to the channel parameters. 1024 * 1025 * Return: None 1026 */ 1027 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1028 uint8_t ch, 1029 struct ch_params *ch_params) 1030 { 1031 /* 1032 * Set channel parameters like center frequency for a bonded channel 1033 * state. Also return the maximum bandwidth supported by the channel. 1034 */ 1035 1036 enum phy_ch_width next_lower_bw; 1037 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1038 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1039 const struct bonded_channel *bonded_chan_ptr = NULL; 1040 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1041 1042 if (!ch_params) { 1043 reg_err("ch_params is NULL"); 1044 return; 1045 } 1046 1047 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1048 if (ch_params->center_freq_seg1 != 0) 1049 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1050 else 1051 ch_params->ch_width = CH_WIDTH_160MHZ; 1052 } 1053 next_lower_bw = ch_params->ch_width; 1054 1055 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1056 ch_params->ch_width = next_lower_bw; 1057 next_lower_bw = get_next_lower_bw[ch_params->ch_width]; 1058 bonded_chan_ptr = NULL; 1059 bonded_chan_ptr2 = NULL; 1060 chan_state = reg_get_5g_bonded_channel( 1061 pdev, ch, ch_params->ch_width, 1062 &bonded_chan_ptr); 1063 1064 chan_state = reg_get_5g_bonded_channel_state( 1065 pdev, ch, ch_params->ch_width); 1066 1067 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1068 chan_state2 = reg_get_5g_bonded_channel_state( 1069 pdev, ch_params->center_freq_seg1 - 2, 1070 CH_WIDTH_80MHZ); 1071 1072 chan_state = reg_combine_channel_states( 1073 chan_state, chan_state2); 1074 } 1075 1076 if ((chan_state != CHANNEL_STATE_ENABLE) && 1077 (chan_state != CHANNEL_STATE_DFS)) 1078 continue; 1079 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1080 ch_params->sec_ch_offset = NO_SEC_CH; 1081 ch_params->center_freq_seg0 = ch; 1082 break; 1083 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1084 reg_get_5g_bonded_chan_array( 1085 pdev, ch, bonded_chan_40mhz_list, 1086 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1087 &bonded_chan_ptr2); 1088 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1089 continue; 1090 if (ch == bonded_chan_ptr2->start_ch) 1091 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1092 else 1093 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1094 1095 ch_params->center_freq_seg0 = 1096 (bonded_chan_ptr->start_ch + 1097 bonded_chan_ptr->end_ch) / 2; 1098 break; 1099 } 1100 } 1101 1102 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1103 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1104 chan_state = reg_get_5g_bonded_channel( 1105 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1106 if (bonded_chan_ptr) 1107 ch_params->center_freq_seg0 = 1108 (bonded_chan_ptr->start_ch + 1109 bonded_chan_ptr->end_ch) / 2; 1110 } 1111 1112 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1113 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1114 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1115 ch_params->center_freq_seg1 = 0; 1116 1117 reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1118 ch_params->ch_width, ch_params->center_freq_seg0, 1119 ch_params->center_freq_seg1); 1120 } 1121 1122 /** 1123 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1124 * @oper_ch: operating channel 1125 * @ch_params: channel parameters 1126 * @sec_ch_2g: 2.4G secondary channel 1127 * 1128 * Return: void 1129 */ 1130 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1131 uint16_t oper_ch, 1132 struct ch_params *ch_params, 1133 uint16_t sec_ch_2g) 1134 { 1135 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1136 1137 if (ch_params->ch_width >= CH_WIDTH_MAX) 1138 ch_params->ch_width = CH_WIDTH_40MHZ; 1139 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1140 if (oper_ch >= 1 && oper_ch <= 5) 1141 sec_ch_2g = oper_ch + 4; 1142 else if (oper_ch >= 6 && oper_ch <= 13) 1143 sec_ch_2g = oper_ch - 4; 1144 } 1145 1146 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1147 chan_state = reg_get_2g_bonded_channel_state( 1148 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1149 if (chan_state == CHANNEL_STATE_ENABLE) { 1150 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1151 if (oper_ch < sec_ch_2g) 1152 ch_params->sec_ch_offset = 1153 LOW_PRIMARY_CH; 1154 else 1155 ch_params->sec_ch_offset = 1156 HIGH_PRIMARY_CH; 1157 ch_params->center_freq_seg0 = 1158 (oper_ch + sec_ch_2g) / 2; 1159 } else { 1160 ch_params->sec_ch_offset = NO_SEC_CH; 1161 ch_params->center_freq_seg0 = oper_ch; 1162 } 1163 break; 1164 } 1165 1166 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1167 } 1168 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1169 ch_params->center_freq_seg1 = 0; 1170 } 1171 1172 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1173 uint8_t ch, uint8_t sec_ch_2g, 1174 struct ch_params *ch_params) 1175 { 1176 if (REG_IS_5GHZ_CH(ch)) 1177 reg_set_5g_channel_params(pdev, ch, ch_params); 1178 else if (REG_IS_24GHZ_CH(ch)) 1179 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1180 } 1181 1182 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1183 enum band_info *band) 1184 { 1185 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1186 1187 pdev_reg = reg_get_pdev_obj(pdev); 1188 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1189 reg_err("pdev reg component is NULL"); 1190 return QDF_STATUS_E_INVAL; 1191 } 1192 1193 *band = pdev_reg->band_capability; 1194 1195 return QDF_STATUS_SUCCESS; 1196 } 1197 1198 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1199 uint8_t *country_code) 1200 { 1201 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1202 1203 if (!country_code) { 1204 reg_err("country_code is NULL"); 1205 return QDF_STATUS_E_INVAL; 1206 } 1207 1208 psoc_priv_obj = reg_get_psoc_obj(psoc); 1209 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1210 reg_err("psoc reg component is NULL"); 1211 return QDF_STATUS_E_INVAL; 1212 } 1213 1214 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1215 REG_ALPHA2_LEN + 1); 1216 1217 return QDF_STATUS_SUCCESS; 1218 } 1219 1220 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1221 enum dfs_reg *dfs_reg) 1222 { 1223 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1224 1225 pdev_priv_obj = reg_get_pdev_obj(pdev); 1226 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1227 reg_err("reg component pdev priv is NULL"); 1228 return; 1229 } 1230 1231 *dfs_reg = pdev_priv_obj->dfs_region; 1232 } 1233 1234 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1235 enum dfs_reg dfs_reg) 1236 { 1237 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1238 1239 pdev_priv_obj = reg_get_pdev_obj(pdev); 1240 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1241 reg_err("psoc reg component is NULL"); 1242 return; 1243 } 1244 1245 pdev_priv_obj->dfs_region = dfs_reg; 1246 1247 reg_init_channel_map(dfs_reg); 1248 } 1249 1250 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1251 uint32_t chan_num) 1252 { 1253 enum channel_enum chan_enum; 1254 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1255 struct regulatory_channel *reg_channels; 1256 1257 chan_enum = reg_get_chan_enum(chan_num); 1258 1259 if (chan_enum == INVALID_CHANNEL) { 1260 reg_err("channel is invalid"); 1261 return QDF_STATUS_E_FAILURE; 1262 } 1263 1264 pdev_priv_obj = reg_get_pdev_obj(pdev); 1265 1266 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1267 reg_err("reg pdev priv obj is NULL"); 1268 return QDF_STATUS_E_FAILURE; 1269 } 1270 1271 reg_channels = pdev_priv_obj->cur_chan_list; 1272 1273 return reg_channels[chan_enum].tx_power; 1274 } 1275 1276 uint32_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1277 uint32_t chan_num) 1278 { 1279 enum channel_enum chan_enum; 1280 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1281 struct regulatory_channel *reg_channels; 1282 1283 chan_enum = reg_get_chan_enum(chan_num); 1284 1285 if (chan_enum == INVALID_CHANNEL) 1286 return CHANNEL_STATE_INVALID; 1287 1288 pdev_priv_obj = reg_get_pdev_obj(pdev); 1289 1290 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1291 reg_err("reg pdev priv obj is NULL"); 1292 return QDF_STATUS_E_FAILURE; 1293 } 1294 1295 reg_channels = pdev_priv_obj->cur_chan_list; 1296 1297 return reg_channels[chan_enum].center_freq; 1298 } 1299 1300 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1301 uint32_t chan) 1302 { 1303 enum channel_state ch_state; 1304 1305 ch_state = reg_get_channel_state(pdev, chan); 1306 1307 return ch_state == CHANNEL_STATE_DFS; 1308 } 1309 1310 uint32_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1311 uint32_t freq) 1312 { 1313 uint32_t count; 1314 struct regulatory_channel *chan_list; 1315 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1316 1317 pdev_priv_obj = reg_get_pdev_obj(pdev); 1318 1319 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1320 reg_err("reg pdev priv obj is NULL"); 1321 return QDF_STATUS_E_FAILURE; 1322 } 1323 1324 chan_list = pdev_priv_obj->cur_chan_list; 1325 1326 for (count = 0; count < NUM_CHANNELS; count++) 1327 if (chan_list[count].center_freq == freq) 1328 return chan_list[count].chan_num; 1329 1330 reg_err("invalid frequency %d", freq); 1331 1332 return 0; 1333 } 1334 1335 uint32_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1336 uint32_t chan_num) 1337 { 1338 uint32_t count; 1339 struct regulatory_channel *chan_list; 1340 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1341 1342 pdev_priv_obj = reg_get_pdev_obj(pdev); 1343 1344 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1345 reg_err("reg pdev priv obj is NULL"); 1346 return QDF_STATUS_E_FAILURE; 1347 } 1348 1349 chan_list = pdev_priv_obj->cur_chan_list; 1350 1351 for (count = 0; count < NUM_CHANNELS; count++) 1352 if (chan_list[count].chan_num == chan_num) { 1353 if (reg_chan_in_range(chan_list, 1354 pdev_priv_obj->range_2g_low, 1355 pdev_priv_obj->range_2g_high, 1356 pdev_priv_obj->range_5g_low, 1357 pdev_priv_obj->range_5g_high, 1358 count)) { 1359 return chan_list[count].center_freq; 1360 } 1361 } 1362 1363 reg_debug_rl("invalid channel %d", chan_num); 1364 1365 return 0; 1366 } 1367 1368 #ifndef CONFIG_LEGACY_CHAN_ENUM 1369 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1370 { 1371 uint32_t freq = 0; 1372 1373 freq = reg_chan_to_freq(pdev, chan_num); 1374 1375 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1376 } 1377 #else 1378 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1379 { 1380 return false; 1381 } 1382 #endif 1383 1384 enum band_info reg_chan_to_band(uint32_t chan_num) 1385 { 1386 if (chan_num <= 14) 1387 return BAND_2G; 1388 1389 return BAND_5G; 1390 } 1391 1392 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1393 uint8_t *chan_list, 1394 uint8_t num_chan, 1395 bool nol_chan) 1396 { 1397 enum channel_enum chan_enum; 1398 struct regulatory_channel *mas_chan_list; 1399 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1400 uint16_t i; 1401 1402 if (!num_chan || !chan_list) { 1403 reg_err("chan_list or num_ch is NULL"); 1404 return; 1405 } 1406 1407 pdev_priv_obj = reg_get_pdev_obj(pdev); 1408 if (!pdev_priv_obj) { 1409 reg_err("reg psoc private obj is NULL"); 1410 return; 1411 } 1412 1413 mas_chan_list = pdev_priv_obj->mas_chan_list; 1414 for (i = 0; i < num_chan; i++) { 1415 chan_enum = reg_get_chan_enum(chan_list[i]); 1416 if (chan_enum == INVALID_CHANNEL) { 1417 reg_err("Invalid ch in nol list, chan %d", 1418 chan_list[i]); 1419 continue; 1420 } 1421 mas_chan_list[chan_enum].nol_chan = nol_chan; 1422 } 1423 1424 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1425 } 1426 1427 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1428 uint16_t regdmn) 1429 { 1430 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1431 struct cur_regulatory_info *reg_info; 1432 uint16_t cc = -1; 1433 uint16_t country_index = -1, regdmn_pair = -1; 1434 struct wlan_objmgr_psoc *psoc; 1435 QDF_STATUS err; 1436 1437 pdev_priv_obj = reg_get_pdev_obj(pdev); 1438 if (!pdev_priv_obj) { 1439 reg_err("reg soc is NULL"); 1440 return QDF_STATUS_E_FAILURE; 1441 } 1442 1443 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1444 (sizeof(struct cur_regulatory_info)); 1445 if (!reg_info) { 1446 reg_err("reg info is NULL"); 1447 return QDF_STATUS_E_NOMEM; 1448 } 1449 1450 psoc = wlan_pdev_get_psoc(pdev); 1451 if (!psoc) { 1452 reg_err("psoc is NULL"); 1453 return QDF_STATUS_E_INVAL; 1454 } 1455 1456 reg_info->psoc = psoc; 1457 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1458 1459 if (regdmn == 0) { 1460 reg_get_default_country(®dmn); 1461 regdmn |= COUNTRY_ERD_FLAG; 1462 } 1463 1464 if (regdmn & COUNTRY_ERD_FLAG) { 1465 cc = regdmn & ~COUNTRY_ERD_FLAG; 1466 1467 reg_get_rdpair_from_country_code(cc, 1468 &country_index, 1469 ®dmn_pair); 1470 1471 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1472 if (err == QDF_STATUS_E_FAILURE) { 1473 reg_err("%s : Unable to set country code\n", __func__); 1474 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1475 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1476 qdf_mem_free(reg_info); 1477 return QDF_STATUS_E_FAILURE; 1478 } 1479 1480 pdev_priv_obj->ctry_code = cc; 1481 1482 } else { 1483 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1484 1485 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1486 if (err == QDF_STATUS_E_FAILURE) { 1487 reg_err("%s : Unable to set country code\n", __func__); 1488 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1489 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1490 qdf_mem_free(reg_info); 1491 return QDF_STATUS_E_FAILURE; 1492 } 1493 1494 pdev_priv_obj->reg_dmn_pair = regdmn; 1495 } 1496 1497 reg_info->offload_enabled = false; 1498 reg_process_master_chan_list(reg_info); 1499 1500 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1501 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1502 qdf_mem_free(reg_info); 1503 1504 return QDF_STATUS_SUCCESS; 1505 } 1506 1507 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1508 struct cc_regdmn_s *rd) 1509 { 1510 struct cur_regulatory_info *reg_info; 1511 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1512 uint16_t country_index = -1, regdmn_pair = -1; 1513 struct wlan_objmgr_psoc *psoc; 1514 struct wlan_lmac_if_reg_tx_ops *tx_ops; 1515 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1516 uint8_t pdev_id; 1517 QDF_STATUS err; 1518 1519 pdev_priv_obj = reg_get_pdev_obj(pdev); 1520 if (!pdev_priv_obj) { 1521 reg_err(" pdev priv obj is NULL"); 1522 return QDF_STATUS_E_FAILURE; 1523 } 1524 1525 psoc = wlan_pdev_get_psoc(pdev); 1526 if (!psoc) { 1527 reg_err("psoc is NULL"); 1528 return QDF_STATUS_E_INVAL; 1529 } 1530 1531 psoc_priv_obj = reg_get_psoc_obj(psoc); 1532 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1533 reg_err("psoc reg component is NULL"); 1534 return QDF_STATUS_E_FAILURE; 1535 } 1536 1537 if (psoc_priv_obj->offload_enabled) { 1538 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 1539 pdev_priv_obj->indoor_chan_enabled = false; 1540 else 1541 pdev_priv_obj->indoor_chan_enabled = true; 1542 1543 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1544 tx_ops = reg_get_psoc_tx_ops(psoc); 1545 if (tx_ops->set_user_country_code) { 1546 psoc_priv_obj->new_init_ctry_pending[pdev_id] = true; 1547 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 1548 } 1549 1550 return QDF_STATUS_E_FAILURE; 1551 } 1552 1553 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1554 (sizeof(struct cur_regulatory_info)); 1555 if (!reg_info) { 1556 reg_err("reg info is NULL"); 1557 return QDF_STATUS_E_NOMEM; 1558 } 1559 1560 reg_info->psoc = psoc; 1561 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1562 1563 if (rd->flags == CC_IS_SET) { 1564 reg_get_rdpair_from_country_code(rd->cc.country_code, 1565 &country_index, 1566 ®dmn_pair); 1567 } else if (rd->flags == ALPHA_IS_SET) { 1568 reg_get_rdpair_from_country_iso(rd->cc.alpha, 1569 &country_index, 1570 ®dmn_pair); 1571 } else if (rd->flags == REGDMN_IS_SET) { 1572 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 1573 ®dmn_pair); 1574 } 1575 1576 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1577 if (err == QDF_STATUS_E_FAILURE) { 1578 reg_err("%s : Unable to set country code\n", __func__); 1579 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1580 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1581 qdf_mem_free(reg_info); 1582 return QDF_STATUS_E_FAILURE; 1583 } 1584 1585 reg_info->offload_enabled = false; 1586 reg_process_master_chan_list(reg_info); 1587 1588 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1589 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1590 qdf_mem_free(reg_info); 1591 1592 return QDF_STATUS_SUCCESS; 1593 } 1594 1595 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 1596 struct cc_regdmn_s *rd) 1597 { 1598 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1599 1600 pdev_priv_obj = reg_get_pdev_obj(pdev); 1601 if (!pdev_priv_obj) { 1602 reg_err("reg pdev priv is NULL"); 1603 return QDF_STATUS_E_FAILURE; 1604 } 1605 1606 if (rd->flags == CC_IS_SET) { 1607 rd->cc.country_code = pdev_priv_obj->ctry_code; 1608 } else if (rd->flags == ALPHA_IS_SET) { 1609 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 1610 sizeof(rd->cc.alpha)); 1611 } else if (rd->flags == REGDMN_IS_SET) { 1612 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 1613 } 1614 1615 return QDF_STATUS_SUCCESS; 1616 } 1617 1618 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 1619 { 1620 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1621 1622 psoc_priv_obj = reg_get_psoc_obj(psoc); 1623 1624 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1625 reg_err("psoc reg component is NULL"); 1626 return QDF_STATUS_E_FAILURE; 1627 } 1628 1629 psoc_priv_obj->offload_enabled = val; 1630 1631 return QDF_STATUS_SUCCESS; 1632 } 1633 1634 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 1635 struct cur_regdmn_info *cur_regdmn) 1636 { 1637 struct wlan_objmgr_psoc *psoc; 1638 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1639 uint16_t index; 1640 int num_reg_dmn; 1641 uint8_t phy_id; 1642 1643 psoc = wlan_pdev_get_psoc(pdev); 1644 psoc_priv_obj = reg_get_psoc_obj(psoc); 1645 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1646 reg_err("soc reg component is NULL"); 1647 return QDF_STATUS_E_INVAL; 1648 } 1649 1650 phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1651 cur_regdmn->regdmn_pair_id = 1652 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 1653 1654 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 1655 for (index = 0; index < num_reg_dmn; index++) { 1656 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 1657 cur_regdmn->regdmn_pair_id) 1658 break; 1659 } 1660 1661 if (index == num_reg_dmn) { 1662 reg_err("invalid regdomain"); 1663 return QDF_STATUS_E_FAILURE; 1664 } 1665 1666 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 1667 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 1668 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 1669 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 1670 cur_regdmn->dfs_region = 1671 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 1672 1673 return QDF_STATUS_SUCCESS; 1674 } 1675 1676 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 1677 bool enable_ch_144) 1678 { 1679 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1680 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1681 struct wlan_objmgr_psoc *psoc; 1682 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 1683 QDF_STATUS status; 1684 1685 pdev_priv_obj = reg_get_pdev_obj(pdev); 1686 1687 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1688 reg_err("pdev reg component is NULL"); 1689 return QDF_STATUS_E_INVAL; 1690 } 1691 1692 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 1693 reg_info("chan 144 is already %d", enable_ch_144); 1694 return QDF_STATUS_SUCCESS; 1695 } 1696 1697 psoc = wlan_pdev_get_psoc(pdev); 1698 if (!psoc) { 1699 reg_err("psoc is NULL"); 1700 return QDF_STATUS_E_INVAL; 1701 } 1702 1703 psoc_priv_obj = reg_get_psoc_obj(psoc); 1704 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1705 reg_err("psoc reg component is NULL"); 1706 return QDF_STATUS_E_INVAL; 1707 } 1708 1709 reg_debug("setting chan 144: %d", enable_ch_144); 1710 pdev_priv_obj->en_chan_144 = enable_ch_144; 1711 1712 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1713 1714 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 1715 if (reg_tx_ops->fill_umac_legacy_chanlist) 1716 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 1717 pdev_priv_obj->cur_chan_list); 1718 1719 status = reg_send_scheduler_msg_sb(psoc, pdev); 1720 1721 return status; 1722 } 1723 1724 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 1725 { 1726 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1727 1728 pdev_priv_obj = reg_get_pdev_obj(pdev); 1729 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1730 reg_err("pdev reg component is NULL"); 1731 return false; 1732 } 1733 1734 return pdev_priv_obj->en_chan_144; 1735 } 1736 1737 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 1738 struct wlan_objmgr_psoc *psoc) 1739 { 1740 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1741 1742 psoc_priv_obj = reg_get_psoc_obj(psoc); 1743 1744 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1745 reg_err("psoc reg component is NULL"); 1746 return NULL; 1747 } 1748 1749 return psoc_priv_obj->reg_cap; 1750 } 1751 1752 QDF_STATUS reg_set_hal_reg_cap( 1753 struct wlan_objmgr_psoc *psoc, 1754 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 1755 uint16_t phy_cnt) 1756 { 1757 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1758 1759 psoc_priv_obj = reg_get_psoc_obj(psoc); 1760 1761 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1762 reg_err("psoc reg component is NULL"); 1763 return QDF_STATUS_E_FAILURE; 1764 } 1765 1766 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 1767 reg_err("phy cnt:%d is more than %d", phy_cnt, 1768 PSOC_MAX_PHY_REG_CAP); 1769 return QDF_STATUS_E_FAILURE; 1770 } 1771 1772 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 1773 phy_cnt * 1774 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 1775 1776 return QDF_STATUS_SUCCESS; 1777 } 1778 1779 bool reg_chan_in_range(struct regulatory_channel *chan_list, 1780 uint32_t low_freq_2g, uint32_t high_freq_2g, 1781 uint32_t low_freq_5g, uint32_t high_freq_5g, 1782 enum channel_enum ch_enum) 1783 { 1784 uint32_t low_limit_2g = NUM_CHANNELS; 1785 uint32_t high_limit_2g = NUM_CHANNELS; 1786 uint32_t low_limit_5g = NUM_CHANNELS; 1787 uint32_t high_limit_5g = NUM_CHANNELS; 1788 bool chan_in_range; 1789 enum channel_enum chan_enum; 1790 uint16_t min_bw; 1791 uint32_t center_freq; 1792 1793 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 1794 min_bw = chan_list[chan_enum].min_bw; 1795 center_freq = chan_list[chan_enum].center_freq; 1796 1797 if ((center_freq - min_bw / 2) >= low_freq_2g) { 1798 low_limit_2g = chan_enum; 1799 break; 1800 } 1801 } 1802 1803 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 1804 min_bw = chan_list[chan_enum].min_bw; 1805 center_freq = chan_list[chan_enum].center_freq; 1806 1807 if ((center_freq - min_bw / 2) >= low_freq_5g) { 1808 low_limit_5g = chan_enum; 1809 break; 1810 } 1811 } 1812 1813 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 1814 min_bw = chan_list[chan_enum].min_bw; 1815 center_freq = chan_list[chan_enum].center_freq; 1816 1817 if (center_freq + min_bw / 2 <= high_freq_2g) { 1818 high_limit_2g = chan_enum; 1819 break; 1820 } 1821 if (chan_enum == 0) 1822 break; 1823 } 1824 1825 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 1826 min_bw = chan_list[chan_enum].min_bw; 1827 center_freq = chan_list[chan_enum].center_freq; 1828 1829 if (center_freq + min_bw / 2 <= high_freq_5g) { 1830 high_limit_5g = chan_enum; 1831 break; 1832 } 1833 if (chan_enum == 0) 1834 break; 1835 } 1836 1837 chan_in_range = false; 1838 if ((low_limit_2g <= ch_enum) && 1839 (high_limit_2g >= ch_enum) && 1840 (low_limit_2g != NUM_CHANNELS) && 1841 (high_limit_2g != NUM_CHANNELS)) 1842 chan_in_range = true; 1843 if ((low_limit_5g <= ch_enum) && 1844 (high_limit_5g >= ch_enum) && 1845 (low_limit_5g != NUM_CHANNELS) && 1846 (high_limit_5g != NUM_CHANNELS)) 1847 chan_in_range = true; 1848 1849 if (chan_in_range) 1850 return true; 1851 else 1852 return false; 1853 } 1854 1855 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 1856 uint8_t *chan_list, uint8_t num_chan, 1857 bool nol_history_chan) 1858 { 1859 enum channel_enum chan_enum; 1860 struct regulatory_channel *mas_chan_list; 1861 struct regulatory_channel *cur_chan_list; 1862 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1863 uint16_t i; 1864 1865 if (!num_chan || !chan_list) { 1866 reg_err("chan_list or num_ch is NULL"); 1867 return; 1868 } 1869 1870 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 1871 pdev, WLAN_UMAC_COMP_REGULATORY); 1872 1873 if (!pdev_priv_obj) { 1874 reg_err("reg psoc private obj is NULL"); 1875 return; 1876 } 1877 1878 mas_chan_list = pdev_priv_obj->mas_chan_list; 1879 cur_chan_list = pdev_priv_obj->cur_chan_list; 1880 1881 for (i = 0; i < num_chan; i++) { 1882 chan_enum = reg_get_chan_enum(chan_list[i]); 1883 if (chan_enum == INVALID_CHANNEL) { 1884 reg_err("Invalid ch in nol list, chan %d", 1885 chan_list[i]); 1886 continue; 1887 } 1888 mas_chan_list[chan_enum].nol_history = nol_history_chan; 1889 cur_chan_list[chan_enum].nol_history = nol_history_chan; 1890 } 1891 } 1892 1893 bool reg_is_24ghz_ch(uint32_t chan) 1894 { 1895 return REG_IS_24GHZ_CH(chan); 1896 } 1897 1898 bool reg_is_5ghz_ch(uint32_t chan) 1899 { 1900 return REG_IS_5GHZ_CH(chan); 1901 } 1902 1903 bool reg_is_24ghz_ch_freq(uint32_t freq) 1904 { 1905 return REG_IS_24GHZ_CH_FREQ(freq); 1906 } 1907 1908 bool reg_is_5ghz_ch_freq(uint32_t freq) 1909 { 1910 return REG_IS_5GHZ_FREQ(freq); 1911 } 1912 1913 #ifndef CONFIG_LEGACY_CHAN_ENUM 1914 bool reg_is_49ghz_freq(uint32_t freq) 1915 { 1916 return REG_IS_49GHZ_FREQ(freq); 1917 } 1918 #endif 1919 1920 uint32_t reg_ch_num(uint32_t ch_enum) 1921 { 1922 return REG_CH_NUM(ch_enum); 1923 } 1924 1925 uint32_t reg_ch_to_freq(uint32_t ch_enum) 1926 { 1927 return REG_CH_TO_FREQ(ch_enum); 1928 } 1929 1930 bool reg_is_same_band_channels(uint32_t chan_num1, uint32_t chan_num2) 1931 { 1932 return (chan_num1 && chan_num2 && 1933 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 1934 } 1935 1936 bool reg_is_channel_valid_5g_sbs(uint32_t curchan, uint32_t newchan) 1937 { 1938 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 1939 } 1940 1941 uint32_t reg_min_24ghz_ch_num(void) 1942 { 1943 return REG_MIN_24GHZ_CH_NUM; 1944 } 1945 1946 uint32_t reg_max_24ghz_ch_num(void) 1947 { 1948 return REG_MAX_24GHZ_CH_NUM; 1949 } 1950 1951 uint32_t reg_min_5ghz_ch_num(void) 1952 { 1953 return REG_MIN_5GHZ_CH_NUM; 1954 } 1955 1956 uint32_t reg_max_5ghz_ch_num(void) 1957 { 1958 return REG_MAX_5GHZ_CH_NUM; 1959 } 1960 1961 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 1962 bool enable) 1963 { 1964 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1965 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1966 struct wlan_objmgr_psoc *psoc; 1967 QDF_STATUS status; 1968 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 1969 1970 pdev_priv_obj = reg_get_pdev_obj(pdev); 1971 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1972 reg_err("pdev reg component is NULL"); 1973 return QDF_STATUS_E_INVAL; 1974 } 1975 1976 if (pdev_priv_obj->dfs_enabled == enable) { 1977 reg_info("dfs_enabled is already set to %d", enable); 1978 return QDF_STATUS_SUCCESS; 1979 } 1980 1981 psoc = wlan_pdev_get_psoc(pdev); 1982 if (!psoc) { 1983 reg_err("psoc is NULL"); 1984 return QDF_STATUS_E_INVAL; 1985 } 1986 1987 psoc_priv_obj = reg_get_psoc_obj(psoc); 1988 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1989 reg_err("psoc reg component is NULL"); 1990 return QDF_STATUS_E_INVAL; 1991 } 1992 1993 reg_info("setting dfs_enabled: %d", enable); 1994 1995 pdev_priv_obj->dfs_enabled = enable; 1996 1997 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1998 1999 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2000 2001 /* Fill the ic channel list with the updated current channel 2002 * chan list. 2003 */ 2004 if (reg_tx_ops->fill_umac_legacy_chanlist) 2005 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2006 pdev_priv_obj->cur_chan_list); 2007 2008 status = reg_send_scheduler_msg_sb(psoc, pdev); 2009 2010 return status; 2011 } 2012