1 /* 2 * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 #include <target_if.h> 38 39 const struct chan_map *channel_map; 40 #ifdef CONFIG_CHAN_NUM_API 41 static const struct bonded_channel bonded_chan_40mhz_list[] = { 42 {36, 40}, 43 {44, 48}, 44 {52, 56}, 45 {60, 64}, 46 {100, 104}, 47 {108, 112}, 48 {116, 120}, 49 {124, 128}, 50 {132, 136}, 51 {140, 144}, 52 {149, 153}, 53 {157, 161}, 54 {165, 169} 55 }; 56 57 static const struct bonded_channel bonded_chan_80mhz_list[] = { 58 {36, 48}, 59 {52, 64}, 60 {100, 112}, 61 {116, 128}, 62 {132, 144}, 63 {149, 161} 64 }; 65 66 static const struct bonded_channel bonded_chan_160mhz_list[] = { 67 {36, 64}, 68 {100, 128} 69 }; 70 #endif /* CONFIG_CHAN_NUM_API */ 71 72 #ifdef CONFIG_CHAN_FREQ_API 73 /* bonded_chan_40mhz_list_freq - List of 40MHz bonnded channel frequencies */ 74 static const struct bonded_channel_freq bonded_chan_40mhz_list_freq[] = { 75 {5180, 5200}, 76 {5220, 5240}, 77 {5260, 5280}, 78 {5300, 5320}, 79 {5500, 5520}, 80 {5540, 5560}, 81 {5580, 5600}, 82 {5620, 5640}, 83 {5660, 5680}, 84 {5700, 5720}, 85 {5745, 5765}, 86 {5785, 5805}, 87 {5825, 5845}, 88 #ifdef CONFIG_BAND_6GHZ 89 {5945, 5965}, 90 {5985, 6005}, 91 {6025, 6045}, 92 {6065, 6085}, 93 {6105, 6125}, 94 {6145, 6165}, 95 {6185, 6205}, 96 {6225, 6245}, 97 {6265, 6285}, 98 {6305, 6325}, 99 {6345, 6365}, 100 {6385, 6405}, 101 {6425, 6445}, 102 {6465, 6485}, 103 {6505, 6525}, 104 {6545, 6565}, 105 {6585, 6605}, 106 {6625, 6645}, 107 {6665, 6685}, 108 {6705, 6725}, 109 {6745, 6765}, 110 {6785, 6805}, 111 {6825, 6845}, 112 {6865, 6885}, 113 {6905, 6925}, 114 {6945, 6965}, 115 {6985, 7005}, 116 {7025, 7045}, 117 {7065, 7085} 118 #endif /*CONFIG_BAND_6GHZ*/ 119 }; 120 121 /* bonded_chan_80mhz_list_freq - List of 80MHz bonnded channel frequencies */ 122 static const struct bonded_channel_freq bonded_chan_80mhz_list_freq[] = { 123 {5180, 5240}, 124 {5260, 5320}, 125 {5500, 5560}, 126 {5580, 5640}, 127 {5660, 5720}, 128 {5745, 5805}, 129 #ifdef CONFIG_BAND_6GHZ 130 {5945, 6005}, 131 {6025, 6085}, 132 {6105, 6165}, 133 {6185, 6245}, 134 {6265, 6325}, 135 {6345, 6405}, 136 {6425, 6485}, 137 {6505, 6565}, 138 {6585, 6645}, 139 {6665, 6725}, 140 {6745, 6805}, 141 {6825, 6885}, 142 {6905, 6965}, 143 {6985, 7045} 144 #endif /*CONFIG_BAND_6GHZ*/ 145 }; 146 147 /* bonded_chan_160mhz_list_freq - List of 160MHz bonnded channel frequencies */ 148 static const struct bonded_channel_freq bonded_chan_160mhz_list_freq[] = { 149 {5180, 5320}, 150 {5500, 5640}, 151 #ifdef CONFIG_BAND_6GHZ 152 {5945, 6085}, 153 {6105, 6245}, 154 {6265, 6405}, 155 {6425, 6565}, 156 {6585, 6725}, 157 {6745, 6885}, 158 {6905, 7045} 159 #endif /*CONFIG_BAND_6GHZ*/ 160 }; 161 #endif /*CONFIG_CHAN_FREQ_API*/ 162 163 static const enum phy_ch_width get_next_lower_bw[] = { 164 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 165 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 166 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 167 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 168 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 169 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 170 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 171 }; 172 173 const struct chan_map channel_map_us[NUM_CHANNELS] = { 174 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 175 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 176 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 177 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 178 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 179 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 180 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 181 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 182 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 183 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 184 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 185 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 186 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 187 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 188 189 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 190 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 191 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 192 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 193 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 200 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 201 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 202 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 203 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 204 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 205 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 206 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 207 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 208 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 209 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 210 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 211 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 212 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 213 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 214 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 215 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 216 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 217 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 218 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 219 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 220 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 221 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 222 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 223 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 224 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 225 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 226 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 227 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 228 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 229 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 230 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 231 232 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 233 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 234 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 235 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 236 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 237 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 238 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 239 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 240 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 241 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 242 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 243 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 244 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 245 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 246 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 247 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 248 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 249 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 250 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 251 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 252 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 253 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 254 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 255 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 256 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 257 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 258 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 259 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 260 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 261 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 262 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 263 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 264 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 265 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 266 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 267 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 268 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 269 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 270 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 271 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 272 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 273 #ifdef CONFIG_BAND_6GHZ 274 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 275 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 276 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 277 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 278 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 279 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 280 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 281 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 282 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 283 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 284 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 285 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 286 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 287 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 288 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 289 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 290 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 291 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 292 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 293 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 294 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 295 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 296 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 297 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 298 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 299 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 300 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 301 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 302 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 303 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 304 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 305 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 306 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 307 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 308 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 309 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 310 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 311 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 312 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 313 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 314 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 315 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 316 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 317 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 318 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 319 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 320 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 321 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 322 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 323 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 324 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 325 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 326 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 327 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 328 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 329 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 330 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 331 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 332 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 333 #endif /* CONFIG_BAND_6GHZ */ 334 }; 335 336 const struct chan_map channel_map_eu[NUM_CHANNELS] = { 337 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 338 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 339 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 340 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 341 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 342 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 343 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 344 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 345 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 346 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 347 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 348 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 349 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 350 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 351 352 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 353 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 354 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 355 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 356 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 357 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 358 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 359 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 360 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 361 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 362 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 363 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 364 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 365 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 366 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 367 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 368 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 369 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 370 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 371 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 372 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 373 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 374 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 375 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 376 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 377 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 378 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 379 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 380 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 381 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 386 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 393 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 394 395 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 396 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 397 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 398 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 399 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 400 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 401 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 402 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 403 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 404 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 405 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 406 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 407 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 408 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 409 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 410 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 411 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 412 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 413 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 414 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 415 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 416 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 417 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 418 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 419 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 420 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 421 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 422 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 423 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 424 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 425 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 426 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 427 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 428 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 429 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 430 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 431 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 432 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 433 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 434 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 435 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 436 #ifdef CONFIG_BAND_6GHZ 437 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 438 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 439 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 440 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 441 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 442 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 443 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 444 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 445 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 446 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 447 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 448 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 449 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 450 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 451 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 452 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 453 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 454 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 455 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 456 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 457 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 458 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 459 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 460 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 461 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 462 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 463 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 464 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 465 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 466 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 467 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 468 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 469 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 470 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 471 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 472 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 473 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 474 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 475 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 476 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 477 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 478 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 479 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 480 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 481 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 482 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 483 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 484 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 485 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 486 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 487 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 488 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 489 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 490 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 491 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 492 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 493 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 494 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 495 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 496 #endif /* CONFIG_BAND_6GHZ */ 497 }; 498 499 const struct chan_map channel_map_jp[NUM_CHANNELS] = { 500 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 501 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 502 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 503 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 504 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 505 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 506 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 507 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 508 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 509 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 510 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 511 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 512 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 513 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 514 515 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 516 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 517 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 518 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 519 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 520 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 521 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 522 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 523 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 524 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 525 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 526 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 527 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 528 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 529 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 530 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 531 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 532 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 533 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 534 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 535 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 536 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 537 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 538 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 539 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 540 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 541 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 542 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 543 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 544 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 545 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 546 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 547 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 548 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 549 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 550 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 551 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 552 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 553 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 554 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 555 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 556 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 557 558 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 559 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 560 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 561 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 562 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 563 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 564 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 565 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 566 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 567 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 568 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 569 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 570 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 571 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 572 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 573 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 574 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 575 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 576 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 577 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 578 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 579 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 580 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 581 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 582 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 583 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 584 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 585 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 586 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 587 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 588 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 589 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 590 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 591 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 592 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 593 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 594 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 595 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 596 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 597 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 598 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 599 #ifdef CONFIG_BAND_6GHZ 600 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 601 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 602 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 603 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 604 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 605 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 606 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 607 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 608 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 609 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 610 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 611 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 612 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 613 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 614 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 615 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 616 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 617 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 618 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 619 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 620 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 621 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 622 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 623 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 624 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 625 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 626 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 627 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 628 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 629 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 630 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 631 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 632 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 633 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 634 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 635 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 636 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 637 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 638 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 639 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 640 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 641 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 642 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 643 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 644 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 645 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 646 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 647 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 648 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 649 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 650 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 651 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 652 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 653 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 654 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 655 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 656 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 657 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 658 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 659 #endif /* CONFIG_BAND_6GHZ */ 660 }; 661 662 const struct chan_map channel_map_global[NUM_CHANNELS] = { 663 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 664 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 665 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 666 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 667 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 668 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 669 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 670 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 671 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 672 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 673 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 674 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 675 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 676 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 677 678 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 679 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 680 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 681 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 682 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 683 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 684 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 685 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 686 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 687 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 688 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 689 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 690 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 691 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 692 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 693 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 694 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 695 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 696 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 697 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 698 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 699 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 700 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 701 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 702 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 703 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 704 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 705 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 706 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 707 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 708 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 709 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 710 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 711 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 712 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 713 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 714 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 715 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 716 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 717 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 718 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 719 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 720 721 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 722 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 723 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 724 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 725 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 726 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 727 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 728 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 729 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 730 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 731 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 732 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 733 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 734 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 735 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 736 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 737 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 738 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 739 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 740 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 741 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 742 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 743 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 744 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 745 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 746 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 747 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 748 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 749 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 750 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 751 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 752 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 753 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 754 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 755 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 756 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 757 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 758 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 759 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 760 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 761 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 762 #ifdef CONFIG_BAND_6GHZ 763 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 764 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 765 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 766 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 767 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 768 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 769 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 770 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 771 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 772 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 773 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 774 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 775 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 776 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 777 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 778 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 779 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 780 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 781 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 782 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 783 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 784 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 785 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 786 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 787 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 788 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 789 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 790 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 791 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 792 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 793 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 794 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 795 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 796 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 797 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 798 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 799 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 800 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 801 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 802 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 803 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 804 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 805 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 806 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 807 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 808 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 809 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 810 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 811 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 812 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 813 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 814 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 815 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 816 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 817 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 818 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 819 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 820 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 821 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 822 #endif /* CONFIG_BAND_6GHZ */ 823 }; 824 825 const struct chan_map channel_map_china[NUM_CHANNELS] = { 826 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 827 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 828 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 829 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 830 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 831 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 832 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 833 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 834 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 835 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 836 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 837 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 838 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 839 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 840 841 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 842 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 843 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 844 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 845 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 846 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 847 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 848 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 849 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 850 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 851 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 852 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 853 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 854 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 855 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 856 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 857 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 858 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 859 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 860 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 861 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 862 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 863 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 864 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 865 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 866 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 867 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 868 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 869 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 870 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 871 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 872 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 873 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 874 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 875 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 876 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 877 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 878 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 879 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 880 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 881 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 882 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 883 884 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 885 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 886 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 887 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 888 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 889 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 890 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 891 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 892 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 893 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 894 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 895 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 896 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 897 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 898 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 899 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 900 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 901 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 902 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 903 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 904 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 905 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 906 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 907 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 908 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 909 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 910 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 911 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 912 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 913 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 914 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 915 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 916 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 917 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 918 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 919 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 920 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 921 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 922 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 923 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 924 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 925 #ifdef CONFIG_BAND_6GHZ 926 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 927 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 928 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 929 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 930 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 931 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 932 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 933 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 934 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 935 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 936 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 937 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 938 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 939 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 940 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 941 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 942 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 943 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 944 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 945 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 946 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 947 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 948 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 949 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 950 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 951 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 952 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 953 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 954 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 955 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 956 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 957 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 958 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 959 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 960 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 961 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 962 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 963 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 964 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 965 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 966 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 967 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 968 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 969 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 970 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 971 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 972 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 973 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 974 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 975 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 976 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 977 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 978 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 979 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 980 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 981 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 982 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 983 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 984 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 985 #endif /* CONFIG_BAND_6GHZ */ 986 }; 987 988 void reg_init_channel_map(enum dfs_reg dfs_region) 989 { 990 switch (dfs_region) { 991 case DFS_UNINIT_REGION: 992 case DFS_UNDEF_REGION: 993 channel_map = channel_map_global; 994 break; 995 case DFS_FCC_REGION: 996 channel_map = channel_map_us; 997 break; 998 case DFS_ETSI_REGION: 999 channel_map = channel_map_eu; 1000 break; 1001 case DFS_MKK_REGION: 1002 case DFS_MKKN_REGION: 1003 channel_map = channel_map_jp; 1004 break; 1005 case DFS_CN_REGION: 1006 channel_map = channel_map_china; 1007 break; 1008 case DFS_KR_REGION: 1009 channel_map = channel_map_eu; 1010 break; 1011 } 1012 } 1013 1014 uint16_t reg_get_bw_value(enum phy_ch_width bw) 1015 { 1016 switch (bw) { 1017 case CH_WIDTH_20MHZ: 1018 return 20; 1019 case CH_WIDTH_40MHZ: 1020 return 40; 1021 case CH_WIDTH_80MHZ: 1022 return 80; 1023 case CH_WIDTH_160MHZ: 1024 return 160; 1025 case CH_WIDTH_80P80MHZ: 1026 return 160; 1027 case CH_WIDTH_INVALID: 1028 return 0; 1029 case CH_WIDTH_5MHZ: 1030 return 5; 1031 case CH_WIDTH_10MHZ: 1032 return 10; 1033 case CH_WIDTH_MAX: 1034 return 160; 1035 default: 1036 return 0; 1037 } 1038 } 1039 1040 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 1041 struct wlan_objmgr_psoc *psoc) 1042 { 1043 return &((psoc->soc_cb.tx_ops.reg_ops)); 1044 } 1045 1046 #ifdef CONFIG_CHAN_NUM_API 1047 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 1048 struct channel_power *ch_list, 1049 uint8_t *num_chan) 1050 { 1051 int i, count; 1052 struct regulatory_channel *reg_channels; 1053 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1054 1055 if (!num_chan || !ch_list) { 1056 reg_err("chan_list or num_ch is NULL"); 1057 return QDF_STATUS_E_FAILURE; 1058 } 1059 1060 pdev_priv_obj = reg_get_pdev_obj(pdev); 1061 1062 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1063 reg_err("reg pdev priv obj is NULL"); 1064 return QDF_STATUS_E_FAILURE; 1065 } 1066 1067 /* set the current channel list */ 1068 reg_channels = pdev_priv_obj->cur_chan_list; 1069 1070 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 1071 if (reg_channels[i].state && 1072 reg_channels[i].chan_flags != REGULATORY_CHAN_DISABLED) { 1073 ch_list[count].chan_num = 1074 reg_channels[i].chan_num; 1075 ch_list[count++].tx_power = 1076 reg_channels[i].tx_power; 1077 } 1078 } 1079 1080 *num_chan = count; 1081 1082 return QDF_STATUS_SUCCESS; 1083 } 1084 1085 enum channel_enum reg_get_chan_enum(uint8_t chan_num) 1086 { 1087 uint32_t count; 1088 1089 for (count = 0; count < NUM_CHANNELS; count++) 1090 if (channel_map[count].chan_num == chan_num) 1091 return count; 1092 1093 reg_err("invalid channel number %d", chan_num); 1094 1095 return INVALID_CHANNEL; 1096 } 1097 1098 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 1099 uint8_t ch) 1100 { 1101 enum channel_enum ch_idx; 1102 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1103 1104 ch_idx = reg_get_chan_enum(ch); 1105 1106 if (ch_idx == INVALID_CHANNEL) 1107 return CHANNEL_STATE_INVALID; 1108 1109 pdev_priv_obj = reg_get_pdev_obj(pdev); 1110 1111 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1112 reg_err("pdev reg obj is NULL"); 1113 return CHANNEL_STATE_INVALID; 1114 } 1115 1116 return pdev_priv_obj->cur_chan_list[ch_idx].state; 1117 } 1118 1119 /** 1120 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 1121 * @pdev: Pointer to pdev structure 1122 * @oper_ch: operating channel number 1123 * @bonded_chan_ar: bonded channel array 1124 * @array_size; Array size 1125 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 1126 * 1127 * Return: bonded channel state 1128 */ 1129 static enum channel_state reg_get_5g_bonded_chan_array( 1130 struct wlan_objmgr_pdev *pdev, 1131 uint8_t oper_chan, 1132 const struct bonded_channel bonded_chan_ar[], 1133 uint16_t array_size, 1134 const struct bonded_channel **bonded_chan_ptr_ptr) 1135 { 1136 int i; 1137 uint8_t chan_num; 1138 const struct bonded_channel *bonded_chan_ptr = NULL; 1139 enum channel_state chan_state = CHANNEL_STATE_INVALID; 1140 enum channel_state temp_chan_state; 1141 1142 for (i = 0; i < array_size; i++) { 1143 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 1144 (oper_chan <= bonded_chan_ar[i].end_ch)) { 1145 bonded_chan_ptr = &bonded_chan_ar[i]; 1146 break; 1147 } 1148 } 1149 1150 if (!bonded_chan_ptr) 1151 return chan_state; 1152 1153 *bonded_chan_ptr_ptr = bonded_chan_ptr; 1154 chan_num = bonded_chan_ptr->start_ch; 1155 while (chan_num <= bonded_chan_ptr->end_ch) { 1156 temp_chan_state = reg_get_channel_state(pdev, chan_num); 1157 if (temp_chan_state < chan_state) 1158 chan_state = temp_chan_state; 1159 chan_num = chan_num + 4; 1160 } 1161 1162 return chan_state; 1163 } 1164 1165 enum channel_state reg_get_5g_bonded_channel( 1166 struct wlan_objmgr_pdev *pdev, uint8_t chan_num, 1167 enum phy_ch_width ch_width, 1168 const struct bonded_channel **bonded_chan_ptr_ptr) 1169 { 1170 if (ch_width == CH_WIDTH_80P80MHZ) 1171 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1172 bonded_chan_80mhz_list, 1173 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1174 bonded_chan_ptr_ptr); 1175 else if (ch_width == CH_WIDTH_160MHZ) 1176 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1177 bonded_chan_160mhz_list, 1178 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 1179 bonded_chan_ptr_ptr); 1180 else if (ch_width == CH_WIDTH_80MHZ) 1181 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1182 bonded_chan_80mhz_list, 1183 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1184 bonded_chan_ptr_ptr); 1185 else if (ch_width == CH_WIDTH_40MHZ) 1186 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1187 bonded_chan_40mhz_list, 1188 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1189 bonded_chan_ptr_ptr); 1190 else 1191 return reg_get_channel_state(pdev, chan_num); 1192 } 1193 1194 enum channel_state reg_get_5g_bonded_channel_state( 1195 struct wlan_objmgr_pdev *pdev, 1196 uint8_t ch, enum phy_ch_width bw) 1197 { 1198 enum channel_enum ch_indx; 1199 enum channel_state chan_state; 1200 struct regulatory_channel *reg_channels; 1201 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1202 bool bw_enabled = false; 1203 const struct bonded_channel *bonded_chan_ptr = NULL; 1204 1205 if (bw > CH_WIDTH_80P80MHZ) { 1206 reg_err("bw passed is not good"); 1207 return CHANNEL_STATE_INVALID; 1208 } 1209 1210 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 1211 1212 if ((chan_state == CHANNEL_STATE_INVALID) || 1213 (chan_state == CHANNEL_STATE_DISABLE)) 1214 return chan_state; 1215 1216 pdev_priv_obj = reg_get_pdev_obj(pdev); 1217 1218 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1219 reg_err("pdev reg obj is NULL"); 1220 return CHANNEL_STATE_INVALID; 1221 } 1222 reg_channels = pdev_priv_obj->cur_chan_list; 1223 1224 ch_indx = reg_get_chan_enum(ch); 1225 if (ch_indx == INVALID_CHANNEL) 1226 return CHANNEL_STATE_INVALID; 1227 if (bw == CH_WIDTH_5MHZ) 1228 bw_enabled = true; 1229 else if (bw == CH_WIDTH_10MHZ) 1230 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 1231 (reg_channels[ch_indx].max_bw >= 10); 1232 else if (bw == CH_WIDTH_20MHZ) 1233 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 1234 (reg_channels[ch_indx].max_bw >= 20); 1235 else if (bw == CH_WIDTH_40MHZ) 1236 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 1237 (reg_channels[ch_indx].max_bw >= 40); 1238 else if (bw == CH_WIDTH_80MHZ) 1239 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1240 (reg_channels[ch_indx].max_bw >= 80); 1241 else if (bw == CH_WIDTH_160MHZ) 1242 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 1243 (reg_channels[ch_indx].max_bw >= 160); 1244 else if (bw == CH_WIDTH_80P80MHZ) 1245 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1246 (reg_channels[ch_indx].max_bw >= 80); 1247 1248 if (bw_enabled) 1249 return chan_state; 1250 else 1251 return CHANNEL_STATE_DISABLE; 1252 } 1253 1254 enum channel_state reg_get_2g_bonded_channel_state( 1255 struct wlan_objmgr_pdev *pdev, 1256 uint8_t oper_ch, uint8_t sec_ch, 1257 enum phy_ch_width bw) 1258 { 1259 enum channel_enum chan_idx; 1260 enum channel_state chan_state; 1261 struct regulatory_channel *reg_channels; 1262 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1263 bool bw_enabled = false; 1264 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 1265 1266 if (bw > CH_WIDTH_40MHZ) 1267 return CHANNEL_STATE_INVALID; 1268 1269 if (bw == CH_WIDTH_40MHZ) { 1270 if ((sec_ch + 4 != oper_ch) && 1271 (oper_ch + 4 != sec_ch)) 1272 return CHANNEL_STATE_INVALID; 1273 chan_state2 = reg_get_channel_state(pdev, sec_ch); 1274 if (chan_state2 == CHANNEL_STATE_INVALID) 1275 return chan_state2; 1276 } 1277 1278 pdev_priv_obj = reg_get_pdev_obj(pdev); 1279 1280 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1281 reg_err("reg pdev priv obj is NULL"); 1282 return CHANNEL_STATE_INVALID; 1283 } 1284 1285 reg_channels = pdev_priv_obj->cur_chan_list; 1286 1287 chan_state = reg_get_channel_state(pdev, oper_ch); 1288 if (chan_state2 < chan_state) 1289 chan_state = chan_state2; 1290 1291 if ((chan_state == CHANNEL_STATE_INVALID) || 1292 (chan_state == CHANNEL_STATE_DISABLE)) 1293 return chan_state; 1294 1295 chan_idx = reg_get_chan_enum(oper_ch); 1296 if (chan_idx == INVALID_CHANNEL) 1297 return CHANNEL_STATE_INVALID; 1298 if (bw == CH_WIDTH_5MHZ) 1299 bw_enabled = true; 1300 else if (bw == CH_WIDTH_10MHZ) 1301 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 1302 (reg_channels[chan_idx].max_bw >= 10); 1303 else if (bw == CH_WIDTH_20MHZ) 1304 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 1305 (reg_channels[chan_idx].max_bw >= 20); 1306 else if (bw == CH_WIDTH_40MHZ) 1307 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 1308 (reg_channels[chan_idx].max_bw >= 40); 1309 1310 if (bw_enabled) 1311 return chan_state; 1312 else 1313 return CHANNEL_STATE_DISABLE; 1314 1315 return CHANNEL_STATE_ENABLE; 1316 } 1317 #endif /* CONFIG_CHAN_NUM_API */ 1318 1319 /** 1320 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1321 * @chan_state1: Channel state1 1322 * @chan_state2: Channel state2 1323 * 1324 * Return: Channel state 1325 */ 1326 static enum channel_state reg_combine_channel_states( 1327 enum channel_state chan_state1, 1328 enum channel_state chan_state2) 1329 { 1330 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1331 (chan_state2 == CHANNEL_STATE_INVALID)) 1332 return CHANNEL_STATE_INVALID; 1333 else 1334 return min(chan_state1, chan_state2); 1335 } 1336 1337 #ifdef CONFIG_CHAN_NUM_API 1338 /** 1339 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1340 * @ch: channel number. 1341 * @ch_params: pointer to the channel parameters. 1342 * 1343 * Return: None 1344 */ 1345 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1346 uint8_t ch, 1347 struct ch_params *ch_params) 1348 { 1349 /* 1350 * Set channel parameters like center frequency for a bonded channel 1351 * state. Also return the maximum bandwidth supported by the channel. 1352 */ 1353 1354 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1355 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1356 const struct bonded_channel *bonded_chan_ptr = NULL; 1357 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1358 1359 if (!ch_params) { 1360 reg_err("ch_params is NULL"); 1361 return; 1362 } 1363 1364 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1365 if (ch_params->center_freq_seg1 != 0) 1366 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1367 else 1368 ch_params->ch_width = CH_WIDTH_160MHZ; 1369 } 1370 1371 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1372 bonded_chan_ptr = NULL; 1373 bonded_chan_ptr2 = NULL; 1374 chan_state = reg_get_5g_bonded_channel( 1375 pdev, ch, ch_params->ch_width, 1376 &bonded_chan_ptr); 1377 1378 chan_state = reg_get_5g_bonded_channel_state( 1379 pdev, ch, ch_params->ch_width); 1380 1381 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1382 chan_state2 = reg_get_5g_bonded_channel_state( 1383 pdev, ch_params->center_freq_seg1 - 2, 1384 CH_WIDTH_80MHZ); 1385 1386 chan_state = reg_combine_channel_states( 1387 chan_state, chan_state2); 1388 } 1389 1390 if ((chan_state != CHANNEL_STATE_ENABLE) && 1391 (chan_state != CHANNEL_STATE_DFS)) 1392 goto update_bw; 1393 1394 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1395 ch_params->sec_ch_offset = NO_SEC_CH; 1396 ch_params->center_freq_seg0 = ch; 1397 break; 1398 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1399 reg_get_5g_bonded_chan_array( 1400 pdev, ch, bonded_chan_40mhz_list, 1401 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1402 &bonded_chan_ptr2); 1403 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1404 goto update_bw; 1405 if (ch == bonded_chan_ptr2->start_ch) 1406 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1407 else 1408 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1409 1410 ch_params->center_freq_seg0 = 1411 (bonded_chan_ptr->start_ch + 1412 bonded_chan_ptr->end_ch) / 2; 1413 break; 1414 } 1415 update_bw: 1416 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1417 } 1418 1419 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1420 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1421 chan_state = reg_get_5g_bonded_channel( 1422 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1423 if (bonded_chan_ptr) 1424 ch_params->center_freq_seg0 = 1425 (bonded_chan_ptr->start_ch + 1426 bonded_chan_ptr->end_ch) / 2; 1427 } 1428 1429 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1430 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1431 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1432 ch_params->center_freq_seg1 = 0; 1433 1434 reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1435 ch_params->ch_width, ch_params->center_freq_seg0, 1436 ch_params->center_freq_seg1); 1437 } 1438 1439 /** 1440 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1441 * @oper_ch: operating channel 1442 * @ch_params: channel parameters 1443 * @sec_ch_2g: 2.4G secondary channel 1444 * 1445 * Return: void 1446 */ 1447 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1448 uint16_t oper_ch, 1449 struct ch_params *ch_params, 1450 uint16_t sec_ch_2g) 1451 { 1452 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1453 1454 if (ch_params->ch_width >= CH_WIDTH_MAX) 1455 ch_params->ch_width = CH_WIDTH_40MHZ; 1456 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1457 if (oper_ch >= 1 && oper_ch <= 5) 1458 sec_ch_2g = oper_ch + 4; 1459 else if (oper_ch >= 6 && oper_ch <= 13) 1460 sec_ch_2g = oper_ch - 4; 1461 } 1462 1463 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1464 chan_state = reg_get_2g_bonded_channel_state( 1465 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1466 if (chan_state == CHANNEL_STATE_ENABLE) { 1467 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1468 if (oper_ch < sec_ch_2g) 1469 ch_params->sec_ch_offset = 1470 LOW_PRIMARY_CH; 1471 else 1472 ch_params->sec_ch_offset = 1473 HIGH_PRIMARY_CH; 1474 ch_params->center_freq_seg0 = 1475 (oper_ch + sec_ch_2g) / 2; 1476 } else { 1477 ch_params->sec_ch_offset = NO_SEC_CH; 1478 ch_params->center_freq_seg0 = oper_ch; 1479 } 1480 break; 1481 } 1482 1483 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1484 } 1485 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1486 ch_params->center_freq_seg1 = 0; 1487 } 1488 1489 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1490 uint8_t ch, uint8_t sec_ch_2g, 1491 struct ch_params *ch_params) 1492 { 1493 if (REG_IS_5GHZ_CH(ch)) 1494 reg_set_5g_channel_params(pdev, ch, ch_params); 1495 else if (REG_IS_24GHZ_CH(ch)) 1496 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1497 } 1498 #endif /* CONFIG_CHAN_NUM_API */ 1499 1500 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1501 enum band_info *band) 1502 { 1503 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1504 1505 pdev_reg = reg_get_pdev_obj(pdev); 1506 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1507 reg_err("pdev reg component is NULL"); 1508 return QDF_STATUS_E_INVAL; 1509 } 1510 1511 *band = pdev_reg->band_capability; 1512 1513 return QDF_STATUS_SUCCESS; 1514 } 1515 1516 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1517 uint8_t *country_code) 1518 { 1519 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1520 1521 if (!country_code) { 1522 reg_err("country_code is NULL"); 1523 return QDF_STATUS_E_INVAL; 1524 } 1525 1526 psoc_priv_obj = reg_get_psoc_obj(psoc); 1527 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1528 reg_err("psoc reg component is NULL"); 1529 return QDF_STATUS_E_INVAL; 1530 } 1531 1532 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1533 REG_ALPHA2_LEN + 1); 1534 1535 return QDF_STATUS_SUCCESS; 1536 } 1537 1538 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1539 enum dfs_reg *dfs_reg) 1540 { 1541 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1542 1543 pdev_priv_obj = reg_get_pdev_obj(pdev); 1544 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1545 reg_err("reg component pdev priv is NULL"); 1546 return; 1547 } 1548 1549 *dfs_reg = pdev_priv_obj->dfs_region; 1550 } 1551 1552 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1553 enum dfs_reg dfs_reg) 1554 { 1555 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1556 1557 pdev_priv_obj = reg_get_pdev_obj(pdev); 1558 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1559 reg_err("psoc reg component is NULL"); 1560 return; 1561 } 1562 1563 pdev_priv_obj->dfs_region = dfs_reg; 1564 1565 reg_init_channel_map(dfs_reg); 1566 } 1567 1568 #ifdef CONFIG_CHAN_NUM_API 1569 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1570 uint8_t chan_num) 1571 { 1572 enum channel_enum chan_enum; 1573 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1574 struct regulatory_channel *reg_channels; 1575 1576 chan_enum = reg_get_chan_enum(chan_num); 1577 1578 if (chan_enum == INVALID_CHANNEL) { 1579 reg_err("channel is invalid"); 1580 return QDF_STATUS_E_FAILURE; 1581 } 1582 1583 pdev_priv_obj = reg_get_pdev_obj(pdev); 1584 1585 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1586 reg_err("reg pdev priv obj is NULL"); 1587 return QDF_STATUS_E_FAILURE; 1588 } 1589 1590 reg_channels = pdev_priv_obj->cur_chan_list; 1591 1592 return reg_channels[chan_enum].tx_power; 1593 } 1594 1595 qdf_freq_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1596 uint8_t chan_num) 1597 { 1598 enum channel_enum chan_enum; 1599 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1600 struct regulatory_channel *reg_channels; 1601 1602 chan_enum = reg_get_chan_enum(chan_num); 1603 1604 if (chan_enum == INVALID_CHANNEL) 1605 return CHANNEL_STATE_INVALID; 1606 1607 pdev_priv_obj = reg_get_pdev_obj(pdev); 1608 1609 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1610 reg_err("reg pdev priv obj is NULL"); 1611 return QDF_STATUS_E_FAILURE; 1612 } 1613 1614 reg_channels = pdev_priv_obj->cur_chan_list; 1615 1616 return reg_channels[chan_enum].center_freq; 1617 } 1618 1619 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1620 uint8_t chan) 1621 { 1622 enum channel_state ch_state; 1623 1624 ch_state = reg_get_channel_state(pdev, chan); 1625 1626 return ch_state == CHANNEL_STATE_DFS; 1627 } 1628 #endif /* CONFIG_CHAN_NUM_API */ 1629 1630 uint8_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1631 qdf_freq_t freq) 1632 { 1633 uint32_t count; 1634 struct regulatory_channel *chan_list; 1635 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1636 1637 if (freq == 0) { 1638 reg_err_rl("Invalid frequency %d", freq); 1639 return 0; 1640 } 1641 1642 pdev_priv_obj = reg_get_pdev_obj(pdev); 1643 1644 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1645 reg_err("reg pdev priv obj is NULL"); 1646 return 0; 1647 } 1648 1649 chan_list = pdev_priv_obj->mas_chan_list; 1650 for (count = 0; count < NUM_CHANNELS; count++) { 1651 if (chan_list[count].center_freq >= freq) 1652 break; 1653 } 1654 1655 if (count == NUM_CHANNELS) 1656 goto end; 1657 1658 if (chan_list[count].center_freq == freq) 1659 return chan_list[count].chan_num; 1660 1661 if (count == 0) 1662 goto end; 1663 1664 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1665 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1666 reg_err("Frequency %d invalid in current reg domain", freq); 1667 return 0; 1668 } 1669 1670 return (chan_list[count - 1].chan_num + 1671 (freq - chan_list[count - 1].center_freq) / 5); 1672 1673 end: 1674 reg_err_rl("invalid frequency %d", freq); 1675 return 0; 1676 } 1677 1678 static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1679 uint8_t chan_num, 1680 enum channel_enum min_chan_range, 1681 enum channel_enum max_chan_range) 1682 { 1683 uint16_t count; 1684 struct regulatory_channel *chan_list; 1685 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1686 1687 pdev_priv_obj = reg_get_pdev_obj(pdev); 1688 1689 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1690 reg_err("reg pdev priv obj is NULL"); 1691 return 0; 1692 } 1693 1694 chan_list = pdev_priv_obj->mas_chan_list; 1695 1696 for (count = min_chan_range; count <= max_chan_range; count++) { 1697 if (REG_IS_49GHZ_FREQ(chan_list[count].center_freq)) { 1698 if (chan_list[count].chan_num == chan_num) 1699 break; 1700 continue; 1701 } else if ((chan_list[count].chan_num >= chan_num) && 1702 (chan_list[count].chan_num != INVALID_CHANNEL_NUM)) 1703 break; 1704 } 1705 1706 if (count == max_chan_range + 1) 1707 goto end; 1708 1709 if (chan_list[count].chan_num == chan_num) { 1710 if (chan_list[count].chan_flags & REGULATORY_CHAN_DISABLED) 1711 reg_err("Channel %d disabled in current reg domain", 1712 chan_num); 1713 return chan_list[count].center_freq; 1714 } 1715 1716 if (count == min_chan_range) 1717 goto end; 1718 1719 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1720 REG_IS_49GHZ_FREQ(chan_list[count - 1].center_freq) || 1721 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1722 reg_err("Channel %d invalid in current reg domain", 1723 chan_num); 1724 return 0; 1725 } 1726 1727 return (chan_list[count - 1].center_freq + 1728 (chan_num - chan_list[count - 1].chan_num) * 5); 1729 1730 end: 1731 1732 reg_debug_rl("Invalid channel %d", chan_num); 1733 return 0; 1734 } 1735 1736 uint16_t reg_legacy_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1737 uint8_t chan_num) 1738 { 1739 uint16_t min_chan_range = MIN_24GHZ_CHANNEL; 1740 uint16_t max_chan_range = MAX_5GHZ_CHANNEL; 1741 1742 if (chan_num == 0) { 1743 reg_err_rl("Invalid channel %d", chan_num); 1744 return 0; 1745 } 1746 1747 return reg_compute_chan_to_freq(pdev, chan_num, 1748 min_chan_range, 1749 max_chan_range); 1750 } 1751 1752 #ifdef CONFIG_CHAN_NUM_API 1753 qdf_freq_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1754 uint8_t chan_num) 1755 { 1756 uint32_t count; 1757 struct regulatory_channel *chan_list; 1758 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1759 1760 if (chan_num == 0) { 1761 reg_err_rl("Invalid channel %d", chan_num); 1762 return 0; 1763 } 1764 1765 pdev_priv_obj = reg_get_pdev_obj(pdev); 1766 1767 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1768 reg_err("reg pdev priv obj is NULL"); 1769 return 0; 1770 } 1771 1772 chan_list = pdev_priv_obj->cur_chan_list; 1773 for (count = 0; count < NUM_CHANNELS; count++) 1774 if (chan_list[count].chan_num == chan_num) { 1775 if (reg_chan_in_range(chan_list, 1776 pdev_priv_obj->range_2g_low, 1777 pdev_priv_obj->range_2g_high, 1778 pdev_priv_obj->range_5g_low, 1779 pdev_priv_obj->range_5g_high, 1780 count)) { 1781 return chan_list[count].center_freq; 1782 } 1783 } 1784 1785 reg_debug_rl("invalid channel %d", chan_num); 1786 return 0; 1787 } 1788 1789 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1790 { 1791 qdf_freq_t freq = 0; 1792 1793 freq = reg_chan_to_freq(pdev, chan_num); 1794 1795 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1796 } 1797 1798 enum band_info reg_chan_to_band(uint8_t chan_num) 1799 { 1800 if (chan_num <= 14) 1801 return BAND_2G; 1802 1803 return BAND_5G; 1804 } 1805 1806 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1807 uint8_t *chan_list, 1808 uint8_t num_chan, 1809 bool nol_chan) 1810 { 1811 enum channel_enum chan_enum; 1812 struct regulatory_channel *mas_chan_list; 1813 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1814 uint16_t i; 1815 1816 if (!num_chan || !chan_list) { 1817 reg_err("chan_list or num_ch is NULL"); 1818 return; 1819 } 1820 1821 pdev_priv_obj = reg_get_pdev_obj(pdev); 1822 if (!pdev_priv_obj) { 1823 reg_err("reg psoc private obj is NULL"); 1824 return; 1825 } 1826 1827 mas_chan_list = pdev_priv_obj->mas_chan_list; 1828 for (i = 0; i < num_chan; i++) { 1829 chan_enum = reg_get_chan_enum(chan_list[i]); 1830 if (chan_enum == INVALID_CHANNEL) { 1831 reg_err("Invalid ch in nol list, chan %d", 1832 chan_list[i]); 1833 continue; 1834 } 1835 mas_chan_list[chan_enum].nol_chan = nol_chan; 1836 } 1837 1838 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1839 } 1840 #endif /* CONFIG_CHAN_NUM_API */ 1841 1842 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1843 uint16_t regdmn) 1844 { 1845 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1846 struct cur_regulatory_info *reg_info; 1847 uint16_t cc = -1; 1848 uint16_t country_index = -1, regdmn_pair = -1; 1849 struct wlan_objmgr_psoc *psoc; 1850 QDF_STATUS err; 1851 1852 pdev_priv_obj = reg_get_pdev_obj(pdev); 1853 if (!pdev_priv_obj) { 1854 reg_err("reg soc is NULL"); 1855 return QDF_STATUS_E_FAILURE; 1856 } 1857 1858 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1859 (sizeof(struct cur_regulatory_info)); 1860 if (!reg_info) { 1861 reg_err("reg info is NULL"); 1862 return QDF_STATUS_E_NOMEM; 1863 } 1864 1865 psoc = wlan_pdev_get_psoc(pdev); 1866 if (!psoc) { 1867 reg_err("psoc is NULL"); 1868 return QDF_STATUS_E_INVAL; 1869 } 1870 1871 reg_info->psoc = psoc; 1872 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1873 1874 if (regdmn == 0) { 1875 reg_get_default_country(®dmn); 1876 regdmn |= COUNTRY_ERD_FLAG; 1877 } 1878 1879 if (regdmn & COUNTRY_ERD_FLAG) { 1880 cc = regdmn & ~COUNTRY_ERD_FLAG; 1881 1882 reg_get_rdpair_from_country_code(cc, 1883 &country_index, 1884 ®dmn_pair); 1885 1886 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1887 if (err == QDF_STATUS_E_FAILURE) { 1888 reg_err("%s : Unable to set country code\n", __func__); 1889 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1890 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1891 qdf_mem_free(reg_info); 1892 return QDF_STATUS_E_FAILURE; 1893 } 1894 1895 pdev_priv_obj->ctry_code = cc; 1896 1897 } else { 1898 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1899 1900 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1901 if (err == QDF_STATUS_E_FAILURE) { 1902 reg_err("%s : Unable to set country code\n", __func__); 1903 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1904 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1905 qdf_mem_free(reg_info); 1906 return QDF_STATUS_E_FAILURE; 1907 } 1908 1909 pdev_priv_obj->reg_dmn_pair = regdmn; 1910 } 1911 1912 reg_info->offload_enabled = false; 1913 reg_process_master_chan_list(reg_info); 1914 1915 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1916 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1917 qdf_mem_free(reg_info); 1918 1919 return QDF_STATUS_SUCCESS; 1920 } 1921 1922 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1923 struct cc_regdmn_s *rd) 1924 { 1925 struct cur_regulatory_info *reg_info; 1926 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1927 uint16_t country_index = -1, regdmn_pair = -1; 1928 struct wlan_objmgr_psoc *psoc; 1929 struct wlan_lmac_if_reg_tx_ops *tx_ops; 1930 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1931 uint8_t pdev_id; 1932 QDF_STATUS err; 1933 1934 pdev_priv_obj = reg_get_pdev_obj(pdev); 1935 if (!pdev_priv_obj) { 1936 reg_err(" pdev priv obj is NULL"); 1937 return QDF_STATUS_E_FAILURE; 1938 } 1939 1940 psoc = wlan_pdev_get_psoc(pdev); 1941 if (!psoc) { 1942 reg_err("psoc is NULL"); 1943 return QDF_STATUS_E_INVAL; 1944 } 1945 1946 psoc_priv_obj = reg_get_psoc_obj(psoc); 1947 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1948 reg_err("psoc reg component is NULL"); 1949 return QDF_STATUS_E_FAILURE; 1950 } 1951 1952 if (psoc_priv_obj->offload_enabled) { 1953 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 1954 pdev_priv_obj->indoor_chan_enabled = false; 1955 else 1956 pdev_priv_obj->indoor_chan_enabled = true; 1957 1958 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1959 tx_ops = reg_get_psoc_tx_ops(psoc); 1960 if (tx_ops->set_user_country_code) { 1961 psoc_priv_obj->new_init_ctry_pending[pdev_id] = true; 1962 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 1963 } 1964 1965 return QDF_STATUS_E_FAILURE; 1966 } 1967 1968 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1969 (sizeof(struct cur_regulatory_info)); 1970 if (!reg_info) { 1971 reg_err("reg info is NULL"); 1972 return QDF_STATUS_E_NOMEM; 1973 } 1974 1975 reg_info->psoc = psoc; 1976 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1977 1978 if (rd->flags == CC_IS_SET) { 1979 reg_get_rdpair_from_country_code(rd->cc.country_code, 1980 &country_index, 1981 ®dmn_pair); 1982 } else if (rd->flags == ALPHA_IS_SET) { 1983 reg_get_rdpair_from_country_iso(rd->cc.alpha, 1984 &country_index, 1985 ®dmn_pair); 1986 } else if (rd->flags == REGDMN_IS_SET) { 1987 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 1988 ®dmn_pair); 1989 } 1990 1991 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1992 if (err == QDF_STATUS_E_FAILURE) { 1993 reg_err("%s : Unable to set country code\n", __func__); 1994 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1995 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1996 qdf_mem_free(reg_info); 1997 return QDF_STATUS_E_FAILURE; 1998 } 1999 2000 reg_info->offload_enabled = false; 2001 reg_process_master_chan_list(reg_info); 2002 2003 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2004 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2005 qdf_mem_free(reg_info); 2006 2007 return QDF_STATUS_SUCCESS; 2008 } 2009 2010 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 2011 struct cc_regdmn_s *rd) 2012 { 2013 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2014 2015 pdev_priv_obj = reg_get_pdev_obj(pdev); 2016 if (!pdev_priv_obj) { 2017 reg_err("reg pdev priv is NULL"); 2018 return QDF_STATUS_E_FAILURE; 2019 } 2020 2021 if (rd->flags == CC_IS_SET) { 2022 rd->cc.country_code = pdev_priv_obj->ctry_code; 2023 } else if (rd->flags == ALPHA_IS_SET) { 2024 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 2025 sizeof(rd->cc.alpha)); 2026 } else if (rd->flags == REGDMN_IS_SET) { 2027 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 2028 } 2029 2030 return QDF_STATUS_SUCCESS; 2031 } 2032 2033 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 2034 { 2035 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2036 2037 psoc_priv_obj = reg_get_psoc_obj(psoc); 2038 2039 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2040 reg_err("psoc reg component is NULL"); 2041 return QDF_STATUS_E_FAILURE; 2042 } 2043 2044 psoc_priv_obj->offload_enabled = val; 2045 2046 return QDF_STATUS_SUCCESS; 2047 } 2048 2049 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 2050 struct cur_regdmn_info *cur_regdmn) 2051 { 2052 struct wlan_objmgr_psoc *psoc; 2053 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2054 uint16_t index; 2055 int num_reg_dmn; 2056 uint8_t phy_id; 2057 2058 psoc = wlan_pdev_get_psoc(pdev); 2059 psoc_priv_obj = reg_get_psoc_obj(psoc); 2060 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2061 reg_err("soc reg component is NULL"); 2062 return QDF_STATUS_E_INVAL; 2063 } 2064 2065 phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2066 cur_regdmn->regdmn_pair_id = 2067 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 2068 2069 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 2070 for (index = 0; index < num_reg_dmn; index++) { 2071 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 2072 cur_regdmn->regdmn_pair_id) 2073 break; 2074 } 2075 2076 if (index == num_reg_dmn) { 2077 reg_err_rl("invalid regdomain"); 2078 return QDF_STATUS_E_FAILURE; 2079 } 2080 2081 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 2082 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 2083 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 2084 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 2085 cur_regdmn->dfs_region = 2086 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 2087 2088 return QDF_STATUS_SUCCESS; 2089 } 2090 2091 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 2092 bool enable_ch_144) 2093 { 2094 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2095 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2096 struct wlan_objmgr_psoc *psoc; 2097 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2098 QDF_STATUS status; 2099 2100 pdev_priv_obj = reg_get_pdev_obj(pdev); 2101 2102 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2103 reg_err("pdev reg component is NULL"); 2104 return QDF_STATUS_E_INVAL; 2105 } 2106 2107 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 2108 reg_info("chan 144 is already %d", enable_ch_144); 2109 return QDF_STATUS_SUCCESS; 2110 } 2111 2112 psoc = wlan_pdev_get_psoc(pdev); 2113 if (!psoc) { 2114 reg_err("psoc is NULL"); 2115 return QDF_STATUS_E_INVAL; 2116 } 2117 2118 psoc_priv_obj = reg_get_psoc_obj(psoc); 2119 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2120 reg_err("psoc reg component is NULL"); 2121 return QDF_STATUS_E_INVAL; 2122 } 2123 2124 reg_debug("setting chan 144: %d", enable_ch_144); 2125 pdev_priv_obj->en_chan_144 = enable_ch_144; 2126 2127 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2128 2129 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2130 if (reg_tx_ops->fill_umac_legacy_chanlist) 2131 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2132 pdev_priv_obj->cur_chan_list); 2133 2134 status = reg_send_scheduler_msg_sb(psoc, pdev); 2135 2136 return status; 2137 } 2138 2139 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 2140 { 2141 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2142 2143 pdev_priv_obj = reg_get_pdev_obj(pdev); 2144 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2145 reg_err("pdev reg component is NULL"); 2146 return false; 2147 } 2148 2149 return pdev_priv_obj->en_chan_144; 2150 } 2151 2152 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 2153 struct wlan_objmgr_psoc *psoc) 2154 { 2155 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2156 2157 psoc_priv_obj = reg_get_psoc_obj(psoc); 2158 2159 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2160 reg_err("psoc reg component is NULL"); 2161 return NULL; 2162 } 2163 2164 return psoc_priv_obj->reg_cap; 2165 } 2166 2167 QDF_STATUS reg_set_hal_reg_cap( 2168 struct wlan_objmgr_psoc *psoc, 2169 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 2170 uint16_t phy_cnt) 2171 { 2172 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2173 2174 psoc_priv_obj = reg_get_psoc_obj(psoc); 2175 2176 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2177 reg_err("psoc reg component is NULL"); 2178 return QDF_STATUS_E_FAILURE; 2179 } 2180 2181 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 2182 reg_err("phy cnt:%d is more than %d", phy_cnt, 2183 PSOC_MAX_PHY_REG_CAP); 2184 return QDF_STATUS_E_FAILURE; 2185 } 2186 2187 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 2188 phy_cnt * 2189 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 2190 2191 return QDF_STATUS_SUCCESS; 2192 } 2193 2194 bool reg_chan_in_range(struct regulatory_channel *chan_list, 2195 qdf_freq_t low_freq_2g, qdf_freq_t high_freq_2g, 2196 qdf_freq_t low_freq_5g, qdf_freq_t high_freq_5g, 2197 enum channel_enum ch_enum) 2198 { 2199 uint32_t low_limit_2g = NUM_CHANNELS; 2200 uint32_t high_limit_2g = NUM_CHANNELS; 2201 uint32_t low_limit_5g = NUM_CHANNELS; 2202 uint32_t high_limit_5g = NUM_CHANNELS; 2203 bool chan_in_range; 2204 enum channel_enum chan_enum; 2205 uint16_t min_bw; 2206 qdf_freq_t center_freq; 2207 2208 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2209 min_bw = chan_list[chan_enum].min_bw; 2210 center_freq = chan_list[chan_enum].center_freq; 2211 2212 if ((center_freq - min_bw / 2) >= low_freq_2g) { 2213 low_limit_2g = chan_enum; 2214 break; 2215 } 2216 } 2217 2218 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2219 min_bw = chan_list[chan_enum].min_bw; 2220 center_freq = chan_list[chan_enum].center_freq; 2221 2222 if ((center_freq - min_bw / 2) >= low_freq_5g) { 2223 low_limit_5g = chan_enum; 2224 break; 2225 } 2226 } 2227 2228 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2229 min_bw = chan_list[chan_enum].min_bw; 2230 center_freq = chan_list[chan_enum].center_freq; 2231 2232 if (center_freq + min_bw / 2 <= high_freq_2g) { 2233 high_limit_2g = chan_enum; 2234 break; 2235 } 2236 if (chan_enum == 0) 2237 break; 2238 } 2239 2240 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2241 min_bw = chan_list[chan_enum].min_bw; 2242 center_freq = chan_list[chan_enum].center_freq; 2243 2244 if (center_freq + min_bw / 2 <= high_freq_5g) { 2245 high_limit_5g = chan_enum; 2246 break; 2247 } 2248 if (chan_enum == 0) 2249 break; 2250 } 2251 2252 chan_in_range = false; 2253 if ((low_limit_2g <= ch_enum) && 2254 (high_limit_2g >= ch_enum) && 2255 (low_limit_2g != NUM_CHANNELS) && 2256 (high_limit_2g != NUM_CHANNELS)) 2257 chan_in_range = true; 2258 if ((low_limit_5g <= ch_enum) && 2259 (high_limit_5g >= ch_enum) && 2260 (low_limit_5g != NUM_CHANNELS) && 2261 (high_limit_5g != NUM_CHANNELS)) 2262 chan_in_range = true; 2263 2264 if (chan_in_range) 2265 return true; 2266 else 2267 return false; 2268 } 2269 2270 #ifdef CONFIG_CHAN_NUM_API 2271 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 2272 uint8_t *chan_list, uint8_t num_chan, 2273 bool nol_history_chan) 2274 { 2275 enum channel_enum chan_enum; 2276 struct regulatory_channel *mas_chan_list; 2277 struct regulatory_channel *cur_chan_list; 2278 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2279 uint16_t i; 2280 2281 if (!num_chan || !chan_list) { 2282 reg_err("chan_list or num_ch is NULL"); 2283 return; 2284 } 2285 2286 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 2287 pdev, WLAN_UMAC_COMP_REGULATORY); 2288 2289 if (!pdev_priv_obj) { 2290 reg_err("reg psoc private obj is NULL"); 2291 return; 2292 } 2293 2294 mas_chan_list = pdev_priv_obj->mas_chan_list; 2295 cur_chan_list = pdev_priv_obj->cur_chan_list; 2296 2297 for (i = 0; i < num_chan; i++) { 2298 chan_enum = reg_get_chan_enum(chan_list[i]); 2299 if (chan_enum == INVALID_CHANNEL) { 2300 reg_err("Invalid ch in nol list, chan %d", 2301 chan_list[i]); 2302 continue; 2303 } 2304 mas_chan_list[chan_enum].nol_history = nol_history_chan; 2305 cur_chan_list[chan_enum].nol_history = nol_history_chan; 2306 } 2307 } 2308 2309 bool reg_is_24ghz_ch(uint32_t chan) 2310 { 2311 return REG_IS_24GHZ_CH(chan); 2312 } 2313 2314 bool reg_is_5ghz_ch(uint32_t chan) 2315 { 2316 return REG_IS_5GHZ_CH(chan); 2317 } 2318 #endif /* CONFIG_CHAN_NUM_API */ 2319 2320 bool reg_is_24ghz_ch_freq(uint32_t freq) 2321 { 2322 return REG_IS_24GHZ_CH_FREQ(freq); 2323 } 2324 2325 bool reg_is_5ghz_ch_freq(uint32_t freq) 2326 { 2327 return REG_IS_5GHZ_FREQ(freq); 2328 } 2329 2330 /** 2331 * BAND_2G_PRESENT() - Check if REG_BAND_2G is set in the band_mask 2332 * @band_mask: Bitmask for bands 2333 * 2334 * Return: True if REG_BAND_2G is set in the band_mask, else false 2335 */ 2336 static inline bool BAND_2G_PRESENT(uint8_t band_mask) 2337 { 2338 return !!(band_mask & (BIT(REG_BAND_2G))); 2339 } 2340 2341 /** 2342 * BAND_5G_PRESENT() - Check if REG_BAND_5G is set in the band_mask 2343 * @band_mask: Bitmask for bands 2344 * 2345 * Return: True if REG_BAND_5G is set in the band_mask, else false 2346 */ 2347 static inline bool BAND_5G_PRESENT(uint8_t band_mask) 2348 { 2349 return !!(band_mask & (BIT(REG_BAND_5G))); 2350 } 2351 2352 #ifdef CONFIG_BAND_6GHZ 2353 bool reg_is_6ghz_chan_freq(uint16_t freq) 2354 { 2355 return REG_IS_6GHZ_FREQ(freq); 2356 } 2357 2358 uint16_t reg_min_6ghz_chan_freq(void) 2359 { 2360 return REG_MIN_6GHZ_CHAN_FREQ; 2361 } 2362 2363 uint16_t reg_max_6ghz_chan_freq(void) 2364 { 2365 return REG_MAX_6GHZ_CHAN_FREQ; 2366 } 2367 2368 bool reg_is_6ghz_psc_chan_freq(uint16_t freq) 2369 { 2370 if (!REG_IS_6GHZ_FREQ(freq)) { 2371 reg_debug(" Channel frequency is not a 6GHz frequency"); 2372 return false; 2373 } 2374 2375 if (!(((freq - SIXG_STARTING_FREQ) + (FREQ_LEFT_SHIFT)) % 2376 (FREQ_TO_CHAN_SCALE * NUM_80MHZ_BAND_IN_6G))) { 2377 return true; 2378 } 2379 2380 reg_debug_rl("Channel freq %d MHz is not a 6GHz PSC frequency", freq); 2381 2382 return false; 2383 } 2384 2385 /** 2386 * BAND_6G_PRESENT() - Check if REG_BAND_6G is set in the band_mask 2387 * @band_mask: Bitmask for bands 2388 * 2389 * Return: True if REG_BAND_6G is set in the band_mask, else false 2390 */ 2391 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2392 { 2393 return !!(band_mask & (BIT(REG_BAND_6G))); 2394 } 2395 #else 2396 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2397 { 2398 return false; 2399 } 2400 #endif /* CONFIG_BAND_6GHZ */ 2401 2402 uint16_t 2403 reg_get_band_channel_list(struct wlan_objmgr_pdev *pdev, 2404 uint8_t band_mask, 2405 struct regulatory_channel *channel_list) 2406 { 2407 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2408 struct regulatory_channel *cur_chan_list; 2409 uint16_t i, num_channels = 0; 2410 2411 pdev_priv_obj = reg_get_pdev_obj(pdev); 2412 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2413 reg_err("reg pdev priv obj is NULL"); 2414 return 0; 2415 } 2416 2417 cur_chan_list = pdev_priv_obj->cur_chan_list; 2418 2419 if (BAND_2G_PRESENT(band_mask)) { 2420 for (i = MIN_24GHZ_CHANNEL; i <= MAX_24GHZ_CHANNEL; i++) { 2421 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2422 !(cur_chan_list[i].chan_flags & 2423 REGULATORY_CHAN_DISABLED)) { 2424 channel_list[num_channels] = cur_chan_list[i]; 2425 num_channels++; 2426 } 2427 } 2428 } 2429 if (BAND_5G_PRESENT(band_mask)) { 2430 for (i = MIN_49GHZ_CHANNEL; i <= MAX_5GHZ_CHANNEL; i++) { 2431 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2432 !(cur_chan_list[i].chan_flags & 2433 REGULATORY_CHAN_DISABLED)) { 2434 channel_list[num_channels] = cur_chan_list[i]; 2435 num_channels++; 2436 } 2437 } 2438 } 2439 if (BAND_6G_PRESENT(band_mask)) { 2440 for (i = MIN_6GHZ_CHANNEL; i <= MAX_6GHZ_CHANNEL; i++) { 2441 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2442 !(cur_chan_list[i].chan_flags & 2443 REGULATORY_CHAN_DISABLED)) { 2444 channel_list[num_channels] = cur_chan_list[i]; 2445 num_channels++; 2446 } 2447 } 2448 } 2449 2450 if (!num_channels) { 2451 reg_err("Failed to retrieve the channel list"); 2452 return 0; 2453 } 2454 2455 return num_channels; 2456 } 2457 2458 qdf_freq_t reg_chan_band_to_freq(struct wlan_objmgr_pdev *pdev, 2459 uint8_t chan_num, 2460 uint8_t band_mask) 2461 { 2462 enum channel_enum min_chan, max_chan; 2463 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2464 uint16_t freq; 2465 2466 if (chan_num == 0) { 2467 reg_err_rl("Invalid channel %d", chan_num); 2468 return 0; 2469 } 2470 2471 pdev_priv_obj = reg_get_pdev_obj(pdev); 2472 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2473 reg_err("reg pdev priv obj is NULL"); 2474 return 0; 2475 } 2476 2477 if (BAND_6G_PRESENT(band_mask)) { 2478 if (BAND_2G_PRESENT(band_mask) || 2479 BAND_5G_PRESENT(band_mask)) { 2480 reg_err("Incorrect band_mask %x", band_mask); 2481 return 0; 2482 } 2483 2484 min_chan = MIN_6GHZ_CHANNEL; 2485 max_chan = MAX_6GHZ_CHANNEL; 2486 return reg_compute_chan_to_freq(pdev, chan_num, 2487 min_chan, 2488 max_chan); 2489 } else { 2490 if (BAND_2G_PRESENT(band_mask)) { 2491 min_chan = MIN_24GHZ_CHANNEL; 2492 max_chan = MAX_24GHZ_CHANNEL; 2493 freq = reg_compute_chan_to_freq(pdev, chan_num, 2494 min_chan, 2495 max_chan); 2496 if (freq != 0) 2497 return freq; 2498 } 2499 2500 if (BAND_5G_PRESENT(band_mask)) { 2501 min_chan = MIN_49GHZ_CHANNEL; 2502 max_chan = MAX_5GHZ_CHANNEL; 2503 2504 return reg_compute_chan_to_freq(pdev, chan_num, 2505 min_chan, 2506 max_chan); 2507 } 2508 2509 reg_err("Incorrect band_mask %x", band_mask); 2510 return 0; 2511 } 2512 } 2513 2514 bool reg_is_49ghz_freq(qdf_freq_t freq) 2515 { 2516 return REG_IS_49GHZ_FREQ(freq); 2517 } 2518 2519 qdf_freq_t reg_ch_num(uint32_t ch_enum) 2520 { 2521 return REG_CH_NUM(ch_enum); 2522 } 2523 2524 qdf_freq_t reg_ch_to_freq(uint32_t ch_enum) 2525 { 2526 return REG_CH_TO_FREQ(ch_enum); 2527 } 2528 2529 #ifdef CONFIG_CHAN_NUM_API 2530 bool reg_is_same_band_channels(uint8_t chan_num1, uint8_t chan_num2) 2531 { 2532 return (chan_num1 && chan_num2 && 2533 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 2534 } 2535 2536 bool reg_is_channel_valid_5g_sbs(uint8_t curchan, uint8_t newchan) 2537 { 2538 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 2539 } 2540 2541 uint8_t reg_min_24ghz_ch_num(void) 2542 { 2543 return REG_MIN_24GHZ_CH_NUM; 2544 } 2545 2546 uint8_t reg_max_24ghz_ch_num(void) 2547 { 2548 return REG_MAX_24GHZ_CH_NUM; 2549 } 2550 2551 uint8_t reg_min_5ghz_ch_num(void) 2552 { 2553 return REG_MIN_5GHZ_CH_NUM; 2554 } 2555 2556 uint8_t reg_max_5ghz_ch_num(void) 2557 { 2558 return REG_MAX_5GHZ_CH_NUM; 2559 } 2560 #endif /* CONFIG_CHAN_NUM_API */ 2561 2562 #ifdef CONFIG_CHAN_FREQ_API 2563 qdf_freq_t reg_min_24ghz_chan_freq(void) 2564 { 2565 return REG_MIN_24GHZ_CH_FREQ; 2566 } 2567 2568 qdf_freq_t reg_max_24ghz_chan_freq(void) 2569 { 2570 return REG_MAX_24GHZ_CH_FREQ; 2571 } 2572 2573 qdf_freq_t reg_min_5ghz_chan_freq(void) 2574 { 2575 return REG_MIN_5GHZ_CH_FREQ; 2576 } 2577 2578 qdf_freq_t reg_max_5ghz_chan_freq(void) 2579 { 2580 return REG_MAX_5GHZ_CH_FREQ; 2581 } 2582 #endif /* CONFIG_CHAN_FREQ_API */ 2583 2584 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 2585 bool enable) 2586 { 2587 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2588 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2589 struct wlan_objmgr_psoc *psoc; 2590 QDF_STATUS status; 2591 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2592 2593 pdev_priv_obj = reg_get_pdev_obj(pdev); 2594 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2595 reg_err("pdev reg component is NULL"); 2596 return QDF_STATUS_E_INVAL; 2597 } 2598 2599 if (pdev_priv_obj->dfs_enabled == enable) { 2600 reg_info("dfs_enabled is already set to %d", enable); 2601 return QDF_STATUS_SUCCESS; 2602 } 2603 2604 psoc = wlan_pdev_get_psoc(pdev); 2605 if (!psoc) { 2606 reg_err("psoc is NULL"); 2607 return QDF_STATUS_E_INVAL; 2608 } 2609 2610 psoc_priv_obj = reg_get_psoc_obj(psoc); 2611 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2612 reg_err("psoc reg component is NULL"); 2613 return QDF_STATUS_E_INVAL; 2614 } 2615 2616 reg_info("setting dfs_enabled: %d", enable); 2617 2618 pdev_priv_obj->dfs_enabled = enable; 2619 2620 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2621 2622 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2623 2624 /* Fill the ic channel list with the updated current channel 2625 * chan list. 2626 */ 2627 if (reg_tx_ops->fill_umac_legacy_chanlist) 2628 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2629 pdev_priv_obj->cur_chan_list); 2630 2631 status = reg_send_scheduler_msg_sb(psoc, pdev); 2632 2633 return status; 2634 } 2635 2636 bool reg_is_regdmn_en302502_applicable(struct wlan_objmgr_pdev *pdev) 2637 { 2638 struct cur_regdmn_info cur_reg_dmn; 2639 QDF_STATUS status; 2640 2641 status = reg_get_curr_regdomain(pdev, &cur_reg_dmn); 2642 if (status != QDF_STATUS_SUCCESS) { 2643 reg_err("Failed to get reg domain"); 2644 return false; 2645 } 2646 2647 return reg_en302_502_regdmn(cur_reg_dmn.regdmn_pair_id); 2648 } 2649 2650 QDF_STATUS reg_modify_pdev_chan_range(struct wlan_objmgr_pdev *pdev) 2651 { 2652 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2653 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2654 struct wlan_objmgr_psoc *psoc; 2655 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2656 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap_ptr; 2657 uint32_t cnt; 2658 uint32_t phy_id; 2659 enum direction dir; 2660 QDF_STATUS status = QDF_STATUS_SUCCESS; 2661 struct target_pdev_info *tgt_pdev; 2662 2663 tgt_pdev = wlan_pdev_get_tgt_if_handle(pdev); 2664 phy_id = (uint32_t)target_pdev_get_phy_idx(tgt_pdev); 2665 pdev_priv_obj = reg_get_pdev_obj(pdev); 2666 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2667 reg_err("pdev reg component is NULL"); 2668 return QDF_STATUS_E_INVAL; 2669 } 2670 2671 psoc = wlan_pdev_get_psoc(pdev); 2672 if (!psoc) { 2673 reg_err("psoc is NULL"); 2674 return QDF_STATUS_E_INVAL; 2675 } 2676 2677 psoc_priv_obj = reg_get_psoc_obj(psoc); 2678 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2679 reg_err("psoc reg component is NULL"); 2680 return QDF_STATUS_E_INVAL; 2681 } 2682 2683 reg_cap_ptr = psoc_priv_obj->reg_cap; 2684 2685 for (cnt = 0; cnt < PSOC_MAX_PHY_REG_CAP; cnt++) { 2686 if (!reg_cap_ptr) { 2687 qdf_mem_free(pdev_priv_obj); 2688 reg_err("reg cap ptr is NULL"); 2689 return QDF_STATUS_E_FAULT; 2690 } 2691 2692 if (reg_cap_ptr->phy_id == phy_id) 2693 break; 2694 reg_cap_ptr++; 2695 } 2696 2697 if (cnt == PSOC_MAX_PHY_REG_CAP) { 2698 qdf_mem_free(pdev_priv_obj); 2699 reg_err("extended capabilities not found for pdev"); 2700 return QDF_STATUS_E_FAULT; 2701 } 2702 2703 if (psoc_priv_obj->offload_enabled) { 2704 dir = NORTHBOUND; 2705 } else { 2706 dir = SOUTHBOUND; 2707 } 2708 2709 pdev_priv_obj->range_2g_low = reg_cap_ptr->low_2ghz_chan; 2710 pdev_priv_obj->range_2g_high = reg_cap_ptr->high_2ghz_chan; 2711 pdev_priv_obj->range_5g_low = reg_cap_ptr->low_5ghz_chan; 2712 pdev_priv_obj->range_5g_high = reg_cap_ptr->high_5ghz_chan; 2713 pdev_priv_obj->wireless_modes = reg_cap_ptr->wireless_modes; 2714 2715 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2716 2717 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2718 2719 /* Fill the ic channel list with the updated current channel 2720 * chan list. 2721 */ 2722 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2723 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2724 pdev_priv_obj->cur_chan_list); 2725 2726 } else { 2727 if (dir == NORTHBOUND) 2728 status = reg_send_scheduler_msg_nb(psoc, pdev); 2729 else 2730 status = reg_send_scheduler_msg_sb(psoc, pdev); 2731 } 2732 2733 return status; 2734 } 2735 2736 #ifdef DISABLE_UNII_SHARED_BANDS 2737 /** 2738 * reg_is_reg_unii_band_1_or_reg_unii_band_2a() - Check the input bitmap 2739 * @unii_5g_bitmap: 5G UNII band bitmap 2740 * 2741 * This function checks if either REG_UNII_BAND_1 or REG_UNII_BAND_2A, 2742 * are present in the 5G UNII band bitmap. 2743 * 2744 * Return: Return true if REG_UNII_BAND_1 or REG_UNII_BAND_2A, are present in 2745 * the UNII 5g bitmap else return false. 2746 */ 2747 static bool 2748 reg_is_reg_unii_band_1_or_reg_unii_band_2a(uint8_t unii_5g_bitmap) 2749 { 2750 if (!unii_5g_bitmap) 2751 return false; 2752 2753 return ((unii_5g_bitmap & (BIT(REG_UNII_BAND_1) | 2754 BIT(REG_UNII_BAND_2A))) == unii_5g_bitmap); 2755 } 2756 2757 QDF_STATUS reg_disable_chan_coex(struct wlan_objmgr_pdev *pdev, 2758 uint8_t unii_5g_bitmap) 2759 { 2760 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2761 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2762 struct wlan_objmgr_psoc *psoc; 2763 2764 psoc = wlan_pdev_get_psoc(pdev); 2765 if (!psoc) { 2766 reg_err("psoc is NULL"); 2767 return QDF_STATUS_E_INVAL; 2768 } 2769 2770 pdev_priv_obj = reg_get_pdev_obj(pdev); 2771 2772 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2773 reg_err_rl("reg pdev priv obj is NULL"); 2774 return QDF_STATUS_E_FAILURE; 2775 } 2776 2777 if (unii_5g_bitmap && 2778 !reg_is_reg_unii_band_1_or_reg_unii_band_2a(unii_5g_bitmap)) { 2779 reg_err_rl("Invalid unii_5g_bitmap = %d", unii_5g_bitmap); 2780 return QDF_STATUS_E_FAILURE; 2781 } 2782 2783 if (pdev_priv_obj->unii_5g_bitmap == unii_5g_bitmap) { 2784 reg_debug_rl("UNII bitmask for 5G channels is already set %d", 2785 unii_5g_bitmap); 2786 return QDF_STATUS_SUCCESS; 2787 } 2788 2789 reg_debug_rl("Setting UNII bitmask for 5G: %d", unii_5g_bitmap); 2790 pdev_priv_obj->unii_5g_bitmap = unii_5g_bitmap; 2791 2792 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2793 2794 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2795 2796 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2797 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2798 pdev_priv_obj->cur_chan_list); 2799 } 2800 2801 return QDF_STATUS_SUCCESS; 2802 } 2803 #endif 2804 2805 #ifdef CONFIG_CHAN_FREQ_API 2806 QDF_STATUS reg_get_channel_list_with_power_for_freq(struct wlan_objmgr_pdev 2807 *pdev, 2808 struct channel_power 2809 *ch_list, 2810 uint8_t *num_chan) 2811 { 2812 int i, count; 2813 struct regulatory_channel *reg_channels; 2814 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2815 2816 if (!num_chan || !ch_list) { 2817 reg_err("chan_list or num_ch is NULL"); 2818 return QDF_STATUS_E_FAILURE; 2819 } 2820 2821 pdev_priv_obj = reg_get_pdev_obj(pdev); 2822 2823 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2824 reg_err("reg pdev priv obj is NULL"); 2825 return QDF_STATUS_E_FAILURE; 2826 } 2827 2828 /* set the current channel list */ 2829 reg_channels = pdev_priv_obj->cur_chan_list; 2830 2831 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 2832 if (reg_channels[i].state && 2833 !(reg_channels[i].chan_flags & REGULATORY_CHAN_DISABLED)) { 2834 ch_list[count].center_freq = 2835 reg_channels[i].center_freq; 2836 ch_list[count++].tx_power = 2837 reg_channels[i].tx_power; 2838 } 2839 } 2840 2841 *num_chan = count; 2842 2843 return QDF_STATUS_SUCCESS; 2844 } 2845 2846 enum channel_enum reg_get_chan_enum_for_freq(qdf_freq_t freq) 2847 { 2848 uint32_t count; 2849 2850 for (count = 0; count < NUM_CHANNELS; count++) 2851 if (channel_map[count].center_freq == freq) 2852 return count; 2853 2854 reg_err("invalid channel center frequency %d", freq); 2855 2856 return INVALID_CHANNEL; 2857 } 2858 2859 enum channel_state reg_get_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2860 qdf_freq_t freq) 2861 { 2862 enum channel_enum ch_idx; 2863 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2864 2865 ch_idx = reg_get_chan_enum_for_freq(freq); 2866 2867 if (ch_idx == INVALID_CHANNEL) 2868 return CHANNEL_STATE_INVALID; 2869 2870 pdev_priv_obj = reg_get_pdev_obj(pdev); 2871 2872 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2873 reg_err("pdev reg obj is NULL"); 2874 return CHANNEL_STATE_INVALID; 2875 } 2876 2877 return pdev_priv_obj->cur_chan_list[ch_idx].state; 2878 } 2879 2880 /** 2881 * reg_get_5g_bonded_chan_array_for_freq()- Return the channel state for a 2882 * 5G or 6G channel frequency based on the bonded channel. 2883 * @pdev: Pointer to pdev. 2884 * @freq: Channel center frequency. 2885 * @bonded_chan_ar: Array of bonded channel frequencies. 2886 * @array_size: Array size. 2887 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2888 * 2889 * Return: Channel State 2890 */ 2891 static enum channel_state 2892 reg_get_5g_bonded_chan_array_for_freq(struct wlan_objmgr_pdev *pdev, 2893 uint16_t freq, 2894 const struct bonded_channel_freq 2895 bonded_chan_ar[], 2896 uint16_t array_size, 2897 const struct bonded_channel_freq 2898 **bonded_chan_ptr_ptr) 2899 { 2900 int i; 2901 uint16_t chan_cfreq; 2902 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2903 enum channel_state chan_state = CHANNEL_STATE_INVALID; 2904 enum channel_state temp_chan_state; 2905 2906 for (i = 0; i < array_size; i++) { 2907 if ((freq >= bonded_chan_ar[i].start_freq) && 2908 (freq <= bonded_chan_ar[i].end_freq)) { 2909 bonded_chan_ptr = &bonded_chan_ar[i]; 2910 break; 2911 } 2912 } 2913 2914 if (!bonded_chan_ptr) 2915 return chan_state; 2916 2917 *bonded_chan_ptr_ptr = bonded_chan_ptr; 2918 chan_cfreq = bonded_chan_ptr->start_freq; 2919 while (chan_cfreq <= bonded_chan_ptr->end_freq) { 2920 temp_chan_state = reg_get_channel_state_for_freq(pdev, 2921 chan_cfreq); 2922 if (temp_chan_state < chan_state) 2923 chan_state = temp_chan_state; 2924 chan_cfreq = chan_cfreq + 20; 2925 } 2926 2927 return chan_state; 2928 } 2929 2930 /** 2931 * reg_get_5g_bonded_channel_for_freq()- Return the channel state for a 2932 * 5G or 6G channel frequency based on the channel width and bonded channel 2933 * @pdev: Pointer to pdev. 2934 * @freq: Channel center frequency. 2935 * @ch_width: Channel Width. 2936 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2937 * 2938 * Return: Channel State 2939 */ 2940 enum channel_state 2941 reg_get_5g_bonded_channel_for_freq(struct wlan_objmgr_pdev *pdev, 2942 uint16_t freq, 2943 enum phy_ch_width ch_width, 2944 const struct bonded_channel_freq 2945 **bonded_chan_ptr_ptr) 2946 2947 { 2948 if (ch_width == CH_WIDTH_80P80MHZ) 2949 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2950 bonded_chan_80mhz_list_freq, 2951 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2952 bonded_chan_ptr_ptr); 2953 else if (ch_width == CH_WIDTH_160MHZ) 2954 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2955 bonded_chan_160mhz_list_freq, 2956 QDF_ARRAY_SIZE(bonded_chan_160mhz_list_freq), 2957 bonded_chan_ptr_ptr); 2958 else if (ch_width == CH_WIDTH_80MHZ) 2959 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2960 bonded_chan_80mhz_list_freq, 2961 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2962 bonded_chan_ptr_ptr); 2963 else if (ch_width == CH_WIDTH_40MHZ) 2964 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2965 bonded_chan_40mhz_list_freq, 2966 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 2967 bonded_chan_ptr_ptr); 2968 else 2969 return reg_get_channel_state_for_freq(pdev, freq); 2970 } 2971 2972 enum channel_state 2973 reg_get_5g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2974 qdf_freq_t freq, 2975 enum phy_ch_width bw) 2976 { 2977 enum channel_enum ch_indx; 2978 enum channel_state chan_state; 2979 struct regulatory_channel *reg_channels; 2980 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2981 bool bw_enabled = false; 2982 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2983 2984 if (bw > CH_WIDTH_80P80MHZ) { 2985 reg_err("bw passed is not good"); 2986 return CHANNEL_STATE_INVALID; 2987 } 2988 2989 chan_state = reg_get_5g_bonded_channel_for_freq(pdev, freq, bw, 2990 &bonded_chan_ptr); 2991 2992 if ((chan_state == CHANNEL_STATE_INVALID) || 2993 (chan_state == CHANNEL_STATE_DISABLE)) 2994 return chan_state; 2995 2996 pdev_priv_obj = reg_get_pdev_obj(pdev); 2997 2998 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2999 reg_err("pdev reg obj is NULL"); 3000 return CHANNEL_STATE_INVALID; 3001 } 3002 reg_channels = pdev_priv_obj->cur_chan_list; 3003 3004 ch_indx = reg_get_chan_enum_for_freq(freq); 3005 if (ch_indx == INVALID_CHANNEL) 3006 return CHANNEL_STATE_INVALID; 3007 if (bw == CH_WIDTH_5MHZ) 3008 bw_enabled = true; 3009 else if (bw == CH_WIDTH_10MHZ) 3010 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 3011 (reg_channels[ch_indx].max_bw >= 10); 3012 else if (bw == CH_WIDTH_20MHZ) 3013 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 3014 (reg_channels[ch_indx].max_bw >= 20); 3015 else if (bw == CH_WIDTH_40MHZ) 3016 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 3017 (reg_channels[ch_indx].max_bw >= 40); 3018 else if (bw == CH_WIDTH_80MHZ) 3019 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3020 (reg_channels[ch_indx].max_bw >= 80); 3021 else if (bw == CH_WIDTH_160MHZ) 3022 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 3023 (reg_channels[ch_indx].max_bw >= 160); 3024 else if (bw == CH_WIDTH_80P80MHZ) 3025 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3026 (reg_channels[ch_indx].max_bw >= 80); 3027 3028 if (bw_enabled) 3029 return chan_state; 3030 else 3031 return CHANNEL_STATE_DISABLE; 3032 } 3033 3034 enum channel_state 3035 reg_get_2g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3036 qdf_freq_t oper_ch_freq, 3037 qdf_freq_t sec_ch_freq, 3038 enum phy_ch_width bw) 3039 { 3040 enum channel_enum chan_idx; 3041 enum channel_state chan_state; 3042 struct regulatory_channel *reg_channels; 3043 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3044 bool bw_enabled = false; 3045 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 3046 3047 if (bw > CH_WIDTH_40MHZ) 3048 return CHANNEL_STATE_INVALID; 3049 3050 if (bw == CH_WIDTH_40MHZ) { 3051 if ((sec_ch_freq + 20 != oper_ch_freq) && 3052 (oper_ch_freq + 20 != sec_ch_freq)) 3053 return CHANNEL_STATE_INVALID; 3054 chan_state2 = reg_get_channel_state_for_freq(pdev, sec_ch_freq); 3055 if (chan_state2 == CHANNEL_STATE_INVALID) 3056 return chan_state2; 3057 } 3058 3059 pdev_priv_obj = reg_get_pdev_obj(pdev); 3060 3061 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3062 reg_err("reg pdev priv obj is NULL"); 3063 return CHANNEL_STATE_INVALID; 3064 } 3065 3066 reg_channels = pdev_priv_obj->cur_chan_list; 3067 3068 chan_state = reg_get_channel_state_for_freq(pdev, oper_ch_freq); 3069 if (chan_state2 < chan_state) 3070 chan_state = chan_state2; 3071 3072 if ((chan_state == CHANNEL_STATE_INVALID) || 3073 (chan_state == CHANNEL_STATE_DISABLE)) 3074 return chan_state; 3075 3076 chan_idx = reg_get_chan_enum_for_freq(oper_ch_freq); 3077 if (chan_idx == INVALID_CHANNEL) 3078 return CHANNEL_STATE_INVALID; 3079 if (bw == CH_WIDTH_5MHZ) 3080 bw_enabled = true; 3081 else if (bw == CH_WIDTH_10MHZ) 3082 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 3083 (reg_channels[chan_idx].max_bw >= 10); 3084 else if (bw == CH_WIDTH_20MHZ) 3085 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 3086 (reg_channels[chan_idx].max_bw >= 20); 3087 else if (bw == CH_WIDTH_40MHZ) 3088 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 3089 (reg_channels[chan_idx].max_bw >= 40); 3090 3091 if (bw_enabled) 3092 return chan_state; 3093 else 3094 return CHANNEL_STATE_DISABLE; 3095 3096 return CHANNEL_STATE_ENABLE; 3097 } 3098 3099 /** 3100 * reg_set_5g_channel_params_for_freq()- Set channel parameters like center 3101 * frequency for a bonded channel state. Also return the maximum bandwidth 3102 * supported by the channel. 3103 * @pdev: Pointer to pdev. 3104 * @freq: Channel center frequency. 3105 * ch_params: Pointer to ch_params. 3106 * 3107 * Return: void 3108 */ 3109 static void reg_set_5g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3110 uint16_t freq, 3111 struct ch_params *ch_params) 3112 { 3113 /* 3114 * Set channel parameters like center frequency for a bonded channel 3115 * state. Also return the maximum bandwidth supported by the channel. 3116 */ 3117 3118 enum phy_ch_width next_lower_bw; 3119 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3120 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 3121 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3122 const struct bonded_channel_freq *bonded_chan_ptr2 = NULL; 3123 3124 if (!ch_params) { 3125 reg_err("ch_params is NULL"); 3126 return; 3127 } 3128 3129 if (ch_params->ch_width >= CH_WIDTH_MAX) { 3130 if (ch_params->mhz_freq_seg1 != 0) 3131 ch_params->ch_width = CH_WIDTH_80P80MHZ; 3132 else 3133 ch_params->ch_width = CH_WIDTH_160MHZ; 3134 } 3135 next_lower_bw = ch_params->ch_width; 3136 3137 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3138 ch_params->ch_width = next_lower_bw; 3139 next_lower_bw = get_next_lower_bw[ch_params->ch_width]; 3140 bonded_chan_ptr = NULL; 3141 bonded_chan_ptr2 = NULL; 3142 chan_state = reg_get_5g_bonded_channel_for_freq( 3143 pdev, freq, ch_params->ch_width, 3144 &bonded_chan_ptr); 3145 3146 chan_state = reg_get_5g_bonded_channel_state_for_freq( 3147 pdev, freq, ch_params->ch_width); 3148 3149 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 3150 chan_state2 = reg_get_5g_bonded_channel_state_for_freq( 3151 pdev, ch_params->mhz_freq_seg1 - 3152 NEAREST_20MHZ_CHAN_FREQ_OFFSET, 3153 CH_WIDTH_80MHZ); 3154 3155 chan_state = reg_combine_channel_states( 3156 chan_state, chan_state2); 3157 } 3158 3159 if ((chan_state != CHANNEL_STATE_ENABLE) && 3160 (chan_state != CHANNEL_STATE_DFS)) 3161 continue; 3162 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 3163 ch_params->sec_ch_offset = NO_SEC_CH; 3164 ch_params->mhz_freq_seg0 = freq; 3165 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3166 ch_params->center_freq_seg0 = 3167 (ch_params->mhz_freq_seg0 - 3168 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3169 else 3170 ch_params->center_freq_seg0 = 3171 (ch_params->mhz_freq_seg0 - 3172 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3173 break; 3174 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 3175 reg_get_5g_bonded_chan_array_for_freq( 3176 pdev, freq, bonded_chan_40mhz_list_freq, 3177 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3178 &bonded_chan_ptr2); 3179 if (!bonded_chan_ptr || !bonded_chan_ptr2) 3180 continue; 3181 if (freq == bonded_chan_ptr2->start_freq) 3182 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 3183 else 3184 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 3185 3186 ch_params->mhz_freq_seg0 = 3187 (bonded_chan_ptr->start_freq + 3188 bonded_chan_ptr->end_freq) / 2; 3189 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3190 ch_params->center_freq_seg0 = 3191 (ch_params->mhz_freq_seg0 - 3192 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3193 else 3194 ch_params->center_freq_seg0 = 3195 (ch_params->mhz_freq_seg0 - 3196 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3197 break; 3198 } 3199 } 3200 3201 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 3202 ch_params->mhz_freq_seg1 = ch_params->mhz_freq_seg0; 3203 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg1)) 3204 ch_params->center_freq_seg1 = 3205 (ch_params->mhz_freq_seg1 - SIXG_STARTING_FREQ) / 3206 FREQ_TO_CHAN_SCALE; 3207 else 3208 ch_params->center_freq_seg1 = 3209 (ch_params->mhz_freq_seg1 - FIVEG_STARTING_FREQ) / 3210 FREQ_TO_CHAN_SCALE; 3211 chan_state = reg_get_5g_bonded_channel_for_freq( 3212 pdev, freq, CH_WIDTH_80MHZ, &bonded_chan_ptr); 3213 if (bonded_chan_ptr) { 3214 ch_params->mhz_freq_seg0 = 3215 (bonded_chan_ptr->start_freq + 3216 bonded_chan_ptr->end_freq) / 2; 3217 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3218 ch_params->center_freq_seg0 = 3219 (ch_params->mhz_freq_seg0 - 3220 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3221 else 3222 ch_params->center_freq_seg0 = 3223 (ch_params->mhz_freq_seg0 - 3224 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3225 } 3226 } 3227 3228 /* Overwrite mhz_freq_seg1 to 0 for non 160 and 80+80 width */ 3229 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 3230 ch_params->ch_width == CH_WIDTH_80P80MHZ)) { 3231 ch_params->mhz_freq_seg1 = 0; 3232 ch_params->center_freq_seg1 = 0; 3233 } 3234 } 3235 3236 /** 3237 * reg_set_2g_channel_params_for_freq() - set the 2.4G bonded channel parameters 3238 * @oper_freq: operating channel 3239 * @ch_params: channel parameters 3240 * @sec_ch_2g_freq: 2.4G secondary channel 3241 * 3242 * Return: void 3243 */ 3244 static void reg_set_2g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3245 uint16_t oper_freq, 3246 struct ch_params *ch_params, 3247 uint16_t sec_ch_2g_freq) 3248 { 3249 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3250 3251 if (ch_params->ch_width >= CH_WIDTH_MAX) 3252 ch_params->ch_width = CH_WIDTH_40MHZ; 3253 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g_freq) { 3254 if (oper_freq >= TWOG_CHAN_1_IN_MHZ && oper_freq <= 3255 TWOG_CHAN_5_IN_MHZ) 3256 sec_ch_2g_freq = oper_freq + 20; 3257 else if (oper_freq >= TWOG_CHAN_6_IN_MHZ && oper_freq <= 3258 TWOG_CHAN_13_IN_MHZ) 3259 sec_ch_2g_freq = oper_freq - 20; 3260 } 3261 3262 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3263 chan_state = 3264 reg_get_2g_bonded_channel_state_for_freq(pdev, oper_freq, 3265 sec_ch_2g_freq, 3266 ch_params->ch_width); 3267 if (chan_state == CHANNEL_STATE_ENABLE) { 3268 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 3269 if (oper_freq < sec_ch_2g_freq) 3270 ch_params->sec_ch_offset = 3271 LOW_PRIMARY_CH; 3272 else 3273 ch_params->sec_ch_offset = 3274 HIGH_PRIMARY_CH; 3275 ch_params->mhz_freq_seg0 = 3276 (oper_freq + sec_ch_2g_freq) / 2; 3277 if (ch_params->mhz_freq_seg0 == 3278 TWOG_CHAN_14_IN_MHZ) 3279 ch_params->center_freq_seg0 = 14; 3280 else 3281 ch_params->center_freq_seg0 = 3282 (ch_params->mhz_freq_seg0 - 3283 TWOG_STARTING_FREQ) / 3284 FREQ_TO_CHAN_SCALE; 3285 } else { 3286 ch_params->sec_ch_offset = NO_SEC_CH; 3287 ch_params->mhz_freq_seg0 = oper_freq; 3288 if (ch_params->mhz_freq_seg0 == 3289 TWOG_CHAN_14_IN_MHZ) 3290 ch_params->center_freq_seg0 = 14; 3291 else 3292 ch_params->center_freq_seg0 = 3293 (ch_params->mhz_freq_seg0 - 3294 TWOG_STARTING_FREQ) / 3295 FREQ_TO_CHAN_SCALE; 3296 } 3297 break; 3298 } 3299 3300 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3301 } 3302 /* Overwrite mhz_freq_seg1 and center_freq_seg1 to 0 for 2.4 Ghz */ 3303 ch_params->mhz_freq_seg1 = 0; 3304 ch_params->center_freq_seg1 = 0; 3305 } 3306 3307 void reg_set_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3308 qdf_freq_t freq, 3309 qdf_freq_t sec_ch_2g_freq, 3310 struct ch_params *ch_params) 3311 { 3312 if (reg_is_5ghz_ch_freq(freq) || reg_is_6ghz_chan_freq(freq)) 3313 reg_set_5g_channel_params_for_freq(pdev, freq, ch_params); 3314 else if (reg_is_24ghz_ch_freq(freq)) 3315 reg_set_2g_channel_params_for_freq(pdev, freq, ch_params, 3316 sec_ch_2g_freq); 3317 } 3318 3319 uint8_t reg_get_channel_reg_power_for_freq(struct wlan_objmgr_pdev *pdev, 3320 qdf_freq_t freq) 3321 { 3322 enum channel_enum chan_enum; 3323 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3324 struct regulatory_channel *reg_channels; 3325 3326 chan_enum = reg_get_chan_enum_for_freq(freq); 3327 3328 if (chan_enum == INVALID_CHANNEL) { 3329 reg_err("channel is invalid"); 3330 return QDF_STATUS_E_FAILURE; 3331 } 3332 3333 pdev_priv_obj = reg_get_pdev_obj(pdev); 3334 3335 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3336 reg_err("reg pdev priv obj is NULL"); 3337 return QDF_STATUS_E_FAILURE; 3338 } 3339 3340 reg_channels = pdev_priv_obj->cur_chan_list; 3341 3342 return reg_channels[chan_enum].tx_power; 3343 } 3344 3345 bool reg_is_dfs_for_freq(struct wlan_objmgr_pdev *pdev, qdf_freq_t freq) 3346 { 3347 enum channel_state ch_state; 3348 3349 ch_state = reg_get_channel_state_for_freq(pdev, freq); 3350 3351 return ch_state == CHANNEL_STATE_DFS; 3352 } 3353 3354 void reg_update_nol_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3355 uint16_t *chan_freq_list, 3356 uint8_t num_chan, 3357 bool nol_chan) 3358 { 3359 enum channel_enum chan_enum; 3360 struct regulatory_channel *mas_chan_list; 3361 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3362 struct wlan_objmgr_psoc *psoc; 3363 uint16_t i; 3364 3365 if (!num_chan || !chan_freq_list) { 3366 reg_err("chan_freq_list or num_ch is NULL"); 3367 return; 3368 } 3369 3370 psoc = wlan_pdev_get_psoc(pdev); 3371 3372 pdev_priv_obj = reg_get_pdev_obj(pdev); 3373 if (!pdev_priv_obj) { 3374 reg_err("reg pdev private obj is NULL"); 3375 return; 3376 } 3377 3378 mas_chan_list = pdev_priv_obj->mas_chan_list; 3379 for (i = 0; i < num_chan; i++) { 3380 chan_enum = reg_get_chan_enum_for_freq(chan_freq_list[i]); 3381 if (chan_enum == INVALID_CHANNEL) { 3382 reg_err("Invalid freq in nol list, freq %d", 3383 chan_freq_list[i]); 3384 continue; 3385 } 3386 mas_chan_list[chan_enum].nol_chan = nol_chan; 3387 } 3388 3389 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3390 3391 reg_send_scheduler_msg_sb(psoc, pdev); 3392 } 3393 3394 void reg_update_nol_history_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3395 uint16_t *chan_list, 3396 uint8_t num_chan, 3397 bool nol_history_chan) 3398 { 3399 enum channel_enum chan_enum; 3400 struct regulatory_channel *mas_chan_list; 3401 struct regulatory_channel *cur_chan_list; 3402 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3403 uint16_t i; 3404 3405 if (!num_chan || !chan_list) { 3406 reg_err("chan_list or num_ch is NULL"); 3407 return; 3408 } 3409 3410 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 3411 pdev, WLAN_UMAC_COMP_REGULATORY); 3412 3413 if (!pdev_priv_obj) { 3414 reg_err("reg psoc private obj is NULL"); 3415 return; 3416 } 3417 3418 mas_chan_list = pdev_priv_obj->mas_chan_list; 3419 cur_chan_list = pdev_priv_obj->cur_chan_list; 3420 3421 for (i = 0; i < num_chan; i++) { 3422 chan_enum = reg_get_chan_enum_for_freq(chan_list[i]); 3423 if (chan_enum == INVALID_CHANNEL) { 3424 reg_err("Invalid ch in nol list, chan %d", 3425 chan_list[i]); 3426 continue; 3427 } 3428 mas_chan_list[chan_enum].nol_history = nol_history_chan; 3429 cur_chan_list[chan_enum].nol_history = nol_history_chan; 3430 } 3431 } 3432 3433 static inline bool REG_IS_FREQUENCY_VALID_5G_SBS(qdf_freq_t curfreq, 3434 qdf_freq_t newfreq) 3435 { 3436 return ((curfreq) > (newfreq) ? 3437 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3438 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3439 > REG_SBS_SEPARATION_THRESHOLD : 3440 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3441 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3442 > REG_SBS_SEPARATION_THRESHOLD); 3443 } 3444 3445 bool reg_is_frequency_valid_5g_sbs(qdf_freq_t curfreq, qdf_freq_t newfreq) 3446 { 3447 return REG_IS_FREQUENCY_VALID_5G_SBS(curfreq, newfreq); 3448 } 3449 3450 qdf_freq_t reg_min_chan_freq(void) 3451 { 3452 return channel_map[MIN_24GHZ_CHANNEL].center_freq; 3453 } 3454 3455 qdf_freq_t reg_max_chan_freq(void) 3456 { 3457 return channel_map[NUM_CHANNELS - 1].center_freq; 3458 } 3459 3460 bool reg_is_same_band_freqs(qdf_freq_t freq1, qdf_freq_t freq2) 3461 { 3462 return (freq1 && freq2 && ((REG_IS_6GHZ_FREQ(freq1) && 3463 REG_IS_6GHZ_FREQ(freq2)) || 3464 (REG_IS_5GHZ_FREQ(freq1) && 3465 REG_IS_5GHZ_FREQ(freq2)) || 3466 (REG_IS_24GHZ_CH_FREQ(freq1) && 3467 REG_IS_24GHZ_CH_FREQ(freq2)))); 3468 } 3469 3470 enum reg_wifi_band reg_freq_to_band(qdf_freq_t freq) 3471 { 3472 if (REG_IS_24GHZ_CH_FREQ(freq)) 3473 return REG_BAND_2G; 3474 else if (REG_IS_5GHZ_FREQ(freq) || REG_IS_49GHZ_FREQ(freq)) 3475 return REG_BAND_5G; 3476 else if (REG_IS_6GHZ_FREQ(freq)) 3477 return REG_BAND_6G; 3478 return REG_BAND_UNKNOWN; 3479 } 3480 #endif /* CONFIG_CHAN_FREQ_API */ 3481 3482 QDF_STATUS reg_set_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3483 { 3484 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3485 3486 psoc_reg = reg_get_psoc_obj(psoc); 3487 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) { 3488 reg_err("psoc reg component is NULL"); 3489 return QDF_STATUS_E_INVAL; 3490 } 3491 3492 psoc_reg->ignore_fw_reg_offload_ind = true; 3493 return QDF_STATUS_SUCCESS; 3494 } 3495 3496 bool reg_get_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3497 { 3498 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3499 3500 psoc_reg = reg_get_psoc_obj(psoc); 3501 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) 3502 return false; 3503 3504 return psoc_reg->ignore_fw_reg_offload_ind; 3505 } 3506 3507 QDF_STATUS reg_set_6ghz_supported(struct wlan_objmgr_psoc *psoc, bool val) 3508 { 3509 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3510 3511 psoc_priv_obj = reg_get_psoc_obj(psoc); 3512 3513 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3514 reg_err("psoc reg component is NULL"); 3515 return QDF_STATUS_E_FAILURE; 3516 } 3517 3518 psoc_priv_obj->six_ghz_supported = val; 3519 3520 return QDF_STATUS_SUCCESS; 3521 } 3522 3523 bool reg_is_6ghz_op_class(struct wlan_objmgr_pdev *pdev, uint8_t op_class) 3524 { 3525 return ((op_class >= MIN_6GHZ_OPER_CLASS) && 3526 (op_class <= MAX_6GHZ_OPER_CLASS)); 3527 } 3528 3529 bool reg_is_6ghz_supported(struct wlan_objmgr_pdev *pdev) 3530 { 3531 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3532 struct wlan_objmgr_psoc *psoc; 3533 3534 psoc = wlan_pdev_get_psoc(pdev); 3535 if (!psoc) { 3536 reg_err_rl("psoc is NULL"); 3537 return false; 3538 } 3539 3540 psoc_priv_obj = reg_get_psoc_obj(psoc); 3541 3542 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3543 reg_err("psoc reg component is NULL"); 3544 return false; 3545 } 3546 3547 return psoc_priv_obj->six_ghz_supported; 3548 } 3549 3550 #ifdef DISABLE_UNII_SHARED_BANDS 3551 QDF_STATUS 3552 reg_get_unii_5g_bitmap(struct wlan_objmgr_pdev *pdev, uint8_t *bitmap) 3553 { 3554 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3555 3556 pdev_priv_obj = reg_get_pdev_obj(pdev); 3557 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3558 reg_err_rl("pdev reg component is NULL"); 3559 return QDF_STATUS_E_FAILURE; 3560 } 3561 *bitmap = pdev_priv_obj->unii_5g_bitmap; 3562 3563 return QDF_STATUS_SUCCESS; 3564 } 3565 #endif 3566