1 /* 2 * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 #include <target_if.h> 38 39 const struct chan_map *channel_map; 40 #ifdef CONFIG_CHAN_NUM_API 41 static const struct bonded_channel bonded_chan_40mhz_list[] = { 42 {36, 40}, 43 {44, 48}, 44 {52, 56}, 45 {60, 64}, 46 {100, 104}, 47 {108, 112}, 48 {116, 120}, 49 {124, 128}, 50 {132, 136}, 51 {140, 144}, 52 {149, 153}, 53 {157, 161}, 54 {165, 169} 55 }; 56 57 static const struct bonded_channel bonded_chan_80mhz_list[] = { 58 {36, 48}, 59 {52, 64}, 60 {100, 112}, 61 {116, 128}, 62 {132, 144}, 63 {149, 161} 64 }; 65 66 static const struct bonded_channel bonded_chan_160mhz_list[] = { 67 {36, 64}, 68 {100, 128} 69 }; 70 #endif /* CONFIG_CHAN_NUM_API */ 71 72 #ifdef CONFIG_CHAN_FREQ_API 73 /* bonded_chan_40mhz_list_freq - List of 40MHz bonnded channel frequencies */ 74 static const struct bonded_channel_freq bonded_chan_40mhz_list_freq[] = { 75 {5180, 5200}, 76 {5220, 5240}, 77 {5260, 5280}, 78 {5300, 5320}, 79 {5500, 5520}, 80 {5540, 5560}, 81 {5580, 5600}, 82 {5620, 5640}, 83 {5660, 5680}, 84 {5700, 5720}, 85 {5745, 5765}, 86 {5785, 5805}, 87 {5825, 5845}, 88 #ifdef CONFIG_BAND_6GHZ 89 {5945, 5965}, 90 {5985, 6005}, 91 {6025, 6045}, 92 {6065, 6085}, 93 {6105, 6125}, 94 {6145, 6165}, 95 {6185, 6205}, 96 {6225, 6245}, 97 {6265, 6285}, 98 {6305, 6325}, 99 {6345, 6365}, 100 {6385, 6405}, 101 {6425, 6445}, 102 {6465, 6485}, 103 {6505, 6525}, 104 {6545, 6565}, 105 {6585, 6605}, 106 {6625, 6645}, 107 {6665, 6685}, 108 {6705, 6725}, 109 {6745, 6765}, 110 {6785, 6805}, 111 {6825, 6845}, 112 {6865, 6885}, 113 {6905, 6925}, 114 {6945, 6965}, 115 {6985, 7005}, 116 {7025, 7045}, 117 {7065, 7085} 118 #endif /*CONFIG_BAND_6GHZ*/ 119 }; 120 121 /* bonded_chan_80mhz_list_freq - List of 80MHz bonnded channel frequencies */ 122 static const struct bonded_channel_freq bonded_chan_80mhz_list_freq[] = { 123 {5180, 5240}, 124 {5260, 5320}, 125 {5500, 5560}, 126 {5580, 5640}, 127 {5660, 5720}, 128 {5745, 5805}, 129 #ifdef CONFIG_BAND_6GHZ 130 {5945, 6005}, 131 {6025, 6085}, 132 {6105, 6165}, 133 {6185, 6245}, 134 {6265, 6325}, 135 {6345, 6405}, 136 {6425, 6485}, 137 {6505, 6565}, 138 {6585, 6645}, 139 {6665, 6725}, 140 {6745, 6805}, 141 {6825, 6885}, 142 {6905, 6965}, 143 {6985, 7045} 144 #endif /*CONFIG_BAND_6GHZ*/ 145 }; 146 147 /* bonded_chan_160mhz_list_freq - List of 160MHz bonnded channel frequencies */ 148 static const struct bonded_channel_freq bonded_chan_160mhz_list_freq[] = { 149 {5180, 5320}, 150 {5500, 5640}, 151 #ifdef CONFIG_BAND_6GHZ 152 {5945, 6085}, 153 {6105, 6245}, 154 {6265, 6405}, 155 {6425, 6565}, 156 {6585, 6725}, 157 {6745, 6885}, 158 {6905, 7045} 159 #endif /*CONFIG_BAND_6GHZ*/ 160 }; 161 #endif /*CONFIG_CHAN_FREQ_API*/ 162 163 static const enum phy_ch_width get_next_lower_bw[] = { 164 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 165 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 166 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 167 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 168 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 169 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 170 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 171 }; 172 173 const struct chan_map channel_map_us[NUM_CHANNELS] = { 174 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 175 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 176 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 177 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 178 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 179 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 180 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 181 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 182 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 183 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 184 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 185 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 186 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 187 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 188 189 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 190 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 191 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 192 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 193 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 200 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 201 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 202 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 203 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 204 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 205 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 206 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 207 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 208 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 209 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 210 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 211 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 212 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 213 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 214 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 215 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 216 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 217 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 218 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 219 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 220 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 221 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 222 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 223 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 224 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 225 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 226 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 227 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 228 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 229 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 230 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 231 232 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 233 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 234 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 235 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 236 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 237 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 238 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 239 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 240 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 241 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 242 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 243 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 244 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 245 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 246 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 247 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 248 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 249 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 250 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 251 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 252 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 253 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 254 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 255 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 256 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 257 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 258 #ifdef WLAN_FEATURE_DSRC 259 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 260 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 261 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 262 #else 263 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 264 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 265 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 266 #endif 267 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 268 #ifdef WLAN_FEATURE_DSRC 269 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 270 #else 271 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 272 #endif 273 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 274 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 275 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 276 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 277 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 278 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 279 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 280 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 281 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 282 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 283 #ifdef CONFIG_BAND_6GHZ 284 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 285 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 286 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 287 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 288 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 289 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 290 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 291 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 292 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 293 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 294 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 295 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 296 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 297 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 298 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 299 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 300 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 301 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 302 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 303 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 304 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 305 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 306 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 307 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 308 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 309 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 310 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 311 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 312 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 313 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 314 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 315 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 316 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 317 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 318 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 319 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 320 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 321 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 322 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 323 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 324 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 325 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 326 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 327 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 328 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 329 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 330 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 331 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 332 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 333 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 334 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 335 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 336 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 337 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 338 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 339 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 340 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 341 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 342 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 343 #endif /* CONFIG_BAND_6GHZ */ 344 }; 345 346 const struct chan_map channel_map_eu[NUM_CHANNELS] = { 347 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 348 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 349 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 350 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 351 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 352 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 353 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 354 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 355 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 356 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 357 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 358 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 359 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 360 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 361 362 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 363 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 364 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 365 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 366 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 367 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 368 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 369 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 370 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 371 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 372 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 373 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 374 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 375 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 376 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 377 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 378 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 379 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 380 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 381 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 386 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 393 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 394 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 395 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 396 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 397 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 398 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 399 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 400 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 401 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 402 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 403 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 404 405 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 406 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 407 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 408 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 409 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 410 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 411 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 412 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 413 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 414 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 415 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 416 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 417 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 418 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 419 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 420 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 421 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 422 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 423 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 424 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 425 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 426 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 427 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 428 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 429 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 430 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 431 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 432 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 433 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 434 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 435 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 436 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 437 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 438 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 439 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 440 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 441 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 442 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 443 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 444 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 445 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 446 #ifdef CONFIG_BAND_6GHZ 447 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 448 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 449 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 450 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 451 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 452 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 453 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 454 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 455 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 456 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 457 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 458 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 459 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 460 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 461 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 462 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 463 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 464 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 465 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 466 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 467 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 468 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 469 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 470 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 471 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 472 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 473 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 474 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 475 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 476 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 477 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 478 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 479 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 480 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 481 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 482 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 483 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 484 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 485 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 486 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 487 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 488 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 489 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 490 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 491 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 492 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 493 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 494 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 495 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 496 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 497 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 498 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 499 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 500 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 501 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 502 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 503 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 504 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 505 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 506 #endif /* CONFIG_BAND_6GHZ */ 507 }; 508 509 const struct chan_map channel_map_jp[NUM_CHANNELS] = { 510 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 511 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 512 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 513 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 514 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 515 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 516 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 517 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 518 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 519 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 520 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 521 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 522 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 523 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 524 525 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 526 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 527 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 528 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 529 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 530 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 531 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 532 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 533 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 534 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 535 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 536 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 537 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 538 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 539 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 540 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 541 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 542 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 543 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 544 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 545 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 546 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 547 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 548 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 549 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 550 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 551 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 552 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 553 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 554 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 555 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 556 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 557 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 558 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 559 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 560 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 561 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 562 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 563 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 564 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 565 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 566 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 567 568 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 569 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 570 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 571 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 572 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 573 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 574 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 575 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 576 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 577 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 578 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 579 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 580 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 581 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 582 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 583 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 584 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 585 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 586 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 587 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 588 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 589 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 590 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 591 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 592 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 593 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 594 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 595 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 596 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 597 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 598 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 599 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 600 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 601 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 602 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 603 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 604 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 605 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 606 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 607 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 608 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 609 #ifdef CONFIG_BAND_6GHZ 610 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 611 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 612 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 613 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 614 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 615 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 616 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 617 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 618 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 619 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 620 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 621 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 622 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 623 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 624 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 625 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 626 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 627 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 628 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 629 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 630 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 631 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 632 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 633 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 634 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 635 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 636 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 637 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 638 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 639 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 640 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 641 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 642 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 643 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 644 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 645 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 646 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 647 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 648 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 649 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 650 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 651 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 652 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 653 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 654 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 655 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 656 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 657 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 658 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 659 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 660 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 661 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 662 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 663 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 664 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 665 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 666 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 667 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 668 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 669 #endif /* CONFIG_BAND_6GHZ */ 670 }; 671 672 const struct chan_map channel_map_global[NUM_CHANNELS] = { 673 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 674 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 675 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 676 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 677 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 678 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 679 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 680 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 681 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 682 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 683 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 684 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 685 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 686 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 687 688 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 689 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 690 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 691 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 692 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 693 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 694 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 695 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 696 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 697 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 698 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 699 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 700 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 701 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 702 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 703 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 704 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 705 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 706 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 707 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 708 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 709 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 710 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 711 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 712 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 713 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 714 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 715 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 716 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 717 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 718 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 719 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 720 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 721 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 722 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 723 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 724 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 725 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 726 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 727 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 728 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 729 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 730 731 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 732 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 733 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 734 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 735 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 736 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 737 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 738 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 739 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 740 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 741 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 742 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 743 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 744 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 745 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 746 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 747 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 748 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 749 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 750 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 751 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 752 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 753 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 754 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 755 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 756 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 757 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 758 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 759 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 760 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 761 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 762 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 763 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 764 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 765 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 766 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 767 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 768 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 769 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 770 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 771 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 772 #ifdef CONFIG_BAND_6GHZ 773 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 774 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 775 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 776 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 777 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 778 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 779 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 780 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 781 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 782 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 783 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 784 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 785 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 786 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 787 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 788 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 789 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 790 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 791 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 792 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 793 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 794 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 795 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 796 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 797 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 798 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 799 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 800 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 801 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 802 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 803 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 804 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 805 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 806 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 807 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 808 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 809 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 810 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 811 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 812 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 813 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 814 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 815 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 816 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 817 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 818 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 819 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 820 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 821 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 822 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 823 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 824 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 825 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 826 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 827 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 828 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 829 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 830 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 831 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 832 #endif /* CONFIG_BAND_6GHZ */ 833 }; 834 835 const struct chan_map channel_map_china[NUM_CHANNELS] = { 836 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 837 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 838 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 839 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 840 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 841 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 842 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 843 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 844 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 845 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 846 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 847 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 848 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 849 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 850 851 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 852 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 853 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 854 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 855 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 856 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 857 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 858 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 859 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 860 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 861 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 862 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 863 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 864 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 865 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 866 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 867 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 868 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 869 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 870 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 871 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 872 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 873 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 874 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 875 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 876 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 877 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 878 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 879 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 880 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 881 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 882 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 883 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 884 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 885 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 886 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 887 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 888 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 889 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 890 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 891 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 892 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 893 894 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 895 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 896 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 897 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 898 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 899 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 900 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 901 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 902 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 903 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 904 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 905 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 906 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 907 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 908 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 909 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 910 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 911 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 912 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 913 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 914 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 915 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 916 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 917 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 918 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 919 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 920 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 921 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 922 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 923 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 924 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 925 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 926 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 927 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 928 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 929 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 930 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 931 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 932 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 933 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 934 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 935 #ifdef CONFIG_BAND_6GHZ 936 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 937 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 938 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 939 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 940 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 941 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 942 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 943 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 944 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 945 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 946 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 947 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 948 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 949 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 950 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 951 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 952 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 953 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 954 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 955 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 956 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 957 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 958 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 959 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 960 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 961 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 962 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 963 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 964 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 965 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 966 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 967 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 968 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 969 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 970 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 971 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 972 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 973 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 974 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 975 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 976 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 977 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 978 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 979 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 980 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 981 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 982 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 983 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 984 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 985 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 986 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 987 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 988 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 989 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 990 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 991 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 992 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 993 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 994 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 995 #endif /* CONFIG_BAND_6GHZ */ 996 }; 997 998 void reg_init_channel_map(enum dfs_reg dfs_region) 999 { 1000 switch (dfs_region) { 1001 case DFS_UNINIT_REGION: 1002 case DFS_UNDEF_REGION: 1003 channel_map = channel_map_global; 1004 break; 1005 case DFS_FCC_REGION: 1006 channel_map = channel_map_us; 1007 break; 1008 case DFS_ETSI_REGION: 1009 channel_map = channel_map_eu; 1010 break; 1011 case DFS_MKK_REGION: 1012 case DFS_MKKN_REGION: 1013 channel_map = channel_map_jp; 1014 break; 1015 case DFS_CN_REGION: 1016 channel_map = channel_map_china; 1017 break; 1018 case DFS_KR_REGION: 1019 channel_map = channel_map_global; 1020 break; 1021 } 1022 } 1023 1024 uint16_t reg_get_bw_value(enum phy_ch_width bw) 1025 { 1026 switch (bw) { 1027 case CH_WIDTH_20MHZ: 1028 return 20; 1029 case CH_WIDTH_40MHZ: 1030 return 40; 1031 case CH_WIDTH_80MHZ: 1032 return 80; 1033 case CH_WIDTH_160MHZ: 1034 return 160; 1035 case CH_WIDTH_80P80MHZ: 1036 return 160; 1037 case CH_WIDTH_INVALID: 1038 return 0; 1039 case CH_WIDTH_5MHZ: 1040 return 5; 1041 case CH_WIDTH_10MHZ: 1042 return 10; 1043 case CH_WIDTH_MAX: 1044 return 160; 1045 default: 1046 return 0; 1047 } 1048 } 1049 1050 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 1051 struct wlan_objmgr_psoc *psoc) 1052 { 1053 struct wlan_lmac_if_tx_ops *tx_ops; 1054 1055 tx_ops = wlan_psoc_get_lmac_if_txops(psoc); 1056 if (!tx_ops) { 1057 reg_err("tx_ops is NULL"); 1058 return NULL; 1059 } 1060 1061 return &tx_ops->reg_ops; 1062 } 1063 1064 #ifdef CONFIG_CHAN_NUM_API 1065 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 1066 struct channel_power *ch_list, 1067 uint8_t *num_chan) 1068 { 1069 int i, count; 1070 struct regulatory_channel *reg_channels; 1071 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1072 1073 if (!num_chan || !ch_list) { 1074 reg_err("chan_list or num_ch is NULL"); 1075 return QDF_STATUS_E_FAILURE; 1076 } 1077 1078 pdev_priv_obj = reg_get_pdev_obj(pdev); 1079 1080 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1081 reg_err("reg pdev priv obj is NULL"); 1082 return QDF_STATUS_E_FAILURE; 1083 } 1084 1085 /* set the current channel list */ 1086 reg_channels = pdev_priv_obj->cur_chan_list; 1087 1088 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 1089 if (reg_channels[i].state && 1090 reg_channels[i].chan_flags != REGULATORY_CHAN_DISABLED) { 1091 ch_list[count].chan_num = 1092 reg_channels[i].chan_num; 1093 ch_list[count].center_freq = 1094 reg_channels[i].center_freq; 1095 ch_list[count++].tx_power = 1096 reg_channels[i].tx_power; 1097 } 1098 } 1099 1100 *num_chan = count; 1101 1102 return QDF_STATUS_SUCCESS; 1103 } 1104 1105 enum channel_enum reg_get_chan_enum(uint8_t chan_num) 1106 { 1107 uint32_t count; 1108 1109 for (count = 0; count < NUM_CHANNELS; count++) 1110 if (channel_map[count].chan_num == chan_num) 1111 return count; 1112 1113 reg_err("invalid channel number %d", chan_num); 1114 1115 return INVALID_CHANNEL; 1116 } 1117 1118 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 1119 uint8_t ch) 1120 { 1121 enum channel_enum ch_idx; 1122 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1123 1124 ch_idx = reg_get_chan_enum(ch); 1125 1126 if (ch_idx == INVALID_CHANNEL) 1127 return CHANNEL_STATE_INVALID; 1128 1129 pdev_priv_obj = reg_get_pdev_obj(pdev); 1130 1131 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1132 reg_err("pdev reg obj is NULL"); 1133 return CHANNEL_STATE_INVALID; 1134 } 1135 1136 return pdev_priv_obj->cur_chan_list[ch_idx].state; 1137 } 1138 1139 /** 1140 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 1141 * @pdev: Pointer to pdev structure 1142 * @oper_ch: operating channel number 1143 * @bonded_chan_ar: bonded channel array 1144 * @array_size; Array size 1145 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 1146 * 1147 * Return: bonded channel state 1148 */ 1149 static enum channel_state reg_get_5g_bonded_chan_array( 1150 struct wlan_objmgr_pdev *pdev, 1151 uint8_t oper_chan, 1152 const struct bonded_channel bonded_chan_ar[], 1153 uint16_t array_size, 1154 const struct bonded_channel **bonded_chan_ptr_ptr) 1155 { 1156 int i; 1157 uint8_t chan_num; 1158 const struct bonded_channel *bonded_chan_ptr = NULL; 1159 enum channel_state chan_state = CHANNEL_STATE_INVALID; 1160 enum channel_state temp_chan_state; 1161 1162 for (i = 0; i < array_size; i++) { 1163 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 1164 (oper_chan <= bonded_chan_ar[i].end_ch)) { 1165 bonded_chan_ptr = &bonded_chan_ar[i]; 1166 break; 1167 } 1168 } 1169 1170 if (!bonded_chan_ptr) 1171 return chan_state; 1172 1173 *bonded_chan_ptr_ptr = bonded_chan_ptr; 1174 chan_num = bonded_chan_ptr->start_ch; 1175 while (chan_num <= bonded_chan_ptr->end_ch) { 1176 temp_chan_state = reg_get_channel_state(pdev, chan_num); 1177 if (temp_chan_state < chan_state) 1178 chan_state = temp_chan_state; 1179 chan_num = chan_num + 4; 1180 } 1181 1182 return chan_state; 1183 } 1184 1185 enum channel_state reg_get_5g_bonded_channel( 1186 struct wlan_objmgr_pdev *pdev, uint8_t chan_num, 1187 enum phy_ch_width ch_width, 1188 const struct bonded_channel **bonded_chan_ptr_ptr) 1189 { 1190 if (ch_width == CH_WIDTH_80P80MHZ) 1191 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1192 bonded_chan_80mhz_list, 1193 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1194 bonded_chan_ptr_ptr); 1195 else if (ch_width == CH_WIDTH_160MHZ) 1196 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1197 bonded_chan_160mhz_list, 1198 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 1199 bonded_chan_ptr_ptr); 1200 else if (ch_width == CH_WIDTH_80MHZ) 1201 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1202 bonded_chan_80mhz_list, 1203 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1204 bonded_chan_ptr_ptr); 1205 else if (ch_width == CH_WIDTH_40MHZ) 1206 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1207 bonded_chan_40mhz_list, 1208 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1209 bonded_chan_ptr_ptr); 1210 else 1211 return reg_get_channel_state(pdev, chan_num); 1212 } 1213 1214 enum channel_state reg_get_5g_bonded_channel_state( 1215 struct wlan_objmgr_pdev *pdev, 1216 uint8_t ch, enum phy_ch_width bw) 1217 { 1218 enum channel_enum ch_indx; 1219 enum channel_state chan_state; 1220 struct regulatory_channel *reg_channels; 1221 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1222 bool bw_enabled = false; 1223 const struct bonded_channel *bonded_chan_ptr = NULL; 1224 1225 if (bw > CH_WIDTH_80P80MHZ) { 1226 reg_err("bw passed is not good"); 1227 return CHANNEL_STATE_INVALID; 1228 } 1229 1230 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 1231 1232 if ((chan_state == CHANNEL_STATE_INVALID) || 1233 (chan_state == CHANNEL_STATE_DISABLE)) 1234 return chan_state; 1235 1236 pdev_priv_obj = reg_get_pdev_obj(pdev); 1237 1238 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1239 reg_err("pdev reg obj is NULL"); 1240 return CHANNEL_STATE_INVALID; 1241 } 1242 reg_channels = pdev_priv_obj->cur_chan_list; 1243 1244 ch_indx = reg_get_chan_enum(ch); 1245 if (ch_indx == INVALID_CHANNEL) 1246 return CHANNEL_STATE_INVALID; 1247 if (bw == CH_WIDTH_5MHZ) 1248 bw_enabled = true; 1249 else if (bw == CH_WIDTH_10MHZ) 1250 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 1251 (reg_channels[ch_indx].max_bw >= 10); 1252 else if (bw == CH_WIDTH_20MHZ) 1253 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 1254 (reg_channels[ch_indx].max_bw >= 20); 1255 else if (bw == CH_WIDTH_40MHZ) 1256 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 1257 (reg_channels[ch_indx].max_bw >= 40); 1258 else if (bw == CH_WIDTH_80MHZ) 1259 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1260 (reg_channels[ch_indx].max_bw >= 80); 1261 else if (bw == CH_WIDTH_160MHZ) 1262 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 1263 (reg_channels[ch_indx].max_bw >= 160); 1264 else if (bw == CH_WIDTH_80P80MHZ) 1265 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1266 (reg_channels[ch_indx].max_bw >= 80); 1267 1268 if (bw_enabled) 1269 return chan_state; 1270 else 1271 return CHANNEL_STATE_DISABLE; 1272 } 1273 1274 enum channel_state reg_get_2g_bonded_channel_state( 1275 struct wlan_objmgr_pdev *pdev, 1276 uint8_t oper_ch, uint8_t sec_ch, 1277 enum phy_ch_width bw) 1278 { 1279 enum channel_enum chan_idx; 1280 enum channel_state chan_state; 1281 struct regulatory_channel *reg_channels; 1282 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1283 bool bw_enabled = false; 1284 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 1285 1286 if (bw > CH_WIDTH_40MHZ) 1287 return CHANNEL_STATE_INVALID; 1288 1289 if (bw == CH_WIDTH_40MHZ) { 1290 if ((sec_ch + 4 != oper_ch) && 1291 (oper_ch + 4 != sec_ch)) 1292 return CHANNEL_STATE_INVALID; 1293 chan_state2 = reg_get_channel_state(pdev, sec_ch); 1294 if (chan_state2 == CHANNEL_STATE_INVALID) 1295 return chan_state2; 1296 } 1297 1298 pdev_priv_obj = reg_get_pdev_obj(pdev); 1299 1300 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1301 reg_err("reg pdev priv obj is NULL"); 1302 return CHANNEL_STATE_INVALID; 1303 } 1304 1305 reg_channels = pdev_priv_obj->cur_chan_list; 1306 1307 chan_state = reg_get_channel_state(pdev, oper_ch); 1308 if (chan_state2 < chan_state) 1309 chan_state = chan_state2; 1310 1311 if ((chan_state == CHANNEL_STATE_INVALID) || 1312 (chan_state == CHANNEL_STATE_DISABLE)) 1313 return chan_state; 1314 1315 chan_idx = reg_get_chan_enum(oper_ch); 1316 if (chan_idx == INVALID_CHANNEL) 1317 return CHANNEL_STATE_INVALID; 1318 if (bw == CH_WIDTH_5MHZ) 1319 bw_enabled = true; 1320 else if (bw == CH_WIDTH_10MHZ) 1321 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 1322 (reg_channels[chan_idx].max_bw >= 10); 1323 else if (bw == CH_WIDTH_20MHZ) 1324 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 1325 (reg_channels[chan_idx].max_bw >= 20); 1326 else if (bw == CH_WIDTH_40MHZ) 1327 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 1328 (reg_channels[chan_idx].max_bw >= 40); 1329 1330 if (bw_enabled) 1331 return chan_state; 1332 else 1333 return CHANNEL_STATE_DISABLE; 1334 1335 return CHANNEL_STATE_ENABLE; 1336 } 1337 #endif /* CONFIG_CHAN_NUM_API */ 1338 1339 /** 1340 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1341 * @chan_state1: Channel state1 1342 * @chan_state2: Channel state2 1343 * 1344 * Return: Channel state 1345 */ 1346 static enum channel_state reg_combine_channel_states( 1347 enum channel_state chan_state1, 1348 enum channel_state chan_state2) 1349 { 1350 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1351 (chan_state2 == CHANNEL_STATE_INVALID)) 1352 return CHANNEL_STATE_INVALID; 1353 else 1354 return min(chan_state1, chan_state2); 1355 } 1356 1357 #ifdef CONFIG_CHAN_NUM_API 1358 /** 1359 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1360 * @ch: channel number. 1361 * @ch_params: pointer to the channel parameters. 1362 * 1363 * Return: None 1364 */ 1365 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1366 uint8_t ch, 1367 struct ch_params *ch_params) 1368 { 1369 /* 1370 * Set channel parameters like center frequency for a bonded channel 1371 * state. Also return the maximum bandwidth supported by the channel. 1372 */ 1373 1374 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1375 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1376 const struct bonded_channel *bonded_chan_ptr = NULL; 1377 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1378 1379 if (!ch_params) { 1380 reg_err("ch_params is NULL"); 1381 return; 1382 } 1383 1384 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1385 if (ch_params->center_freq_seg1 != 0) 1386 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1387 else 1388 ch_params->ch_width = CH_WIDTH_160MHZ; 1389 } 1390 1391 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1392 bonded_chan_ptr = NULL; 1393 bonded_chan_ptr2 = NULL; 1394 chan_state = reg_get_5g_bonded_channel( 1395 pdev, ch, ch_params->ch_width, 1396 &bonded_chan_ptr); 1397 1398 chan_state = reg_get_5g_bonded_channel_state( 1399 pdev, ch, ch_params->ch_width); 1400 1401 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1402 chan_state2 = reg_get_5g_bonded_channel_state( 1403 pdev, ch_params->center_freq_seg1 - 2, 1404 CH_WIDTH_80MHZ); 1405 1406 chan_state = reg_combine_channel_states( 1407 chan_state, chan_state2); 1408 } 1409 1410 if ((chan_state != CHANNEL_STATE_ENABLE) && 1411 (chan_state != CHANNEL_STATE_DFS)) 1412 goto update_bw; 1413 1414 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1415 ch_params->sec_ch_offset = NO_SEC_CH; 1416 ch_params->center_freq_seg0 = ch; 1417 break; 1418 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1419 reg_get_5g_bonded_chan_array( 1420 pdev, ch, bonded_chan_40mhz_list, 1421 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1422 &bonded_chan_ptr2); 1423 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1424 goto update_bw; 1425 if (ch == bonded_chan_ptr2->start_ch) 1426 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1427 else 1428 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1429 1430 ch_params->center_freq_seg0 = 1431 (bonded_chan_ptr->start_ch + 1432 bonded_chan_ptr->end_ch) / 2; 1433 break; 1434 } 1435 update_bw: 1436 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1437 } 1438 1439 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1440 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1441 chan_state = reg_get_5g_bonded_channel( 1442 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1443 if (bonded_chan_ptr) 1444 ch_params->center_freq_seg0 = 1445 (bonded_chan_ptr->start_ch + 1446 bonded_chan_ptr->end_ch) / 2; 1447 } 1448 1449 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1450 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1451 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1452 ch_params->center_freq_seg1 = 0; 1453 1454 reg_nofl_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1455 ch_params->ch_width, ch_params->center_freq_seg0, 1456 ch_params->center_freq_seg1); 1457 } 1458 1459 /** 1460 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1461 * @oper_ch: operating channel 1462 * @ch_params: channel parameters 1463 * @sec_ch_2g: 2.4G secondary channel 1464 * 1465 * Return: void 1466 */ 1467 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1468 uint16_t oper_ch, 1469 struct ch_params *ch_params, 1470 uint16_t sec_ch_2g) 1471 { 1472 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1473 1474 if (ch_params->ch_width >= CH_WIDTH_MAX) 1475 ch_params->ch_width = CH_WIDTH_40MHZ; 1476 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1477 if (oper_ch >= 1 && oper_ch <= 5) 1478 sec_ch_2g = oper_ch + 4; 1479 else if (oper_ch >= 6 && oper_ch <= 13) 1480 sec_ch_2g = oper_ch - 4; 1481 } 1482 1483 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1484 chan_state = reg_get_2g_bonded_channel_state( 1485 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1486 if (chan_state == CHANNEL_STATE_ENABLE) { 1487 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1488 if (oper_ch < sec_ch_2g) 1489 ch_params->sec_ch_offset = 1490 LOW_PRIMARY_CH; 1491 else 1492 ch_params->sec_ch_offset = 1493 HIGH_PRIMARY_CH; 1494 ch_params->center_freq_seg0 = 1495 (oper_ch + sec_ch_2g) / 2; 1496 } else { 1497 ch_params->sec_ch_offset = NO_SEC_CH; 1498 ch_params->center_freq_seg0 = oper_ch; 1499 } 1500 break; 1501 } 1502 1503 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1504 } 1505 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1506 ch_params->center_freq_seg1 = 0; 1507 } 1508 1509 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1510 uint8_t ch, uint8_t sec_ch_2g, 1511 struct ch_params *ch_params) 1512 { 1513 if (REG_IS_5GHZ_CH(ch)) 1514 reg_set_5g_channel_params(pdev, ch, ch_params); 1515 else if (REG_IS_24GHZ_CH(ch)) 1516 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1517 } 1518 #endif /* CONFIG_CHAN_NUM_API */ 1519 1520 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1521 enum band_info *band) 1522 { 1523 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1524 1525 pdev_reg = reg_get_pdev_obj(pdev); 1526 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1527 reg_err("pdev reg component is NULL"); 1528 return QDF_STATUS_E_INVAL; 1529 } 1530 1531 *band = pdev_reg->band_capability; 1532 1533 return QDF_STATUS_SUCCESS; 1534 } 1535 1536 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1537 uint8_t *country_code) 1538 { 1539 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1540 1541 if (!country_code) { 1542 reg_err("country_code is NULL"); 1543 return QDF_STATUS_E_INVAL; 1544 } 1545 1546 psoc_priv_obj = reg_get_psoc_obj(psoc); 1547 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1548 reg_err("psoc reg component is NULL"); 1549 return QDF_STATUS_E_INVAL; 1550 } 1551 1552 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1553 REG_ALPHA2_LEN + 1); 1554 1555 return QDF_STATUS_SUCCESS; 1556 } 1557 1558 QDF_STATUS reg_get_max_5g_bw_from_country_code(uint16_t cc, 1559 uint16_t *max_bw_5g) 1560 { 1561 uint16_t i; 1562 int num_countries; 1563 1564 *max_bw_5g = 0; 1565 reg_get_num_countries(&num_countries); 1566 1567 for (i = 0; i < num_countries; i++) { 1568 if (g_all_countries[i].country_code == cc) 1569 break; 1570 } 1571 1572 if (i == num_countries) 1573 return QDF_STATUS_E_FAILURE; 1574 1575 *max_bw_5g = g_all_countries[i].max_bw_5g; 1576 1577 return QDF_STATUS_SUCCESS; 1578 } 1579 1580 QDF_STATUS reg_get_max_5g_bw_from_regdomain(uint16_t regdmn, 1581 uint16_t *max_bw_5g) 1582 { 1583 uint16_t i; 1584 int num_reg_dmn; 1585 1586 *max_bw_5g = 0; 1587 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 1588 1589 for (i = 0; i < num_reg_dmn; i++) { 1590 if (g_reg_dmn_pairs[i].reg_dmn_pair_id == regdmn) 1591 break; 1592 } 1593 1594 if (i == num_reg_dmn) 1595 return QDF_STATUS_E_FAILURE; 1596 1597 *max_bw_5g = regdomains_5g[g_reg_dmn_pairs[i].dmn_id_5g].max_bw; 1598 1599 return QDF_STATUS_SUCCESS; 1600 } 1601 1602 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1603 enum dfs_reg *dfs_reg) 1604 { 1605 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1606 1607 pdev_priv_obj = reg_get_pdev_obj(pdev); 1608 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1609 reg_err("reg component pdev priv is NULL"); 1610 return; 1611 } 1612 1613 *dfs_reg = pdev_priv_obj->dfs_region; 1614 } 1615 1616 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1617 enum dfs_reg dfs_reg) 1618 { 1619 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1620 1621 pdev_priv_obj = reg_get_pdev_obj(pdev); 1622 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1623 reg_err("psoc reg component is NULL"); 1624 return; 1625 } 1626 1627 pdev_priv_obj->dfs_region = dfs_reg; 1628 1629 reg_init_channel_map(dfs_reg); 1630 } 1631 1632 #ifdef CONFIG_CHAN_NUM_API 1633 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1634 uint8_t chan_num) 1635 { 1636 enum channel_enum chan_enum; 1637 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1638 struct regulatory_channel *reg_channels; 1639 1640 chan_enum = reg_get_chan_enum(chan_num); 1641 1642 if (chan_enum == INVALID_CHANNEL) { 1643 reg_err("channel is invalid"); 1644 return QDF_STATUS_E_FAILURE; 1645 } 1646 1647 pdev_priv_obj = reg_get_pdev_obj(pdev); 1648 1649 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1650 reg_err("reg pdev priv obj is NULL"); 1651 return QDF_STATUS_E_FAILURE; 1652 } 1653 1654 reg_channels = pdev_priv_obj->cur_chan_list; 1655 1656 return reg_channels[chan_enum].tx_power; 1657 } 1658 1659 qdf_freq_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1660 uint8_t chan_num) 1661 { 1662 enum channel_enum chan_enum; 1663 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1664 struct regulatory_channel *reg_channels; 1665 1666 chan_enum = reg_get_chan_enum(chan_num); 1667 1668 if (chan_enum == INVALID_CHANNEL) 1669 return CHANNEL_STATE_INVALID; 1670 1671 pdev_priv_obj = reg_get_pdev_obj(pdev); 1672 1673 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1674 reg_err("reg pdev priv obj is NULL"); 1675 return QDF_STATUS_E_FAILURE; 1676 } 1677 1678 reg_channels = pdev_priv_obj->cur_chan_list; 1679 1680 return reg_channels[chan_enum].center_freq; 1681 } 1682 1683 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1684 uint8_t chan) 1685 { 1686 enum channel_state ch_state; 1687 1688 ch_state = reg_get_channel_state(pdev, chan); 1689 1690 return ch_state == CHANNEL_STATE_DFS; 1691 } 1692 1693 bool reg_is_disable_ch(struct wlan_objmgr_pdev *pdev, uint8_t chan) 1694 { 1695 enum channel_state ch_state; 1696 1697 ch_state = reg_get_channel_state(pdev, chan); 1698 1699 return ch_state == CHANNEL_STATE_DISABLE; 1700 } 1701 #endif /* CONFIG_CHAN_NUM_API */ 1702 1703 uint8_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1704 qdf_freq_t freq) 1705 { 1706 uint32_t count; 1707 struct regulatory_channel *chan_list; 1708 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1709 1710 if (freq == 0) { 1711 reg_err_rl("Invalid freq %d", freq); 1712 return 0; 1713 } 1714 1715 pdev_priv_obj = reg_get_pdev_obj(pdev); 1716 1717 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1718 reg_err("reg pdev priv obj is NULL"); 1719 return 0; 1720 } 1721 1722 chan_list = pdev_priv_obj->mas_chan_list; 1723 for (count = 0; count < NUM_CHANNELS; count++) { 1724 if (chan_list[count].center_freq >= freq) 1725 break; 1726 } 1727 1728 if (count == NUM_CHANNELS) 1729 goto end; 1730 1731 if (chan_list[count].center_freq == freq) 1732 return chan_list[count].chan_num; 1733 1734 if (count == 0) 1735 goto end; 1736 1737 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1738 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1739 reg_err("Frequency %d invalid in current reg domain", freq); 1740 return 0; 1741 } 1742 1743 return (chan_list[count - 1].chan_num + 1744 (freq - chan_list[count - 1].center_freq) / 5); 1745 1746 end: 1747 reg_err_rl("invalid frequency %d", freq); 1748 return 0; 1749 } 1750 1751 static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1752 uint8_t chan_num, 1753 enum channel_enum min_chan_range, 1754 enum channel_enum max_chan_range) 1755 { 1756 uint16_t count; 1757 struct regulatory_channel *chan_list; 1758 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1759 1760 pdev_priv_obj = reg_get_pdev_obj(pdev); 1761 1762 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1763 reg_err("reg pdev priv obj is NULL"); 1764 return 0; 1765 } 1766 1767 chan_list = pdev_priv_obj->mas_chan_list; 1768 1769 for (count = min_chan_range; count <= max_chan_range; count++) { 1770 if (REG_IS_49GHZ_FREQ(chan_list[count].center_freq)) { 1771 if (chan_list[count].chan_num == chan_num) 1772 break; 1773 continue; 1774 } else if ((chan_list[count].chan_num >= chan_num) && 1775 (chan_list[count].chan_num != INVALID_CHANNEL_NUM)) 1776 break; 1777 } 1778 1779 if (count == max_chan_range + 1) 1780 goto end; 1781 1782 if (chan_list[count].chan_num == chan_num) { 1783 if (chan_list[count].chan_flags & REGULATORY_CHAN_DISABLED) 1784 reg_err("Channel %d disabled in current reg domain", 1785 chan_num); 1786 return chan_list[count].center_freq; 1787 } 1788 1789 if (count == min_chan_range) 1790 goto end; 1791 1792 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1793 REG_IS_49GHZ_FREQ(chan_list[count - 1].center_freq) || 1794 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1795 reg_err("Channel %d invalid in current reg domain", 1796 chan_num); 1797 return 0; 1798 } 1799 1800 return (chan_list[count - 1].center_freq + 1801 (chan_num - chan_list[count - 1].chan_num) * 5); 1802 1803 end: 1804 1805 reg_debug_rl("Invalid channel %d", chan_num); 1806 return 0; 1807 } 1808 1809 uint16_t reg_legacy_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1810 uint8_t chan_num) 1811 { 1812 uint16_t min_chan_range = MIN_24GHZ_CHANNEL; 1813 uint16_t max_chan_range = MAX_5GHZ_CHANNEL; 1814 1815 if (chan_num == 0) { 1816 reg_err_rl("Invalid channel %d", chan_num); 1817 return 0; 1818 } 1819 1820 return reg_compute_chan_to_freq(pdev, chan_num, 1821 min_chan_range, 1822 max_chan_range); 1823 } 1824 1825 #ifdef CONFIG_CHAN_NUM_API 1826 qdf_freq_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1827 uint8_t chan_num) 1828 { 1829 uint32_t count; 1830 struct regulatory_channel *chan_list; 1831 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1832 1833 if (chan_num == 0) { 1834 reg_err_rl("Invalid channel %d", chan_num); 1835 return 0; 1836 } 1837 1838 pdev_priv_obj = reg_get_pdev_obj(pdev); 1839 1840 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1841 reg_err("reg pdev priv obj is NULL"); 1842 return 0; 1843 } 1844 1845 chan_list = pdev_priv_obj->cur_chan_list; 1846 for (count = 0; count < NUM_CHANNELS; count++) 1847 if (chan_list[count].chan_num == chan_num) { 1848 if (reg_chan_in_range(chan_list, 1849 pdev_priv_obj->range_2g_low, 1850 pdev_priv_obj->range_2g_high, 1851 pdev_priv_obj->range_5g_low, 1852 pdev_priv_obj->range_5g_high, 1853 count)) { 1854 return chan_list[count].center_freq; 1855 } 1856 } 1857 1858 reg_debug_rl("invalid channel %d", chan_num); 1859 return 0; 1860 } 1861 1862 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1863 { 1864 qdf_freq_t freq = 0; 1865 1866 freq = reg_chan_to_freq(pdev, chan_num); 1867 1868 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1869 } 1870 1871 enum band_info reg_chan_to_band(uint8_t chan_num) 1872 { 1873 if (chan_num <= 14) 1874 return BAND_2G; 1875 1876 return BAND_5G; 1877 } 1878 1879 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1880 uint8_t *chan_list, 1881 uint8_t num_chan, 1882 bool nol_chan) 1883 { 1884 enum channel_enum chan_enum; 1885 struct regulatory_channel *mas_chan_list; 1886 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1887 uint16_t i; 1888 1889 if (!num_chan || !chan_list) { 1890 reg_err("chan_list or num_ch is NULL"); 1891 return; 1892 } 1893 1894 pdev_priv_obj = reg_get_pdev_obj(pdev); 1895 if (!pdev_priv_obj) { 1896 reg_err("reg psoc private obj is NULL"); 1897 return; 1898 } 1899 1900 mas_chan_list = pdev_priv_obj->mas_chan_list; 1901 for (i = 0; i < num_chan; i++) { 1902 chan_enum = reg_get_chan_enum(chan_list[i]); 1903 if (chan_enum == INVALID_CHANNEL) { 1904 reg_err("Invalid ch in nol list, chan %d", 1905 chan_list[i]); 1906 continue; 1907 } 1908 mas_chan_list[chan_enum].nol_chan = nol_chan; 1909 } 1910 1911 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1912 } 1913 #endif /* CONFIG_CHAN_NUM_API */ 1914 1915 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1916 uint16_t regdmn) 1917 { 1918 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1919 struct cur_regulatory_info *reg_info; 1920 uint16_t cc = -1; 1921 uint16_t country_index = -1, regdmn_pair = -1; 1922 struct wlan_objmgr_psoc *psoc; 1923 QDF_STATUS err; 1924 1925 pdev_priv_obj = reg_get_pdev_obj(pdev); 1926 if (!pdev_priv_obj) { 1927 reg_err("reg soc is NULL"); 1928 return QDF_STATUS_E_FAILURE; 1929 } 1930 1931 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1932 (sizeof(struct cur_regulatory_info)); 1933 if (!reg_info) 1934 return QDF_STATUS_E_NOMEM; 1935 1936 psoc = wlan_pdev_get_psoc(pdev); 1937 if (!psoc) { 1938 reg_err("psoc is NULL"); 1939 return QDF_STATUS_E_INVAL; 1940 } 1941 1942 reg_info->psoc = psoc; 1943 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1944 reg_info->num_phy = 1; 1945 1946 if (regdmn == 0) { 1947 reg_get_default_country(®dmn); 1948 regdmn |= COUNTRY_ERD_FLAG; 1949 } 1950 1951 if (regdmn & COUNTRY_ERD_FLAG) { 1952 cc = regdmn & ~COUNTRY_ERD_FLAG; 1953 1954 reg_get_rdpair_from_country_code(cc, 1955 &country_index, 1956 ®dmn_pair); 1957 1958 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1959 if (err == QDF_STATUS_E_FAILURE) { 1960 reg_err("Unable to set country code\n"); 1961 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1962 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1963 qdf_mem_free(reg_info); 1964 return QDF_STATUS_E_FAILURE; 1965 } 1966 1967 pdev_priv_obj->ctry_code = cc; 1968 1969 } else { 1970 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1971 1972 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1973 if (err == QDF_STATUS_E_FAILURE) { 1974 reg_err("Unable to set country code\n"); 1975 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1976 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1977 qdf_mem_free(reg_info); 1978 return QDF_STATUS_E_FAILURE; 1979 } 1980 1981 pdev_priv_obj->reg_dmn_pair = regdmn; 1982 } 1983 1984 reg_info->offload_enabled = false; 1985 reg_process_master_chan_list(reg_info); 1986 1987 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1988 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1989 qdf_mem_free(reg_info); 1990 1991 return QDF_STATUS_SUCCESS; 1992 } 1993 1994 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1995 struct cc_regdmn_s *rd) 1996 { 1997 struct cur_regulatory_info *reg_info; 1998 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1999 uint16_t country_index = -1, regdmn_pair = -1; 2000 struct wlan_objmgr_psoc *psoc; 2001 struct wlan_lmac_if_reg_tx_ops *tx_ops; 2002 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2003 uint8_t pdev_id; 2004 uint8_t phy_id; 2005 QDF_STATUS err; 2006 2007 pdev_priv_obj = reg_get_pdev_obj(pdev); 2008 if (!pdev_priv_obj) { 2009 reg_err(" pdev priv obj is NULL"); 2010 return QDF_STATUS_E_FAILURE; 2011 } 2012 2013 psoc = wlan_pdev_get_psoc(pdev); 2014 if (!psoc) { 2015 reg_err("psoc is NULL"); 2016 return QDF_STATUS_E_INVAL; 2017 } 2018 2019 psoc_priv_obj = reg_get_psoc_obj(psoc); 2020 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2021 reg_err("psoc reg component is NULL"); 2022 return QDF_STATUS_E_FAILURE; 2023 } 2024 2025 if (psoc_priv_obj->offload_enabled) { 2026 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 2027 pdev_priv_obj->indoor_chan_enabled = false; 2028 else 2029 pdev_priv_obj->indoor_chan_enabled = true; 2030 2031 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2032 tx_ops = reg_get_psoc_tx_ops(psoc); 2033 2034 if (tx_ops->get_phy_id_from_pdev_id) 2035 tx_ops->get_phy_id_from_pdev_id(psoc, pdev_id, &phy_id); 2036 else 2037 phy_id = pdev_id; 2038 2039 if (tx_ops->set_user_country_code) { 2040 psoc_priv_obj->new_init_ctry_pending[phy_id] = true; 2041 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 2042 } 2043 2044 return QDF_STATUS_E_FAILURE; 2045 } 2046 2047 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 2048 (sizeof(struct cur_regulatory_info)); 2049 if (!reg_info) 2050 return QDF_STATUS_E_NOMEM; 2051 2052 reg_info->psoc = psoc; 2053 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2054 2055 if (rd->flags == CC_IS_SET) { 2056 reg_get_rdpair_from_country_code(rd->cc.country_code, 2057 &country_index, 2058 ®dmn_pair); 2059 } else if (rd->flags == ALPHA_IS_SET) { 2060 reg_get_rdpair_from_country_iso(rd->cc.alpha, 2061 &country_index, 2062 ®dmn_pair); 2063 } else if (rd->flags == REGDMN_IS_SET) { 2064 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 2065 ®dmn_pair); 2066 } 2067 2068 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 2069 if (err == QDF_STATUS_E_FAILURE) { 2070 reg_err("Unable to set country code\n"); 2071 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2072 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2073 qdf_mem_free(reg_info); 2074 return QDF_STATUS_E_FAILURE; 2075 } 2076 2077 reg_info->offload_enabled = false; 2078 reg_process_master_chan_list(reg_info); 2079 2080 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2081 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2082 qdf_mem_free(reg_info); 2083 2084 return QDF_STATUS_SUCCESS; 2085 } 2086 2087 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 2088 struct cc_regdmn_s *rd) 2089 { 2090 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2091 2092 pdev_priv_obj = reg_get_pdev_obj(pdev); 2093 if (!pdev_priv_obj) { 2094 reg_err("reg pdev priv is NULL"); 2095 return QDF_STATUS_E_FAILURE; 2096 } 2097 2098 if (rd->flags == CC_IS_SET) { 2099 rd->cc.country_code = pdev_priv_obj->ctry_code; 2100 } else if (rd->flags == ALPHA_IS_SET) { 2101 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 2102 sizeof(rd->cc.alpha)); 2103 } else if (rd->flags == REGDMN_IS_SET) { 2104 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 2105 } 2106 2107 return QDF_STATUS_SUCCESS; 2108 } 2109 2110 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 2111 { 2112 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2113 2114 psoc_priv_obj = reg_get_psoc_obj(psoc); 2115 2116 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2117 reg_err("psoc reg component is NULL"); 2118 return QDF_STATUS_E_FAILURE; 2119 } 2120 2121 psoc_priv_obj->offload_enabled = val; 2122 2123 return QDF_STATUS_SUCCESS; 2124 } 2125 2126 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 2127 struct cur_regdmn_info *cur_regdmn) 2128 { 2129 struct wlan_objmgr_psoc *psoc; 2130 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2131 uint16_t index; 2132 int num_reg_dmn; 2133 uint8_t phy_id; 2134 uint8_t pdev_id; 2135 struct wlan_lmac_if_reg_tx_ops *tx_ops; 2136 2137 psoc = wlan_pdev_get_psoc(pdev); 2138 psoc_priv_obj = reg_get_psoc_obj(psoc); 2139 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2140 reg_err("soc reg component is NULL"); 2141 return QDF_STATUS_E_INVAL; 2142 } 2143 2144 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2145 2146 tx_ops = reg_get_psoc_tx_ops(psoc); 2147 if (tx_ops->get_phy_id_from_pdev_id) 2148 tx_ops->get_phy_id_from_pdev_id(psoc, pdev_id, &phy_id); 2149 else 2150 phy_id = pdev_id; 2151 2152 cur_regdmn->regdmn_pair_id = 2153 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 2154 2155 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 2156 for (index = 0; index < num_reg_dmn; index++) { 2157 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 2158 cur_regdmn->regdmn_pair_id) 2159 break; 2160 } 2161 2162 if (index == num_reg_dmn) { 2163 reg_err_rl("invalid regdomain"); 2164 return QDF_STATUS_E_FAILURE; 2165 } 2166 2167 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 2168 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 2169 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 2170 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 2171 cur_regdmn->dfs_region = 2172 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 2173 2174 return QDF_STATUS_SUCCESS; 2175 } 2176 2177 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 2178 bool enable_ch_144) 2179 { 2180 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2181 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2182 struct wlan_objmgr_psoc *psoc; 2183 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2184 QDF_STATUS status; 2185 2186 pdev_priv_obj = reg_get_pdev_obj(pdev); 2187 2188 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2189 reg_err("pdev reg component is NULL"); 2190 return QDF_STATUS_E_INVAL; 2191 } 2192 2193 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 2194 reg_info("chan 144 is already %d", enable_ch_144); 2195 return QDF_STATUS_SUCCESS; 2196 } 2197 2198 psoc = wlan_pdev_get_psoc(pdev); 2199 if (!psoc) { 2200 reg_err("psoc is NULL"); 2201 return QDF_STATUS_E_INVAL; 2202 } 2203 2204 psoc_priv_obj = reg_get_psoc_obj(psoc); 2205 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2206 reg_err("psoc reg component is NULL"); 2207 return QDF_STATUS_E_INVAL; 2208 } 2209 2210 reg_debug("setting chan 144: %d", enable_ch_144); 2211 pdev_priv_obj->en_chan_144 = enable_ch_144; 2212 2213 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2214 2215 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2216 if (reg_tx_ops->fill_umac_legacy_chanlist) 2217 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2218 pdev_priv_obj->cur_chan_list); 2219 2220 status = reg_send_scheduler_msg_sb(psoc, pdev); 2221 2222 return status; 2223 } 2224 2225 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 2226 { 2227 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2228 2229 pdev_priv_obj = reg_get_pdev_obj(pdev); 2230 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2231 reg_err("pdev reg component is NULL"); 2232 return false; 2233 } 2234 2235 return pdev_priv_obj->en_chan_144; 2236 } 2237 2238 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 2239 struct wlan_objmgr_psoc *psoc) 2240 { 2241 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2242 2243 psoc_priv_obj = reg_get_psoc_obj(psoc); 2244 2245 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2246 reg_err("psoc reg component is NULL"); 2247 return NULL; 2248 } 2249 2250 return psoc_priv_obj->reg_cap; 2251 } 2252 2253 QDF_STATUS reg_set_hal_reg_cap( 2254 struct wlan_objmgr_psoc *psoc, 2255 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 2256 uint16_t phy_cnt) 2257 { 2258 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2259 2260 psoc_priv_obj = reg_get_psoc_obj(psoc); 2261 2262 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2263 reg_err("psoc reg component is NULL"); 2264 return QDF_STATUS_E_FAILURE; 2265 } 2266 2267 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 2268 reg_err("phy cnt:%d is more than %d", phy_cnt, 2269 PSOC_MAX_PHY_REG_CAP); 2270 return QDF_STATUS_E_FAILURE; 2271 } 2272 2273 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 2274 phy_cnt * 2275 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 2276 2277 return QDF_STATUS_SUCCESS; 2278 } 2279 2280 QDF_STATUS reg_update_hal_reg_cap(struct wlan_objmgr_psoc *psoc, 2281 uint32_t wireless_modes, uint8_t phy_id) 2282 { 2283 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2284 2285 if (!psoc) { 2286 reg_err("psoc is null"); 2287 return QDF_STATUS_E_FAILURE; 2288 } 2289 2290 psoc_priv_obj = reg_get_psoc_obj(psoc); 2291 2292 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2293 reg_err("psoc reg component is NULL"); 2294 return QDF_STATUS_E_FAILURE; 2295 } 2296 2297 psoc_priv_obj->reg_cap[phy_id].wireless_modes |= wireless_modes; 2298 2299 return QDF_STATUS_SUCCESS; 2300 } 2301 2302 bool reg_chan_in_range(struct regulatory_channel *chan_list, 2303 qdf_freq_t low_freq_2g, qdf_freq_t high_freq_2g, 2304 qdf_freq_t low_freq_5g, qdf_freq_t high_freq_5g, 2305 enum channel_enum ch_enum) 2306 { 2307 uint32_t low_limit_2g = NUM_CHANNELS; 2308 uint32_t high_limit_2g = NUM_CHANNELS; 2309 uint32_t low_limit_5g = NUM_CHANNELS; 2310 uint32_t high_limit_5g = NUM_CHANNELS; 2311 bool chan_in_range; 2312 enum channel_enum chan_enum; 2313 uint16_t min_bw; 2314 qdf_freq_t center_freq; 2315 2316 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2317 min_bw = chan_list[chan_enum].min_bw; 2318 center_freq = chan_list[chan_enum].center_freq; 2319 2320 if ((center_freq - min_bw / 2) >= low_freq_2g) { 2321 low_limit_2g = chan_enum; 2322 break; 2323 } 2324 } 2325 2326 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2327 min_bw = chan_list[chan_enum].min_bw; 2328 center_freq = chan_list[chan_enum].center_freq; 2329 2330 if ((center_freq - min_bw / 2) >= low_freq_5g) { 2331 low_limit_5g = chan_enum; 2332 break; 2333 } 2334 } 2335 2336 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2337 min_bw = chan_list[chan_enum].min_bw; 2338 center_freq = chan_list[chan_enum].center_freq; 2339 2340 if (center_freq + min_bw / 2 <= high_freq_2g) { 2341 high_limit_2g = chan_enum; 2342 break; 2343 } 2344 if (chan_enum == 0) 2345 break; 2346 } 2347 2348 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2349 min_bw = chan_list[chan_enum].min_bw; 2350 center_freq = chan_list[chan_enum].center_freq; 2351 2352 if (center_freq + min_bw / 2 <= high_freq_5g) { 2353 high_limit_5g = chan_enum; 2354 break; 2355 } 2356 if (chan_enum == 0) 2357 break; 2358 } 2359 2360 chan_in_range = false; 2361 if ((low_limit_2g <= ch_enum) && 2362 (high_limit_2g >= ch_enum) && 2363 (low_limit_2g != NUM_CHANNELS) && 2364 (high_limit_2g != NUM_CHANNELS)) 2365 chan_in_range = true; 2366 if ((low_limit_5g <= ch_enum) && 2367 (high_limit_5g >= ch_enum) && 2368 (low_limit_5g != NUM_CHANNELS) && 2369 (high_limit_5g != NUM_CHANNELS)) 2370 chan_in_range = true; 2371 2372 if (chan_in_range) 2373 return true; 2374 else 2375 return false; 2376 } 2377 2378 #ifdef CONFIG_CHAN_NUM_API 2379 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 2380 uint8_t *chan_list, uint8_t num_chan, 2381 bool nol_history_chan) 2382 { 2383 enum channel_enum chan_enum; 2384 struct regulatory_channel *mas_chan_list; 2385 struct regulatory_channel *cur_chan_list; 2386 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2387 uint16_t i; 2388 2389 if (!num_chan || !chan_list) { 2390 reg_err("chan_list or num_ch is NULL"); 2391 return; 2392 } 2393 2394 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 2395 pdev, WLAN_UMAC_COMP_REGULATORY); 2396 2397 if (!pdev_priv_obj) { 2398 reg_err("reg psoc private obj is NULL"); 2399 return; 2400 } 2401 2402 mas_chan_list = pdev_priv_obj->mas_chan_list; 2403 cur_chan_list = pdev_priv_obj->cur_chan_list; 2404 2405 for (i = 0; i < num_chan; i++) { 2406 chan_enum = reg_get_chan_enum(chan_list[i]); 2407 if (chan_enum == INVALID_CHANNEL) { 2408 reg_err("Invalid ch in nol list, chan %d", 2409 chan_list[i]); 2410 continue; 2411 } 2412 mas_chan_list[chan_enum].nol_history = nol_history_chan; 2413 cur_chan_list[chan_enum].nol_history = nol_history_chan; 2414 } 2415 } 2416 2417 bool reg_is_24ghz_ch(uint32_t chan) 2418 { 2419 return REG_IS_24GHZ_CH(chan); 2420 } 2421 2422 bool reg_is_5ghz_ch(uint32_t chan) 2423 { 2424 return REG_IS_5GHZ_CH(chan); 2425 } 2426 #endif /* CONFIG_CHAN_NUM_API */ 2427 2428 bool reg_is_24ghz_ch_freq(uint32_t freq) 2429 { 2430 return REG_IS_24GHZ_CH_FREQ(freq); 2431 } 2432 2433 bool reg_is_5ghz_ch_freq(uint32_t freq) 2434 { 2435 return REG_IS_5GHZ_FREQ(freq); 2436 } 2437 2438 /** 2439 * BAND_2G_PRESENT() - Check if REG_BAND_2G is set in the band_mask 2440 * @band_mask: Bitmask for bands 2441 * 2442 * Return: True if REG_BAND_2G is set in the band_mask, else false 2443 */ 2444 static inline bool BAND_2G_PRESENT(uint8_t band_mask) 2445 { 2446 return !!(band_mask & (BIT(REG_BAND_2G))); 2447 } 2448 2449 /** 2450 * BAND_5G_PRESENT() - Check if REG_BAND_5G is set in the band_mask 2451 * @band_mask: Bitmask for bands 2452 * 2453 * Return: True if REG_BAND_5G is set in the band_mask, else false 2454 */ 2455 static inline bool BAND_5G_PRESENT(uint8_t band_mask) 2456 { 2457 return !!(band_mask & (BIT(REG_BAND_5G))); 2458 } 2459 2460 #ifdef CONFIG_BAND_6GHZ 2461 bool reg_is_6ghz_chan_freq(uint16_t freq) 2462 { 2463 return REG_IS_6GHZ_FREQ(freq); 2464 } 2465 2466 #ifdef CONFIG_6G_FREQ_OVERLAP 2467 /** 2468 * reg_is_freq_in_between() - Check whether freq falls within low_freq and 2469 * high_freq, inclusively. 2470 * @low_freq - Low frequency. 2471 * @high_freq - High frequency. 2472 * @freq - Frequency to be checked. 2473 * 2474 * Return: True if freq falls within low_freq and high_freq, else false. 2475 */ 2476 static bool reg_is_freq_in_between(qdf_freq_t low_freq, qdf_freq_t high_freq, 2477 qdf_freq_t freq) 2478 { 2479 return (low_freq <= freq && freq <= high_freq); 2480 } 2481 2482 static bool reg_is_ranges_overlap(qdf_freq_t low_freq, qdf_freq_t high_freq, 2483 qdf_freq_t start_edge_freq, 2484 qdf_freq_t end_edge_freq) 2485 { 2486 return (reg_is_freq_in_between(start_edge_freq, 2487 end_edge_freq, 2488 low_freq) || 2489 reg_is_freq_in_between(start_edge_freq, 2490 end_edge_freq, 2491 high_freq) || 2492 reg_is_freq_in_between(low_freq, 2493 high_freq, 2494 start_edge_freq) || 2495 reg_is_freq_in_between(low_freq, 2496 high_freq, 2497 end_edge_freq)); 2498 } 2499 2500 static bool reg_is_range_overlap_6g(qdf_freq_t low_freq, 2501 qdf_freq_t high_freq) 2502 { 2503 return reg_is_ranges_overlap(low_freq, high_freq, 2504 SIXG_STARTING_EDGE_FREQ, 2505 SIXG_ENDING_EDGE_FREQ); 2506 } 2507 2508 static bool reg_is_range_overlap_5g(qdf_freq_t low_freq, 2509 qdf_freq_t high_freq) 2510 { 2511 return reg_is_ranges_overlap(low_freq, high_freq, 2512 FIVEG_STARTING_EDGE_FREQ, 2513 FIVEG_ENDING_EDGE_FREQ); 2514 } 2515 2516 bool reg_is_range_only6g(qdf_freq_t low_freq, qdf_freq_t high_freq) 2517 { 2518 if (low_freq >= high_freq) { 2519 reg_err_rl("Low freq is greater than or equal to high freq"); 2520 return false; 2521 } 2522 2523 if (reg_is_range_overlap_6g(low_freq, high_freq) && 2524 !reg_is_range_overlap_5g(low_freq, high_freq)) { 2525 reg_debug_rl("The device is 6G only"); 2526 return true; 2527 } 2528 2529 reg_debug_rl("The device is not 6G only"); 2530 2531 return false; 2532 } 2533 #endif 2534 2535 uint16_t reg_min_6ghz_chan_freq(void) 2536 { 2537 return REG_MIN_6GHZ_CHAN_FREQ; 2538 } 2539 2540 uint16_t reg_max_6ghz_chan_freq(void) 2541 { 2542 return REG_MAX_6GHZ_CHAN_FREQ; 2543 } 2544 2545 bool reg_is_6ghz_psc_chan_freq(uint16_t freq) 2546 { 2547 if (!REG_IS_6GHZ_FREQ(freq)) { 2548 reg_debug(" Channel frequency is not a 6GHz frequency"); 2549 return false; 2550 } 2551 2552 if (!(((freq - SIXG_STARTING_FREQ) + (FREQ_LEFT_SHIFT)) % 2553 (FREQ_TO_CHAN_SCALE * NUM_80MHZ_BAND_IN_6G))) { 2554 return true; 2555 } 2556 2557 reg_debug_rl("Channel freq %d MHz is not a 6GHz PSC frequency", freq); 2558 2559 return false; 2560 } 2561 2562 /** 2563 * BAND_6G_PRESENT() - Check if REG_BAND_6G is set in the band_mask 2564 * @band_mask: Bitmask for bands 2565 * 2566 * Return: True if REG_BAND_6G is set in the band_mask, else false 2567 */ 2568 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2569 { 2570 return !!(band_mask & (BIT(REG_BAND_6G))); 2571 } 2572 #else 2573 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2574 { 2575 return false; 2576 } 2577 #endif /* CONFIG_BAND_6GHZ */ 2578 2579 uint16_t 2580 reg_get_band_channel_list(struct wlan_objmgr_pdev *pdev, 2581 uint8_t band_mask, 2582 struct regulatory_channel *channel_list) 2583 { 2584 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2585 struct regulatory_channel *cur_chan_list; 2586 uint16_t i, num_channels = 0; 2587 2588 pdev_priv_obj = reg_get_pdev_obj(pdev); 2589 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2590 reg_err("reg pdev priv obj is NULL"); 2591 return 0; 2592 } 2593 2594 cur_chan_list = pdev_priv_obj->cur_chan_list; 2595 2596 if (BAND_2G_PRESENT(band_mask)) { 2597 for (i = MIN_24GHZ_CHANNEL; i <= MAX_24GHZ_CHANNEL; i++) { 2598 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2599 !(cur_chan_list[i].chan_flags & 2600 REGULATORY_CHAN_DISABLED)) { 2601 channel_list[num_channels] = cur_chan_list[i]; 2602 num_channels++; 2603 } 2604 } 2605 } 2606 if (BAND_5G_PRESENT(band_mask)) { 2607 for (i = MIN_49GHZ_CHANNEL; i <= MAX_5GHZ_CHANNEL; i++) { 2608 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2609 !(cur_chan_list[i].chan_flags & 2610 REGULATORY_CHAN_DISABLED)) { 2611 channel_list[num_channels] = cur_chan_list[i]; 2612 num_channels++; 2613 } 2614 } 2615 } 2616 if (BAND_6G_PRESENT(band_mask)) { 2617 for (i = MIN_6GHZ_CHANNEL; i <= MAX_6GHZ_CHANNEL; i++) { 2618 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2619 !(cur_chan_list[i].chan_flags & 2620 REGULATORY_CHAN_DISABLED)) { 2621 channel_list[num_channels] = cur_chan_list[i]; 2622 num_channels++; 2623 } 2624 } 2625 } 2626 2627 if (!num_channels) { 2628 reg_err("Failed to retrieve the channel list"); 2629 return 0; 2630 } 2631 2632 return num_channels; 2633 } 2634 2635 qdf_freq_t reg_chan_band_to_freq(struct wlan_objmgr_pdev *pdev, 2636 uint8_t chan_num, 2637 uint8_t band_mask) 2638 { 2639 enum channel_enum min_chan, max_chan; 2640 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2641 uint16_t freq; 2642 2643 if (chan_num == 0) { 2644 reg_err_rl("Invalid channel %d", chan_num); 2645 return 0; 2646 } 2647 2648 pdev_priv_obj = reg_get_pdev_obj(pdev); 2649 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2650 reg_err("reg pdev priv obj is NULL"); 2651 return 0; 2652 } 2653 2654 if (BAND_6G_PRESENT(band_mask)) { 2655 if (BAND_2G_PRESENT(band_mask) || 2656 BAND_5G_PRESENT(band_mask)) { 2657 reg_err_rl("Incorrect band_mask %x", band_mask); 2658 return 0; 2659 } 2660 2661 min_chan = MIN_6GHZ_CHANNEL; 2662 max_chan = MAX_6GHZ_CHANNEL; 2663 return reg_compute_chan_to_freq(pdev, chan_num, 2664 min_chan, 2665 max_chan); 2666 } else { 2667 if (BAND_2G_PRESENT(band_mask)) { 2668 min_chan = MIN_24GHZ_CHANNEL; 2669 max_chan = MAX_24GHZ_CHANNEL; 2670 freq = reg_compute_chan_to_freq(pdev, chan_num, 2671 min_chan, 2672 max_chan); 2673 if (freq != 0) 2674 return freq; 2675 } 2676 2677 if (BAND_5G_PRESENT(band_mask)) { 2678 min_chan = MIN_49GHZ_CHANNEL; 2679 max_chan = MAX_5GHZ_CHANNEL; 2680 2681 return reg_compute_chan_to_freq(pdev, chan_num, 2682 min_chan, 2683 max_chan); 2684 } 2685 2686 reg_err_rl("Incorrect band_mask %x", band_mask); 2687 return 0; 2688 } 2689 } 2690 2691 bool reg_is_49ghz_freq(qdf_freq_t freq) 2692 { 2693 return REG_IS_49GHZ_FREQ(freq); 2694 } 2695 2696 qdf_freq_t reg_ch_num(uint32_t ch_enum) 2697 { 2698 return REG_CH_NUM(ch_enum); 2699 } 2700 2701 qdf_freq_t reg_ch_to_freq(uint32_t ch_enum) 2702 { 2703 return REG_CH_TO_FREQ(ch_enum); 2704 } 2705 2706 #ifdef CONFIG_CHAN_NUM_API 2707 bool reg_is_same_band_channels(uint8_t chan_num1, uint8_t chan_num2) 2708 { 2709 return (chan_num1 && chan_num2 && 2710 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 2711 } 2712 2713 bool reg_is_channel_valid_5g_sbs(uint8_t curchan, uint8_t newchan) 2714 { 2715 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 2716 } 2717 2718 uint8_t reg_min_24ghz_ch_num(void) 2719 { 2720 return REG_MIN_24GHZ_CH_NUM; 2721 } 2722 2723 uint8_t reg_max_24ghz_ch_num(void) 2724 { 2725 return REG_MAX_24GHZ_CH_NUM; 2726 } 2727 2728 uint8_t reg_min_5ghz_ch_num(void) 2729 { 2730 return REG_MIN_5GHZ_CH_NUM; 2731 } 2732 2733 uint8_t reg_max_5ghz_ch_num(void) 2734 { 2735 return REG_MAX_5GHZ_CH_NUM; 2736 } 2737 #endif /* CONFIG_CHAN_NUM_API */ 2738 2739 #ifdef CONFIG_CHAN_FREQ_API 2740 qdf_freq_t reg_min_24ghz_chan_freq(void) 2741 { 2742 return REG_MIN_24GHZ_CH_FREQ; 2743 } 2744 2745 qdf_freq_t reg_max_24ghz_chan_freq(void) 2746 { 2747 return REG_MAX_24GHZ_CH_FREQ; 2748 } 2749 2750 qdf_freq_t reg_min_5ghz_chan_freq(void) 2751 { 2752 return REG_MIN_5GHZ_CH_FREQ; 2753 } 2754 2755 qdf_freq_t reg_max_5ghz_chan_freq(void) 2756 { 2757 return REG_MAX_5GHZ_CH_FREQ; 2758 } 2759 #endif /* CONFIG_CHAN_FREQ_API */ 2760 2761 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 2762 bool enable) 2763 { 2764 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2765 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2766 struct wlan_objmgr_psoc *psoc; 2767 QDF_STATUS status; 2768 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2769 2770 pdev_priv_obj = reg_get_pdev_obj(pdev); 2771 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2772 reg_err("pdev reg component is NULL"); 2773 return QDF_STATUS_E_INVAL; 2774 } 2775 2776 if (pdev_priv_obj->dfs_enabled == enable) { 2777 reg_info("dfs_enabled is already set to %d", enable); 2778 return QDF_STATUS_SUCCESS; 2779 } 2780 2781 psoc = wlan_pdev_get_psoc(pdev); 2782 if (!psoc) { 2783 reg_err("psoc is NULL"); 2784 return QDF_STATUS_E_INVAL; 2785 } 2786 2787 psoc_priv_obj = reg_get_psoc_obj(psoc); 2788 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2789 reg_err("psoc reg component is NULL"); 2790 return QDF_STATUS_E_INVAL; 2791 } 2792 2793 reg_info("set dfs_enabled: %d", enable); 2794 2795 pdev_priv_obj->dfs_enabled = enable; 2796 2797 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2798 2799 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2800 2801 /* Fill the ic channel list with the updated current channel 2802 * chan list. 2803 */ 2804 if (reg_tx_ops->fill_umac_legacy_chanlist) 2805 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2806 pdev_priv_obj->cur_chan_list); 2807 2808 status = reg_send_scheduler_msg_sb(psoc, pdev); 2809 2810 return status; 2811 } 2812 2813 bool reg_is_regdmn_en302502_applicable(struct wlan_objmgr_pdev *pdev) 2814 { 2815 struct cur_regdmn_info cur_reg_dmn; 2816 QDF_STATUS status; 2817 2818 status = reg_get_curr_regdomain(pdev, &cur_reg_dmn); 2819 if (status != QDF_STATUS_SUCCESS) { 2820 reg_err("Failed to get reg domain"); 2821 return false; 2822 } 2823 2824 return reg_en302_502_regdmn(cur_reg_dmn.regdmn_pair_id); 2825 } 2826 2827 QDF_STATUS reg_get_phybitmap(struct wlan_objmgr_pdev *pdev, 2828 uint16_t *phybitmap) 2829 { 2830 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2831 2832 pdev_priv_obj = reg_get_pdev_obj(pdev); 2833 2834 if (!pdev_priv_obj) { 2835 reg_err("reg pdev private obj is NULL"); 2836 return QDF_STATUS_E_FAULT; 2837 } 2838 2839 *phybitmap = pdev_priv_obj->phybitmap; 2840 2841 return QDF_STATUS_SUCCESS; 2842 } 2843 2844 QDF_STATUS reg_modify_pdev_chan_range(struct wlan_objmgr_pdev *pdev) 2845 { 2846 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2847 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2848 struct wlan_objmgr_psoc *psoc; 2849 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2850 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap_ptr; 2851 uint32_t cnt; 2852 uint32_t phy_id; 2853 enum direction dir; 2854 QDF_STATUS status = QDF_STATUS_SUCCESS; 2855 struct target_pdev_info *tgt_pdev; 2856 2857 tgt_pdev = wlan_pdev_get_tgt_if_handle(pdev); 2858 phy_id = (uint32_t)target_pdev_get_phy_idx(tgt_pdev); 2859 pdev_priv_obj = reg_get_pdev_obj(pdev); 2860 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2861 reg_err("pdev reg component is NULL"); 2862 return QDF_STATUS_E_INVAL; 2863 } 2864 2865 psoc = wlan_pdev_get_psoc(pdev); 2866 if (!psoc) { 2867 reg_err("psoc is NULL"); 2868 return QDF_STATUS_E_INVAL; 2869 } 2870 2871 psoc_priv_obj = reg_get_psoc_obj(psoc); 2872 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2873 reg_err("psoc reg component is NULL"); 2874 return QDF_STATUS_E_INVAL; 2875 } 2876 2877 reg_cap_ptr = psoc_priv_obj->reg_cap; 2878 2879 for (cnt = 0; cnt < PSOC_MAX_PHY_REG_CAP; cnt++) { 2880 if (!reg_cap_ptr) { 2881 qdf_mem_free(pdev_priv_obj); 2882 reg_err("reg cap ptr is NULL"); 2883 return QDF_STATUS_E_FAULT; 2884 } 2885 2886 if (reg_cap_ptr->phy_id == phy_id) 2887 break; 2888 reg_cap_ptr++; 2889 } 2890 2891 if (cnt == PSOC_MAX_PHY_REG_CAP) { 2892 qdf_mem_free(pdev_priv_obj); 2893 reg_err("extended capabilities not found for pdev"); 2894 return QDF_STATUS_E_FAULT; 2895 } 2896 2897 if (psoc_priv_obj->offload_enabled) { 2898 dir = NORTHBOUND; 2899 } else { 2900 dir = SOUTHBOUND; 2901 } 2902 2903 pdev_priv_obj->range_2g_low = reg_cap_ptr->low_2ghz_chan; 2904 pdev_priv_obj->range_2g_high = reg_cap_ptr->high_2ghz_chan; 2905 pdev_priv_obj->range_5g_low = reg_cap_ptr->low_5ghz_chan; 2906 pdev_priv_obj->range_5g_high = reg_cap_ptr->high_5ghz_chan; 2907 pdev_priv_obj->wireless_modes = reg_cap_ptr->wireless_modes; 2908 2909 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2910 2911 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2912 2913 /* Fill the ic channel list with the updated current channel 2914 * chan list. 2915 */ 2916 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2917 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2918 pdev_priv_obj->cur_chan_list); 2919 2920 } else { 2921 if (dir == NORTHBOUND) 2922 status = reg_send_scheduler_msg_nb(psoc, pdev); 2923 else 2924 status = reg_send_scheduler_msg_sb(psoc, pdev); 2925 } 2926 2927 return status; 2928 } 2929 2930 QDF_STATUS reg_update_pdev_wireless_modes(struct wlan_objmgr_pdev *pdev, 2931 uint32_t wireless_modes) 2932 { 2933 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2934 2935 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj(pdev, 2936 WLAN_UMAC_COMP_REGULATORY); 2937 2938 if (!pdev_priv_obj) { 2939 reg_err("reg pdev private obj is NULL"); 2940 return QDF_STATUS_E_INVAL; 2941 } 2942 2943 pdev_priv_obj->wireless_modes = wireless_modes; 2944 2945 return QDF_STATUS_SUCCESS; 2946 } 2947 2948 #ifdef DISABLE_UNII_SHARED_BANDS 2949 /** 2950 * reg_is_reg_unii_band_1_or_reg_unii_band_2a() - Check the input bitmap 2951 * @unii_5g_bitmap: 5G UNII band bitmap 2952 * 2953 * This function checks if either REG_UNII_BAND_1 or REG_UNII_BAND_2A, 2954 * are present in the 5G UNII band bitmap. 2955 * 2956 * Return: Return true if REG_UNII_BAND_1 or REG_UNII_BAND_2A, are present in 2957 * the UNII 5g bitmap else return false. 2958 */ 2959 static bool 2960 reg_is_reg_unii_band_1_or_reg_unii_band_2a(uint8_t unii_5g_bitmap) 2961 { 2962 if (!unii_5g_bitmap) 2963 return false; 2964 2965 return ((unii_5g_bitmap & (BIT(REG_UNII_BAND_1) | 2966 BIT(REG_UNII_BAND_2A))) == unii_5g_bitmap); 2967 } 2968 2969 QDF_STATUS reg_disable_chan_coex(struct wlan_objmgr_pdev *pdev, 2970 uint8_t unii_5g_bitmap) 2971 { 2972 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2973 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2974 struct wlan_objmgr_psoc *psoc; 2975 2976 psoc = wlan_pdev_get_psoc(pdev); 2977 if (!psoc) { 2978 reg_err("psoc is NULL"); 2979 return QDF_STATUS_E_INVAL; 2980 } 2981 2982 pdev_priv_obj = reg_get_pdev_obj(pdev); 2983 2984 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2985 reg_err_rl("reg pdev priv obj is NULL"); 2986 return QDF_STATUS_E_FAILURE; 2987 } 2988 2989 if (unii_5g_bitmap && 2990 !reg_is_reg_unii_band_1_or_reg_unii_band_2a(unii_5g_bitmap)) { 2991 reg_err_rl("Invalid unii_5g_bitmap = %d", unii_5g_bitmap); 2992 return QDF_STATUS_E_FAILURE; 2993 } 2994 2995 if (pdev_priv_obj->unii_5g_bitmap == unii_5g_bitmap) { 2996 reg_debug_rl("UNII bitmask for 5G channels is already set %d", 2997 unii_5g_bitmap); 2998 return QDF_STATUS_SUCCESS; 2999 } 3000 3001 reg_debug_rl("Setting UNII bitmask for 5G: %d", unii_5g_bitmap); 3002 pdev_priv_obj->unii_5g_bitmap = unii_5g_bitmap; 3003 3004 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3005 3006 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 3007 3008 if (reg_tx_ops->fill_umac_legacy_chanlist) { 3009 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 3010 pdev_priv_obj->cur_chan_list); 3011 } 3012 3013 return QDF_STATUS_SUCCESS; 3014 } 3015 #endif 3016 3017 #ifdef CONFIG_CHAN_FREQ_API 3018 QDF_STATUS reg_get_channel_list_with_power_for_freq(struct wlan_objmgr_pdev 3019 *pdev, 3020 struct channel_power 3021 *ch_list, 3022 uint8_t *num_chan) 3023 { 3024 int i, count; 3025 struct regulatory_channel *reg_channels; 3026 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3027 3028 if (!num_chan || !ch_list) { 3029 reg_err("chan_list or num_ch is NULL"); 3030 return QDF_STATUS_E_FAILURE; 3031 } 3032 3033 pdev_priv_obj = reg_get_pdev_obj(pdev); 3034 3035 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3036 reg_err("reg pdev priv obj is NULL"); 3037 return QDF_STATUS_E_FAILURE; 3038 } 3039 3040 /* set the current channel list */ 3041 reg_channels = pdev_priv_obj->cur_chan_list; 3042 3043 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 3044 if (reg_channels[i].state && 3045 !(reg_channels[i].chan_flags & REGULATORY_CHAN_DISABLED)) { 3046 ch_list[count].center_freq = 3047 reg_channels[i].center_freq; 3048 ch_list[count++].tx_power = 3049 reg_channels[i].tx_power; 3050 } 3051 } 3052 3053 *num_chan = count; 3054 3055 return QDF_STATUS_SUCCESS; 3056 } 3057 3058 enum channel_enum reg_get_chan_enum_for_freq(qdf_freq_t freq) 3059 { 3060 uint32_t count; 3061 3062 for (count = 0; count < NUM_CHANNELS; count++) 3063 if (channel_map[count].center_freq == freq) 3064 return count; 3065 3066 reg_err("invalid channel center frequency %d", freq); 3067 3068 return INVALID_CHANNEL; 3069 } 3070 3071 bool 3072 reg_is_freq_present_in_cur_chan_list(struct wlan_objmgr_pdev *pdev, 3073 qdf_freq_t freq) 3074 { 3075 enum channel_enum chan_enum; 3076 struct regulatory_channel *cur_chan_list; 3077 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3078 3079 pdev_priv_obj = reg_get_pdev_obj(pdev); 3080 3081 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3082 reg_err_rl("pdev reg obj is NULL"); 3083 return false; 3084 } 3085 3086 cur_chan_list = pdev_priv_obj->cur_chan_list; 3087 3088 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) 3089 if (cur_chan_list[chan_enum].center_freq == freq) 3090 if ((cur_chan_list[chan_enum].state != 3091 CHANNEL_STATE_DISABLE) && 3092 !(cur_chan_list[chan_enum].chan_flags & 3093 REGULATORY_CHAN_DISABLED)) 3094 return true; 3095 3096 reg_debug_rl("Channel center frequency %d not found", freq); 3097 3098 return false; 3099 } 3100 3101 enum channel_state reg_get_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3102 qdf_freq_t freq) 3103 { 3104 enum channel_enum ch_idx; 3105 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3106 3107 ch_idx = reg_get_chan_enum_for_freq(freq); 3108 3109 if (ch_idx == INVALID_CHANNEL) 3110 return CHANNEL_STATE_INVALID; 3111 3112 pdev_priv_obj = reg_get_pdev_obj(pdev); 3113 3114 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3115 reg_err("pdev reg obj is NULL"); 3116 return CHANNEL_STATE_INVALID; 3117 } 3118 3119 return pdev_priv_obj->cur_chan_list[ch_idx].state; 3120 } 3121 3122 static uint32_t reg_get_channel_flags_for_freq(struct wlan_objmgr_pdev *pdev, 3123 qdf_freq_t freq) 3124 { 3125 enum channel_enum chan_enum; 3126 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3127 3128 chan_enum = reg_get_chan_enum_for_freq(freq); 3129 3130 if (chan_enum == INVALID_CHANNEL) { 3131 reg_err("chan freq is not valid"); 3132 return REGULATORY_CHAN_INVALID; 3133 } 3134 3135 pdev_priv_obj = reg_get_pdev_obj(pdev); 3136 3137 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3138 reg_err("pdev reg obj is NULL"); 3139 return REGULATORY_CHAN_INVALID; 3140 } 3141 3142 return pdev_priv_obj->cur_chan_list[chan_enum].chan_flags; 3143 } 3144 3145 /** 3146 * reg_get_5g_bonded_chan_array_for_freq()- Return the channel state for a 3147 * 5G or 6G channel frequency based on the bonded channel. 3148 * @pdev: Pointer to pdev. 3149 * @freq: Channel center frequency. 3150 * @bonded_chan_ar: Array of bonded channel frequencies. 3151 * @array_size: Array size. 3152 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 3153 * 3154 * Return: Channel State 3155 */ 3156 static enum channel_state 3157 reg_get_5g_bonded_chan_array_for_freq(struct wlan_objmgr_pdev *pdev, 3158 uint16_t freq, 3159 const struct bonded_channel_freq 3160 bonded_chan_ar[], 3161 uint16_t array_size, 3162 const struct bonded_channel_freq 3163 **bonded_chan_ptr_ptr) 3164 { 3165 int i; 3166 uint16_t chan_cfreq; 3167 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3168 enum channel_state chan_state = CHANNEL_STATE_INVALID; 3169 enum channel_state temp_chan_state; 3170 3171 for (i = 0; i < array_size; i++) { 3172 if ((freq >= bonded_chan_ar[i].start_freq) && 3173 (freq <= bonded_chan_ar[i].end_freq)) { 3174 bonded_chan_ptr = &bonded_chan_ar[i]; 3175 break; 3176 } 3177 } 3178 3179 if (!bonded_chan_ptr) 3180 return chan_state; 3181 3182 *bonded_chan_ptr_ptr = bonded_chan_ptr; 3183 chan_cfreq = bonded_chan_ptr->start_freq; 3184 while (chan_cfreq <= bonded_chan_ptr->end_freq) { 3185 temp_chan_state = reg_get_channel_state_for_freq(pdev, 3186 chan_cfreq); 3187 if (temp_chan_state < chan_state) 3188 chan_state = temp_chan_state; 3189 chan_cfreq = chan_cfreq + 20; 3190 } 3191 3192 return chan_state; 3193 } 3194 3195 /** 3196 * reg_get_5g_bonded_channel_for_freq()- Return the channel state for a 3197 * 5G or 6G channel frequency based on the channel width and bonded channel 3198 * @pdev: Pointer to pdev. 3199 * @freq: Channel center frequency. 3200 * @ch_width: Channel Width. 3201 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 3202 * 3203 * Return: Channel State 3204 */ 3205 enum channel_state 3206 reg_get_5g_bonded_channel_for_freq(struct wlan_objmgr_pdev *pdev, 3207 uint16_t freq, 3208 enum phy_ch_width ch_width, 3209 const struct bonded_channel_freq 3210 **bonded_chan_ptr_ptr) 3211 3212 { 3213 if (ch_width == CH_WIDTH_80P80MHZ) 3214 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 3215 bonded_chan_80mhz_list_freq, 3216 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 3217 bonded_chan_ptr_ptr); 3218 else if (ch_width == CH_WIDTH_160MHZ) 3219 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 3220 bonded_chan_160mhz_list_freq, 3221 QDF_ARRAY_SIZE(bonded_chan_160mhz_list_freq), 3222 bonded_chan_ptr_ptr); 3223 else if (ch_width == CH_WIDTH_80MHZ) 3224 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 3225 bonded_chan_80mhz_list_freq, 3226 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 3227 bonded_chan_ptr_ptr); 3228 else if (ch_width == CH_WIDTH_40MHZ) 3229 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 3230 bonded_chan_40mhz_list_freq, 3231 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3232 bonded_chan_ptr_ptr); 3233 else 3234 return reg_get_channel_state_for_freq(pdev, freq); 3235 } 3236 3237 enum channel_state 3238 reg_get_5g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3239 qdf_freq_t freq, 3240 enum phy_ch_width bw) 3241 { 3242 enum channel_enum ch_indx; 3243 enum channel_state chan_state; 3244 struct regulatory_channel *reg_channels; 3245 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3246 bool bw_enabled = false; 3247 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3248 3249 if (bw > CH_WIDTH_80P80MHZ) { 3250 reg_err("bw passed is not good"); 3251 return CHANNEL_STATE_INVALID; 3252 } 3253 3254 chan_state = reg_get_5g_bonded_channel_for_freq(pdev, freq, bw, 3255 &bonded_chan_ptr); 3256 3257 if ((chan_state == CHANNEL_STATE_INVALID) || 3258 (chan_state == CHANNEL_STATE_DISABLE)) 3259 return chan_state; 3260 3261 pdev_priv_obj = reg_get_pdev_obj(pdev); 3262 3263 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3264 reg_err("pdev reg obj is NULL"); 3265 return CHANNEL_STATE_INVALID; 3266 } 3267 reg_channels = pdev_priv_obj->cur_chan_list; 3268 3269 ch_indx = reg_get_chan_enum_for_freq(freq); 3270 if (ch_indx == INVALID_CHANNEL) 3271 return CHANNEL_STATE_INVALID; 3272 if (bw == CH_WIDTH_5MHZ) 3273 bw_enabled = true; 3274 else if (bw == CH_WIDTH_10MHZ) 3275 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 3276 (reg_channels[ch_indx].max_bw >= 10); 3277 else if (bw == CH_WIDTH_20MHZ) 3278 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 3279 (reg_channels[ch_indx].max_bw >= 20); 3280 else if (bw == CH_WIDTH_40MHZ) 3281 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 3282 (reg_channels[ch_indx].max_bw >= 40); 3283 else if (bw == CH_WIDTH_80MHZ) 3284 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3285 (reg_channels[ch_indx].max_bw >= 80); 3286 else if (bw == CH_WIDTH_160MHZ) 3287 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 3288 (reg_channels[ch_indx].max_bw >= 160); 3289 else if (bw == CH_WIDTH_80P80MHZ) 3290 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3291 (reg_channels[ch_indx].max_bw >= 80); 3292 3293 if (bw_enabled) 3294 return chan_state; 3295 else 3296 return CHANNEL_STATE_DISABLE; 3297 } 3298 3299 enum channel_state 3300 reg_get_2g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3301 qdf_freq_t oper_ch_freq, 3302 qdf_freq_t sec_ch_freq, 3303 enum phy_ch_width bw) 3304 { 3305 enum channel_enum chan_idx; 3306 enum channel_state chan_state; 3307 struct regulatory_channel *reg_channels; 3308 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3309 bool bw_enabled = false; 3310 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 3311 3312 if (bw > CH_WIDTH_40MHZ) 3313 return CHANNEL_STATE_INVALID; 3314 3315 if (bw == CH_WIDTH_40MHZ) { 3316 if ((sec_ch_freq + 20 != oper_ch_freq) && 3317 (oper_ch_freq + 20 != sec_ch_freq)) 3318 return CHANNEL_STATE_INVALID; 3319 chan_state2 = reg_get_channel_state_for_freq(pdev, sec_ch_freq); 3320 if (chan_state2 == CHANNEL_STATE_INVALID) 3321 return chan_state2; 3322 } 3323 3324 pdev_priv_obj = reg_get_pdev_obj(pdev); 3325 3326 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3327 reg_err("reg pdev priv obj is NULL"); 3328 return CHANNEL_STATE_INVALID; 3329 } 3330 3331 reg_channels = pdev_priv_obj->cur_chan_list; 3332 3333 chan_state = reg_get_channel_state_for_freq(pdev, oper_ch_freq); 3334 if (chan_state2 < chan_state) 3335 chan_state = chan_state2; 3336 3337 if ((chan_state == CHANNEL_STATE_INVALID) || 3338 (chan_state == CHANNEL_STATE_DISABLE)) 3339 return chan_state; 3340 3341 chan_idx = reg_get_chan_enum_for_freq(oper_ch_freq); 3342 if (chan_idx == INVALID_CHANNEL) 3343 return CHANNEL_STATE_INVALID; 3344 if (bw == CH_WIDTH_5MHZ) 3345 bw_enabled = true; 3346 else if (bw == CH_WIDTH_10MHZ) 3347 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 3348 (reg_channels[chan_idx].max_bw >= 10); 3349 else if (bw == CH_WIDTH_20MHZ) 3350 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 3351 (reg_channels[chan_idx].max_bw >= 20); 3352 else if (bw == CH_WIDTH_40MHZ) 3353 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 3354 (reg_channels[chan_idx].max_bw >= 40); 3355 3356 if (bw_enabled) 3357 return chan_state; 3358 else 3359 return CHANNEL_STATE_DISABLE; 3360 3361 return CHANNEL_STATE_ENABLE; 3362 } 3363 3364 /** 3365 * reg_set_5g_channel_params_for_freq()- Set channel parameters like center 3366 * frequency for a bonded channel state. Also return the maximum bandwidth 3367 * supported by the channel. 3368 * @pdev: Pointer to pdev. 3369 * @freq: Channel center frequency. 3370 * ch_params: Pointer to ch_params. 3371 * 3372 * Return: void 3373 */ 3374 static void reg_set_5g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3375 uint16_t freq, 3376 struct ch_params *ch_params) 3377 { 3378 /* 3379 * Set channel parameters like center frequency for a bonded channel 3380 * state. Also return the maximum bandwidth supported by the channel. 3381 */ 3382 3383 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3384 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 3385 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3386 const struct bonded_channel_freq *bonded_chan_ptr2 = NULL; 3387 3388 if (!ch_params) { 3389 reg_err("ch_params is NULL"); 3390 return; 3391 } 3392 3393 if (ch_params->ch_width >= CH_WIDTH_MAX) { 3394 if (ch_params->mhz_freq_seg1 != 0) 3395 ch_params->ch_width = CH_WIDTH_80P80MHZ; 3396 else 3397 ch_params->ch_width = CH_WIDTH_160MHZ; 3398 } 3399 3400 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3401 bonded_chan_ptr = NULL; 3402 bonded_chan_ptr2 = NULL; 3403 chan_state = reg_get_5g_bonded_channel_for_freq( 3404 pdev, freq, ch_params->ch_width, 3405 &bonded_chan_ptr); 3406 3407 chan_state = reg_get_5g_bonded_channel_state_for_freq( 3408 pdev, freq, ch_params->ch_width); 3409 3410 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 3411 chan_state2 = reg_get_5g_bonded_channel_state_for_freq( 3412 pdev, ch_params->mhz_freq_seg1 - 3413 NEAREST_20MHZ_CHAN_FREQ_OFFSET, 3414 CH_WIDTH_80MHZ); 3415 3416 chan_state = reg_combine_channel_states( 3417 chan_state, chan_state2); 3418 } 3419 3420 if ((chan_state != CHANNEL_STATE_ENABLE) && 3421 (chan_state != CHANNEL_STATE_DFS)) 3422 goto update_bw; 3423 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 3424 ch_params->sec_ch_offset = NO_SEC_CH; 3425 ch_params->mhz_freq_seg0 = freq; 3426 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3427 ch_params->center_freq_seg0 = 3428 (ch_params->mhz_freq_seg0 - 3429 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3430 else 3431 ch_params->center_freq_seg0 = 3432 (ch_params->mhz_freq_seg0 - 3433 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3434 break; 3435 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 3436 reg_get_5g_bonded_chan_array_for_freq( 3437 pdev, freq, bonded_chan_40mhz_list_freq, 3438 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3439 &bonded_chan_ptr2); 3440 if (!bonded_chan_ptr || !bonded_chan_ptr2) 3441 goto update_bw; 3442 if (freq == bonded_chan_ptr2->start_freq) 3443 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 3444 else 3445 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 3446 3447 ch_params->mhz_freq_seg0 = 3448 (bonded_chan_ptr->start_freq + 3449 bonded_chan_ptr->end_freq) / 2; 3450 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3451 ch_params->center_freq_seg0 = 3452 (ch_params->mhz_freq_seg0 - 3453 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3454 else 3455 ch_params->center_freq_seg0 = 3456 (ch_params->mhz_freq_seg0 - 3457 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3458 break; 3459 } 3460 update_bw: 3461 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3462 } 3463 3464 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 3465 ch_params->mhz_freq_seg1 = ch_params->mhz_freq_seg0; 3466 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg1)) 3467 ch_params->center_freq_seg1 = 3468 (ch_params->mhz_freq_seg1 - SIXG_STARTING_FREQ) / 3469 FREQ_TO_CHAN_SCALE; 3470 else 3471 ch_params->center_freq_seg1 = 3472 (ch_params->mhz_freq_seg1 - FIVEG_STARTING_FREQ) / 3473 FREQ_TO_CHAN_SCALE; 3474 chan_state = reg_get_5g_bonded_channel_for_freq( 3475 pdev, freq, CH_WIDTH_80MHZ, &bonded_chan_ptr); 3476 if (bonded_chan_ptr) { 3477 ch_params->mhz_freq_seg0 = 3478 (bonded_chan_ptr->start_freq + 3479 bonded_chan_ptr->end_freq) / 2; 3480 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3481 ch_params->center_freq_seg0 = 3482 (ch_params->mhz_freq_seg0 - 3483 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3484 else 3485 ch_params->center_freq_seg0 = 3486 (ch_params->mhz_freq_seg0 - 3487 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3488 } 3489 } 3490 3491 /* Overwrite mhz_freq_seg1 to 0 for non 160 and 80+80 width */ 3492 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 3493 ch_params->ch_width == CH_WIDTH_80P80MHZ)) { 3494 ch_params->mhz_freq_seg1 = 0; 3495 ch_params->center_freq_seg1 = 0; 3496 } 3497 } 3498 3499 /** 3500 * reg_set_2g_channel_params_for_freq() - set the 2.4G bonded channel parameters 3501 * @oper_freq: operating channel 3502 * @ch_params: channel parameters 3503 * @sec_ch_2g_freq: 2.4G secondary channel 3504 * 3505 * Return: void 3506 */ 3507 static void reg_set_2g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3508 uint16_t oper_freq, 3509 struct ch_params *ch_params, 3510 uint16_t sec_ch_2g_freq) 3511 { 3512 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3513 3514 if (ch_params->ch_width >= CH_WIDTH_MAX) 3515 ch_params->ch_width = CH_WIDTH_40MHZ; 3516 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g_freq) { 3517 if (oper_freq >= TWOG_CHAN_1_IN_MHZ && oper_freq <= 3518 TWOG_CHAN_5_IN_MHZ) 3519 sec_ch_2g_freq = oper_freq + 20; 3520 else if (oper_freq >= TWOG_CHAN_6_IN_MHZ && oper_freq <= 3521 TWOG_CHAN_13_IN_MHZ) 3522 sec_ch_2g_freq = oper_freq - 20; 3523 } 3524 3525 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3526 chan_state = 3527 reg_get_2g_bonded_channel_state_for_freq(pdev, oper_freq, 3528 sec_ch_2g_freq, 3529 ch_params->ch_width); 3530 if (chan_state == CHANNEL_STATE_ENABLE) { 3531 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 3532 if (oper_freq < sec_ch_2g_freq) 3533 ch_params->sec_ch_offset = 3534 LOW_PRIMARY_CH; 3535 else 3536 ch_params->sec_ch_offset = 3537 HIGH_PRIMARY_CH; 3538 ch_params->mhz_freq_seg0 = 3539 (oper_freq + sec_ch_2g_freq) / 2; 3540 if (ch_params->mhz_freq_seg0 == 3541 TWOG_CHAN_14_IN_MHZ) 3542 ch_params->center_freq_seg0 = 14; 3543 else 3544 ch_params->center_freq_seg0 = 3545 (ch_params->mhz_freq_seg0 - 3546 TWOG_STARTING_FREQ) / 3547 FREQ_TO_CHAN_SCALE; 3548 } else { 3549 ch_params->sec_ch_offset = NO_SEC_CH; 3550 ch_params->mhz_freq_seg0 = oper_freq; 3551 if (ch_params->mhz_freq_seg0 == 3552 TWOG_CHAN_14_IN_MHZ) 3553 ch_params->center_freq_seg0 = 14; 3554 else 3555 ch_params->center_freq_seg0 = 3556 (ch_params->mhz_freq_seg0 - 3557 TWOG_STARTING_FREQ) / 3558 FREQ_TO_CHAN_SCALE; 3559 } 3560 break; 3561 } 3562 3563 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3564 } 3565 /* Overwrite mhz_freq_seg1 and center_freq_seg1 to 0 for 2.4 Ghz */ 3566 ch_params->mhz_freq_seg1 = 0; 3567 ch_params->center_freq_seg1 = 0; 3568 } 3569 3570 void reg_set_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3571 qdf_freq_t freq, 3572 qdf_freq_t sec_ch_2g_freq, 3573 struct ch_params *ch_params) 3574 { 3575 if (reg_is_5ghz_ch_freq(freq) || reg_is_6ghz_chan_freq(freq)) 3576 reg_set_5g_channel_params_for_freq(pdev, freq, ch_params); 3577 else if (reg_is_24ghz_ch_freq(freq)) 3578 reg_set_2g_channel_params_for_freq(pdev, freq, ch_params, 3579 sec_ch_2g_freq); 3580 } 3581 3582 uint8_t reg_get_channel_reg_power_for_freq(struct wlan_objmgr_pdev *pdev, 3583 qdf_freq_t freq) 3584 { 3585 enum channel_enum chan_enum; 3586 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3587 struct regulatory_channel *reg_channels; 3588 3589 chan_enum = reg_get_chan_enum_for_freq(freq); 3590 3591 if (chan_enum == INVALID_CHANNEL) { 3592 reg_err("channel is invalid"); 3593 return REG_INVALID_TXPOWER; 3594 } 3595 3596 pdev_priv_obj = reg_get_pdev_obj(pdev); 3597 3598 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3599 reg_err("reg pdev priv obj is NULL"); 3600 return REG_INVALID_TXPOWER; 3601 } 3602 3603 reg_channels = pdev_priv_obj->cur_chan_list; 3604 3605 return reg_channels[chan_enum].tx_power; 3606 } 3607 3608 bool reg_is_dfs_for_freq(struct wlan_objmgr_pdev *pdev, qdf_freq_t freq) 3609 { 3610 uint32_t chan_flags; 3611 3612 chan_flags = reg_get_channel_flags_for_freq(pdev, freq); 3613 3614 return chan_flags & REGULATORY_CHAN_RADAR; 3615 } 3616 3617 void reg_update_nol_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3618 uint16_t *chan_freq_list, 3619 uint8_t num_chan, 3620 bool nol_chan) 3621 { 3622 enum channel_enum chan_enum; 3623 struct regulatory_channel *mas_chan_list; 3624 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3625 struct wlan_objmgr_psoc *psoc; 3626 uint16_t i; 3627 3628 if (!num_chan || !chan_freq_list) { 3629 reg_err("chan_freq_list or num_ch is NULL"); 3630 return; 3631 } 3632 3633 psoc = wlan_pdev_get_psoc(pdev); 3634 3635 pdev_priv_obj = reg_get_pdev_obj(pdev); 3636 if (!pdev_priv_obj) { 3637 reg_err("reg pdev private obj is NULL"); 3638 return; 3639 } 3640 3641 mas_chan_list = pdev_priv_obj->mas_chan_list; 3642 for (i = 0; i < num_chan; i++) { 3643 chan_enum = reg_get_chan_enum_for_freq(chan_freq_list[i]); 3644 if (chan_enum == INVALID_CHANNEL) { 3645 reg_err("Invalid freq in nol list, freq %d", 3646 chan_freq_list[i]); 3647 continue; 3648 } 3649 mas_chan_list[chan_enum].nol_chan = nol_chan; 3650 } 3651 3652 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3653 3654 reg_send_scheduler_msg_sb(psoc, pdev); 3655 } 3656 3657 void reg_update_nol_history_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3658 uint16_t *chan_list, 3659 uint8_t num_chan, 3660 bool nol_history_chan) 3661 { 3662 enum channel_enum chan_enum; 3663 struct regulatory_channel *mas_chan_list; 3664 struct regulatory_channel *cur_chan_list; 3665 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3666 uint16_t i; 3667 3668 if (!num_chan || !chan_list) { 3669 reg_err("chan_list or num_ch is NULL"); 3670 return; 3671 } 3672 3673 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 3674 pdev, WLAN_UMAC_COMP_REGULATORY); 3675 3676 if (!pdev_priv_obj) { 3677 reg_err("reg psoc private obj is NULL"); 3678 return; 3679 } 3680 3681 mas_chan_list = pdev_priv_obj->mas_chan_list; 3682 cur_chan_list = pdev_priv_obj->cur_chan_list; 3683 3684 for (i = 0; i < num_chan; i++) { 3685 chan_enum = reg_get_chan_enum_for_freq(chan_list[i]); 3686 if (chan_enum == INVALID_CHANNEL) { 3687 reg_err("Invalid ch in nol list, chan %d", 3688 chan_list[i]); 3689 continue; 3690 } 3691 mas_chan_list[chan_enum].nol_history = nol_history_chan; 3692 cur_chan_list[chan_enum].nol_history = nol_history_chan; 3693 } 3694 } 3695 3696 static inline bool REG_IS_FREQUENCY_VALID_5G_SBS(qdf_freq_t curfreq, 3697 qdf_freq_t newfreq) 3698 { 3699 return ((curfreq) > (newfreq) ? 3700 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3701 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3702 > REG_SBS_SEPARATION_THRESHOLD : 3703 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3704 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3705 > REG_SBS_SEPARATION_THRESHOLD); 3706 } 3707 3708 bool reg_is_frequency_valid_5g_sbs(qdf_freq_t curfreq, qdf_freq_t newfreq) 3709 { 3710 return REG_IS_FREQUENCY_VALID_5G_SBS(curfreq, newfreq); 3711 } 3712 3713 qdf_freq_t reg_min_chan_freq(void) 3714 { 3715 return channel_map[MIN_24GHZ_CHANNEL].center_freq; 3716 } 3717 3718 qdf_freq_t reg_max_chan_freq(void) 3719 { 3720 return channel_map[NUM_CHANNELS - 1].center_freq; 3721 } 3722 3723 bool reg_is_same_band_freqs(qdf_freq_t freq1, qdf_freq_t freq2) 3724 { 3725 return (freq1 && freq2 && ((REG_IS_6GHZ_FREQ(freq1) && 3726 REG_IS_6GHZ_FREQ(freq2)) || 3727 (REG_IS_5GHZ_FREQ(freq1) && 3728 REG_IS_5GHZ_FREQ(freq2)) || 3729 (REG_IS_24GHZ_CH_FREQ(freq1) && 3730 REG_IS_24GHZ_CH_FREQ(freq2)))); 3731 } 3732 3733 enum reg_wifi_band reg_freq_to_band(qdf_freq_t freq) 3734 { 3735 if (REG_IS_24GHZ_CH_FREQ(freq)) 3736 return REG_BAND_2G; 3737 else if (REG_IS_5GHZ_FREQ(freq) || REG_IS_49GHZ_FREQ(freq)) 3738 return REG_BAND_5G; 3739 else if (REG_IS_6GHZ_FREQ(freq)) 3740 return REG_BAND_6G; 3741 return REG_BAND_UNKNOWN; 3742 } 3743 3744 bool reg_is_disable_for_freq(struct wlan_objmgr_pdev *pdev, qdf_freq_t freq) 3745 { 3746 enum channel_state ch_state; 3747 3748 ch_state = reg_get_channel_state_for_freq(pdev, freq); 3749 3750 return ch_state == CHANNEL_STATE_DISABLE; 3751 } 3752 #endif /* CONFIG_CHAN_FREQ_API */ 3753 3754 uint8_t reg_get_max_tx_power(struct wlan_objmgr_pdev *pdev) 3755 { 3756 struct regulatory_channel *cur_chan_list; 3757 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3758 uint8_t i, max_tx_power = 0; 3759 3760 pdev_priv_obj = reg_get_pdev_obj(pdev); 3761 3762 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3763 reg_err("reg pdev private obj is NULL"); 3764 return QDF_STATUS_E_FAILURE; 3765 } 3766 3767 cur_chan_list = pdev_priv_obj->cur_chan_list; 3768 3769 for (i = 0; i < NUM_CHANNELS; i++) { 3770 if (cur_chan_list[i].state != CHANNEL_STATE_DISABLE && 3771 cur_chan_list[i].chan_flags != REGULATORY_CHAN_DISABLED) { 3772 if (cur_chan_list[i].tx_power > max_tx_power) 3773 max_tx_power = cur_chan_list[i].tx_power; 3774 } 3775 } 3776 3777 if (!max_tx_power) 3778 reg_err_rl("max_tx_power is zero"); 3779 3780 return max_tx_power; 3781 } 3782 3783 QDF_STATUS reg_set_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3784 { 3785 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3786 3787 psoc_reg = reg_get_psoc_obj(psoc); 3788 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) { 3789 reg_err("psoc reg component is NULL"); 3790 return QDF_STATUS_E_INVAL; 3791 } 3792 3793 psoc_reg->ignore_fw_reg_offload_ind = true; 3794 return QDF_STATUS_SUCCESS; 3795 } 3796 3797 bool reg_get_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3798 { 3799 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3800 3801 psoc_reg = reg_get_psoc_obj(psoc); 3802 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) 3803 return false; 3804 3805 return psoc_reg->ignore_fw_reg_offload_ind; 3806 } 3807 3808 QDF_STATUS reg_set_6ghz_supported(struct wlan_objmgr_psoc *psoc, bool val) 3809 { 3810 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3811 3812 psoc_priv_obj = reg_get_psoc_obj(psoc); 3813 3814 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3815 reg_err("psoc reg component is NULL"); 3816 return QDF_STATUS_E_FAILURE; 3817 } 3818 3819 psoc_priv_obj->six_ghz_supported = val; 3820 3821 return QDF_STATUS_SUCCESS; 3822 } 3823 3824 bool reg_is_6ghz_op_class(struct wlan_objmgr_pdev *pdev, uint8_t op_class) 3825 { 3826 return ((op_class >= MIN_6GHZ_OPER_CLASS) && 3827 (op_class <= MAX_6GHZ_OPER_CLASS)); 3828 } 3829 3830 #ifdef CONFIG_REG_CLIENT 3831 bool reg_is_6ghz_supported(struct wlan_objmgr_psoc *psoc) 3832 { 3833 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3834 3835 psoc_priv_obj = reg_get_psoc_obj(psoc); 3836 3837 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3838 reg_err("psoc reg component is NULL"); 3839 return false; 3840 } 3841 3842 return psoc_priv_obj->six_ghz_supported; 3843 } 3844 #endif 3845 3846 #ifdef DISABLE_UNII_SHARED_BANDS 3847 QDF_STATUS 3848 reg_get_unii_5g_bitmap(struct wlan_objmgr_pdev *pdev, uint8_t *bitmap) 3849 { 3850 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3851 3852 pdev_priv_obj = reg_get_pdev_obj(pdev); 3853 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3854 reg_err_rl("pdev reg component is NULL"); 3855 return QDF_STATUS_E_FAILURE; 3856 } 3857 *bitmap = pdev_priv_obj->unii_5g_bitmap; 3858 3859 return QDF_STATUS_SUCCESS; 3860 } 3861 #endif 3862 3863 #ifdef CHECK_REG_PHYMODE 3864 /** 3865 * reg_is_phymode_allowed() - Check if requested phymode is unallowed 3866 * @phy_in: phymode that the user requested 3867 * @phymode_bitmap: bitmap of unallowed phymodes for specific country 3868 * 3869 * Return: true if phymode is not allowed, else false 3870 */ 3871 static bool reg_is_phymode_unallowed(enum reg_phymode phy_in, 3872 uint32_t phymode_bitmap) 3873 { 3874 if (!phymode_bitmap) 3875 return false; 3876 3877 if (phy_in == REG_PHYMODE_11AX) 3878 return phymode_bitmap & REGULATORY_PHYMODE_NO11AX; 3879 else if (phy_in == REG_PHYMODE_11AC) 3880 return phymode_bitmap & REGULATORY_PHYMODE_NO11AC; 3881 else if (phy_in == REG_PHYMODE_11N) 3882 return phymode_bitmap & REGULATORY_CHAN_NO11N; 3883 else if (phy_in == REG_PHYMODE_11G) 3884 return phymode_bitmap & REGULATORY_PHYMODE_NO11G; 3885 else if (phy_in == REG_PHYMODE_11A) 3886 return phymode_bitmap & REGULATORY_PHYMODE_NO11A; 3887 else if (phy_in == REG_PHYMODE_11B) 3888 return phymode_bitmap & REGULATORY_PHYMODE_NO11B; 3889 else 3890 return true; 3891 3892 } 3893 3894 enum reg_phymode reg_get_max_phymode(struct wlan_objmgr_pdev *pdev, 3895 enum reg_phymode phy_in, 3896 qdf_freq_t freq) 3897 { 3898 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3899 uint32_t phymode_bitmap; 3900 enum reg_phymode current_phymode = phy_in; 3901 3902 pdev_priv_obj = reg_get_pdev_obj(pdev); 3903 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3904 reg_err("pdev reg component is NULL"); 3905 return REG_PHYMODE_INVALID; 3906 } 3907 3908 phymode_bitmap = pdev_priv_obj->phybitmap; 3909 3910 while (1) { 3911 if (reg_is_phymode_unallowed(current_phymode, phymode_bitmap)) { 3912 if (current_phymode == REG_PHYMODE_11N) { 3913 if (REG_IS_24GHZ_CH_FREQ(freq)) 3914 current_phymode = REG_PHYMODE_11G; 3915 else 3916 current_phymode = REG_PHYMODE_11A; 3917 } else if (current_phymode == REG_PHYMODE_11A || 3918 current_phymode == REG_PHYMODE_11B) { 3919 reg_err("Couldn't find a suitable phymode"); 3920 return REG_PHYMODE_INVALID; 3921 } else if (current_phymode > REG_PHYMODE_MAX) { 3922 reg_err("Unknown phymode"); 3923 return REG_PHYMODE_INVALID; 3924 } else { 3925 current_phymode--; 3926 } 3927 } else { 3928 return current_phymode; 3929 } 3930 } 3931 } 3932 #endif /* CHECK_REG_PHYMODE */ 3933