1 /* 2 * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 #include <target_if.h> 38 39 const struct chan_map *channel_map; 40 #ifdef CONFIG_CHAN_NUM_API 41 static const struct bonded_channel bonded_chan_40mhz_list[] = { 42 {36, 40}, 43 {44, 48}, 44 {52, 56}, 45 {60, 64}, 46 {100, 104}, 47 {108, 112}, 48 {116, 120}, 49 {124, 128}, 50 {132, 136}, 51 {140, 144}, 52 {149, 153}, 53 {157, 161}, 54 {165, 169} 55 }; 56 57 static const struct bonded_channel bonded_chan_80mhz_list[] = { 58 {36, 48}, 59 {52, 64}, 60 {100, 112}, 61 {116, 128}, 62 {132, 144}, 63 {149, 161} 64 }; 65 66 static const struct bonded_channel bonded_chan_160mhz_list[] = { 67 {36, 64}, 68 {100, 128} 69 }; 70 #endif /* CONFIG_CHAN_NUM_API */ 71 72 #ifdef CONFIG_CHAN_FREQ_API 73 /* bonded_chan_40mhz_list_freq - List of 40MHz bonnded channel frequencies */ 74 static const struct bonded_channel_freq bonded_chan_40mhz_list_freq[] = { 75 {5180, 5200}, 76 {5220, 5240}, 77 {5260, 5280}, 78 {5300, 5320}, 79 {5500, 5520}, 80 {5540, 5560}, 81 {5580, 5600}, 82 {5620, 5640}, 83 {5660, 5680}, 84 {5700, 5720}, 85 {5745, 5765}, 86 {5785, 5805}, 87 {5825, 5845}, 88 #ifdef CONFIG_BAND_6GHZ 89 {5945, 5965}, 90 {5985, 6005}, 91 {6025, 6045}, 92 {6065, 6085}, 93 {6105, 6125}, 94 {6145, 6165}, 95 {6185, 6205}, 96 {6225, 6245}, 97 {6265, 6285}, 98 {6305, 6325}, 99 {6345, 6365}, 100 {6385, 6405}, 101 {6425, 6445}, 102 {6465, 6485}, 103 {6505, 6525}, 104 {6545, 6565}, 105 {6585, 6605}, 106 {6625, 6645}, 107 {6665, 6685}, 108 {6705, 6725}, 109 {6745, 6765}, 110 {6785, 6805}, 111 {6825, 6845}, 112 {6865, 6885}, 113 {6905, 6925}, 114 {6945, 6965}, 115 {6985, 7005}, 116 {7025, 7045}, 117 {7065, 7085} 118 #endif /*CONFIG_BAND_6GHZ*/ 119 }; 120 121 /* bonded_chan_80mhz_list_freq - List of 80MHz bonnded channel frequencies */ 122 static const struct bonded_channel_freq bonded_chan_80mhz_list_freq[] = { 123 {5180, 5240}, 124 {5260, 5320}, 125 {5500, 5560}, 126 {5580, 5640}, 127 {5660, 5720}, 128 {5745, 5805}, 129 #ifdef CONFIG_BAND_6GHZ 130 {5945, 6005}, 131 {6025, 6085}, 132 {6105, 6165}, 133 {6185, 6245}, 134 {6265, 6325}, 135 {6345, 6405}, 136 {6425, 6485}, 137 {6505, 6565}, 138 {6585, 6645}, 139 {6665, 6725}, 140 {6745, 6805}, 141 {6825, 6885}, 142 {6905, 6965}, 143 {6985, 7045} 144 #endif /*CONFIG_BAND_6GHZ*/ 145 }; 146 147 /* bonded_chan_160mhz_list_freq - List of 160MHz bonnded channel frequencies */ 148 static const struct bonded_channel_freq bonded_chan_160mhz_list_freq[] = { 149 {5180, 5320}, 150 {5500, 5640}, 151 #ifdef CONFIG_BAND_6GHZ 152 {5945, 6085}, 153 {6105, 6245}, 154 {6265, 6405}, 155 {6425, 6565}, 156 {6585, 6725}, 157 {6745, 6885}, 158 {6905, 7045} 159 #endif /*CONFIG_BAND_6GHZ*/ 160 }; 161 #endif /*CONFIG_CHAN_FREQ_API*/ 162 163 static const enum phy_ch_width get_next_lower_bw[] = { 164 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 165 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 166 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 167 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 168 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 169 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 170 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 171 }; 172 173 const struct chan_map channel_map_us[NUM_CHANNELS] = { 174 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 175 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 176 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 177 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 178 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 179 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 180 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 181 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 182 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 183 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 184 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 185 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 186 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 187 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 188 189 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 190 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 191 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 192 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 193 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 200 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 201 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 202 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 203 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 204 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 205 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 206 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 207 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 208 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 209 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 210 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 211 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 212 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 213 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 214 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 215 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 216 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 217 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 218 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 219 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 220 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 221 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 222 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 223 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 224 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 225 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 226 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 227 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 228 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 229 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 230 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 231 232 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 233 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 234 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 235 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 236 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 237 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 238 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 239 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 240 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 241 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 242 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 243 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 244 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 245 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 246 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 247 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 248 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 249 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 250 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 251 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 252 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 253 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 254 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 255 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 256 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 257 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 258 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 259 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 260 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 261 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 262 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 263 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 264 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 265 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 266 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 267 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 268 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 269 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 270 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 271 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 272 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 273 #ifdef CONFIG_BAND_6GHZ 274 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 275 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 276 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 277 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 278 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 279 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 280 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 281 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 282 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 283 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 284 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 285 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 286 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 287 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 288 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 289 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 290 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 291 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 292 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 293 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 294 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 295 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 296 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 297 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 298 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 299 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 300 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 301 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 302 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 303 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 304 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 305 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 306 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 307 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 308 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 309 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 310 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 311 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 312 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 313 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 314 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 315 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 316 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 317 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 318 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 319 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 320 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 321 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 322 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 323 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 324 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 325 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 326 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 327 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 328 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 329 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 330 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 331 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 332 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 333 #endif /* CONFIG_BAND_6GHZ */ 334 }; 335 336 const struct chan_map channel_map_eu[NUM_CHANNELS] = { 337 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 338 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 339 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 340 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 341 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 342 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 343 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 344 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 345 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 346 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 347 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 348 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 349 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 350 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 351 352 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 353 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 354 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 355 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 356 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 357 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 358 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 359 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 360 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 361 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 362 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 363 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 364 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 365 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 366 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 367 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 368 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 369 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 370 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 371 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 372 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 373 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 374 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 375 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 376 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 377 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 378 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 379 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 380 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 381 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 386 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 393 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 394 395 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 396 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 397 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 398 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 399 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 400 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 401 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 402 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 403 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 404 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 405 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 406 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 407 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 408 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 409 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 410 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 411 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 412 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 413 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 414 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 415 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 416 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 417 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 418 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 419 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 420 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 421 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 422 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 423 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 424 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 425 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 426 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 427 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 428 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 429 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 430 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 431 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 432 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 433 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 434 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 435 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 436 #ifdef CONFIG_BAND_6GHZ 437 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 438 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 439 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 440 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 441 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 442 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 443 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 444 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 445 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 446 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 447 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 448 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 449 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 450 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 451 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 452 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 453 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 454 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 455 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 456 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 457 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 458 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 459 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 460 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 461 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 462 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 463 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 464 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 465 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 466 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 467 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 468 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 469 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 470 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 471 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 472 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 473 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 474 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 475 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 476 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 477 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 478 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 479 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 480 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 481 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 482 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 483 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 484 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 485 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 486 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 487 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 488 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 489 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 490 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 491 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 492 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 493 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 494 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 495 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 496 #endif /* CONFIG_BAND_6GHZ */ 497 }; 498 499 const struct chan_map channel_map_jp[NUM_CHANNELS] = { 500 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 501 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 502 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 503 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 504 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 505 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 506 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 507 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 508 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 509 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 510 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 511 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 512 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 513 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 514 515 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 516 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 517 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 518 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 519 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 520 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 521 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 522 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 523 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 524 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 525 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 526 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 527 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 528 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 529 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 530 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 531 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 532 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 533 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 534 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 535 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 536 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 537 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 538 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 539 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 540 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 541 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 542 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 543 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 544 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 545 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 546 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 547 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 548 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 549 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 550 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 551 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 552 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 553 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 554 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 555 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 556 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 557 558 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 559 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 560 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 561 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 562 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 563 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 564 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 565 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 566 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 567 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 568 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 569 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 570 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 571 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 572 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 573 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 574 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 575 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 576 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 577 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 578 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 579 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 580 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 581 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 582 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 583 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 584 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 585 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 586 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 587 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 588 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 589 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 590 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 591 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 592 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 593 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 594 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 595 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 596 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 597 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 598 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 599 #ifdef CONFIG_BAND_6GHZ 600 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 601 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 602 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 603 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 604 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 605 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 606 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 607 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 608 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 609 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 610 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 611 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 612 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 613 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 614 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 615 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 616 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 617 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 618 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 619 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 620 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 621 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 622 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 623 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 624 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 625 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 626 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 627 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 628 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 629 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 630 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 631 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 632 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 633 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 634 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 635 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 636 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 637 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 638 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 639 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 640 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 641 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 642 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 643 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 644 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 645 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 646 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 647 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 648 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 649 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 650 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 651 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 652 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 653 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 654 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 655 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 656 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 657 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 658 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 659 #endif /* CONFIG_BAND_6GHZ */ 660 }; 661 662 const struct chan_map channel_map_global[NUM_CHANNELS] = { 663 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 664 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 665 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 666 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 667 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 668 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 669 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 670 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 671 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 672 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 673 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 674 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 675 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 676 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 677 678 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 679 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 680 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 681 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 682 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 683 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 684 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 685 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 686 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 687 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 688 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 689 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 690 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 691 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 692 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 693 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 694 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 695 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 696 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 697 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 698 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 699 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 700 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 701 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 702 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 703 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 704 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 705 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 706 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 707 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 708 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 709 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 710 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 711 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 712 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 713 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 714 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 715 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 716 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 717 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 718 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 719 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 720 721 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 722 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 723 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 724 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 725 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 726 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 727 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 728 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 729 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 730 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 731 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 732 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 733 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 734 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 735 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 736 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 737 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 738 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 739 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 740 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 741 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 742 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 743 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 744 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 745 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 746 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 747 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 748 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 749 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 750 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 751 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 752 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 753 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 754 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 755 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 756 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 757 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 758 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 759 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 760 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 761 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 762 #ifdef CONFIG_BAND_6GHZ 763 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 764 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 765 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 766 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 767 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 768 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 769 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 770 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 771 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 772 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 773 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 774 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 775 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 776 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 777 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 778 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 779 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 780 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 781 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 782 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 783 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 784 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 785 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 786 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 787 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 788 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 789 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 790 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 791 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 792 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 793 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 794 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 795 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 796 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 797 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 798 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 799 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 800 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 801 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 802 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 803 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 804 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 805 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 806 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 807 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 808 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 809 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 810 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 811 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 812 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 813 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 814 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 815 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 816 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 817 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 818 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 819 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 820 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 821 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 822 #endif /* CONFIG_BAND_6GHZ */ 823 }; 824 825 const struct chan_map channel_map_china[NUM_CHANNELS] = { 826 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 827 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 828 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 829 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 830 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 831 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 832 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 833 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 834 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 835 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 836 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 837 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 838 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 839 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 840 841 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 842 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 843 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 844 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 845 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 846 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 847 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 848 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 849 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 850 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 851 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 852 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 853 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 854 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 855 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 856 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 857 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 858 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 859 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 860 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 861 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 862 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 863 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 864 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 865 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 866 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 867 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 868 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 869 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 870 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 871 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 872 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 873 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 874 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 875 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 876 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 877 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 878 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 879 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 880 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 881 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 882 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 883 884 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 885 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 886 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 887 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 888 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 889 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 890 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 891 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 892 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 893 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 894 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 895 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 896 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 897 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 898 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 899 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 900 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 901 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 902 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 903 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 904 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 905 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 906 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 907 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 908 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 909 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 910 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 911 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 912 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 913 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 914 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 915 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 916 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 917 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 918 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 919 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 920 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 921 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 922 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 923 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 924 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 925 #ifdef CONFIG_BAND_6GHZ 926 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 927 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 928 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 929 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 930 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 931 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 932 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 933 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 934 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 935 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 936 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 937 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 938 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 939 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 940 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 941 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 942 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 943 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 944 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 945 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 946 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 947 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 948 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 949 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 950 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 951 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 952 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 953 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 954 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 955 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 956 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 957 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 958 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 959 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 960 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 961 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 962 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 963 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 964 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 965 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 966 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 967 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 968 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 969 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 970 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 971 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 972 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 973 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 974 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 975 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 976 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 977 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 978 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 979 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 980 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 981 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 982 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 983 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 984 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 985 #endif /* CONFIG_BAND_6GHZ */ 986 }; 987 988 void reg_init_channel_map(enum dfs_reg dfs_region) 989 { 990 switch (dfs_region) { 991 case DFS_UNINIT_REGION: 992 case DFS_UNDEF_REGION: 993 channel_map = channel_map_global; 994 break; 995 case DFS_FCC_REGION: 996 channel_map = channel_map_us; 997 break; 998 case DFS_ETSI_REGION: 999 channel_map = channel_map_eu; 1000 break; 1001 case DFS_MKK_REGION: 1002 case DFS_MKKN_REGION: 1003 channel_map = channel_map_jp; 1004 break; 1005 case DFS_CN_REGION: 1006 channel_map = channel_map_china; 1007 break; 1008 case DFS_KR_REGION: 1009 channel_map = channel_map_eu; 1010 break; 1011 } 1012 } 1013 1014 uint16_t reg_get_bw_value(enum phy_ch_width bw) 1015 { 1016 switch (bw) { 1017 case CH_WIDTH_20MHZ: 1018 return 20; 1019 case CH_WIDTH_40MHZ: 1020 return 40; 1021 case CH_WIDTH_80MHZ: 1022 return 80; 1023 case CH_WIDTH_160MHZ: 1024 return 160; 1025 case CH_WIDTH_80P80MHZ: 1026 return 160; 1027 case CH_WIDTH_INVALID: 1028 return 0; 1029 case CH_WIDTH_5MHZ: 1030 return 5; 1031 case CH_WIDTH_10MHZ: 1032 return 10; 1033 case CH_WIDTH_MAX: 1034 return 160; 1035 default: 1036 return 0; 1037 } 1038 } 1039 1040 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 1041 struct wlan_objmgr_psoc *psoc) 1042 { 1043 return &((psoc->soc_cb.tx_ops.reg_ops)); 1044 } 1045 1046 #ifdef CONFIG_CHAN_NUM_API 1047 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 1048 struct channel_power *ch_list, 1049 uint8_t *num_chan) 1050 { 1051 int i, count; 1052 struct regulatory_channel *reg_channels; 1053 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1054 1055 if (!num_chan || !ch_list) { 1056 reg_err("chan_list or num_ch is NULL"); 1057 return QDF_STATUS_E_FAILURE; 1058 } 1059 1060 pdev_priv_obj = reg_get_pdev_obj(pdev); 1061 1062 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1063 reg_err("reg pdev priv obj is NULL"); 1064 return QDF_STATUS_E_FAILURE; 1065 } 1066 1067 /* set the current channel list */ 1068 reg_channels = pdev_priv_obj->cur_chan_list; 1069 1070 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 1071 if (reg_channels[i].state && 1072 reg_channels[i].chan_flags != REGULATORY_CHAN_DISABLED) { 1073 ch_list[count].chan_num = 1074 reg_channels[i].chan_num; 1075 ch_list[count].center_freq = 1076 reg_channels[i].center_freq; 1077 ch_list[count++].tx_power = 1078 reg_channels[i].tx_power; 1079 } 1080 } 1081 1082 *num_chan = count; 1083 1084 return QDF_STATUS_SUCCESS; 1085 } 1086 1087 enum channel_enum reg_get_chan_enum(uint8_t chan_num) 1088 { 1089 uint32_t count; 1090 1091 for (count = 0; count < NUM_CHANNELS; count++) 1092 if (channel_map[count].chan_num == chan_num) 1093 return count; 1094 1095 reg_err("invalid channel number %d", chan_num); 1096 1097 return INVALID_CHANNEL; 1098 } 1099 1100 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 1101 uint8_t ch) 1102 { 1103 enum channel_enum ch_idx; 1104 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1105 1106 ch_idx = reg_get_chan_enum(ch); 1107 1108 if (ch_idx == INVALID_CHANNEL) 1109 return CHANNEL_STATE_INVALID; 1110 1111 pdev_priv_obj = reg_get_pdev_obj(pdev); 1112 1113 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1114 reg_err("pdev reg obj is NULL"); 1115 return CHANNEL_STATE_INVALID; 1116 } 1117 1118 return pdev_priv_obj->cur_chan_list[ch_idx].state; 1119 } 1120 1121 /** 1122 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 1123 * @pdev: Pointer to pdev structure 1124 * @oper_ch: operating channel number 1125 * @bonded_chan_ar: bonded channel array 1126 * @array_size; Array size 1127 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 1128 * 1129 * Return: bonded channel state 1130 */ 1131 static enum channel_state reg_get_5g_bonded_chan_array( 1132 struct wlan_objmgr_pdev *pdev, 1133 uint8_t oper_chan, 1134 const struct bonded_channel bonded_chan_ar[], 1135 uint16_t array_size, 1136 const struct bonded_channel **bonded_chan_ptr_ptr) 1137 { 1138 int i; 1139 uint8_t chan_num; 1140 const struct bonded_channel *bonded_chan_ptr = NULL; 1141 enum channel_state chan_state = CHANNEL_STATE_INVALID; 1142 enum channel_state temp_chan_state; 1143 1144 for (i = 0; i < array_size; i++) { 1145 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 1146 (oper_chan <= bonded_chan_ar[i].end_ch)) { 1147 bonded_chan_ptr = &bonded_chan_ar[i]; 1148 break; 1149 } 1150 } 1151 1152 if (!bonded_chan_ptr) 1153 return chan_state; 1154 1155 *bonded_chan_ptr_ptr = bonded_chan_ptr; 1156 chan_num = bonded_chan_ptr->start_ch; 1157 while (chan_num <= bonded_chan_ptr->end_ch) { 1158 temp_chan_state = reg_get_channel_state(pdev, chan_num); 1159 if (temp_chan_state < chan_state) 1160 chan_state = temp_chan_state; 1161 chan_num = chan_num + 4; 1162 } 1163 1164 return chan_state; 1165 } 1166 1167 enum channel_state reg_get_5g_bonded_channel( 1168 struct wlan_objmgr_pdev *pdev, uint8_t chan_num, 1169 enum phy_ch_width ch_width, 1170 const struct bonded_channel **bonded_chan_ptr_ptr) 1171 { 1172 if (ch_width == CH_WIDTH_80P80MHZ) 1173 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1174 bonded_chan_80mhz_list, 1175 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1176 bonded_chan_ptr_ptr); 1177 else if (ch_width == CH_WIDTH_160MHZ) 1178 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1179 bonded_chan_160mhz_list, 1180 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 1181 bonded_chan_ptr_ptr); 1182 else if (ch_width == CH_WIDTH_80MHZ) 1183 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1184 bonded_chan_80mhz_list, 1185 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1186 bonded_chan_ptr_ptr); 1187 else if (ch_width == CH_WIDTH_40MHZ) 1188 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1189 bonded_chan_40mhz_list, 1190 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1191 bonded_chan_ptr_ptr); 1192 else 1193 return reg_get_channel_state(pdev, chan_num); 1194 } 1195 1196 enum channel_state reg_get_5g_bonded_channel_state( 1197 struct wlan_objmgr_pdev *pdev, 1198 uint8_t ch, enum phy_ch_width bw) 1199 { 1200 enum channel_enum ch_indx; 1201 enum channel_state chan_state; 1202 struct regulatory_channel *reg_channels; 1203 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1204 bool bw_enabled = false; 1205 const struct bonded_channel *bonded_chan_ptr = NULL; 1206 1207 if (bw > CH_WIDTH_80P80MHZ) { 1208 reg_err("bw passed is not good"); 1209 return CHANNEL_STATE_INVALID; 1210 } 1211 1212 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 1213 1214 if ((chan_state == CHANNEL_STATE_INVALID) || 1215 (chan_state == CHANNEL_STATE_DISABLE)) 1216 return chan_state; 1217 1218 pdev_priv_obj = reg_get_pdev_obj(pdev); 1219 1220 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1221 reg_err("pdev reg obj is NULL"); 1222 return CHANNEL_STATE_INVALID; 1223 } 1224 reg_channels = pdev_priv_obj->cur_chan_list; 1225 1226 ch_indx = reg_get_chan_enum(ch); 1227 if (ch_indx == INVALID_CHANNEL) 1228 return CHANNEL_STATE_INVALID; 1229 if (bw == CH_WIDTH_5MHZ) 1230 bw_enabled = true; 1231 else if (bw == CH_WIDTH_10MHZ) 1232 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 1233 (reg_channels[ch_indx].max_bw >= 10); 1234 else if (bw == CH_WIDTH_20MHZ) 1235 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 1236 (reg_channels[ch_indx].max_bw >= 20); 1237 else if (bw == CH_WIDTH_40MHZ) 1238 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 1239 (reg_channels[ch_indx].max_bw >= 40); 1240 else if (bw == CH_WIDTH_80MHZ) 1241 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1242 (reg_channels[ch_indx].max_bw >= 80); 1243 else if (bw == CH_WIDTH_160MHZ) 1244 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 1245 (reg_channels[ch_indx].max_bw >= 160); 1246 else if (bw == CH_WIDTH_80P80MHZ) 1247 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1248 (reg_channels[ch_indx].max_bw >= 80); 1249 1250 if (bw_enabled) 1251 return chan_state; 1252 else 1253 return CHANNEL_STATE_DISABLE; 1254 } 1255 1256 enum channel_state reg_get_2g_bonded_channel_state( 1257 struct wlan_objmgr_pdev *pdev, 1258 uint8_t oper_ch, uint8_t sec_ch, 1259 enum phy_ch_width bw) 1260 { 1261 enum channel_enum chan_idx; 1262 enum channel_state chan_state; 1263 struct regulatory_channel *reg_channels; 1264 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1265 bool bw_enabled = false; 1266 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 1267 1268 if (bw > CH_WIDTH_40MHZ) 1269 return CHANNEL_STATE_INVALID; 1270 1271 if (bw == CH_WIDTH_40MHZ) { 1272 if ((sec_ch + 4 != oper_ch) && 1273 (oper_ch + 4 != sec_ch)) 1274 return CHANNEL_STATE_INVALID; 1275 chan_state2 = reg_get_channel_state(pdev, sec_ch); 1276 if (chan_state2 == CHANNEL_STATE_INVALID) 1277 return chan_state2; 1278 } 1279 1280 pdev_priv_obj = reg_get_pdev_obj(pdev); 1281 1282 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1283 reg_err("reg pdev priv obj is NULL"); 1284 return CHANNEL_STATE_INVALID; 1285 } 1286 1287 reg_channels = pdev_priv_obj->cur_chan_list; 1288 1289 chan_state = reg_get_channel_state(pdev, oper_ch); 1290 if (chan_state2 < chan_state) 1291 chan_state = chan_state2; 1292 1293 if ((chan_state == CHANNEL_STATE_INVALID) || 1294 (chan_state == CHANNEL_STATE_DISABLE)) 1295 return chan_state; 1296 1297 chan_idx = reg_get_chan_enum(oper_ch); 1298 if (chan_idx == INVALID_CHANNEL) 1299 return CHANNEL_STATE_INVALID; 1300 if (bw == CH_WIDTH_5MHZ) 1301 bw_enabled = true; 1302 else if (bw == CH_WIDTH_10MHZ) 1303 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 1304 (reg_channels[chan_idx].max_bw >= 10); 1305 else if (bw == CH_WIDTH_20MHZ) 1306 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 1307 (reg_channels[chan_idx].max_bw >= 20); 1308 else if (bw == CH_WIDTH_40MHZ) 1309 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 1310 (reg_channels[chan_idx].max_bw >= 40); 1311 1312 if (bw_enabled) 1313 return chan_state; 1314 else 1315 return CHANNEL_STATE_DISABLE; 1316 1317 return CHANNEL_STATE_ENABLE; 1318 } 1319 #endif /* CONFIG_CHAN_NUM_API */ 1320 1321 /** 1322 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1323 * @chan_state1: Channel state1 1324 * @chan_state2: Channel state2 1325 * 1326 * Return: Channel state 1327 */ 1328 static enum channel_state reg_combine_channel_states( 1329 enum channel_state chan_state1, 1330 enum channel_state chan_state2) 1331 { 1332 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1333 (chan_state2 == CHANNEL_STATE_INVALID)) 1334 return CHANNEL_STATE_INVALID; 1335 else 1336 return min(chan_state1, chan_state2); 1337 } 1338 1339 #ifdef CONFIG_CHAN_NUM_API 1340 /** 1341 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1342 * @ch: channel number. 1343 * @ch_params: pointer to the channel parameters. 1344 * 1345 * Return: None 1346 */ 1347 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1348 uint8_t ch, 1349 struct ch_params *ch_params) 1350 { 1351 /* 1352 * Set channel parameters like center frequency for a bonded channel 1353 * state. Also return the maximum bandwidth supported by the channel. 1354 */ 1355 1356 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1357 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1358 const struct bonded_channel *bonded_chan_ptr = NULL; 1359 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1360 1361 if (!ch_params) { 1362 reg_err("ch_params is NULL"); 1363 return; 1364 } 1365 1366 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1367 if (ch_params->center_freq_seg1 != 0) 1368 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1369 else 1370 ch_params->ch_width = CH_WIDTH_160MHZ; 1371 } 1372 1373 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1374 bonded_chan_ptr = NULL; 1375 bonded_chan_ptr2 = NULL; 1376 chan_state = reg_get_5g_bonded_channel( 1377 pdev, ch, ch_params->ch_width, 1378 &bonded_chan_ptr); 1379 1380 chan_state = reg_get_5g_bonded_channel_state( 1381 pdev, ch, ch_params->ch_width); 1382 1383 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1384 chan_state2 = reg_get_5g_bonded_channel_state( 1385 pdev, ch_params->center_freq_seg1 - 2, 1386 CH_WIDTH_80MHZ); 1387 1388 chan_state = reg_combine_channel_states( 1389 chan_state, chan_state2); 1390 } 1391 1392 if ((chan_state != CHANNEL_STATE_ENABLE) && 1393 (chan_state != CHANNEL_STATE_DFS)) 1394 goto update_bw; 1395 1396 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1397 ch_params->sec_ch_offset = NO_SEC_CH; 1398 ch_params->center_freq_seg0 = ch; 1399 break; 1400 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1401 reg_get_5g_bonded_chan_array( 1402 pdev, ch, bonded_chan_40mhz_list, 1403 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1404 &bonded_chan_ptr2); 1405 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1406 goto update_bw; 1407 if (ch == bonded_chan_ptr2->start_ch) 1408 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1409 else 1410 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1411 1412 ch_params->center_freq_seg0 = 1413 (bonded_chan_ptr->start_ch + 1414 bonded_chan_ptr->end_ch) / 2; 1415 break; 1416 } 1417 update_bw: 1418 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1419 } 1420 1421 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1422 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1423 chan_state = reg_get_5g_bonded_channel( 1424 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1425 if (bonded_chan_ptr) 1426 ch_params->center_freq_seg0 = 1427 (bonded_chan_ptr->start_ch + 1428 bonded_chan_ptr->end_ch) / 2; 1429 } 1430 1431 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1432 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1433 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1434 ch_params->center_freq_seg1 = 0; 1435 1436 reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1437 ch_params->ch_width, ch_params->center_freq_seg0, 1438 ch_params->center_freq_seg1); 1439 } 1440 1441 /** 1442 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1443 * @oper_ch: operating channel 1444 * @ch_params: channel parameters 1445 * @sec_ch_2g: 2.4G secondary channel 1446 * 1447 * Return: void 1448 */ 1449 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1450 uint16_t oper_ch, 1451 struct ch_params *ch_params, 1452 uint16_t sec_ch_2g) 1453 { 1454 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1455 1456 if (ch_params->ch_width >= CH_WIDTH_MAX) 1457 ch_params->ch_width = CH_WIDTH_40MHZ; 1458 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1459 if (oper_ch >= 1 && oper_ch <= 5) 1460 sec_ch_2g = oper_ch + 4; 1461 else if (oper_ch >= 6 && oper_ch <= 13) 1462 sec_ch_2g = oper_ch - 4; 1463 } 1464 1465 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1466 chan_state = reg_get_2g_bonded_channel_state( 1467 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1468 if (chan_state == CHANNEL_STATE_ENABLE) { 1469 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1470 if (oper_ch < sec_ch_2g) 1471 ch_params->sec_ch_offset = 1472 LOW_PRIMARY_CH; 1473 else 1474 ch_params->sec_ch_offset = 1475 HIGH_PRIMARY_CH; 1476 ch_params->center_freq_seg0 = 1477 (oper_ch + sec_ch_2g) / 2; 1478 } else { 1479 ch_params->sec_ch_offset = NO_SEC_CH; 1480 ch_params->center_freq_seg0 = oper_ch; 1481 } 1482 break; 1483 } 1484 1485 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1486 } 1487 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1488 ch_params->center_freq_seg1 = 0; 1489 } 1490 1491 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1492 uint8_t ch, uint8_t sec_ch_2g, 1493 struct ch_params *ch_params) 1494 { 1495 if (REG_IS_5GHZ_CH(ch)) 1496 reg_set_5g_channel_params(pdev, ch, ch_params); 1497 else if (REG_IS_24GHZ_CH(ch)) 1498 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1499 } 1500 #endif /* CONFIG_CHAN_NUM_API */ 1501 1502 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1503 enum band_info *band) 1504 { 1505 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1506 1507 pdev_reg = reg_get_pdev_obj(pdev); 1508 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1509 reg_err("pdev reg component is NULL"); 1510 return QDF_STATUS_E_INVAL; 1511 } 1512 1513 *band = pdev_reg->band_capability; 1514 1515 return QDF_STATUS_SUCCESS; 1516 } 1517 1518 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1519 uint8_t *country_code) 1520 { 1521 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1522 1523 if (!country_code) { 1524 reg_err("country_code is NULL"); 1525 return QDF_STATUS_E_INVAL; 1526 } 1527 1528 psoc_priv_obj = reg_get_psoc_obj(psoc); 1529 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1530 reg_err("psoc reg component is NULL"); 1531 return QDF_STATUS_E_INVAL; 1532 } 1533 1534 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1535 REG_ALPHA2_LEN + 1); 1536 1537 return QDF_STATUS_SUCCESS; 1538 } 1539 1540 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1541 enum dfs_reg *dfs_reg) 1542 { 1543 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1544 1545 pdev_priv_obj = reg_get_pdev_obj(pdev); 1546 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1547 reg_err("reg component pdev priv is NULL"); 1548 return; 1549 } 1550 1551 *dfs_reg = pdev_priv_obj->dfs_region; 1552 } 1553 1554 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1555 enum dfs_reg dfs_reg) 1556 { 1557 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1558 1559 pdev_priv_obj = reg_get_pdev_obj(pdev); 1560 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1561 reg_err("psoc reg component is NULL"); 1562 return; 1563 } 1564 1565 pdev_priv_obj->dfs_region = dfs_reg; 1566 1567 reg_init_channel_map(dfs_reg); 1568 } 1569 1570 #ifdef CONFIG_CHAN_NUM_API 1571 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1572 uint8_t chan_num) 1573 { 1574 enum channel_enum chan_enum; 1575 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1576 struct regulatory_channel *reg_channels; 1577 1578 chan_enum = reg_get_chan_enum(chan_num); 1579 1580 if (chan_enum == INVALID_CHANNEL) { 1581 reg_err("channel is invalid"); 1582 return QDF_STATUS_E_FAILURE; 1583 } 1584 1585 pdev_priv_obj = reg_get_pdev_obj(pdev); 1586 1587 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1588 reg_err("reg pdev priv obj is NULL"); 1589 return QDF_STATUS_E_FAILURE; 1590 } 1591 1592 reg_channels = pdev_priv_obj->cur_chan_list; 1593 1594 return reg_channels[chan_enum].tx_power; 1595 } 1596 1597 qdf_freq_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1598 uint8_t chan_num) 1599 { 1600 enum channel_enum chan_enum; 1601 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1602 struct regulatory_channel *reg_channels; 1603 1604 chan_enum = reg_get_chan_enum(chan_num); 1605 1606 if (chan_enum == INVALID_CHANNEL) 1607 return CHANNEL_STATE_INVALID; 1608 1609 pdev_priv_obj = reg_get_pdev_obj(pdev); 1610 1611 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1612 reg_err("reg pdev priv obj is NULL"); 1613 return QDF_STATUS_E_FAILURE; 1614 } 1615 1616 reg_channels = pdev_priv_obj->cur_chan_list; 1617 1618 return reg_channels[chan_enum].center_freq; 1619 } 1620 1621 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1622 uint8_t chan) 1623 { 1624 enum channel_state ch_state; 1625 1626 ch_state = reg_get_channel_state(pdev, chan); 1627 1628 return ch_state == CHANNEL_STATE_DFS; 1629 } 1630 #endif /* CONFIG_CHAN_NUM_API */ 1631 1632 uint8_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1633 qdf_freq_t freq) 1634 { 1635 uint32_t count; 1636 struct regulatory_channel *chan_list; 1637 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1638 1639 if (freq == 0) { 1640 reg_err_rl("Invalid frequency %d", freq); 1641 return 0; 1642 } 1643 1644 pdev_priv_obj = reg_get_pdev_obj(pdev); 1645 1646 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1647 reg_err("reg pdev priv obj is NULL"); 1648 return 0; 1649 } 1650 1651 chan_list = pdev_priv_obj->mas_chan_list; 1652 for (count = 0; count < NUM_CHANNELS; count++) { 1653 if (chan_list[count].center_freq >= freq) 1654 break; 1655 } 1656 1657 if (count == NUM_CHANNELS) 1658 goto end; 1659 1660 if (chan_list[count].center_freq == freq) 1661 return chan_list[count].chan_num; 1662 1663 if (count == 0) 1664 goto end; 1665 1666 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1667 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1668 reg_err("Frequency %d invalid in current reg domain", freq); 1669 return 0; 1670 } 1671 1672 return (chan_list[count - 1].chan_num + 1673 (freq - chan_list[count - 1].center_freq) / 5); 1674 1675 end: 1676 reg_err_rl("invalid frequency %d", freq); 1677 return 0; 1678 } 1679 1680 static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1681 uint8_t chan_num, 1682 enum channel_enum min_chan_range, 1683 enum channel_enum max_chan_range) 1684 { 1685 uint16_t count; 1686 struct regulatory_channel *chan_list; 1687 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1688 1689 pdev_priv_obj = reg_get_pdev_obj(pdev); 1690 1691 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1692 reg_err("reg pdev priv obj is NULL"); 1693 return 0; 1694 } 1695 1696 chan_list = pdev_priv_obj->mas_chan_list; 1697 1698 for (count = min_chan_range; count <= max_chan_range; count++) { 1699 if (REG_IS_49GHZ_FREQ(chan_list[count].center_freq)) { 1700 if (chan_list[count].chan_num == chan_num) 1701 break; 1702 continue; 1703 } else if ((chan_list[count].chan_num >= chan_num) && 1704 (chan_list[count].chan_num != INVALID_CHANNEL_NUM)) 1705 break; 1706 } 1707 1708 if (count == max_chan_range + 1) 1709 goto end; 1710 1711 if (chan_list[count].chan_num == chan_num) { 1712 if (chan_list[count].chan_flags & REGULATORY_CHAN_DISABLED) 1713 reg_err("Channel %d disabled in current reg domain", 1714 chan_num); 1715 return chan_list[count].center_freq; 1716 } 1717 1718 if (count == min_chan_range) 1719 goto end; 1720 1721 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1722 REG_IS_49GHZ_FREQ(chan_list[count - 1].center_freq) || 1723 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1724 reg_err("Channel %d invalid in current reg domain", 1725 chan_num); 1726 return 0; 1727 } 1728 1729 return (chan_list[count - 1].center_freq + 1730 (chan_num - chan_list[count - 1].chan_num) * 5); 1731 1732 end: 1733 1734 reg_debug_rl("Invalid channel %d", chan_num); 1735 return 0; 1736 } 1737 1738 uint16_t reg_legacy_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1739 uint8_t chan_num) 1740 { 1741 uint16_t min_chan_range = MIN_24GHZ_CHANNEL; 1742 uint16_t max_chan_range = MAX_5GHZ_CHANNEL; 1743 1744 if (chan_num == 0) { 1745 reg_err_rl("Invalid channel %d", chan_num); 1746 return 0; 1747 } 1748 1749 return reg_compute_chan_to_freq(pdev, chan_num, 1750 min_chan_range, 1751 max_chan_range); 1752 } 1753 1754 #ifdef CONFIG_CHAN_NUM_API 1755 qdf_freq_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1756 uint8_t chan_num) 1757 { 1758 uint32_t count; 1759 struct regulatory_channel *chan_list; 1760 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1761 1762 if (chan_num == 0) { 1763 reg_err_rl("Invalid channel %d", chan_num); 1764 return 0; 1765 } 1766 1767 pdev_priv_obj = reg_get_pdev_obj(pdev); 1768 1769 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1770 reg_err("reg pdev priv obj is NULL"); 1771 return 0; 1772 } 1773 1774 chan_list = pdev_priv_obj->cur_chan_list; 1775 for (count = 0; count < NUM_CHANNELS; count++) 1776 if (chan_list[count].chan_num == chan_num) { 1777 if (reg_chan_in_range(chan_list, 1778 pdev_priv_obj->range_2g_low, 1779 pdev_priv_obj->range_2g_high, 1780 pdev_priv_obj->range_5g_low, 1781 pdev_priv_obj->range_5g_high, 1782 count)) { 1783 return chan_list[count].center_freq; 1784 } 1785 } 1786 1787 reg_debug_rl("invalid channel %d", chan_num); 1788 return 0; 1789 } 1790 1791 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1792 { 1793 qdf_freq_t freq = 0; 1794 1795 freq = reg_chan_to_freq(pdev, chan_num); 1796 1797 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1798 } 1799 1800 enum band_info reg_chan_to_band(uint8_t chan_num) 1801 { 1802 if (chan_num <= 14) 1803 return BAND_2G; 1804 1805 return BAND_5G; 1806 } 1807 1808 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1809 uint8_t *chan_list, 1810 uint8_t num_chan, 1811 bool nol_chan) 1812 { 1813 enum channel_enum chan_enum; 1814 struct regulatory_channel *mas_chan_list; 1815 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1816 uint16_t i; 1817 1818 if (!num_chan || !chan_list) { 1819 reg_err("chan_list or num_ch is NULL"); 1820 return; 1821 } 1822 1823 pdev_priv_obj = reg_get_pdev_obj(pdev); 1824 if (!pdev_priv_obj) { 1825 reg_err("reg psoc private obj is NULL"); 1826 return; 1827 } 1828 1829 mas_chan_list = pdev_priv_obj->mas_chan_list; 1830 for (i = 0; i < num_chan; i++) { 1831 chan_enum = reg_get_chan_enum(chan_list[i]); 1832 if (chan_enum == INVALID_CHANNEL) { 1833 reg_err("Invalid ch in nol list, chan %d", 1834 chan_list[i]); 1835 continue; 1836 } 1837 mas_chan_list[chan_enum].nol_chan = nol_chan; 1838 } 1839 1840 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1841 } 1842 #endif /* CONFIG_CHAN_NUM_API */ 1843 1844 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1845 uint16_t regdmn) 1846 { 1847 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1848 struct cur_regulatory_info *reg_info; 1849 uint16_t cc = -1; 1850 uint16_t country_index = -1, regdmn_pair = -1; 1851 struct wlan_objmgr_psoc *psoc; 1852 QDF_STATUS err; 1853 1854 pdev_priv_obj = reg_get_pdev_obj(pdev); 1855 if (!pdev_priv_obj) { 1856 reg_err("reg soc is NULL"); 1857 return QDF_STATUS_E_FAILURE; 1858 } 1859 1860 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1861 (sizeof(struct cur_regulatory_info)); 1862 if (!reg_info) { 1863 reg_err("reg info is NULL"); 1864 return QDF_STATUS_E_NOMEM; 1865 } 1866 1867 psoc = wlan_pdev_get_psoc(pdev); 1868 if (!psoc) { 1869 reg_err("psoc is NULL"); 1870 return QDF_STATUS_E_INVAL; 1871 } 1872 1873 reg_info->psoc = psoc; 1874 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1875 1876 if (regdmn == 0) { 1877 reg_get_default_country(®dmn); 1878 regdmn |= COUNTRY_ERD_FLAG; 1879 } 1880 1881 if (regdmn & COUNTRY_ERD_FLAG) { 1882 cc = regdmn & ~COUNTRY_ERD_FLAG; 1883 1884 reg_get_rdpair_from_country_code(cc, 1885 &country_index, 1886 ®dmn_pair); 1887 1888 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1889 if (err == QDF_STATUS_E_FAILURE) { 1890 reg_err("%s : Unable to set country code\n", __func__); 1891 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1892 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1893 qdf_mem_free(reg_info); 1894 return QDF_STATUS_E_FAILURE; 1895 } 1896 1897 pdev_priv_obj->ctry_code = cc; 1898 1899 } else { 1900 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1901 1902 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1903 if (err == QDF_STATUS_E_FAILURE) { 1904 reg_err("%s : Unable to set country code\n", __func__); 1905 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1906 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1907 qdf_mem_free(reg_info); 1908 return QDF_STATUS_E_FAILURE; 1909 } 1910 1911 pdev_priv_obj->reg_dmn_pair = regdmn; 1912 } 1913 1914 reg_info->offload_enabled = false; 1915 reg_process_master_chan_list(reg_info); 1916 1917 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1918 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1919 qdf_mem_free(reg_info); 1920 1921 return QDF_STATUS_SUCCESS; 1922 } 1923 1924 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1925 struct cc_regdmn_s *rd) 1926 { 1927 struct cur_regulatory_info *reg_info; 1928 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1929 uint16_t country_index = -1, regdmn_pair = -1; 1930 struct wlan_objmgr_psoc *psoc; 1931 struct wlan_lmac_if_reg_tx_ops *tx_ops; 1932 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1933 uint8_t pdev_id; 1934 QDF_STATUS err; 1935 1936 pdev_priv_obj = reg_get_pdev_obj(pdev); 1937 if (!pdev_priv_obj) { 1938 reg_err(" pdev priv obj is NULL"); 1939 return QDF_STATUS_E_FAILURE; 1940 } 1941 1942 psoc = wlan_pdev_get_psoc(pdev); 1943 if (!psoc) { 1944 reg_err("psoc is NULL"); 1945 return QDF_STATUS_E_INVAL; 1946 } 1947 1948 psoc_priv_obj = reg_get_psoc_obj(psoc); 1949 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1950 reg_err("psoc reg component is NULL"); 1951 return QDF_STATUS_E_FAILURE; 1952 } 1953 1954 if (psoc_priv_obj->offload_enabled) { 1955 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 1956 pdev_priv_obj->indoor_chan_enabled = false; 1957 else 1958 pdev_priv_obj->indoor_chan_enabled = true; 1959 1960 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1961 tx_ops = reg_get_psoc_tx_ops(psoc); 1962 if (tx_ops->set_user_country_code) { 1963 psoc_priv_obj->new_init_ctry_pending[pdev_id] = true; 1964 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 1965 } 1966 1967 return QDF_STATUS_E_FAILURE; 1968 } 1969 1970 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1971 (sizeof(struct cur_regulatory_info)); 1972 if (!reg_info) { 1973 reg_err("reg info is NULL"); 1974 return QDF_STATUS_E_NOMEM; 1975 } 1976 1977 reg_info->psoc = psoc; 1978 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1979 1980 if (rd->flags == CC_IS_SET) { 1981 reg_get_rdpair_from_country_code(rd->cc.country_code, 1982 &country_index, 1983 ®dmn_pair); 1984 } else if (rd->flags == ALPHA_IS_SET) { 1985 reg_get_rdpair_from_country_iso(rd->cc.alpha, 1986 &country_index, 1987 ®dmn_pair); 1988 } else if (rd->flags == REGDMN_IS_SET) { 1989 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 1990 ®dmn_pair); 1991 } 1992 1993 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1994 if (err == QDF_STATUS_E_FAILURE) { 1995 reg_err("%s : Unable to set country code\n", __func__); 1996 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1997 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1998 qdf_mem_free(reg_info); 1999 return QDF_STATUS_E_FAILURE; 2000 } 2001 2002 reg_info->offload_enabled = false; 2003 reg_process_master_chan_list(reg_info); 2004 2005 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2006 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2007 qdf_mem_free(reg_info); 2008 2009 return QDF_STATUS_SUCCESS; 2010 } 2011 2012 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 2013 struct cc_regdmn_s *rd) 2014 { 2015 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2016 2017 pdev_priv_obj = reg_get_pdev_obj(pdev); 2018 if (!pdev_priv_obj) { 2019 reg_err("reg pdev priv is NULL"); 2020 return QDF_STATUS_E_FAILURE; 2021 } 2022 2023 if (rd->flags == CC_IS_SET) { 2024 rd->cc.country_code = pdev_priv_obj->ctry_code; 2025 } else if (rd->flags == ALPHA_IS_SET) { 2026 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 2027 sizeof(rd->cc.alpha)); 2028 } else if (rd->flags == REGDMN_IS_SET) { 2029 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 2030 } 2031 2032 return QDF_STATUS_SUCCESS; 2033 } 2034 2035 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 2036 { 2037 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2038 2039 psoc_priv_obj = reg_get_psoc_obj(psoc); 2040 2041 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2042 reg_err("psoc reg component is NULL"); 2043 return QDF_STATUS_E_FAILURE; 2044 } 2045 2046 psoc_priv_obj->offload_enabled = val; 2047 2048 return QDF_STATUS_SUCCESS; 2049 } 2050 2051 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 2052 struct cur_regdmn_info *cur_regdmn) 2053 { 2054 struct wlan_objmgr_psoc *psoc; 2055 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2056 uint16_t index; 2057 int num_reg_dmn; 2058 uint8_t phy_id; 2059 2060 psoc = wlan_pdev_get_psoc(pdev); 2061 psoc_priv_obj = reg_get_psoc_obj(psoc); 2062 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2063 reg_err("soc reg component is NULL"); 2064 return QDF_STATUS_E_INVAL; 2065 } 2066 2067 phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2068 cur_regdmn->regdmn_pair_id = 2069 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 2070 2071 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 2072 for (index = 0; index < num_reg_dmn; index++) { 2073 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 2074 cur_regdmn->regdmn_pair_id) 2075 break; 2076 } 2077 2078 if (index == num_reg_dmn) { 2079 reg_err_rl("invalid regdomain"); 2080 return QDF_STATUS_E_FAILURE; 2081 } 2082 2083 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 2084 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 2085 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 2086 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 2087 cur_regdmn->dfs_region = 2088 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 2089 2090 return QDF_STATUS_SUCCESS; 2091 } 2092 2093 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 2094 bool enable_ch_144) 2095 { 2096 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2097 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2098 struct wlan_objmgr_psoc *psoc; 2099 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2100 QDF_STATUS status; 2101 2102 pdev_priv_obj = reg_get_pdev_obj(pdev); 2103 2104 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2105 reg_err("pdev reg component is NULL"); 2106 return QDF_STATUS_E_INVAL; 2107 } 2108 2109 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 2110 reg_info("chan 144 is already %d", enable_ch_144); 2111 return QDF_STATUS_SUCCESS; 2112 } 2113 2114 psoc = wlan_pdev_get_psoc(pdev); 2115 if (!psoc) { 2116 reg_err("psoc is NULL"); 2117 return QDF_STATUS_E_INVAL; 2118 } 2119 2120 psoc_priv_obj = reg_get_psoc_obj(psoc); 2121 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2122 reg_err("psoc reg component is NULL"); 2123 return QDF_STATUS_E_INVAL; 2124 } 2125 2126 reg_debug("setting chan 144: %d", enable_ch_144); 2127 pdev_priv_obj->en_chan_144 = enable_ch_144; 2128 2129 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2130 2131 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2132 if (reg_tx_ops->fill_umac_legacy_chanlist) 2133 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2134 pdev_priv_obj->cur_chan_list); 2135 2136 status = reg_send_scheduler_msg_sb(psoc, pdev); 2137 2138 return status; 2139 } 2140 2141 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 2142 { 2143 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2144 2145 pdev_priv_obj = reg_get_pdev_obj(pdev); 2146 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2147 reg_err("pdev reg component is NULL"); 2148 return false; 2149 } 2150 2151 return pdev_priv_obj->en_chan_144; 2152 } 2153 2154 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 2155 struct wlan_objmgr_psoc *psoc) 2156 { 2157 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2158 2159 psoc_priv_obj = reg_get_psoc_obj(psoc); 2160 2161 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2162 reg_err("psoc reg component is NULL"); 2163 return NULL; 2164 } 2165 2166 return psoc_priv_obj->reg_cap; 2167 } 2168 2169 QDF_STATUS reg_set_hal_reg_cap( 2170 struct wlan_objmgr_psoc *psoc, 2171 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 2172 uint16_t phy_cnt) 2173 { 2174 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2175 2176 psoc_priv_obj = reg_get_psoc_obj(psoc); 2177 2178 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2179 reg_err("psoc reg component is NULL"); 2180 return QDF_STATUS_E_FAILURE; 2181 } 2182 2183 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 2184 reg_err("phy cnt:%d is more than %d", phy_cnt, 2185 PSOC_MAX_PHY_REG_CAP); 2186 return QDF_STATUS_E_FAILURE; 2187 } 2188 2189 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 2190 phy_cnt * 2191 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 2192 2193 return QDF_STATUS_SUCCESS; 2194 } 2195 2196 bool reg_chan_in_range(struct regulatory_channel *chan_list, 2197 qdf_freq_t low_freq_2g, qdf_freq_t high_freq_2g, 2198 qdf_freq_t low_freq_5g, qdf_freq_t high_freq_5g, 2199 enum channel_enum ch_enum) 2200 { 2201 uint32_t low_limit_2g = NUM_CHANNELS; 2202 uint32_t high_limit_2g = NUM_CHANNELS; 2203 uint32_t low_limit_5g = NUM_CHANNELS; 2204 uint32_t high_limit_5g = NUM_CHANNELS; 2205 bool chan_in_range; 2206 enum channel_enum chan_enum; 2207 uint16_t min_bw; 2208 qdf_freq_t center_freq; 2209 2210 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2211 min_bw = chan_list[chan_enum].min_bw; 2212 center_freq = chan_list[chan_enum].center_freq; 2213 2214 if ((center_freq - min_bw / 2) >= low_freq_2g) { 2215 low_limit_2g = chan_enum; 2216 break; 2217 } 2218 } 2219 2220 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2221 min_bw = chan_list[chan_enum].min_bw; 2222 center_freq = chan_list[chan_enum].center_freq; 2223 2224 if ((center_freq - min_bw / 2) >= low_freq_5g) { 2225 low_limit_5g = chan_enum; 2226 break; 2227 } 2228 } 2229 2230 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2231 min_bw = chan_list[chan_enum].min_bw; 2232 center_freq = chan_list[chan_enum].center_freq; 2233 2234 if (center_freq + min_bw / 2 <= high_freq_2g) { 2235 high_limit_2g = chan_enum; 2236 break; 2237 } 2238 if (chan_enum == 0) 2239 break; 2240 } 2241 2242 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2243 min_bw = chan_list[chan_enum].min_bw; 2244 center_freq = chan_list[chan_enum].center_freq; 2245 2246 if (center_freq + min_bw / 2 <= high_freq_5g) { 2247 high_limit_5g = chan_enum; 2248 break; 2249 } 2250 if (chan_enum == 0) 2251 break; 2252 } 2253 2254 chan_in_range = false; 2255 if ((low_limit_2g <= ch_enum) && 2256 (high_limit_2g >= ch_enum) && 2257 (low_limit_2g != NUM_CHANNELS) && 2258 (high_limit_2g != NUM_CHANNELS)) 2259 chan_in_range = true; 2260 if ((low_limit_5g <= ch_enum) && 2261 (high_limit_5g >= ch_enum) && 2262 (low_limit_5g != NUM_CHANNELS) && 2263 (high_limit_5g != NUM_CHANNELS)) 2264 chan_in_range = true; 2265 2266 if (chan_in_range) 2267 return true; 2268 else 2269 return false; 2270 } 2271 2272 #ifdef CONFIG_CHAN_NUM_API 2273 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 2274 uint8_t *chan_list, uint8_t num_chan, 2275 bool nol_history_chan) 2276 { 2277 enum channel_enum chan_enum; 2278 struct regulatory_channel *mas_chan_list; 2279 struct regulatory_channel *cur_chan_list; 2280 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2281 uint16_t i; 2282 2283 if (!num_chan || !chan_list) { 2284 reg_err("chan_list or num_ch is NULL"); 2285 return; 2286 } 2287 2288 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 2289 pdev, WLAN_UMAC_COMP_REGULATORY); 2290 2291 if (!pdev_priv_obj) { 2292 reg_err("reg psoc private obj is NULL"); 2293 return; 2294 } 2295 2296 mas_chan_list = pdev_priv_obj->mas_chan_list; 2297 cur_chan_list = pdev_priv_obj->cur_chan_list; 2298 2299 for (i = 0; i < num_chan; i++) { 2300 chan_enum = reg_get_chan_enum(chan_list[i]); 2301 if (chan_enum == INVALID_CHANNEL) { 2302 reg_err("Invalid ch in nol list, chan %d", 2303 chan_list[i]); 2304 continue; 2305 } 2306 mas_chan_list[chan_enum].nol_history = nol_history_chan; 2307 cur_chan_list[chan_enum].nol_history = nol_history_chan; 2308 } 2309 } 2310 2311 bool reg_is_24ghz_ch(uint32_t chan) 2312 { 2313 return REG_IS_24GHZ_CH(chan); 2314 } 2315 2316 bool reg_is_5ghz_ch(uint32_t chan) 2317 { 2318 return REG_IS_5GHZ_CH(chan); 2319 } 2320 #endif /* CONFIG_CHAN_NUM_API */ 2321 2322 bool reg_is_24ghz_ch_freq(uint32_t freq) 2323 { 2324 return REG_IS_24GHZ_CH_FREQ(freq); 2325 } 2326 2327 bool reg_is_5ghz_ch_freq(uint32_t freq) 2328 { 2329 return REG_IS_5GHZ_FREQ(freq); 2330 } 2331 2332 /** 2333 * BAND_2G_PRESENT() - Check if REG_BAND_2G is set in the band_mask 2334 * @band_mask: Bitmask for bands 2335 * 2336 * Return: True if REG_BAND_2G is set in the band_mask, else false 2337 */ 2338 static inline bool BAND_2G_PRESENT(uint8_t band_mask) 2339 { 2340 return !!(band_mask & (BIT(REG_BAND_2G))); 2341 } 2342 2343 /** 2344 * BAND_5G_PRESENT() - Check if REG_BAND_5G is set in the band_mask 2345 * @band_mask: Bitmask for bands 2346 * 2347 * Return: True if REG_BAND_5G is set in the band_mask, else false 2348 */ 2349 static inline bool BAND_5G_PRESENT(uint8_t band_mask) 2350 { 2351 return !!(band_mask & (BIT(REG_BAND_5G))); 2352 } 2353 2354 #ifdef CONFIG_BAND_6GHZ 2355 bool reg_is_6ghz_chan_freq(uint16_t freq) 2356 { 2357 return REG_IS_6GHZ_FREQ(freq); 2358 } 2359 2360 uint16_t reg_min_6ghz_chan_freq(void) 2361 { 2362 return REG_MIN_6GHZ_CHAN_FREQ; 2363 } 2364 2365 uint16_t reg_max_6ghz_chan_freq(void) 2366 { 2367 return REG_MAX_6GHZ_CHAN_FREQ; 2368 } 2369 2370 bool reg_is_6ghz_psc_chan_freq(uint16_t freq) 2371 { 2372 if (!REG_IS_6GHZ_FREQ(freq)) { 2373 reg_debug(" Channel frequency is not a 6GHz frequency"); 2374 return false; 2375 } 2376 2377 if (!(((freq - SIXG_STARTING_FREQ) + (FREQ_LEFT_SHIFT)) % 2378 (FREQ_TO_CHAN_SCALE * NUM_80MHZ_BAND_IN_6G))) { 2379 return true; 2380 } 2381 2382 reg_debug_rl("Channel freq %d MHz is not a 6GHz PSC frequency", freq); 2383 2384 return false; 2385 } 2386 2387 /** 2388 * BAND_6G_PRESENT() - Check if REG_BAND_6G is set in the band_mask 2389 * @band_mask: Bitmask for bands 2390 * 2391 * Return: True if REG_BAND_6G is set in the band_mask, else false 2392 */ 2393 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2394 { 2395 return !!(band_mask & (BIT(REG_BAND_6G))); 2396 } 2397 #else 2398 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2399 { 2400 return false; 2401 } 2402 #endif /* CONFIG_BAND_6GHZ */ 2403 2404 uint16_t 2405 reg_get_band_channel_list(struct wlan_objmgr_pdev *pdev, 2406 uint8_t band_mask, 2407 struct regulatory_channel *channel_list) 2408 { 2409 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2410 struct regulatory_channel *cur_chan_list; 2411 uint16_t i, num_channels = 0; 2412 2413 pdev_priv_obj = reg_get_pdev_obj(pdev); 2414 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2415 reg_err("reg pdev priv obj is NULL"); 2416 return 0; 2417 } 2418 2419 cur_chan_list = pdev_priv_obj->cur_chan_list; 2420 2421 if (BAND_2G_PRESENT(band_mask)) { 2422 for (i = MIN_24GHZ_CHANNEL; i <= MAX_24GHZ_CHANNEL; i++) { 2423 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2424 !(cur_chan_list[i].chan_flags & 2425 REGULATORY_CHAN_DISABLED)) { 2426 channel_list[num_channels] = cur_chan_list[i]; 2427 num_channels++; 2428 } 2429 } 2430 } 2431 if (BAND_5G_PRESENT(band_mask)) { 2432 for (i = MIN_49GHZ_CHANNEL; i <= MAX_5GHZ_CHANNEL; i++) { 2433 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2434 !(cur_chan_list[i].chan_flags & 2435 REGULATORY_CHAN_DISABLED)) { 2436 channel_list[num_channels] = cur_chan_list[i]; 2437 num_channels++; 2438 } 2439 } 2440 } 2441 if (BAND_6G_PRESENT(band_mask)) { 2442 for (i = MIN_6GHZ_CHANNEL; i <= MAX_6GHZ_CHANNEL; i++) { 2443 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2444 !(cur_chan_list[i].chan_flags & 2445 REGULATORY_CHAN_DISABLED)) { 2446 channel_list[num_channels] = cur_chan_list[i]; 2447 num_channels++; 2448 } 2449 } 2450 } 2451 2452 if (!num_channels) { 2453 reg_err("Failed to retrieve the channel list"); 2454 return 0; 2455 } 2456 2457 return num_channels; 2458 } 2459 2460 qdf_freq_t reg_chan_band_to_freq(struct wlan_objmgr_pdev *pdev, 2461 uint8_t chan_num, 2462 uint8_t band_mask) 2463 { 2464 enum channel_enum min_chan, max_chan; 2465 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2466 uint16_t freq; 2467 2468 if (chan_num == 0) { 2469 reg_err_rl("Invalid channel %d", chan_num); 2470 return 0; 2471 } 2472 2473 pdev_priv_obj = reg_get_pdev_obj(pdev); 2474 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2475 reg_err("reg pdev priv obj is NULL"); 2476 return 0; 2477 } 2478 2479 if (BAND_6G_PRESENT(band_mask)) { 2480 if (BAND_2G_PRESENT(band_mask) || 2481 BAND_5G_PRESENT(band_mask)) { 2482 reg_err("Incorrect band_mask %x", band_mask); 2483 return 0; 2484 } 2485 2486 min_chan = MIN_6GHZ_CHANNEL; 2487 max_chan = MAX_6GHZ_CHANNEL; 2488 return reg_compute_chan_to_freq(pdev, chan_num, 2489 min_chan, 2490 max_chan); 2491 } else { 2492 if (BAND_2G_PRESENT(band_mask)) { 2493 min_chan = MIN_24GHZ_CHANNEL; 2494 max_chan = MAX_24GHZ_CHANNEL; 2495 freq = reg_compute_chan_to_freq(pdev, chan_num, 2496 min_chan, 2497 max_chan); 2498 if (freq != 0) 2499 return freq; 2500 } 2501 2502 if (BAND_5G_PRESENT(band_mask)) { 2503 min_chan = MIN_49GHZ_CHANNEL; 2504 max_chan = MAX_5GHZ_CHANNEL; 2505 2506 return reg_compute_chan_to_freq(pdev, chan_num, 2507 min_chan, 2508 max_chan); 2509 } 2510 2511 reg_err("Incorrect band_mask %x", band_mask); 2512 return 0; 2513 } 2514 } 2515 2516 bool reg_is_49ghz_freq(qdf_freq_t freq) 2517 { 2518 return REG_IS_49GHZ_FREQ(freq); 2519 } 2520 2521 qdf_freq_t reg_ch_num(uint32_t ch_enum) 2522 { 2523 return REG_CH_NUM(ch_enum); 2524 } 2525 2526 qdf_freq_t reg_ch_to_freq(uint32_t ch_enum) 2527 { 2528 return REG_CH_TO_FREQ(ch_enum); 2529 } 2530 2531 #ifdef CONFIG_CHAN_NUM_API 2532 bool reg_is_same_band_channels(uint8_t chan_num1, uint8_t chan_num2) 2533 { 2534 return (chan_num1 && chan_num2 && 2535 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 2536 } 2537 2538 bool reg_is_channel_valid_5g_sbs(uint8_t curchan, uint8_t newchan) 2539 { 2540 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 2541 } 2542 2543 uint8_t reg_min_24ghz_ch_num(void) 2544 { 2545 return REG_MIN_24GHZ_CH_NUM; 2546 } 2547 2548 uint8_t reg_max_24ghz_ch_num(void) 2549 { 2550 return REG_MAX_24GHZ_CH_NUM; 2551 } 2552 2553 uint8_t reg_min_5ghz_ch_num(void) 2554 { 2555 return REG_MIN_5GHZ_CH_NUM; 2556 } 2557 2558 uint8_t reg_max_5ghz_ch_num(void) 2559 { 2560 return REG_MAX_5GHZ_CH_NUM; 2561 } 2562 #endif /* CONFIG_CHAN_NUM_API */ 2563 2564 #ifdef CONFIG_CHAN_FREQ_API 2565 qdf_freq_t reg_min_24ghz_chan_freq(void) 2566 { 2567 return REG_MIN_24GHZ_CH_FREQ; 2568 } 2569 2570 qdf_freq_t reg_max_24ghz_chan_freq(void) 2571 { 2572 return REG_MAX_24GHZ_CH_FREQ; 2573 } 2574 2575 qdf_freq_t reg_min_5ghz_chan_freq(void) 2576 { 2577 return REG_MIN_5GHZ_CH_FREQ; 2578 } 2579 2580 qdf_freq_t reg_max_5ghz_chan_freq(void) 2581 { 2582 return REG_MAX_5GHZ_CH_FREQ; 2583 } 2584 #endif /* CONFIG_CHAN_FREQ_API */ 2585 2586 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 2587 bool enable) 2588 { 2589 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2590 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2591 struct wlan_objmgr_psoc *psoc; 2592 QDF_STATUS status; 2593 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2594 2595 pdev_priv_obj = reg_get_pdev_obj(pdev); 2596 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2597 reg_err("pdev reg component is NULL"); 2598 return QDF_STATUS_E_INVAL; 2599 } 2600 2601 if (pdev_priv_obj->dfs_enabled == enable) { 2602 reg_info("dfs_enabled is already set to %d", enable); 2603 return QDF_STATUS_SUCCESS; 2604 } 2605 2606 psoc = wlan_pdev_get_psoc(pdev); 2607 if (!psoc) { 2608 reg_err("psoc is NULL"); 2609 return QDF_STATUS_E_INVAL; 2610 } 2611 2612 psoc_priv_obj = reg_get_psoc_obj(psoc); 2613 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2614 reg_err("psoc reg component is NULL"); 2615 return QDF_STATUS_E_INVAL; 2616 } 2617 2618 reg_info("setting dfs_enabled: %d", enable); 2619 2620 pdev_priv_obj->dfs_enabled = enable; 2621 2622 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2623 2624 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2625 2626 /* Fill the ic channel list with the updated current channel 2627 * chan list. 2628 */ 2629 if (reg_tx_ops->fill_umac_legacy_chanlist) 2630 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2631 pdev_priv_obj->cur_chan_list); 2632 2633 status = reg_send_scheduler_msg_sb(psoc, pdev); 2634 2635 return status; 2636 } 2637 2638 bool reg_is_regdmn_en302502_applicable(struct wlan_objmgr_pdev *pdev) 2639 { 2640 struct cur_regdmn_info cur_reg_dmn; 2641 QDF_STATUS status; 2642 2643 status = reg_get_curr_regdomain(pdev, &cur_reg_dmn); 2644 if (status != QDF_STATUS_SUCCESS) { 2645 reg_err("Failed to get reg domain"); 2646 return false; 2647 } 2648 2649 return reg_en302_502_regdmn(cur_reg_dmn.regdmn_pair_id); 2650 } 2651 2652 QDF_STATUS reg_modify_pdev_chan_range(struct wlan_objmgr_pdev *pdev) 2653 { 2654 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2655 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2656 struct wlan_objmgr_psoc *psoc; 2657 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2658 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap_ptr; 2659 uint32_t cnt; 2660 uint32_t phy_id; 2661 enum direction dir; 2662 QDF_STATUS status = QDF_STATUS_SUCCESS; 2663 struct target_pdev_info *tgt_pdev; 2664 2665 tgt_pdev = wlan_pdev_get_tgt_if_handle(pdev); 2666 phy_id = (uint32_t)target_pdev_get_phy_idx(tgt_pdev); 2667 pdev_priv_obj = reg_get_pdev_obj(pdev); 2668 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2669 reg_err("pdev reg component is NULL"); 2670 return QDF_STATUS_E_INVAL; 2671 } 2672 2673 psoc = wlan_pdev_get_psoc(pdev); 2674 if (!psoc) { 2675 reg_err("psoc is NULL"); 2676 return QDF_STATUS_E_INVAL; 2677 } 2678 2679 psoc_priv_obj = reg_get_psoc_obj(psoc); 2680 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2681 reg_err("psoc reg component is NULL"); 2682 return QDF_STATUS_E_INVAL; 2683 } 2684 2685 reg_cap_ptr = psoc_priv_obj->reg_cap; 2686 2687 for (cnt = 0; cnt < PSOC_MAX_PHY_REG_CAP; cnt++) { 2688 if (!reg_cap_ptr) { 2689 qdf_mem_free(pdev_priv_obj); 2690 reg_err("reg cap ptr is NULL"); 2691 return QDF_STATUS_E_FAULT; 2692 } 2693 2694 if (reg_cap_ptr->phy_id == phy_id) 2695 break; 2696 reg_cap_ptr++; 2697 } 2698 2699 if (cnt == PSOC_MAX_PHY_REG_CAP) { 2700 qdf_mem_free(pdev_priv_obj); 2701 reg_err("extended capabilities not found for pdev"); 2702 return QDF_STATUS_E_FAULT; 2703 } 2704 2705 if (psoc_priv_obj->offload_enabled) { 2706 dir = NORTHBOUND; 2707 } else { 2708 dir = SOUTHBOUND; 2709 } 2710 2711 pdev_priv_obj->range_2g_low = reg_cap_ptr->low_2ghz_chan; 2712 pdev_priv_obj->range_2g_high = reg_cap_ptr->high_2ghz_chan; 2713 pdev_priv_obj->range_5g_low = reg_cap_ptr->low_5ghz_chan; 2714 pdev_priv_obj->range_5g_high = reg_cap_ptr->high_5ghz_chan; 2715 pdev_priv_obj->wireless_modes = reg_cap_ptr->wireless_modes; 2716 2717 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2718 2719 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2720 2721 /* Fill the ic channel list with the updated current channel 2722 * chan list. 2723 */ 2724 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2725 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2726 pdev_priv_obj->cur_chan_list); 2727 2728 } else { 2729 if (dir == NORTHBOUND) 2730 status = reg_send_scheduler_msg_nb(psoc, pdev); 2731 else 2732 status = reg_send_scheduler_msg_sb(psoc, pdev); 2733 } 2734 2735 return status; 2736 } 2737 2738 #ifdef DISABLE_UNII_SHARED_BANDS 2739 /** 2740 * reg_is_reg_unii_band_1_or_reg_unii_band_2a() - Check the input bitmap 2741 * @unii_5g_bitmap: 5G UNII band bitmap 2742 * 2743 * This function checks if either REG_UNII_BAND_1 or REG_UNII_BAND_2A, 2744 * are present in the 5G UNII band bitmap. 2745 * 2746 * Return: Return true if REG_UNII_BAND_1 or REG_UNII_BAND_2A, are present in 2747 * the UNII 5g bitmap else return false. 2748 */ 2749 static bool 2750 reg_is_reg_unii_band_1_or_reg_unii_band_2a(uint8_t unii_5g_bitmap) 2751 { 2752 if (!unii_5g_bitmap) 2753 return false; 2754 2755 return ((unii_5g_bitmap & (BIT(REG_UNII_BAND_1) | 2756 BIT(REG_UNII_BAND_2A))) == unii_5g_bitmap); 2757 } 2758 2759 QDF_STATUS reg_disable_chan_coex(struct wlan_objmgr_pdev *pdev, 2760 uint8_t unii_5g_bitmap) 2761 { 2762 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2763 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2764 struct wlan_objmgr_psoc *psoc; 2765 2766 psoc = wlan_pdev_get_psoc(pdev); 2767 if (!psoc) { 2768 reg_err("psoc is NULL"); 2769 return QDF_STATUS_E_INVAL; 2770 } 2771 2772 pdev_priv_obj = reg_get_pdev_obj(pdev); 2773 2774 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2775 reg_err_rl("reg pdev priv obj is NULL"); 2776 return QDF_STATUS_E_FAILURE; 2777 } 2778 2779 if (unii_5g_bitmap && 2780 !reg_is_reg_unii_band_1_or_reg_unii_band_2a(unii_5g_bitmap)) { 2781 reg_err_rl("Invalid unii_5g_bitmap = %d", unii_5g_bitmap); 2782 return QDF_STATUS_E_FAILURE; 2783 } 2784 2785 if (pdev_priv_obj->unii_5g_bitmap == unii_5g_bitmap) { 2786 reg_debug_rl("UNII bitmask for 5G channels is already set %d", 2787 unii_5g_bitmap); 2788 return QDF_STATUS_SUCCESS; 2789 } 2790 2791 reg_debug_rl("Setting UNII bitmask for 5G: %d", unii_5g_bitmap); 2792 pdev_priv_obj->unii_5g_bitmap = unii_5g_bitmap; 2793 2794 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2795 2796 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2797 2798 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2799 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2800 pdev_priv_obj->cur_chan_list); 2801 } 2802 2803 return QDF_STATUS_SUCCESS; 2804 } 2805 #endif 2806 2807 #ifdef CONFIG_CHAN_FREQ_API 2808 QDF_STATUS reg_get_channel_list_with_power_for_freq(struct wlan_objmgr_pdev 2809 *pdev, 2810 struct channel_power 2811 *ch_list, 2812 uint8_t *num_chan) 2813 { 2814 int i, count; 2815 struct regulatory_channel *reg_channels; 2816 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2817 2818 if (!num_chan || !ch_list) { 2819 reg_err("chan_list or num_ch is NULL"); 2820 return QDF_STATUS_E_FAILURE; 2821 } 2822 2823 pdev_priv_obj = reg_get_pdev_obj(pdev); 2824 2825 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2826 reg_err("reg pdev priv obj is NULL"); 2827 return QDF_STATUS_E_FAILURE; 2828 } 2829 2830 /* set the current channel list */ 2831 reg_channels = pdev_priv_obj->cur_chan_list; 2832 2833 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 2834 if (reg_channels[i].state && 2835 !(reg_channels[i].chan_flags & REGULATORY_CHAN_DISABLED)) { 2836 ch_list[count].center_freq = 2837 reg_channels[i].center_freq; 2838 ch_list[count++].tx_power = 2839 reg_channels[i].tx_power; 2840 } 2841 } 2842 2843 *num_chan = count; 2844 2845 return QDF_STATUS_SUCCESS; 2846 } 2847 2848 enum channel_enum reg_get_chan_enum_for_freq(qdf_freq_t freq) 2849 { 2850 uint32_t count; 2851 2852 for (count = 0; count < NUM_CHANNELS; count++) 2853 if (channel_map[count].center_freq == freq) 2854 return count; 2855 2856 reg_err("invalid channel center frequency %d", freq); 2857 2858 return INVALID_CHANNEL; 2859 } 2860 2861 bool 2862 reg_is_freq_present_in_cur_chan_list(struct wlan_objmgr_pdev *pdev, 2863 qdf_freq_t freq) 2864 { 2865 enum channel_enum chan_enum; 2866 struct regulatory_channel *cur_chan_list; 2867 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2868 2869 pdev_priv_obj = reg_get_pdev_obj(pdev); 2870 2871 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2872 reg_err_rl("pdev reg obj is NULL"); 2873 return false; 2874 } 2875 2876 cur_chan_list = pdev_priv_obj->cur_chan_list; 2877 2878 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) 2879 if (cur_chan_list[chan_enum].center_freq == freq) 2880 if ((cur_chan_list[chan_enum].state != 2881 CHANNEL_STATE_DISABLE) && 2882 !(cur_chan_list[chan_enum].chan_flags & 2883 REGULATORY_CHAN_DISABLED)) 2884 return true; 2885 2886 reg_debug_rl("Channel center frequency %d not found", freq); 2887 2888 return false; 2889 } 2890 2891 enum channel_state reg_get_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2892 qdf_freq_t freq) 2893 { 2894 enum channel_enum ch_idx; 2895 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2896 2897 ch_idx = reg_get_chan_enum_for_freq(freq); 2898 2899 if (ch_idx == INVALID_CHANNEL) 2900 return CHANNEL_STATE_INVALID; 2901 2902 pdev_priv_obj = reg_get_pdev_obj(pdev); 2903 2904 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2905 reg_err("pdev reg obj is NULL"); 2906 return CHANNEL_STATE_INVALID; 2907 } 2908 2909 return pdev_priv_obj->cur_chan_list[ch_idx].state; 2910 } 2911 2912 /** 2913 * reg_get_5g_bonded_chan_array_for_freq()- Return the channel state for a 2914 * 5G or 6G channel frequency based on the bonded channel. 2915 * @pdev: Pointer to pdev. 2916 * @freq: Channel center frequency. 2917 * @bonded_chan_ar: Array of bonded channel frequencies. 2918 * @array_size: Array size. 2919 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2920 * 2921 * Return: Channel State 2922 */ 2923 static enum channel_state 2924 reg_get_5g_bonded_chan_array_for_freq(struct wlan_objmgr_pdev *pdev, 2925 uint16_t freq, 2926 const struct bonded_channel_freq 2927 bonded_chan_ar[], 2928 uint16_t array_size, 2929 const struct bonded_channel_freq 2930 **bonded_chan_ptr_ptr) 2931 { 2932 int i; 2933 uint16_t chan_cfreq; 2934 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2935 enum channel_state chan_state = CHANNEL_STATE_INVALID; 2936 enum channel_state temp_chan_state; 2937 2938 for (i = 0; i < array_size; i++) { 2939 if ((freq >= bonded_chan_ar[i].start_freq) && 2940 (freq <= bonded_chan_ar[i].end_freq)) { 2941 bonded_chan_ptr = &bonded_chan_ar[i]; 2942 break; 2943 } 2944 } 2945 2946 if (!bonded_chan_ptr) 2947 return chan_state; 2948 2949 *bonded_chan_ptr_ptr = bonded_chan_ptr; 2950 chan_cfreq = bonded_chan_ptr->start_freq; 2951 while (chan_cfreq <= bonded_chan_ptr->end_freq) { 2952 temp_chan_state = reg_get_channel_state_for_freq(pdev, 2953 chan_cfreq); 2954 if (temp_chan_state < chan_state) 2955 chan_state = temp_chan_state; 2956 chan_cfreq = chan_cfreq + 20; 2957 } 2958 2959 return chan_state; 2960 } 2961 2962 /** 2963 * reg_get_5g_bonded_channel_for_freq()- Return the channel state for a 2964 * 5G or 6G channel frequency based on the channel width and bonded channel 2965 * @pdev: Pointer to pdev. 2966 * @freq: Channel center frequency. 2967 * @ch_width: Channel Width. 2968 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2969 * 2970 * Return: Channel State 2971 */ 2972 enum channel_state 2973 reg_get_5g_bonded_channel_for_freq(struct wlan_objmgr_pdev *pdev, 2974 uint16_t freq, 2975 enum phy_ch_width ch_width, 2976 const struct bonded_channel_freq 2977 **bonded_chan_ptr_ptr) 2978 2979 { 2980 if (ch_width == CH_WIDTH_80P80MHZ) 2981 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2982 bonded_chan_80mhz_list_freq, 2983 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2984 bonded_chan_ptr_ptr); 2985 else if (ch_width == CH_WIDTH_160MHZ) 2986 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2987 bonded_chan_160mhz_list_freq, 2988 QDF_ARRAY_SIZE(bonded_chan_160mhz_list_freq), 2989 bonded_chan_ptr_ptr); 2990 else if (ch_width == CH_WIDTH_80MHZ) 2991 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2992 bonded_chan_80mhz_list_freq, 2993 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2994 bonded_chan_ptr_ptr); 2995 else if (ch_width == CH_WIDTH_40MHZ) 2996 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2997 bonded_chan_40mhz_list_freq, 2998 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 2999 bonded_chan_ptr_ptr); 3000 else 3001 return reg_get_channel_state_for_freq(pdev, freq); 3002 } 3003 3004 enum channel_state 3005 reg_get_5g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3006 qdf_freq_t freq, 3007 enum phy_ch_width bw) 3008 { 3009 enum channel_enum ch_indx; 3010 enum channel_state chan_state; 3011 struct regulatory_channel *reg_channels; 3012 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3013 bool bw_enabled = false; 3014 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3015 3016 if (bw > CH_WIDTH_80P80MHZ) { 3017 reg_err("bw passed is not good"); 3018 return CHANNEL_STATE_INVALID; 3019 } 3020 3021 chan_state = reg_get_5g_bonded_channel_for_freq(pdev, freq, bw, 3022 &bonded_chan_ptr); 3023 3024 if ((chan_state == CHANNEL_STATE_INVALID) || 3025 (chan_state == CHANNEL_STATE_DISABLE)) 3026 return chan_state; 3027 3028 pdev_priv_obj = reg_get_pdev_obj(pdev); 3029 3030 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3031 reg_err("pdev reg obj is NULL"); 3032 return CHANNEL_STATE_INVALID; 3033 } 3034 reg_channels = pdev_priv_obj->cur_chan_list; 3035 3036 ch_indx = reg_get_chan_enum_for_freq(freq); 3037 if (ch_indx == INVALID_CHANNEL) 3038 return CHANNEL_STATE_INVALID; 3039 if (bw == CH_WIDTH_5MHZ) 3040 bw_enabled = true; 3041 else if (bw == CH_WIDTH_10MHZ) 3042 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 3043 (reg_channels[ch_indx].max_bw >= 10); 3044 else if (bw == CH_WIDTH_20MHZ) 3045 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 3046 (reg_channels[ch_indx].max_bw >= 20); 3047 else if (bw == CH_WIDTH_40MHZ) 3048 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 3049 (reg_channels[ch_indx].max_bw >= 40); 3050 else if (bw == CH_WIDTH_80MHZ) 3051 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3052 (reg_channels[ch_indx].max_bw >= 80); 3053 else if (bw == CH_WIDTH_160MHZ) 3054 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 3055 (reg_channels[ch_indx].max_bw >= 160); 3056 else if (bw == CH_WIDTH_80P80MHZ) 3057 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3058 (reg_channels[ch_indx].max_bw >= 80); 3059 3060 if (bw_enabled) 3061 return chan_state; 3062 else 3063 return CHANNEL_STATE_DISABLE; 3064 } 3065 3066 enum channel_state 3067 reg_get_2g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3068 qdf_freq_t oper_ch_freq, 3069 qdf_freq_t sec_ch_freq, 3070 enum phy_ch_width bw) 3071 { 3072 enum channel_enum chan_idx; 3073 enum channel_state chan_state; 3074 struct regulatory_channel *reg_channels; 3075 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3076 bool bw_enabled = false; 3077 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 3078 3079 if (bw > CH_WIDTH_40MHZ) 3080 return CHANNEL_STATE_INVALID; 3081 3082 if (bw == CH_WIDTH_40MHZ) { 3083 if ((sec_ch_freq + 20 != oper_ch_freq) && 3084 (oper_ch_freq + 20 != sec_ch_freq)) 3085 return CHANNEL_STATE_INVALID; 3086 chan_state2 = reg_get_channel_state_for_freq(pdev, sec_ch_freq); 3087 if (chan_state2 == CHANNEL_STATE_INVALID) 3088 return chan_state2; 3089 } 3090 3091 pdev_priv_obj = reg_get_pdev_obj(pdev); 3092 3093 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3094 reg_err("reg pdev priv obj is NULL"); 3095 return CHANNEL_STATE_INVALID; 3096 } 3097 3098 reg_channels = pdev_priv_obj->cur_chan_list; 3099 3100 chan_state = reg_get_channel_state_for_freq(pdev, oper_ch_freq); 3101 if (chan_state2 < chan_state) 3102 chan_state = chan_state2; 3103 3104 if ((chan_state == CHANNEL_STATE_INVALID) || 3105 (chan_state == CHANNEL_STATE_DISABLE)) 3106 return chan_state; 3107 3108 chan_idx = reg_get_chan_enum_for_freq(oper_ch_freq); 3109 if (chan_idx == INVALID_CHANNEL) 3110 return CHANNEL_STATE_INVALID; 3111 if (bw == CH_WIDTH_5MHZ) 3112 bw_enabled = true; 3113 else if (bw == CH_WIDTH_10MHZ) 3114 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 3115 (reg_channels[chan_idx].max_bw >= 10); 3116 else if (bw == CH_WIDTH_20MHZ) 3117 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 3118 (reg_channels[chan_idx].max_bw >= 20); 3119 else if (bw == CH_WIDTH_40MHZ) 3120 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 3121 (reg_channels[chan_idx].max_bw >= 40); 3122 3123 if (bw_enabled) 3124 return chan_state; 3125 else 3126 return CHANNEL_STATE_DISABLE; 3127 3128 return CHANNEL_STATE_ENABLE; 3129 } 3130 3131 /** 3132 * reg_set_5g_channel_params_for_freq()- Set channel parameters like center 3133 * frequency for a bonded channel state. Also return the maximum bandwidth 3134 * supported by the channel. 3135 * @pdev: Pointer to pdev. 3136 * @freq: Channel center frequency. 3137 * ch_params: Pointer to ch_params. 3138 * 3139 * Return: void 3140 */ 3141 static void reg_set_5g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3142 uint16_t freq, 3143 struct ch_params *ch_params) 3144 { 3145 /* 3146 * Set channel parameters like center frequency for a bonded channel 3147 * state. Also return the maximum bandwidth supported by the channel. 3148 */ 3149 3150 enum phy_ch_width next_lower_bw; 3151 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3152 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 3153 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3154 const struct bonded_channel_freq *bonded_chan_ptr2 = NULL; 3155 3156 if (!ch_params) { 3157 reg_err("ch_params is NULL"); 3158 return; 3159 } 3160 3161 if (ch_params->ch_width >= CH_WIDTH_MAX) { 3162 if (ch_params->mhz_freq_seg1 != 0) 3163 ch_params->ch_width = CH_WIDTH_80P80MHZ; 3164 else 3165 ch_params->ch_width = CH_WIDTH_160MHZ; 3166 } 3167 next_lower_bw = ch_params->ch_width; 3168 3169 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3170 ch_params->ch_width = next_lower_bw; 3171 next_lower_bw = get_next_lower_bw[ch_params->ch_width]; 3172 bonded_chan_ptr = NULL; 3173 bonded_chan_ptr2 = NULL; 3174 chan_state = reg_get_5g_bonded_channel_for_freq( 3175 pdev, freq, ch_params->ch_width, 3176 &bonded_chan_ptr); 3177 3178 chan_state = reg_get_5g_bonded_channel_state_for_freq( 3179 pdev, freq, ch_params->ch_width); 3180 3181 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 3182 chan_state2 = reg_get_5g_bonded_channel_state_for_freq( 3183 pdev, ch_params->mhz_freq_seg1 - 3184 NEAREST_20MHZ_CHAN_FREQ_OFFSET, 3185 CH_WIDTH_80MHZ); 3186 3187 chan_state = reg_combine_channel_states( 3188 chan_state, chan_state2); 3189 } 3190 3191 if ((chan_state != CHANNEL_STATE_ENABLE) && 3192 (chan_state != CHANNEL_STATE_DFS)) 3193 continue; 3194 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 3195 ch_params->sec_ch_offset = NO_SEC_CH; 3196 ch_params->mhz_freq_seg0 = freq; 3197 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3198 ch_params->center_freq_seg0 = 3199 (ch_params->mhz_freq_seg0 - 3200 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3201 else 3202 ch_params->center_freq_seg0 = 3203 (ch_params->mhz_freq_seg0 - 3204 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3205 break; 3206 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 3207 reg_get_5g_bonded_chan_array_for_freq( 3208 pdev, freq, bonded_chan_40mhz_list_freq, 3209 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3210 &bonded_chan_ptr2); 3211 if (!bonded_chan_ptr || !bonded_chan_ptr2) 3212 continue; 3213 if (freq == bonded_chan_ptr2->start_freq) 3214 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 3215 else 3216 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 3217 3218 ch_params->mhz_freq_seg0 = 3219 (bonded_chan_ptr->start_freq + 3220 bonded_chan_ptr->end_freq) / 2; 3221 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3222 ch_params->center_freq_seg0 = 3223 (ch_params->mhz_freq_seg0 - 3224 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3225 else 3226 ch_params->center_freq_seg0 = 3227 (ch_params->mhz_freq_seg0 - 3228 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3229 break; 3230 } 3231 } 3232 3233 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 3234 ch_params->mhz_freq_seg1 = ch_params->mhz_freq_seg0; 3235 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg1)) 3236 ch_params->center_freq_seg1 = 3237 (ch_params->mhz_freq_seg1 - SIXG_STARTING_FREQ) / 3238 FREQ_TO_CHAN_SCALE; 3239 else 3240 ch_params->center_freq_seg1 = 3241 (ch_params->mhz_freq_seg1 - FIVEG_STARTING_FREQ) / 3242 FREQ_TO_CHAN_SCALE; 3243 chan_state = reg_get_5g_bonded_channel_for_freq( 3244 pdev, freq, CH_WIDTH_80MHZ, &bonded_chan_ptr); 3245 if (bonded_chan_ptr) { 3246 ch_params->mhz_freq_seg0 = 3247 (bonded_chan_ptr->start_freq + 3248 bonded_chan_ptr->end_freq) / 2; 3249 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3250 ch_params->center_freq_seg0 = 3251 (ch_params->mhz_freq_seg0 - 3252 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3253 else 3254 ch_params->center_freq_seg0 = 3255 (ch_params->mhz_freq_seg0 - 3256 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3257 } 3258 } 3259 3260 /* Overwrite mhz_freq_seg1 to 0 for non 160 and 80+80 width */ 3261 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 3262 ch_params->ch_width == CH_WIDTH_80P80MHZ)) { 3263 ch_params->mhz_freq_seg1 = 0; 3264 ch_params->center_freq_seg1 = 0; 3265 } 3266 } 3267 3268 /** 3269 * reg_set_2g_channel_params_for_freq() - set the 2.4G bonded channel parameters 3270 * @oper_freq: operating channel 3271 * @ch_params: channel parameters 3272 * @sec_ch_2g_freq: 2.4G secondary channel 3273 * 3274 * Return: void 3275 */ 3276 static void reg_set_2g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3277 uint16_t oper_freq, 3278 struct ch_params *ch_params, 3279 uint16_t sec_ch_2g_freq) 3280 { 3281 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3282 3283 if (ch_params->ch_width >= CH_WIDTH_MAX) 3284 ch_params->ch_width = CH_WIDTH_40MHZ; 3285 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g_freq) { 3286 if (oper_freq >= TWOG_CHAN_1_IN_MHZ && oper_freq <= 3287 TWOG_CHAN_5_IN_MHZ) 3288 sec_ch_2g_freq = oper_freq + 20; 3289 else if (oper_freq >= TWOG_CHAN_6_IN_MHZ && oper_freq <= 3290 TWOG_CHAN_13_IN_MHZ) 3291 sec_ch_2g_freq = oper_freq - 20; 3292 } 3293 3294 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3295 chan_state = 3296 reg_get_2g_bonded_channel_state_for_freq(pdev, oper_freq, 3297 sec_ch_2g_freq, 3298 ch_params->ch_width); 3299 if (chan_state == CHANNEL_STATE_ENABLE) { 3300 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 3301 if (oper_freq < sec_ch_2g_freq) 3302 ch_params->sec_ch_offset = 3303 LOW_PRIMARY_CH; 3304 else 3305 ch_params->sec_ch_offset = 3306 HIGH_PRIMARY_CH; 3307 ch_params->mhz_freq_seg0 = 3308 (oper_freq + sec_ch_2g_freq) / 2; 3309 if (ch_params->mhz_freq_seg0 == 3310 TWOG_CHAN_14_IN_MHZ) 3311 ch_params->center_freq_seg0 = 14; 3312 else 3313 ch_params->center_freq_seg0 = 3314 (ch_params->mhz_freq_seg0 - 3315 TWOG_STARTING_FREQ) / 3316 FREQ_TO_CHAN_SCALE; 3317 } else { 3318 ch_params->sec_ch_offset = NO_SEC_CH; 3319 ch_params->mhz_freq_seg0 = oper_freq; 3320 if (ch_params->mhz_freq_seg0 == 3321 TWOG_CHAN_14_IN_MHZ) 3322 ch_params->center_freq_seg0 = 14; 3323 else 3324 ch_params->center_freq_seg0 = 3325 (ch_params->mhz_freq_seg0 - 3326 TWOG_STARTING_FREQ) / 3327 FREQ_TO_CHAN_SCALE; 3328 } 3329 break; 3330 } 3331 3332 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3333 } 3334 /* Overwrite mhz_freq_seg1 and center_freq_seg1 to 0 for 2.4 Ghz */ 3335 ch_params->mhz_freq_seg1 = 0; 3336 ch_params->center_freq_seg1 = 0; 3337 } 3338 3339 void reg_set_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3340 qdf_freq_t freq, 3341 qdf_freq_t sec_ch_2g_freq, 3342 struct ch_params *ch_params) 3343 { 3344 if (reg_is_5ghz_ch_freq(freq) || reg_is_6ghz_chan_freq(freq)) 3345 reg_set_5g_channel_params_for_freq(pdev, freq, ch_params); 3346 else if (reg_is_24ghz_ch_freq(freq)) 3347 reg_set_2g_channel_params_for_freq(pdev, freq, ch_params, 3348 sec_ch_2g_freq); 3349 } 3350 3351 uint8_t reg_get_channel_reg_power_for_freq(struct wlan_objmgr_pdev *pdev, 3352 qdf_freq_t freq) 3353 { 3354 enum channel_enum chan_enum; 3355 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3356 struct regulatory_channel *reg_channels; 3357 3358 chan_enum = reg_get_chan_enum_for_freq(freq); 3359 3360 if (chan_enum == INVALID_CHANNEL) { 3361 reg_err("channel is invalid"); 3362 return QDF_STATUS_E_FAILURE; 3363 } 3364 3365 pdev_priv_obj = reg_get_pdev_obj(pdev); 3366 3367 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3368 reg_err("reg pdev priv obj is NULL"); 3369 return QDF_STATUS_E_FAILURE; 3370 } 3371 3372 reg_channels = pdev_priv_obj->cur_chan_list; 3373 3374 return reg_channels[chan_enum].tx_power; 3375 } 3376 3377 bool reg_is_dfs_for_freq(struct wlan_objmgr_pdev *pdev, qdf_freq_t freq) 3378 { 3379 enum channel_state ch_state; 3380 3381 ch_state = reg_get_channel_state_for_freq(pdev, freq); 3382 3383 return ch_state == CHANNEL_STATE_DFS; 3384 } 3385 3386 void reg_update_nol_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3387 uint16_t *chan_freq_list, 3388 uint8_t num_chan, 3389 bool nol_chan) 3390 { 3391 enum channel_enum chan_enum; 3392 struct regulatory_channel *mas_chan_list; 3393 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3394 struct wlan_objmgr_psoc *psoc; 3395 uint16_t i; 3396 3397 if (!num_chan || !chan_freq_list) { 3398 reg_err("chan_freq_list or num_ch is NULL"); 3399 return; 3400 } 3401 3402 psoc = wlan_pdev_get_psoc(pdev); 3403 3404 pdev_priv_obj = reg_get_pdev_obj(pdev); 3405 if (!pdev_priv_obj) { 3406 reg_err("reg pdev private obj is NULL"); 3407 return; 3408 } 3409 3410 mas_chan_list = pdev_priv_obj->mas_chan_list; 3411 for (i = 0; i < num_chan; i++) { 3412 chan_enum = reg_get_chan_enum_for_freq(chan_freq_list[i]); 3413 if (chan_enum == INVALID_CHANNEL) { 3414 reg_err("Invalid freq in nol list, freq %d", 3415 chan_freq_list[i]); 3416 continue; 3417 } 3418 mas_chan_list[chan_enum].nol_chan = nol_chan; 3419 } 3420 3421 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3422 3423 reg_send_scheduler_msg_sb(psoc, pdev); 3424 } 3425 3426 void reg_update_nol_history_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3427 uint16_t *chan_list, 3428 uint8_t num_chan, 3429 bool nol_history_chan) 3430 { 3431 enum channel_enum chan_enum; 3432 struct regulatory_channel *mas_chan_list; 3433 struct regulatory_channel *cur_chan_list; 3434 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3435 uint16_t i; 3436 3437 if (!num_chan || !chan_list) { 3438 reg_err("chan_list or num_ch is NULL"); 3439 return; 3440 } 3441 3442 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 3443 pdev, WLAN_UMAC_COMP_REGULATORY); 3444 3445 if (!pdev_priv_obj) { 3446 reg_err("reg psoc private obj is NULL"); 3447 return; 3448 } 3449 3450 mas_chan_list = pdev_priv_obj->mas_chan_list; 3451 cur_chan_list = pdev_priv_obj->cur_chan_list; 3452 3453 for (i = 0; i < num_chan; i++) { 3454 chan_enum = reg_get_chan_enum_for_freq(chan_list[i]); 3455 if (chan_enum == INVALID_CHANNEL) { 3456 reg_err("Invalid ch in nol list, chan %d", 3457 chan_list[i]); 3458 continue; 3459 } 3460 mas_chan_list[chan_enum].nol_history = nol_history_chan; 3461 cur_chan_list[chan_enum].nol_history = nol_history_chan; 3462 } 3463 } 3464 3465 static inline bool REG_IS_FREQUENCY_VALID_5G_SBS(qdf_freq_t curfreq, 3466 qdf_freq_t newfreq) 3467 { 3468 return ((curfreq) > (newfreq) ? 3469 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3470 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3471 > REG_SBS_SEPARATION_THRESHOLD : 3472 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3473 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3474 > REG_SBS_SEPARATION_THRESHOLD); 3475 } 3476 3477 bool reg_is_frequency_valid_5g_sbs(qdf_freq_t curfreq, qdf_freq_t newfreq) 3478 { 3479 return REG_IS_FREQUENCY_VALID_5G_SBS(curfreq, newfreq); 3480 } 3481 3482 qdf_freq_t reg_min_chan_freq(void) 3483 { 3484 return channel_map[MIN_24GHZ_CHANNEL].center_freq; 3485 } 3486 3487 qdf_freq_t reg_max_chan_freq(void) 3488 { 3489 return channel_map[NUM_CHANNELS - 1].center_freq; 3490 } 3491 3492 bool reg_is_same_band_freqs(qdf_freq_t freq1, qdf_freq_t freq2) 3493 { 3494 return (freq1 && freq2 && ((REG_IS_6GHZ_FREQ(freq1) && 3495 REG_IS_6GHZ_FREQ(freq2)) || 3496 (REG_IS_5GHZ_FREQ(freq1) && 3497 REG_IS_5GHZ_FREQ(freq2)) || 3498 (REG_IS_24GHZ_CH_FREQ(freq1) && 3499 REG_IS_24GHZ_CH_FREQ(freq2)))); 3500 } 3501 3502 enum reg_wifi_band reg_freq_to_band(qdf_freq_t freq) 3503 { 3504 if (REG_IS_24GHZ_CH_FREQ(freq)) 3505 return REG_BAND_2G; 3506 else if (REG_IS_5GHZ_FREQ(freq) || REG_IS_49GHZ_FREQ(freq)) 3507 return REG_BAND_5G; 3508 else if (REG_IS_6GHZ_FREQ(freq)) 3509 return REG_BAND_6G; 3510 return REG_BAND_UNKNOWN; 3511 } 3512 3513 #endif /* CONFIG_CHAN_FREQ_API */ 3514 3515 uint8_t reg_get_max_tx_power(struct wlan_objmgr_pdev *pdev) 3516 { 3517 struct regulatory_channel *cur_chan_list; 3518 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3519 uint8_t i, max_tx_power = 0; 3520 3521 pdev_priv_obj = reg_get_pdev_obj(pdev); 3522 3523 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3524 reg_err("reg pdev private obj is NULL"); 3525 return QDF_STATUS_E_FAILURE; 3526 } 3527 3528 cur_chan_list = pdev_priv_obj->cur_chan_list; 3529 3530 for (i = 0; i < NUM_CHANNELS; i++) { 3531 if (cur_chan_list[i].state != CHANNEL_STATE_DISABLE && 3532 cur_chan_list[i].chan_flags != REGULATORY_CHAN_DISABLED) { 3533 if (cur_chan_list[i].tx_power > max_tx_power) 3534 max_tx_power = cur_chan_list[i].tx_power; 3535 } 3536 } 3537 3538 if (!max_tx_power) 3539 reg_err_rl("max_tx_power is zero"); 3540 3541 return max_tx_power; 3542 } 3543 3544 QDF_STATUS reg_set_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3545 { 3546 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3547 3548 psoc_reg = reg_get_psoc_obj(psoc); 3549 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) { 3550 reg_err("psoc reg component is NULL"); 3551 return QDF_STATUS_E_INVAL; 3552 } 3553 3554 psoc_reg->ignore_fw_reg_offload_ind = true; 3555 return QDF_STATUS_SUCCESS; 3556 } 3557 3558 bool reg_get_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3559 { 3560 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3561 3562 psoc_reg = reg_get_psoc_obj(psoc); 3563 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) 3564 return false; 3565 3566 return psoc_reg->ignore_fw_reg_offload_ind; 3567 } 3568 3569 QDF_STATUS reg_set_6ghz_supported(struct wlan_objmgr_psoc *psoc, bool val) 3570 { 3571 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3572 3573 psoc_priv_obj = reg_get_psoc_obj(psoc); 3574 3575 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3576 reg_err("psoc reg component is NULL"); 3577 return QDF_STATUS_E_FAILURE; 3578 } 3579 3580 psoc_priv_obj->six_ghz_supported = val; 3581 3582 return QDF_STATUS_SUCCESS; 3583 } 3584 3585 bool reg_is_6ghz_op_class(struct wlan_objmgr_pdev *pdev, uint8_t op_class) 3586 { 3587 return ((op_class >= MIN_6GHZ_OPER_CLASS) && 3588 (op_class <= MAX_6GHZ_OPER_CLASS)); 3589 } 3590 3591 bool reg_is_6ghz_supported(struct wlan_objmgr_pdev *pdev) 3592 { 3593 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3594 struct wlan_objmgr_psoc *psoc; 3595 3596 psoc = wlan_pdev_get_psoc(pdev); 3597 if (!psoc) { 3598 reg_err_rl("psoc is NULL"); 3599 return false; 3600 } 3601 3602 psoc_priv_obj = reg_get_psoc_obj(psoc); 3603 3604 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3605 reg_err("psoc reg component is NULL"); 3606 return false; 3607 } 3608 3609 return psoc_priv_obj->six_ghz_supported; 3610 } 3611 3612 #ifdef DISABLE_UNII_SHARED_BANDS 3613 QDF_STATUS 3614 reg_get_unii_5g_bitmap(struct wlan_objmgr_pdev *pdev, uint8_t *bitmap) 3615 { 3616 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3617 3618 pdev_priv_obj = reg_get_pdev_obj(pdev); 3619 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3620 reg_err_rl("pdev reg component is NULL"); 3621 return QDF_STATUS_E_FAILURE; 3622 } 3623 *bitmap = pdev_priv_obj->unii_5g_bitmap; 3624 3625 return QDF_STATUS_SUCCESS; 3626 } 3627 #endif 3628