1 /* 2 * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 38 const struct chan_map *channel_map; 39 #ifdef CONFIG_CHAN_NUM_API 40 static const struct bonded_channel bonded_chan_40mhz_list[] = { 41 {36, 40}, 42 {44, 48}, 43 {52, 56}, 44 {60, 64}, 45 {100, 104}, 46 {108, 112}, 47 {116, 120}, 48 {124, 128}, 49 {132, 136}, 50 {140, 144}, 51 {149, 153}, 52 {157, 161}, 53 {165, 169} 54 }; 55 56 static const struct bonded_channel bonded_chan_80mhz_list[] = { 57 {36, 48}, 58 {52, 64}, 59 {100, 112}, 60 {116, 128}, 61 {132, 144}, 62 {149, 161} 63 }; 64 65 static const struct bonded_channel bonded_chan_160mhz_list[] = { 66 {36, 64}, 67 {100, 128} 68 }; 69 #endif /* CONFIG_CHAN_NUM_API */ 70 71 #ifdef CONFIG_CHAN_FREQ_API 72 /* bonded_chan_40mhz_list_freq - List of 40MHz bonnded channel frequencies */ 73 static const struct bonded_channel_freq bonded_chan_40mhz_list_freq[] = { 74 {5180, 5200}, 75 {5220, 5240}, 76 {5260, 5280}, 77 {5300, 5320}, 78 {5500, 5520}, 79 {5540, 5560}, 80 {5580, 5600}, 81 {5620, 5640}, 82 {5660, 5680}, 83 {5700, 5720}, 84 {5745, 5765}, 85 {5785, 5805}, 86 {5825, 5845}, 87 #ifdef CONFIG_BAND_6GHZ 88 {5945, 5965}, 89 {5985, 6005}, 90 {6025, 6045}, 91 {6065, 6085}, 92 {6105, 6125}, 93 {6145, 6165}, 94 {6185, 6205}, 95 {6225, 6245}, 96 {6265, 6285}, 97 {6305, 6325}, 98 {6345, 6365}, 99 {6385, 6405}, 100 {6425, 6445}, 101 {6465, 6485}, 102 {6505, 6525}, 103 {6545, 6565}, 104 {6585, 6605}, 105 {6625, 6645}, 106 {6665, 6685}, 107 {6705, 6725}, 108 {6745, 6765}, 109 {6785, 6805}, 110 {6825, 6845}, 111 {6865, 6885}, 112 {6905, 6925}, 113 {6945, 6965}, 114 {6985, 7005}, 115 {7025, 7045}, 116 {7065, 7085} 117 #endif /*CONFIG_BAND_6GHZ*/ 118 }; 119 120 /* bonded_chan_80mhz_list_freq - List of 80MHz bonnded channel frequencies */ 121 static const struct bonded_channel_freq bonded_chan_80mhz_list_freq[] = { 122 {5180, 5240}, 123 {5260, 5320}, 124 {5500, 5560}, 125 {5580, 5640}, 126 {5660, 5720}, 127 {5745, 5805}, 128 #ifdef CONFIG_BAND_6GHZ 129 {5945, 6005}, 130 {6025, 6085}, 131 {6105, 6165}, 132 {6185, 6245}, 133 {6265, 6325}, 134 {6345, 6405}, 135 {6425, 6485}, 136 {6505, 6565}, 137 {6585, 6645}, 138 {6665, 6725}, 139 {6745, 6805}, 140 {6825, 6885}, 141 {6905, 6965}, 142 {6985, 7045} 143 #endif /*CONFIG_BAND_6GHZ*/ 144 }; 145 146 /* bonded_chan_160mhz_list_freq - List of 160MHz bonnded channel frequencies */ 147 static const struct bonded_channel_freq bonded_chan_160mhz_list_freq[] = { 148 {5180, 5320}, 149 {5500, 5640}, 150 #ifdef CONFIG_BAND_6GHZ 151 {5945, 6085}, 152 {6105, 6245}, 153 {6265, 6405}, 154 {6425, 6565}, 155 {6585, 6725}, 156 {6745, 6885}, 157 {6905, 7045} 158 #endif /*CONFIG_BAND_6GHZ*/ 159 }; 160 #endif /*CONFIG_CHAN_FREQ_API*/ 161 162 static const enum phy_ch_width get_next_lower_bw[] = { 163 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 164 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 165 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 166 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 167 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 168 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 169 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 170 }; 171 172 const struct chan_map channel_map_us[NUM_CHANNELS] = { 173 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 174 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 175 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 176 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 177 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 178 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 179 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 180 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 181 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 182 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 183 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 184 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 185 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 186 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 187 188 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 189 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 190 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 191 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 192 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 193 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 200 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 201 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 202 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 203 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 204 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 205 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 206 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 207 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 208 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 209 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 210 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 211 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 212 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 213 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 214 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 215 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 216 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 217 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 218 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 219 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 220 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 221 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 222 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 223 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 224 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 225 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 226 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 227 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 228 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 229 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 230 231 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 232 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 233 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 234 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 235 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 236 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 237 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 238 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 239 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 240 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 241 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 242 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 243 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 244 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 245 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 246 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 247 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 248 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 249 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 250 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 251 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 252 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 253 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 254 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 255 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 256 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 257 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 258 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 259 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 260 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 261 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 262 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 263 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 264 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 265 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 266 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 267 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 268 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 269 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 270 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 271 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 272 #ifdef CONFIG_BAND_6GHZ 273 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 274 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 275 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 276 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 277 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 278 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 279 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 280 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 281 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 282 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 283 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 284 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 285 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 286 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 287 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 288 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 289 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 290 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 291 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 292 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 293 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 294 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 295 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 296 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 297 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 298 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 299 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 300 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 301 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 302 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 303 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 304 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 305 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 306 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 307 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 308 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 309 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 310 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 311 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 312 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 313 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 314 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 315 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 316 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 317 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 318 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 319 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 320 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 321 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 322 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 323 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 324 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 325 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 326 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 327 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 328 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 329 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 330 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 331 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 332 #endif /* CONFIG_BAND_6GHZ */ 333 }; 334 335 const struct chan_map channel_map_eu[NUM_CHANNELS] = { 336 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 337 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 338 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 339 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 340 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 341 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 342 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 343 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 344 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 345 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 346 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 347 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 348 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 349 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 350 351 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 352 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 353 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 354 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 355 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 356 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 357 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 358 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 359 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 360 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 361 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 362 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 363 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 364 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 365 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 366 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 367 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 368 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 369 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 370 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 371 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 372 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 373 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 374 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 375 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 376 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 377 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 378 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 379 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 380 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 381 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 386 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 393 394 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 395 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 396 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 397 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 398 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 399 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 400 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 401 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 402 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 403 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 404 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 405 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 406 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 407 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 408 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 409 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 410 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 411 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 412 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 413 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 414 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 415 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 416 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 417 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 418 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 419 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 420 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 421 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 422 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 423 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 424 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 425 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 426 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 427 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 428 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 429 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 430 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 431 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 432 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 433 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 434 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 435 #ifdef CONFIG_BAND_6GHZ 436 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 437 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 438 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 439 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 440 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 441 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 442 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 443 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 444 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 445 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 446 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 447 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 448 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 449 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 450 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 451 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 452 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 453 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 454 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 455 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 456 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 457 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 458 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 459 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 460 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 461 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 462 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 463 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 464 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 465 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 466 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 467 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 468 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 469 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 470 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 471 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 472 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 473 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 474 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 475 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 476 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 477 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 478 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 479 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 480 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 481 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 482 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 483 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 484 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 485 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 486 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 487 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 488 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 489 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 490 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 491 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 492 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 493 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 494 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 495 #endif /* CONFIG_BAND_6GHZ */ 496 }; 497 498 const struct chan_map channel_map_jp[NUM_CHANNELS] = { 499 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 500 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 501 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 502 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 503 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 504 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 505 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 506 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 507 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 508 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 509 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 510 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 511 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 512 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 513 514 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 515 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 516 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 517 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 518 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 519 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 520 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 521 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 522 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 523 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 524 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 525 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 526 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 527 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 528 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 529 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 530 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 531 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 532 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 533 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 534 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 535 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 536 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 537 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 538 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 539 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 540 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 541 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 542 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 543 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 544 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 545 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 546 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 547 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 548 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 549 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 550 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 551 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 552 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 553 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 554 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 555 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 556 557 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 558 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 559 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 560 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 561 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 562 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 563 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 564 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 565 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 566 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 567 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 568 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 569 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 570 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 571 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 572 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 573 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 574 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 575 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 576 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 577 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 578 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 579 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 580 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 581 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 582 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 583 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 584 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 585 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 586 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 587 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 588 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 589 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 590 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 591 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 592 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 593 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 594 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 595 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 596 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 597 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 598 #ifdef CONFIG_BAND_6GHZ 599 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 600 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 601 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 602 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 603 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 604 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 605 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 606 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 607 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 608 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 609 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 610 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 611 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 612 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 613 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 614 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 615 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 616 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 617 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 618 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 619 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 620 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 621 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 622 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 623 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 624 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 625 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 626 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 627 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 628 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 629 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 630 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 631 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 632 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 633 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 634 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 635 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 636 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 637 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 638 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 639 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 640 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 641 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 642 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 643 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 644 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 645 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 646 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 647 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 648 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 649 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 650 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 651 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 652 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 653 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 654 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 655 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 656 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 657 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 658 #endif /* CONFIG_BAND_6GHZ */ 659 }; 660 661 const struct chan_map channel_map_global[NUM_CHANNELS] = { 662 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 663 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 664 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 665 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 666 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 667 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 668 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 669 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 670 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 671 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 672 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 673 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 674 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 675 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 676 677 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 678 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 679 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 680 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 681 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 682 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 683 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 684 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 685 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 686 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 687 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 688 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 689 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 690 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 691 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 692 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 693 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 694 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 695 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 696 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 697 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 698 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 699 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 700 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 701 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 702 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 703 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 704 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 705 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 706 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 707 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 708 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 709 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 710 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 711 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 712 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 713 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 714 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 715 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 716 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 717 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 718 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 719 720 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 721 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 722 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 723 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 724 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 725 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 726 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 727 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 728 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 729 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 730 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 731 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 732 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 733 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 734 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 735 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 736 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 737 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 738 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 739 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 740 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 741 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 742 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 743 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 744 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 745 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 746 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 747 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 748 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 749 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 750 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 751 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 752 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 753 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 754 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 755 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 756 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 757 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 758 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 759 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 760 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 761 #ifdef CONFIG_BAND_6GHZ 762 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 763 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 764 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 765 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 766 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 767 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 768 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 769 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 770 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 771 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 772 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 773 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 774 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 775 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 776 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 777 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 778 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 779 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 780 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 781 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 782 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 783 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 784 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 785 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 786 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 787 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 788 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 789 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 790 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 791 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 792 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 793 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 794 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 795 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 796 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 797 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 798 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 799 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 800 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 801 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 802 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 803 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 804 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 805 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 806 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 807 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 808 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 809 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 810 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 811 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 812 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 813 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 814 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 815 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 816 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 817 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 818 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 819 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 820 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 821 #endif /* CONFIG_BAND_6GHZ */ 822 }; 823 824 const struct chan_map channel_map_china[NUM_CHANNELS] = { 825 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 826 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 827 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 828 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 829 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 830 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 831 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 832 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 833 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 834 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 835 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 836 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 837 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 838 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 839 840 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 841 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 842 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 843 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 844 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 845 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 846 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 847 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 848 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 849 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 850 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 851 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 852 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 853 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 854 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 855 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 856 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 857 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 858 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 859 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 860 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 861 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 862 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 863 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 864 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 865 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 866 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 867 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 868 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 869 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 870 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 871 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 872 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 873 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 874 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 875 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 876 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 877 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 878 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 879 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 880 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 881 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 882 883 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 884 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 885 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 886 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 887 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 888 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 889 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 890 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 891 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 892 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 893 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 894 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 895 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 896 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 897 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 898 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 899 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 900 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 901 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 902 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 903 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 904 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 905 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 906 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 907 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 908 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 909 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 910 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 911 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 912 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 913 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 914 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 915 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 916 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 917 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 918 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 919 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 920 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 921 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 922 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 923 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 924 #ifdef CONFIG_BAND_6GHZ 925 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 926 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 927 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 928 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 929 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 930 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 931 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 932 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 933 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 934 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 935 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 936 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 937 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 938 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 939 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 940 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 941 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 942 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 943 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 944 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 945 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 946 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 947 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 948 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 949 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 950 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 951 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 952 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 953 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 954 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 955 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 956 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 957 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 958 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 959 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 960 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 961 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 962 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 963 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 964 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 965 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 966 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 967 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 968 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 969 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 970 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 971 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 972 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 973 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 974 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 975 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 976 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 977 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 978 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 979 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 980 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 981 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 982 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 983 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 984 #endif /* CONFIG_BAND_6GHZ */ 985 }; 986 987 void reg_init_channel_map(enum dfs_reg dfs_region) 988 { 989 switch (dfs_region) { 990 case DFS_UNINIT_REGION: 991 case DFS_UNDEF_REGION: 992 channel_map = channel_map_global; 993 break; 994 case DFS_FCC_REGION: 995 channel_map = channel_map_us; 996 break; 997 case DFS_ETSI_REGION: 998 channel_map = channel_map_eu; 999 break; 1000 case DFS_MKK_REGION: 1001 case DFS_MKKN_REGION: 1002 channel_map = channel_map_jp; 1003 break; 1004 case DFS_CN_REGION: 1005 channel_map = channel_map_china; 1006 break; 1007 case DFS_KR_REGION: 1008 channel_map = channel_map_eu; 1009 break; 1010 } 1011 } 1012 1013 uint16_t reg_get_bw_value(enum phy_ch_width bw) 1014 { 1015 switch (bw) { 1016 case CH_WIDTH_20MHZ: 1017 return 20; 1018 case CH_WIDTH_40MHZ: 1019 return 40; 1020 case CH_WIDTH_80MHZ: 1021 return 80; 1022 case CH_WIDTH_160MHZ: 1023 return 160; 1024 case CH_WIDTH_80P80MHZ: 1025 return 160; 1026 case CH_WIDTH_INVALID: 1027 return 0; 1028 case CH_WIDTH_5MHZ: 1029 return 5; 1030 case CH_WIDTH_10MHZ: 1031 return 10; 1032 case CH_WIDTH_MAX: 1033 return 160; 1034 default: 1035 return 0; 1036 } 1037 } 1038 1039 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 1040 struct wlan_objmgr_psoc *psoc) 1041 { 1042 return &((psoc->soc_cb.tx_ops.reg_ops)); 1043 } 1044 1045 #ifdef CONFIG_CHAN_NUM_API 1046 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 1047 struct channel_power *ch_list, 1048 uint8_t *num_chan) 1049 { 1050 int i, count; 1051 struct regulatory_channel *reg_channels; 1052 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1053 1054 if (!num_chan || !ch_list) { 1055 reg_err("chan_list or num_ch is NULL"); 1056 return QDF_STATUS_E_FAILURE; 1057 } 1058 1059 pdev_priv_obj = reg_get_pdev_obj(pdev); 1060 1061 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1062 reg_err("reg pdev priv obj is NULL"); 1063 return QDF_STATUS_E_FAILURE; 1064 } 1065 1066 /* set the current channel list */ 1067 reg_channels = pdev_priv_obj->cur_chan_list; 1068 1069 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 1070 if (reg_channels[i].state && 1071 reg_channels[i].chan_flags != REGULATORY_CHAN_DISABLED) { 1072 ch_list[count].chan_num = 1073 reg_channels[i].chan_num; 1074 ch_list[count].center_freq = 1075 reg_channels[i].center_freq; 1076 ch_list[count++].tx_power = 1077 reg_channels[i].tx_power; 1078 } 1079 } 1080 1081 *num_chan = count; 1082 1083 return QDF_STATUS_SUCCESS; 1084 } 1085 1086 enum channel_enum reg_get_chan_enum(uint8_t chan_num) 1087 { 1088 uint32_t count; 1089 1090 for (count = 0; count < NUM_CHANNELS; count++) 1091 if (channel_map[count].chan_num == chan_num) 1092 return count; 1093 1094 reg_err("invalid channel number %d", chan_num); 1095 1096 return INVALID_CHANNEL; 1097 } 1098 1099 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 1100 uint8_t ch) 1101 { 1102 enum channel_enum ch_idx; 1103 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1104 1105 ch_idx = reg_get_chan_enum(ch); 1106 1107 if (ch_idx == INVALID_CHANNEL) 1108 return CHANNEL_STATE_INVALID; 1109 1110 pdev_priv_obj = reg_get_pdev_obj(pdev); 1111 1112 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1113 reg_err("pdev reg obj is NULL"); 1114 return CHANNEL_STATE_INVALID; 1115 } 1116 1117 return pdev_priv_obj->cur_chan_list[ch_idx].state; 1118 } 1119 1120 /** 1121 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 1122 * @pdev: Pointer to pdev structure 1123 * @oper_ch: operating channel number 1124 * @bonded_chan_ar: bonded channel array 1125 * @array_size; Array size 1126 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 1127 * 1128 * Return: bonded channel state 1129 */ 1130 static enum channel_state reg_get_5g_bonded_chan_array( 1131 struct wlan_objmgr_pdev *pdev, 1132 uint8_t oper_chan, 1133 const struct bonded_channel bonded_chan_ar[], 1134 uint16_t array_size, 1135 const struct bonded_channel **bonded_chan_ptr_ptr) 1136 { 1137 int i; 1138 uint8_t chan_num; 1139 const struct bonded_channel *bonded_chan_ptr = NULL; 1140 enum channel_state chan_state = CHANNEL_STATE_INVALID; 1141 enum channel_state temp_chan_state; 1142 1143 for (i = 0; i < array_size; i++) { 1144 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 1145 (oper_chan <= bonded_chan_ar[i].end_ch)) { 1146 bonded_chan_ptr = &bonded_chan_ar[i]; 1147 break; 1148 } 1149 } 1150 1151 if (!bonded_chan_ptr) 1152 return chan_state; 1153 1154 *bonded_chan_ptr_ptr = bonded_chan_ptr; 1155 chan_num = bonded_chan_ptr->start_ch; 1156 while (chan_num <= bonded_chan_ptr->end_ch) { 1157 temp_chan_state = reg_get_channel_state(pdev, chan_num); 1158 if (temp_chan_state < chan_state) 1159 chan_state = temp_chan_state; 1160 chan_num = chan_num + 4; 1161 } 1162 1163 return chan_state; 1164 } 1165 1166 enum channel_state reg_get_5g_bonded_channel( 1167 struct wlan_objmgr_pdev *pdev, uint8_t chan_num, 1168 enum phy_ch_width ch_width, 1169 const struct bonded_channel **bonded_chan_ptr_ptr) 1170 { 1171 if (ch_width == CH_WIDTH_80P80MHZ) 1172 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1173 bonded_chan_80mhz_list, 1174 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1175 bonded_chan_ptr_ptr); 1176 else if (ch_width == CH_WIDTH_160MHZ) 1177 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1178 bonded_chan_160mhz_list, 1179 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 1180 bonded_chan_ptr_ptr); 1181 else if (ch_width == CH_WIDTH_80MHZ) 1182 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1183 bonded_chan_80mhz_list, 1184 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1185 bonded_chan_ptr_ptr); 1186 else if (ch_width == CH_WIDTH_40MHZ) 1187 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1188 bonded_chan_40mhz_list, 1189 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1190 bonded_chan_ptr_ptr); 1191 else 1192 return reg_get_channel_state(pdev, chan_num); 1193 } 1194 1195 enum channel_state reg_get_5g_bonded_channel_state( 1196 struct wlan_objmgr_pdev *pdev, 1197 uint8_t ch, enum phy_ch_width bw) 1198 { 1199 enum channel_enum ch_indx; 1200 enum channel_state chan_state; 1201 struct regulatory_channel *reg_channels; 1202 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1203 bool bw_enabled = false; 1204 const struct bonded_channel *bonded_chan_ptr = NULL; 1205 1206 if (bw > CH_WIDTH_80P80MHZ) { 1207 reg_err("bw passed is not good"); 1208 return CHANNEL_STATE_INVALID; 1209 } 1210 1211 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 1212 1213 if ((chan_state == CHANNEL_STATE_INVALID) || 1214 (chan_state == CHANNEL_STATE_DISABLE)) 1215 return chan_state; 1216 1217 pdev_priv_obj = reg_get_pdev_obj(pdev); 1218 1219 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1220 reg_err("pdev reg obj is NULL"); 1221 return CHANNEL_STATE_INVALID; 1222 } 1223 reg_channels = pdev_priv_obj->cur_chan_list; 1224 1225 ch_indx = reg_get_chan_enum(ch); 1226 if (ch_indx == INVALID_CHANNEL) 1227 return CHANNEL_STATE_INVALID; 1228 if (bw == CH_WIDTH_5MHZ) 1229 bw_enabled = true; 1230 else if (bw == CH_WIDTH_10MHZ) 1231 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 1232 (reg_channels[ch_indx].max_bw >= 10); 1233 else if (bw == CH_WIDTH_20MHZ) 1234 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 1235 (reg_channels[ch_indx].max_bw >= 20); 1236 else if (bw == CH_WIDTH_40MHZ) 1237 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 1238 (reg_channels[ch_indx].max_bw >= 40); 1239 else if (bw == CH_WIDTH_80MHZ) 1240 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1241 (reg_channels[ch_indx].max_bw >= 80); 1242 else if (bw == CH_WIDTH_160MHZ) 1243 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 1244 (reg_channels[ch_indx].max_bw >= 160); 1245 else if (bw == CH_WIDTH_80P80MHZ) 1246 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1247 (reg_channels[ch_indx].max_bw >= 80); 1248 1249 if (bw_enabled) 1250 return chan_state; 1251 else 1252 return CHANNEL_STATE_DISABLE; 1253 } 1254 1255 enum channel_state reg_get_2g_bonded_channel_state( 1256 struct wlan_objmgr_pdev *pdev, 1257 uint8_t oper_ch, uint8_t sec_ch, 1258 enum phy_ch_width bw) 1259 { 1260 enum channel_enum chan_idx; 1261 enum channel_state chan_state; 1262 struct regulatory_channel *reg_channels; 1263 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1264 bool bw_enabled = false; 1265 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 1266 1267 if (bw > CH_WIDTH_40MHZ) 1268 return CHANNEL_STATE_INVALID; 1269 1270 if (bw == CH_WIDTH_40MHZ) { 1271 if ((sec_ch + 4 != oper_ch) && 1272 (oper_ch + 4 != sec_ch)) 1273 return CHANNEL_STATE_INVALID; 1274 chan_state2 = reg_get_channel_state(pdev, sec_ch); 1275 if (chan_state2 == CHANNEL_STATE_INVALID) 1276 return chan_state2; 1277 } 1278 1279 pdev_priv_obj = reg_get_pdev_obj(pdev); 1280 1281 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1282 reg_err("reg pdev priv obj is NULL"); 1283 return CHANNEL_STATE_INVALID; 1284 } 1285 1286 reg_channels = pdev_priv_obj->cur_chan_list; 1287 1288 chan_state = reg_get_channel_state(pdev, oper_ch); 1289 if (chan_state2 < chan_state) 1290 chan_state = chan_state2; 1291 1292 if ((chan_state == CHANNEL_STATE_INVALID) || 1293 (chan_state == CHANNEL_STATE_DISABLE)) 1294 return chan_state; 1295 1296 chan_idx = reg_get_chan_enum(oper_ch); 1297 if (chan_idx == INVALID_CHANNEL) 1298 return CHANNEL_STATE_INVALID; 1299 if (bw == CH_WIDTH_5MHZ) 1300 bw_enabled = true; 1301 else if (bw == CH_WIDTH_10MHZ) 1302 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 1303 (reg_channels[chan_idx].max_bw >= 10); 1304 else if (bw == CH_WIDTH_20MHZ) 1305 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 1306 (reg_channels[chan_idx].max_bw >= 20); 1307 else if (bw == CH_WIDTH_40MHZ) 1308 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 1309 (reg_channels[chan_idx].max_bw >= 40); 1310 1311 if (bw_enabled) 1312 return chan_state; 1313 else 1314 return CHANNEL_STATE_DISABLE; 1315 1316 return CHANNEL_STATE_ENABLE; 1317 } 1318 #endif /* CONFIG_CHAN_NUM_API */ 1319 1320 /** 1321 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1322 * @chan_state1: Channel state1 1323 * @chan_state2: Channel state2 1324 * 1325 * Return: Channel state 1326 */ 1327 static enum channel_state reg_combine_channel_states( 1328 enum channel_state chan_state1, 1329 enum channel_state chan_state2) 1330 { 1331 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1332 (chan_state2 == CHANNEL_STATE_INVALID)) 1333 return CHANNEL_STATE_INVALID; 1334 else 1335 return min(chan_state1, chan_state2); 1336 } 1337 1338 #ifdef CONFIG_CHAN_NUM_API 1339 /** 1340 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1341 * @ch: channel number. 1342 * @ch_params: pointer to the channel parameters. 1343 * 1344 * Return: None 1345 */ 1346 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1347 uint8_t ch, 1348 struct ch_params *ch_params) 1349 { 1350 /* 1351 * Set channel parameters like center frequency for a bonded channel 1352 * state. Also return the maximum bandwidth supported by the channel. 1353 */ 1354 1355 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1356 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1357 const struct bonded_channel *bonded_chan_ptr = NULL; 1358 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1359 1360 if (!ch_params) { 1361 reg_err("ch_params is NULL"); 1362 return; 1363 } 1364 1365 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1366 if (ch_params->center_freq_seg1 != 0) 1367 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1368 else 1369 ch_params->ch_width = CH_WIDTH_160MHZ; 1370 } 1371 1372 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1373 bonded_chan_ptr = NULL; 1374 bonded_chan_ptr2 = NULL; 1375 chan_state = reg_get_5g_bonded_channel( 1376 pdev, ch, ch_params->ch_width, 1377 &bonded_chan_ptr); 1378 1379 chan_state = reg_get_5g_bonded_channel_state( 1380 pdev, ch, ch_params->ch_width); 1381 1382 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1383 chan_state2 = reg_get_5g_bonded_channel_state( 1384 pdev, ch_params->center_freq_seg1 - 2, 1385 CH_WIDTH_80MHZ); 1386 1387 chan_state = reg_combine_channel_states( 1388 chan_state, chan_state2); 1389 } 1390 1391 if ((chan_state != CHANNEL_STATE_ENABLE) && 1392 (chan_state != CHANNEL_STATE_DFS)) 1393 goto update_bw; 1394 1395 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1396 ch_params->sec_ch_offset = NO_SEC_CH; 1397 ch_params->center_freq_seg0 = ch; 1398 break; 1399 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1400 reg_get_5g_bonded_chan_array( 1401 pdev, ch, bonded_chan_40mhz_list, 1402 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1403 &bonded_chan_ptr2); 1404 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1405 goto update_bw; 1406 if (ch == bonded_chan_ptr2->start_ch) 1407 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1408 else 1409 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1410 1411 ch_params->center_freq_seg0 = 1412 (bonded_chan_ptr->start_ch + 1413 bonded_chan_ptr->end_ch) / 2; 1414 break; 1415 } 1416 update_bw: 1417 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1418 } 1419 1420 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1421 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1422 chan_state = reg_get_5g_bonded_channel( 1423 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1424 if (bonded_chan_ptr) 1425 ch_params->center_freq_seg0 = 1426 (bonded_chan_ptr->start_ch + 1427 bonded_chan_ptr->end_ch) / 2; 1428 } 1429 1430 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1431 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1432 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1433 ch_params->center_freq_seg1 = 0; 1434 1435 reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1436 ch_params->ch_width, ch_params->center_freq_seg0, 1437 ch_params->center_freq_seg1); 1438 } 1439 1440 /** 1441 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1442 * @oper_ch: operating channel 1443 * @ch_params: channel parameters 1444 * @sec_ch_2g: 2.4G secondary channel 1445 * 1446 * Return: void 1447 */ 1448 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1449 uint16_t oper_ch, 1450 struct ch_params *ch_params, 1451 uint16_t sec_ch_2g) 1452 { 1453 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1454 1455 if (ch_params->ch_width >= CH_WIDTH_MAX) 1456 ch_params->ch_width = CH_WIDTH_40MHZ; 1457 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1458 if (oper_ch >= 1 && oper_ch <= 5) 1459 sec_ch_2g = oper_ch + 4; 1460 else if (oper_ch >= 6 && oper_ch <= 13) 1461 sec_ch_2g = oper_ch - 4; 1462 } 1463 1464 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1465 chan_state = reg_get_2g_bonded_channel_state( 1466 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1467 if (chan_state == CHANNEL_STATE_ENABLE) { 1468 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1469 if (oper_ch < sec_ch_2g) 1470 ch_params->sec_ch_offset = 1471 LOW_PRIMARY_CH; 1472 else 1473 ch_params->sec_ch_offset = 1474 HIGH_PRIMARY_CH; 1475 ch_params->center_freq_seg0 = 1476 (oper_ch + sec_ch_2g) / 2; 1477 } else { 1478 ch_params->sec_ch_offset = NO_SEC_CH; 1479 ch_params->center_freq_seg0 = oper_ch; 1480 } 1481 break; 1482 } 1483 1484 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1485 } 1486 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1487 ch_params->center_freq_seg1 = 0; 1488 } 1489 1490 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1491 uint8_t ch, uint8_t sec_ch_2g, 1492 struct ch_params *ch_params) 1493 { 1494 if (REG_IS_5GHZ_CH(ch)) 1495 reg_set_5g_channel_params(pdev, ch, ch_params); 1496 else if (REG_IS_24GHZ_CH(ch)) 1497 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1498 } 1499 #endif /* CONFIG_CHAN_NUM_API */ 1500 1501 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1502 enum band_info *band) 1503 { 1504 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1505 1506 pdev_reg = reg_get_pdev_obj(pdev); 1507 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1508 reg_err("pdev reg component is NULL"); 1509 return QDF_STATUS_E_INVAL; 1510 } 1511 1512 *band = pdev_reg->band_capability; 1513 1514 return QDF_STATUS_SUCCESS; 1515 } 1516 1517 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1518 uint8_t *country_code) 1519 { 1520 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1521 1522 if (!country_code) { 1523 reg_err("country_code is NULL"); 1524 return QDF_STATUS_E_INVAL; 1525 } 1526 1527 psoc_priv_obj = reg_get_psoc_obj(psoc); 1528 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1529 reg_err("psoc reg component is NULL"); 1530 return QDF_STATUS_E_INVAL; 1531 } 1532 1533 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1534 REG_ALPHA2_LEN + 1); 1535 1536 return QDF_STATUS_SUCCESS; 1537 } 1538 1539 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1540 enum dfs_reg *dfs_reg) 1541 { 1542 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1543 1544 pdev_priv_obj = reg_get_pdev_obj(pdev); 1545 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1546 reg_err("reg component pdev priv is NULL"); 1547 return; 1548 } 1549 1550 *dfs_reg = pdev_priv_obj->dfs_region; 1551 } 1552 1553 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1554 enum dfs_reg dfs_reg) 1555 { 1556 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1557 1558 pdev_priv_obj = reg_get_pdev_obj(pdev); 1559 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1560 reg_err("psoc reg component is NULL"); 1561 return; 1562 } 1563 1564 pdev_priv_obj->dfs_region = dfs_reg; 1565 1566 reg_init_channel_map(dfs_reg); 1567 } 1568 1569 #ifdef CONFIG_CHAN_NUM_API 1570 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1571 uint8_t chan_num) 1572 { 1573 enum channel_enum chan_enum; 1574 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1575 struct regulatory_channel *reg_channels; 1576 1577 chan_enum = reg_get_chan_enum(chan_num); 1578 1579 if (chan_enum == INVALID_CHANNEL) { 1580 reg_err("channel is invalid"); 1581 return QDF_STATUS_E_FAILURE; 1582 } 1583 1584 pdev_priv_obj = reg_get_pdev_obj(pdev); 1585 1586 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1587 reg_err("reg pdev priv obj is NULL"); 1588 return QDF_STATUS_E_FAILURE; 1589 } 1590 1591 reg_channels = pdev_priv_obj->cur_chan_list; 1592 1593 return reg_channels[chan_enum].tx_power; 1594 } 1595 1596 qdf_freq_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1597 uint8_t chan_num) 1598 { 1599 enum channel_enum chan_enum; 1600 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1601 struct regulatory_channel *reg_channels; 1602 1603 chan_enum = reg_get_chan_enum(chan_num); 1604 1605 if (chan_enum == INVALID_CHANNEL) 1606 return CHANNEL_STATE_INVALID; 1607 1608 pdev_priv_obj = reg_get_pdev_obj(pdev); 1609 1610 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1611 reg_err("reg pdev priv obj is NULL"); 1612 return QDF_STATUS_E_FAILURE; 1613 } 1614 1615 reg_channels = pdev_priv_obj->cur_chan_list; 1616 1617 return reg_channels[chan_enum].center_freq; 1618 } 1619 1620 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1621 uint8_t chan) 1622 { 1623 enum channel_state ch_state; 1624 1625 ch_state = reg_get_channel_state(pdev, chan); 1626 1627 return ch_state == CHANNEL_STATE_DFS; 1628 } 1629 #endif /* CONFIG_CHAN_NUM_API */ 1630 1631 uint8_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1632 qdf_freq_t freq) 1633 { 1634 uint32_t count; 1635 struct regulatory_channel *chan_list; 1636 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1637 1638 if (freq == 0) { 1639 reg_err_rl("Invalid frequency %d", freq); 1640 return 0; 1641 } 1642 1643 pdev_priv_obj = reg_get_pdev_obj(pdev); 1644 1645 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1646 reg_err("reg pdev priv obj is NULL"); 1647 return 0; 1648 } 1649 1650 chan_list = pdev_priv_obj->mas_chan_list; 1651 for (count = 0; count < NUM_CHANNELS; count++) { 1652 if (chan_list[count].center_freq >= freq) 1653 break; 1654 } 1655 1656 if (count == NUM_CHANNELS) 1657 goto end; 1658 1659 if (chan_list[count].center_freq == freq) 1660 return chan_list[count].chan_num; 1661 1662 if (count == 0) 1663 goto end; 1664 1665 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1666 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1667 reg_err("Frequency %d invalid in current reg domain", freq); 1668 return 0; 1669 } 1670 1671 return (chan_list[count - 1].chan_num + 1672 (freq - chan_list[count - 1].center_freq) / 5); 1673 1674 end: 1675 reg_err_rl("invalid frequency %d", freq); 1676 return 0; 1677 } 1678 1679 static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1680 uint8_t chan_num, 1681 enum channel_enum min_chan_range, 1682 enum channel_enum max_chan_range) 1683 { 1684 uint16_t count; 1685 struct regulatory_channel *chan_list; 1686 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1687 1688 pdev_priv_obj = reg_get_pdev_obj(pdev); 1689 1690 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1691 reg_err("reg pdev priv obj is NULL"); 1692 return 0; 1693 } 1694 1695 chan_list = pdev_priv_obj->mas_chan_list; 1696 1697 for (count = min_chan_range; count <= max_chan_range; count++) { 1698 if (REG_IS_49GHZ_FREQ(chan_list[count].center_freq)) { 1699 if (chan_list[count].chan_num == chan_num) 1700 break; 1701 continue; 1702 } else if ((chan_list[count].chan_num >= chan_num) && 1703 (chan_list[count].chan_num != INVALID_CHANNEL_NUM)) 1704 break; 1705 } 1706 1707 if (count == max_chan_range + 1) 1708 goto end; 1709 1710 if (chan_list[count].chan_num == chan_num) { 1711 if (chan_list[count].chan_flags & REGULATORY_CHAN_DISABLED) 1712 reg_err("Channel %d disabled in current reg domain", 1713 chan_num); 1714 return chan_list[count].center_freq; 1715 } 1716 1717 if (count == min_chan_range) 1718 goto end; 1719 1720 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1721 REG_IS_49GHZ_FREQ(chan_list[count - 1].center_freq) || 1722 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1723 reg_err("Channel %d invalid in current reg domain", 1724 chan_num); 1725 return 0; 1726 } 1727 1728 return (chan_list[count - 1].center_freq + 1729 (chan_num - chan_list[count - 1].chan_num) * 5); 1730 1731 end: 1732 1733 reg_debug_rl("Invalid channel %d", chan_num); 1734 return 0; 1735 } 1736 1737 uint16_t reg_legacy_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1738 uint8_t chan_num) 1739 { 1740 uint16_t min_chan_range = MIN_24GHZ_CHANNEL; 1741 uint16_t max_chan_range = MAX_5GHZ_CHANNEL; 1742 1743 if (chan_num == 0) { 1744 reg_err_rl("Invalid channel %d", chan_num); 1745 return 0; 1746 } 1747 1748 return reg_compute_chan_to_freq(pdev, chan_num, 1749 min_chan_range, 1750 max_chan_range); 1751 } 1752 1753 #ifdef CONFIG_CHAN_NUM_API 1754 qdf_freq_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1755 uint8_t chan_num) 1756 { 1757 uint32_t count; 1758 struct regulatory_channel *chan_list; 1759 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1760 1761 if (chan_num == 0) { 1762 reg_err_rl("Invalid channel %d", chan_num); 1763 return 0; 1764 } 1765 1766 pdev_priv_obj = reg_get_pdev_obj(pdev); 1767 1768 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1769 reg_err("reg pdev priv obj is NULL"); 1770 return 0; 1771 } 1772 1773 chan_list = pdev_priv_obj->cur_chan_list; 1774 for (count = 0; count < NUM_CHANNELS; count++) 1775 if (chan_list[count].chan_num == chan_num) { 1776 if (reg_chan_in_range(chan_list, 1777 pdev_priv_obj->range_2g_low, 1778 pdev_priv_obj->range_2g_high, 1779 pdev_priv_obj->range_5g_low, 1780 pdev_priv_obj->range_5g_high, 1781 count)) { 1782 return chan_list[count].center_freq; 1783 } 1784 } 1785 1786 reg_debug_rl("invalid channel %d", chan_num); 1787 return 0; 1788 } 1789 1790 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1791 { 1792 qdf_freq_t freq = 0; 1793 1794 freq = reg_chan_to_freq(pdev, chan_num); 1795 1796 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1797 } 1798 1799 enum band_info reg_chan_to_band(uint8_t chan_num) 1800 { 1801 if (chan_num <= 14) 1802 return BAND_2G; 1803 1804 return BAND_5G; 1805 } 1806 1807 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1808 uint8_t *chan_list, 1809 uint8_t num_chan, 1810 bool nol_chan) 1811 { 1812 enum channel_enum chan_enum; 1813 struct regulatory_channel *mas_chan_list; 1814 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1815 uint16_t i; 1816 1817 if (!num_chan || !chan_list) { 1818 reg_err("chan_list or num_ch is NULL"); 1819 return; 1820 } 1821 1822 pdev_priv_obj = reg_get_pdev_obj(pdev); 1823 if (!pdev_priv_obj) { 1824 reg_err("reg psoc private obj is NULL"); 1825 return; 1826 } 1827 1828 mas_chan_list = pdev_priv_obj->mas_chan_list; 1829 for (i = 0; i < num_chan; i++) { 1830 chan_enum = reg_get_chan_enum(chan_list[i]); 1831 if (chan_enum == INVALID_CHANNEL) { 1832 reg_err("Invalid ch in nol list, chan %d", 1833 chan_list[i]); 1834 continue; 1835 } 1836 mas_chan_list[chan_enum].nol_chan = nol_chan; 1837 } 1838 1839 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1840 } 1841 #endif /* CONFIG_CHAN_NUM_API */ 1842 1843 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1844 uint16_t regdmn) 1845 { 1846 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1847 struct cur_regulatory_info *reg_info; 1848 uint16_t cc = -1; 1849 uint16_t country_index = -1, regdmn_pair = -1; 1850 struct wlan_objmgr_psoc *psoc; 1851 QDF_STATUS err; 1852 1853 pdev_priv_obj = reg_get_pdev_obj(pdev); 1854 if (!pdev_priv_obj) { 1855 reg_err("reg soc is NULL"); 1856 return QDF_STATUS_E_FAILURE; 1857 } 1858 1859 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1860 (sizeof(struct cur_regulatory_info)); 1861 if (!reg_info) { 1862 reg_err("reg info is NULL"); 1863 return QDF_STATUS_E_NOMEM; 1864 } 1865 1866 psoc = wlan_pdev_get_psoc(pdev); 1867 if (!psoc) { 1868 reg_err("psoc is NULL"); 1869 return QDF_STATUS_E_INVAL; 1870 } 1871 1872 reg_info->psoc = psoc; 1873 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1874 1875 if (regdmn == 0) { 1876 reg_get_default_country(®dmn); 1877 regdmn |= COUNTRY_ERD_FLAG; 1878 } 1879 1880 if (regdmn & COUNTRY_ERD_FLAG) { 1881 cc = regdmn & ~COUNTRY_ERD_FLAG; 1882 1883 reg_get_rdpair_from_country_code(cc, 1884 &country_index, 1885 ®dmn_pair); 1886 1887 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1888 if (err == QDF_STATUS_E_FAILURE) { 1889 reg_err("%s : Unable to set country code\n", __func__); 1890 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1891 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1892 qdf_mem_free(reg_info); 1893 return QDF_STATUS_E_FAILURE; 1894 } 1895 1896 pdev_priv_obj->ctry_code = cc; 1897 1898 } else { 1899 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1900 1901 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1902 if (err == QDF_STATUS_E_FAILURE) { 1903 reg_err("%s : Unable to set country code\n", __func__); 1904 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1905 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1906 qdf_mem_free(reg_info); 1907 return QDF_STATUS_E_FAILURE; 1908 } 1909 1910 pdev_priv_obj->reg_dmn_pair = regdmn; 1911 } 1912 1913 reg_info->offload_enabled = false; 1914 reg_process_master_chan_list(reg_info); 1915 1916 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1917 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1918 qdf_mem_free(reg_info); 1919 1920 return QDF_STATUS_SUCCESS; 1921 } 1922 1923 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1924 struct cc_regdmn_s *rd) 1925 { 1926 struct cur_regulatory_info *reg_info; 1927 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1928 uint16_t country_index = -1, regdmn_pair = -1; 1929 struct wlan_objmgr_psoc *psoc; 1930 struct wlan_lmac_if_reg_tx_ops *tx_ops; 1931 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1932 uint8_t pdev_id; 1933 QDF_STATUS err; 1934 1935 pdev_priv_obj = reg_get_pdev_obj(pdev); 1936 if (!pdev_priv_obj) { 1937 reg_err(" pdev priv obj is NULL"); 1938 return QDF_STATUS_E_FAILURE; 1939 } 1940 1941 psoc = wlan_pdev_get_psoc(pdev); 1942 if (!psoc) { 1943 reg_err("psoc is NULL"); 1944 return QDF_STATUS_E_INVAL; 1945 } 1946 1947 psoc_priv_obj = reg_get_psoc_obj(psoc); 1948 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1949 reg_err("psoc reg component is NULL"); 1950 return QDF_STATUS_E_FAILURE; 1951 } 1952 1953 if (psoc_priv_obj->offload_enabled) { 1954 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 1955 pdev_priv_obj->indoor_chan_enabled = false; 1956 else 1957 pdev_priv_obj->indoor_chan_enabled = true; 1958 1959 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1960 tx_ops = reg_get_psoc_tx_ops(psoc); 1961 if (tx_ops->set_user_country_code) { 1962 psoc_priv_obj->new_init_ctry_pending[pdev_id] = true; 1963 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 1964 } 1965 1966 return QDF_STATUS_E_FAILURE; 1967 } 1968 1969 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1970 (sizeof(struct cur_regulatory_info)); 1971 if (!reg_info) { 1972 reg_err("reg info is NULL"); 1973 return QDF_STATUS_E_NOMEM; 1974 } 1975 1976 reg_info->psoc = psoc; 1977 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1978 1979 if (rd->flags == CC_IS_SET) { 1980 reg_get_rdpair_from_country_code(rd->cc.country_code, 1981 &country_index, 1982 ®dmn_pair); 1983 } else if (rd->flags == ALPHA_IS_SET) { 1984 reg_get_rdpair_from_country_iso(rd->cc.alpha, 1985 &country_index, 1986 ®dmn_pair); 1987 } else if (rd->flags == REGDMN_IS_SET) { 1988 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 1989 ®dmn_pair); 1990 } 1991 1992 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1993 if (err == QDF_STATUS_E_FAILURE) { 1994 reg_err("%s : Unable to set country code\n", __func__); 1995 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1996 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1997 qdf_mem_free(reg_info); 1998 return QDF_STATUS_E_FAILURE; 1999 } 2000 2001 reg_info->offload_enabled = false; 2002 reg_process_master_chan_list(reg_info); 2003 2004 qdf_mem_free(reg_info->reg_rules_2g_ptr); 2005 qdf_mem_free(reg_info->reg_rules_5g_ptr); 2006 qdf_mem_free(reg_info); 2007 2008 return QDF_STATUS_SUCCESS; 2009 } 2010 2011 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 2012 struct cc_regdmn_s *rd) 2013 { 2014 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2015 2016 pdev_priv_obj = reg_get_pdev_obj(pdev); 2017 if (!pdev_priv_obj) { 2018 reg_err("reg pdev priv is NULL"); 2019 return QDF_STATUS_E_FAILURE; 2020 } 2021 2022 if (rd->flags == CC_IS_SET) { 2023 rd->cc.country_code = pdev_priv_obj->ctry_code; 2024 } else if (rd->flags == ALPHA_IS_SET) { 2025 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 2026 sizeof(rd->cc.alpha)); 2027 } else if (rd->flags == REGDMN_IS_SET) { 2028 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 2029 } 2030 2031 return QDF_STATUS_SUCCESS; 2032 } 2033 2034 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 2035 { 2036 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2037 2038 psoc_priv_obj = reg_get_psoc_obj(psoc); 2039 2040 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2041 reg_err("psoc reg component is NULL"); 2042 return QDF_STATUS_E_FAILURE; 2043 } 2044 2045 psoc_priv_obj->offload_enabled = val; 2046 2047 return QDF_STATUS_SUCCESS; 2048 } 2049 2050 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 2051 struct cur_regdmn_info *cur_regdmn) 2052 { 2053 struct wlan_objmgr_psoc *psoc; 2054 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2055 uint16_t index; 2056 int num_reg_dmn; 2057 uint8_t phy_id; 2058 2059 psoc = wlan_pdev_get_psoc(pdev); 2060 psoc_priv_obj = reg_get_psoc_obj(psoc); 2061 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2062 reg_err("soc reg component is NULL"); 2063 return QDF_STATUS_E_INVAL; 2064 } 2065 2066 phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2067 cur_regdmn->regdmn_pair_id = 2068 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 2069 2070 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 2071 for (index = 0; index < num_reg_dmn; index++) { 2072 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 2073 cur_regdmn->regdmn_pair_id) 2074 break; 2075 } 2076 2077 if (index == num_reg_dmn) { 2078 reg_err_rl("invalid regdomain"); 2079 return QDF_STATUS_E_FAILURE; 2080 } 2081 2082 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 2083 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 2084 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 2085 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 2086 cur_regdmn->dfs_region = 2087 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 2088 2089 return QDF_STATUS_SUCCESS; 2090 } 2091 2092 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 2093 bool enable_ch_144) 2094 { 2095 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2096 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2097 struct wlan_objmgr_psoc *psoc; 2098 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2099 QDF_STATUS status; 2100 2101 pdev_priv_obj = reg_get_pdev_obj(pdev); 2102 2103 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2104 reg_err("pdev reg component is NULL"); 2105 return QDF_STATUS_E_INVAL; 2106 } 2107 2108 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 2109 reg_info("chan 144 is already %d", enable_ch_144); 2110 return QDF_STATUS_SUCCESS; 2111 } 2112 2113 psoc = wlan_pdev_get_psoc(pdev); 2114 if (!psoc) { 2115 reg_err("psoc is NULL"); 2116 return QDF_STATUS_E_INVAL; 2117 } 2118 2119 psoc_priv_obj = reg_get_psoc_obj(psoc); 2120 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2121 reg_err("psoc reg component is NULL"); 2122 return QDF_STATUS_E_INVAL; 2123 } 2124 2125 reg_debug("setting chan 144: %d", enable_ch_144); 2126 pdev_priv_obj->en_chan_144 = enable_ch_144; 2127 2128 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2129 2130 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2131 if (reg_tx_ops->fill_umac_legacy_chanlist) 2132 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2133 pdev_priv_obj->cur_chan_list); 2134 2135 status = reg_send_scheduler_msg_sb(psoc, pdev); 2136 2137 return status; 2138 } 2139 2140 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 2141 { 2142 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2143 2144 pdev_priv_obj = reg_get_pdev_obj(pdev); 2145 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2146 reg_err("pdev reg component is NULL"); 2147 return false; 2148 } 2149 2150 return pdev_priv_obj->en_chan_144; 2151 } 2152 2153 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 2154 struct wlan_objmgr_psoc *psoc) 2155 { 2156 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2157 2158 psoc_priv_obj = reg_get_psoc_obj(psoc); 2159 2160 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2161 reg_err("psoc reg component is NULL"); 2162 return NULL; 2163 } 2164 2165 return psoc_priv_obj->reg_cap; 2166 } 2167 2168 QDF_STATUS reg_set_hal_reg_cap( 2169 struct wlan_objmgr_psoc *psoc, 2170 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 2171 uint16_t phy_cnt) 2172 { 2173 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2174 2175 psoc_priv_obj = reg_get_psoc_obj(psoc); 2176 2177 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2178 reg_err("psoc reg component is NULL"); 2179 return QDF_STATUS_E_FAILURE; 2180 } 2181 2182 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 2183 reg_err("phy cnt:%d is more than %d", phy_cnt, 2184 PSOC_MAX_PHY_REG_CAP); 2185 return QDF_STATUS_E_FAILURE; 2186 } 2187 2188 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 2189 phy_cnt * 2190 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 2191 2192 return QDF_STATUS_SUCCESS; 2193 } 2194 2195 bool reg_chan_in_range(struct regulatory_channel *chan_list, 2196 qdf_freq_t low_freq_2g, qdf_freq_t high_freq_2g, 2197 qdf_freq_t low_freq_5g, qdf_freq_t high_freq_5g, 2198 enum channel_enum ch_enum) 2199 { 2200 uint32_t low_limit_2g = NUM_CHANNELS; 2201 uint32_t high_limit_2g = NUM_CHANNELS; 2202 uint32_t low_limit_5g = NUM_CHANNELS; 2203 uint32_t high_limit_5g = NUM_CHANNELS; 2204 bool chan_in_range; 2205 enum channel_enum chan_enum; 2206 uint16_t min_bw; 2207 qdf_freq_t center_freq; 2208 2209 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2210 min_bw = chan_list[chan_enum].min_bw; 2211 center_freq = chan_list[chan_enum].center_freq; 2212 2213 if ((center_freq - min_bw / 2) >= low_freq_2g) { 2214 low_limit_2g = chan_enum; 2215 break; 2216 } 2217 } 2218 2219 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2220 min_bw = chan_list[chan_enum].min_bw; 2221 center_freq = chan_list[chan_enum].center_freq; 2222 2223 if ((center_freq - min_bw / 2) >= low_freq_5g) { 2224 low_limit_5g = chan_enum; 2225 break; 2226 } 2227 } 2228 2229 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2230 min_bw = chan_list[chan_enum].min_bw; 2231 center_freq = chan_list[chan_enum].center_freq; 2232 2233 if (center_freq + min_bw / 2 <= high_freq_2g) { 2234 high_limit_2g = chan_enum; 2235 break; 2236 } 2237 if (chan_enum == 0) 2238 break; 2239 } 2240 2241 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2242 min_bw = chan_list[chan_enum].min_bw; 2243 center_freq = chan_list[chan_enum].center_freq; 2244 2245 if (center_freq + min_bw / 2 <= high_freq_5g) { 2246 high_limit_5g = chan_enum; 2247 break; 2248 } 2249 if (chan_enum == 0) 2250 break; 2251 } 2252 2253 chan_in_range = false; 2254 if ((low_limit_2g <= ch_enum) && 2255 (high_limit_2g >= ch_enum) && 2256 (low_limit_2g != NUM_CHANNELS) && 2257 (high_limit_2g != NUM_CHANNELS)) 2258 chan_in_range = true; 2259 if ((low_limit_5g <= ch_enum) && 2260 (high_limit_5g >= ch_enum) && 2261 (low_limit_5g != NUM_CHANNELS) && 2262 (high_limit_5g != NUM_CHANNELS)) 2263 chan_in_range = true; 2264 2265 if (chan_in_range) 2266 return true; 2267 else 2268 return false; 2269 } 2270 2271 #ifdef CONFIG_CHAN_NUM_API 2272 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 2273 uint8_t *chan_list, uint8_t num_chan, 2274 bool nol_history_chan) 2275 { 2276 enum channel_enum chan_enum; 2277 struct regulatory_channel *mas_chan_list; 2278 struct regulatory_channel *cur_chan_list; 2279 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2280 uint16_t i; 2281 2282 if (!num_chan || !chan_list) { 2283 reg_err("chan_list or num_ch is NULL"); 2284 return; 2285 } 2286 2287 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 2288 pdev, WLAN_UMAC_COMP_REGULATORY); 2289 2290 if (!pdev_priv_obj) { 2291 reg_err("reg psoc private obj is NULL"); 2292 return; 2293 } 2294 2295 mas_chan_list = pdev_priv_obj->mas_chan_list; 2296 cur_chan_list = pdev_priv_obj->cur_chan_list; 2297 2298 for (i = 0; i < num_chan; i++) { 2299 chan_enum = reg_get_chan_enum(chan_list[i]); 2300 if (chan_enum == INVALID_CHANNEL) { 2301 reg_err("Invalid ch in nol list, chan %d", 2302 chan_list[i]); 2303 continue; 2304 } 2305 mas_chan_list[chan_enum].nol_history = nol_history_chan; 2306 cur_chan_list[chan_enum].nol_history = nol_history_chan; 2307 } 2308 } 2309 2310 bool reg_is_24ghz_ch(uint32_t chan) 2311 { 2312 return REG_IS_24GHZ_CH(chan); 2313 } 2314 2315 bool reg_is_5ghz_ch(uint32_t chan) 2316 { 2317 return REG_IS_5GHZ_CH(chan); 2318 } 2319 #endif /* CONFIG_CHAN_NUM_API */ 2320 2321 bool reg_is_24ghz_ch_freq(uint32_t freq) 2322 { 2323 return REG_IS_24GHZ_CH_FREQ(freq); 2324 } 2325 2326 bool reg_is_5ghz_ch_freq(uint32_t freq) 2327 { 2328 return REG_IS_5GHZ_FREQ(freq); 2329 } 2330 2331 /** 2332 * BAND_2G_PRESENT() - Check if REG_BAND_2G is set in the band_mask 2333 * @band_mask: Bitmask for bands 2334 * 2335 * Return: True if REG_BAND_2G is set in the band_mask, else false 2336 */ 2337 static inline bool BAND_2G_PRESENT(uint8_t band_mask) 2338 { 2339 return !!(band_mask & (BIT(REG_BAND_2G))); 2340 } 2341 2342 /** 2343 * BAND_5G_PRESENT() - Check if REG_BAND_5G is set in the band_mask 2344 * @band_mask: Bitmask for bands 2345 * 2346 * Return: True if REG_BAND_5G is set in the band_mask, else false 2347 */ 2348 static inline bool BAND_5G_PRESENT(uint8_t band_mask) 2349 { 2350 return !!(band_mask & (BIT(REG_BAND_5G))); 2351 } 2352 2353 #ifdef CONFIG_BAND_6GHZ 2354 bool reg_is_6ghz_chan_freq(uint16_t freq) 2355 { 2356 return REG_IS_6GHZ_FREQ(freq); 2357 } 2358 2359 uint16_t reg_min_6ghz_chan_freq(void) 2360 { 2361 return REG_MIN_6GHZ_CHAN_FREQ; 2362 } 2363 2364 uint16_t reg_max_6ghz_chan_freq(void) 2365 { 2366 return REG_MAX_6GHZ_CHAN_FREQ; 2367 } 2368 2369 bool reg_is_6ghz_psc_chan_freq(uint16_t freq) 2370 { 2371 if (!REG_IS_6GHZ_FREQ(freq)) { 2372 reg_debug(" Channel frequency is not a 6GHz frequency"); 2373 return false; 2374 } 2375 2376 if (!(((freq - SIXG_STARTING_FREQ) + (FREQ_LEFT_SHIFT)) % 2377 (FREQ_TO_CHAN_SCALE * NUM_80MHZ_BAND_IN_6G))) { 2378 return true; 2379 } 2380 2381 reg_debug_rl("Channel freq %d MHz is not a 6GHz PSC frequency", freq); 2382 2383 return false; 2384 } 2385 2386 /** 2387 * BAND_6G_PRESENT() - Check if REG_BAND_6G is set in the band_mask 2388 * @band_mask: Bitmask for bands 2389 * 2390 * Return: True if REG_BAND_6G is set in the band_mask, else false 2391 */ 2392 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2393 { 2394 return !!(band_mask & (BIT(REG_BAND_6G))); 2395 } 2396 #else 2397 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2398 { 2399 return false; 2400 } 2401 #endif /* CONFIG_BAND_6GHZ */ 2402 2403 uint16_t 2404 reg_get_band_channel_list(struct wlan_objmgr_pdev *pdev, 2405 uint8_t band_mask, 2406 struct regulatory_channel *channel_list) 2407 { 2408 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2409 struct regulatory_channel *cur_chan_list; 2410 uint16_t i, num_channels = 0; 2411 2412 pdev_priv_obj = reg_get_pdev_obj(pdev); 2413 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2414 reg_err("reg pdev priv obj is NULL"); 2415 return 0; 2416 } 2417 2418 cur_chan_list = pdev_priv_obj->cur_chan_list; 2419 2420 if (BAND_2G_PRESENT(band_mask)) { 2421 for (i = MIN_24GHZ_CHANNEL; i <= MAX_24GHZ_CHANNEL; i++) { 2422 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2423 !(cur_chan_list[i].chan_flags & 2424 REGULATORY_CHAN_DISABLED)) { 2425 channel_list[num_channels] = cur_chan_list[i]; 2426 num_channels++; 2427 } 2428 } 2429 } 2430 if (BAND_5G_PRESENT(band_mask)) { 2431 for (i = MIN_49GHZ_CHANNEL; i <= MAX_5GHZ_CHANNEL; i++) { 2432 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2433 !(cur_chan_list[i].chan_flags & 2434 REGULATORY_CHAN_DISABLED)) { 2435 channel_list[num_channels] = cur_chan_list[i]; 2436 num_channels++; 2437 } 2438 } 2439 } 2440 if (BAND_6G_PRESENT(band_mask)) { 2441 for (i = MIN_6GHZ_CHANNEL; i <= MAX_6GHZ_CHANNEL; i++) { 2442 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2443 !(cur_chan_list[i].chan_flags & 2444 REGULATORY_CHAN_DISABLED)) { 2445 channel_list[num_channels] = cur_chan_list[i]; 2446 num_channels++; 2447 } 2448 } 2449 } 2450 2451 if (!num_channels) { 2452 reg_err("Failed to retrieve the channel list"); 2453 return 0; 2454 } 2455 2456 return num_channels; 2457 } 2458 2459 qdf_freq_t reg_chan_band_to_freq(struct wlan_objmgr_pdev *pdev, 2460 uint8_t chan_num, 2461 uint8_t band_mask) 2462 { 2463 enum channel_enum min_chan, max_chan; 2464 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2465 uint16_t freq; 2466 2467 if (chan_num == 0) { 2468 reg_err_rl("Invalid channel %d", chan_num); 2469 return 0; 2470 } 2471 2472 pdev_priv_obj = reg_get_pdev_obj(pdev); 2473 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2474 reg_err("reg pdev priv obj is NULL"); 2475 return 0; 2476 } 2477 2478 if (BAND_6G_PRESENT(band_mask)) { 2479 if (BAND_2G_PRESENT(band_mask) || 2480 BAND_5G_PRESENT(band_mask)) { 2481 reg_err("Incorrect band_mask %x", band_mask); 2482 return 0; 2483 } 2484 2485 min_chan = MIN_6GHZ_CHANNEL; 2486 max_chan = MAX_6GHZ_CHANNEL; 2487 return reg_compute_chan_to_freq(pdev, chan_num, 2488 min_chan, 2489 max_chan); 2490 } else { 2491 if (BAND_2G_PRESENT(band_mask)) { 2492 min_chan = MIN_24GHZ_CHANNEL; 2493 max_chan = MAX_24GHZ_CHANNEL; 2494 freq = reg_compute_chan_to_freq(pdev, chan_num, 2495 min_chan, 2496 max_chan); 2497 if (freq != 0) 2498 return freq; 2499 } 2500 2501 if (BAND_5G_PRESENT(band_mask)) { 2502 min_chan = MIN_49GHZ_CHANNEL; 2503 max_chan = MAX_5GHZ_CHANNEL; 2504 2505 return reg_compute_chan_to_freq(pdev, chan_num, 2506 min_chan, 2507 max_chan); 2508 } 2509 2510 reg_err("Incorrect band_mask %x", band_mask); 2511 return 0; 2512 } 2513 } 2514 2515 bool reg_is_49ghz_freq(qdf_freq_t freq) 2516 { 2517 return REG_IS_49GHZ_FREQ(freq); 2518 } 2519 2520 qdf_freq_t reg_ch_num(uint32_t ch_enum) 2521 { 2522 return REG_CH_NUM(ch_enum); 2523 } 2524 2525 qdf_freq_t reg_ch_to_freq(uint32_t ch_enum) 2526 { 2527 return REG_CH_TO_FREQ(ch_enum); 2528 } 2529 2530 #ifdef CONFIG_CHAN_NUM_API 2531 bool reg_is_same_band_channels(uint8_t chan_num1, uint8_t chan_num2) 2532 { 2533 return (chan_num1 && chan_num2 && 2534 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 2535 } 2536 2537 bool reg_is_channel_valid_5g_sbs(uint8_t curchan, uint8_t newchan) 2538 { 2539 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 2540 } 2541 2542 uint8_t reg_min_24ghz_ch_num(void) 2543 { 2544 return REG_MIN_24GHZ_CH_NUM; 2545 } 2546 2547 uint8_t reg_max_24ghz_ch_num(void) 2548 { 2549 return REG_MAX_24GHZ_CH_NUM; 2550 } 2551 2552 uint8_t reg_min_5ghz_ch_num(void) 2553 { 2554 return REG_MIN_5GHZ_CH_NUM; 2555 } 2556 2557 uint8_t reg_max_5ghz_ch_num(void) 2558 { 2559 return REG_MAX_5GHZ_CH_NUM; 2560 } 2561 #endif /* CONFIG_CHAN_NUM_API */ 2562 2563 #ifdef CONFIG_CHAN_FREQ_API 2564 qdf_freq_t reg_min_24ghz_chan_freq(void) 2565 { 2566 return REG_MIN_24GHZ_CH_FREQ; 2567 } 2568 2569 qdf_freq_t reg_max_24ghz_chan_freq(void) 2570 { 2571 return REG_MAX_24GHZ_CH_FREQ; 2572 } 2573 2574 qdf_freq_t reg_min_5ghz_chan_freq(void) 2575 { 2576 return REG_MIN_5GHZ_CH_FREQ; 2577 } 2578 2579 qdf_freq_t reg_max_5ghz_chan_freq(void) 2580 { 2581 return REG_MAX_5GHZ_CH_FREQ; 2582 } 2583 #endif /* CONFIG_CHAN_FREQ_API */ 2584 2585 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 2586 bool enable) 2587 { 2588 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2589 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2590 struct wlan_objmgr_psoc *psoc; 2591 QDF_STATUS status; 2592 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2593 2594 pdev_priv_obj = reg_get_pdev_obj(pdev); 2595 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2596 reg_err("pdev reg component is NULL"); 2597 return QDF_STATUS_E_INVAL; 2598 } 2599 2600 if (pdev_priv_obj->dfs_enabled == enable) { 2601 reg_info("dfs_enabled is already set to %d", enable); 2602 return QDF_STATUS_SUCCESS; 2603 } 2604 2605 psoc = wlan_pdev_get_psoc(pdev); 2606 if (!psoc) { 2607 reg_err("psoc is NULL"); 2608 return QDF_STATUS_E_INVAL; 2609 } 2610 2611 psoc_priv_obj = reg_get_psoc_obj(psoc); 2612 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2613 reg_err("psoc reg component is NULL"); 2614 return QDF_STATUS_E_INVAL; 2615 } 2616 2617 reg_info("setting dfs_enabled: %d", enable); 2618 2619 pdev_priv_obj->dfs_enabled = enable; 2620 2621 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2622 2623 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2624 2625 /* Fill the ic channel list with the updated current channel 2626 * chan list. 2627 */ 2628 if (reg_tx_ops->fill_umac_legacy_chanlist) 2629 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2630 pdev_priv_obj->cur_chan_list); 2631 2632 status = reg_send_scheduler_msg_sb(psoc, pdev); 2633 2634 return status; 2635 } 2636 2637 bool reg_is_regdmn_en302502_applicable(struct wlan_objmgr_pdev *pdev) 2638 { 2639 struct cur_regdmn_info cur_reg_dmn; 2640 QDF_STATUS status; 2641 2642 status = reg_get_curr_regdomain(pdev, &cur_reg_dmn); 2643 if (status != QDF_STATUS_SUCCESS) { 2644 reg_err("Failed to get reg domain"); 2645 return false; 2646 } 2647 2648 return reg_en302_502_regdmn(cur_reg_dmn.regdmn_pair_id); 2649 } 2650 2651 QDF_STATUS reg_modify_pdev_chan_range(struct wlan_objmgr_pdev *pdev) 2652 { 2653 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2654 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2655 struct wlan_objmgr_psoc *psoc; 2656 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2657 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap_ptr; 2658 uint32_t cnt; 2659 uint32_t pdev_id; 2660 enum direction dir; 2661 QDF_STATUS status = QDF_STATUS_SUCCESS; 2662 2663 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2664 pdev_priv_obj = reg_get_pdev_obj(pdev); 2665 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2666 reg_err("pdev reg component is NULL"); 2667 return QDF_STATUS_E_INVAL; 2668 } 2669 2670 psoc = wlan_pdev_get_psoc(pdev); 2671 if (!psoc) { 2672 reg_err("psoc is NULL"); 2673 return QDF_STATUS_E_INVAL; 2674 } 2675 2676 psoc_priv_obj = reg_get_psoc_obj(psoc); 2677 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2678 reg_err("psoc reg component is NULL"); 2679 return QDF_STATUS_E_INVAL; 2680 } 2681 2682 reg_cap_ptr = psoc_priv_obj->reg_cap; 2683 2684 for (cnt = 0; cnt < PSOC_MAX_PHY_REG_CAP; cnt++) { 2685 if (!reg_cap_ptr) { 2686 qdf_mem_free(pdev_priv_obj); 2687 reg_err("reg cap ptr is NULL"); 2688 return QDF_STATUS_E_FAULT; 2689 } 2690 2691 if (reg_cap_ptr->phy_id == pdev_id) 2692 break; 2693 reg_cap_ptr++; 2694 } 2695 2696 if (cnt == PSOC_MAX_PHY_REG_CAP) { 2697 qdf_mem_free(pdev_priv_obj); 2698 reg_err("extended capabilities not found for pdev"); 2699 return QDF_STATUS_E_FAULT; 2700 } 2701 2702 if (psoc_priv_obj->offload_enabled) { 2703 dir = NORTHBOUND; 2704 } else { 2705 dir = SOUTHBOUND; 2706 } 2707 2708 pdev_priv_obj->range_2g_low = reg_cap_ptr->low_2ghz_chan; 2709 pdev_priv_obj->range_2g_high = reg_cap_ptr->high_2ghz_chan; 2710 pdev_priv_obj->range_5g_low = reg_cap_ptr->low_5ghz_chan; 2711 pdev_priv_obj->range_5g_high = reg_cap_ptr->high_5ghz_chan; 2712 pdev_priv_obj->wireless_modes = reg_cap_ptr->wireless_modes; 2713 2714 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2715 2716 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2717 2718 /* Fill the ic channel list with the updated current channel 2719 * chan list. 2720 */ 2721 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2722 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2723 pdev_priv_obj->cur_chan_list); 2724 2725 } else { 2726 if (dir == NORTHBOUND) 2727 status = reg_send_scheduler_msg_nb(psoc, pdev); 2728 else 2729 status = reg_send_scheduler_msg_sb(psoc, pdev); 2730 } 2731 2732 return status; 2733 } 2734 2735 #ifdef DISABLE_UNII_SHARED_BANDS 2736 /** 2737 * reg_is_reg_unii_band_1_or_reg_unii_band_2a() - Check the input bitmap 2738 * @unii_5g_bitmap: 5G UNII band bitmap 2739 * 2740 * This function checks if either REG_UNII_BAND_1 or REG_UNII_BAND_2A, 2741 * are present in the 5G UNII band bitmap. 2742 * 2743 * Return: Return true if REG_UNII_BAND_1 or REG_UNII_BAND_2A, are present in 2744 * the UNII 5g bitmap else return false. 2745 */ 2746 static bool 2747 reg_is_reg_unii_band_1_or_reg_unii_band_2a(uint8_t unii_5g_bitmap) 2748 { 2749 if (!unii_5g_bitmap) 2750 return false; 2751 2752 return ((unii_5g_bitmap & (BIT(REG_UNII_BAND_1) | 2753 BIT(REG_UNII_BAND_2A))) == unii_5g_bitmap); 2754 } 2755 2756 QDF_STATUS reg_disable_chan_coex(struct wlan_objmgr_pdev *pdev, 2757 uint8_t unii_5g_bitmap) 2758 { 2759 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2760 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2761 struct wlan_objmgr_psoc *psoc; 2762 2763 psoc = wlan_pdev_get_psoc(pdev); 2764 if (!psoc) { 2765 reg_err("psoc is NULL"); 2766 return QDF_STATUS_E_INVAL; 2767 } 2768 2769 pdev_priv_obj = reg_get_pdev_obj(pdev); 2770 2771 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2772 reg_err_rl("reg pdev priv obj is NULL"); 2773 return QDF_STATUS_E_FAILURE; 2774 } 2775 2776 if (unii_5g_bitmap && 2777 !reg_is_reg_unii_band_1_or_reg_unii_band_2a(unii_5g_bitmap)) { 2778 reg_err_rl("Invalid unii_5g_bitmap = %d", unii_5g_bitmap); 2779 return QDF_STATUS_E_FAILURE; 2780 } 2781 2782 if (pdev_priv_obj->unii_5g_bitmap == unii_5g_bitmap) { 2783 reg_debug_rl("UNII bitmask for 5G channels is already set %d", 2784 unii_5g_bitmap); 2785 return QDF_STATUS_SUCCESS; 2786 } 2787 2788 reg_debug_rl("Setting UNII bitmask for 5G: %d", unii_5g_bitmap); 2789 pdev_priv_obj->unii_5g_bitmap = unii_5g_bitmap; 2790 2791 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2792 2793 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2794 2795 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2796 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2797 pdev_priv_obj->cur_chan_list); 2798 } 2799 2800 return QDF_STATUS_SUCCESS; 2801 } 2802 #endif 2803 2804 #ifdef CONFIG_CHAN_FREQ_API 2805 QDF_STATUS reg_get_channel_list_with_power_for_freq(struct wlan_objmgr_pdev 2806 *pdev, 2807 struct channel_power 2808 *ch_list, 2809 uint8_t *num_chan) 2810 { 2811 int i, count; 2812 struct regulatory_channel *reg_channels; 2813 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2814 2815 if (!num_chan || !ch_list) { 2816 reg_err("chan_list or num_ch is NULL"); 2817 return QDF_STATUS_E_FAILURE; 2818 } 2819 2820 pdev_priv_obj = reg_get_pdev_obj(pdev); 2821 2822 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2823 reg_err("reg pdev priv obj is NULL"); 2824 return QDF_STATUS_E_FAILURE; 2825 } 2826 2827 /* set the current channel list */ 2828 reg_channels = pdev_priv_obj->cur_chan_list; 2829 2830 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 2831 if (reg_channels[i].state && 2832 !(reg_channels[i].chan_flags & REGULATORY_CHAN_DISABLED)) { 2833 ch_list[count].center_freq = 2834 reg_channels[i].center_freq; 2835 ch_list[count++].tx_power = 2836 reg_channels[i].tx_power; 2837 } 2838 } 2839 2840 *num_chan = count; 2841 2842 return QDF_STATUS_SUCCESS; 2843 } 2844 2845 enum channel_enum reg_get_chan_enum_for_freq(qdf_freq_t freq) 2846 { 2847 uint32_t count; 2848 2849 for (count = 0; count < NUM_CHANNELS; count++) 2850 if (channel_map[count].center_freq == freq) 2851 return count; 2852 2853 reg_err("invalid channel center frequency %d", freq); 2854 2855 return INVALID_CHANNEL; 2856 } 2857 2858 bool 2859 reg_is_freq_present_in_cur_chan_list(struct wlan_objmgr_pdev *pdev, 2860 qdf_freq_t freq) 2861 { 2862 enum channel_enum chan_enum; 2863 struct regulatory_channel *cur_chan_list; 2864 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2865 2866 pdev_priv_obj = reg_get_pdev_obj(pdev); 2867 2868 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2869 reg_err_rl("pdev reg obj is NULL"); 2870 return false; 2871 } 2872 2873 cur_chan_list = pdev_priv_obj->cur_chan_list; 2874 2875 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) 2876 if (cur_chan_list[chan_enum].center_freq == freq) 2877 if ((cur_chan_list[chan_enum].state != 2878 CHANNEL_STATE_DISABLE) && 2879 !(cur_chan_list[chan_enum].chan_flags & 2880 REGULATORY_CHAN_DISABLED)) 2881 return true; 2882 2883 reg_debug_rl("Channel center frequency %d not found", freq); 2884 2885 return false; 2886 } 2887 2888 enum channel_state reg_get_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2889 qdf_freq_t freq) 2890 { 2891 enum channel_enum ch_idx; 2892 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2893 2894 ch_idx = reg_get_chan_enum_for_freq(freq); 2895 2896 if (ch_idx == INVALID_CHANNEL) 2897 return CHANNEL_STATE_INVALID; 2898 2899 pdev_priv_obj = reg_get_pdev_obj(pdev); 2900 2901 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2902 reg_err("pdev reg obj is NULL"); 2903 return CHANNEL_STATE_INVALID; 2904 } 2905 2906 return pdev_priv_obj->cur_chan_list[ch_idx].state; 2907 } 2908 2909 /** 2910 * reg_get_5g_bonded_chan_array_for_freq()- Return the channel state for a 2911 * 5G or 6G channel frequency based on the bonded channel. 2912 * @pdev: Pointer to pdev. 2913 * @freq: Channel center frequency. 2914 * @bonded_chan_ar: Array of bonded channel frequencies. 2915 * @array_size: Array size. 2916 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2917 * 2918 * Return: Channel State 2919 */ 2920 static enum channel_state 2921 reg_get_5g_bonded_chan_array_for_freq(struct wlan_objmgr_pdev *pdev, 2922 uint16_t freq, 2923 const struct bonded_channel_freq 2924 bonded_chan_ar[], 2925 uint16_t array_size, 2926 const struct bonded_channel_freq 2927 **bonded_chan_ptr_ptr) 2928 { 2929 int i; 2930 uint16_t chan_cfreq; 2931 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2932 enum channel_state chan_state = CHANNEL_STATE_INVALID; 2933 enum channel_state temp_chan_state; 2934 2935 for (i = 0; i < array_size; i++) { 2936 if ((freq >= bonded_chan_ar[i].start_freq) && 2937 (freq <= bonded_chan_ar[i].end_freq)) { 2938 bonded_chan_ptr = &bonded_chan_ar[i]; 2939 break; 2940 } 2941 } 2942 2943 if (!bonded_chan_ptr) 2944 return chan_state; 2945 2946 *bonded_chan_ptr_ptr = bonded_chan_ptr; 2947 chan_cfreq = bonded_chan_ptr->start_freq; 2948 while (chan_cfreq <= bonded_chan_ptr->end_freq) { 2949 temp_chan_state = reg_get_channel_state_for_freq(pdev, 2950 chan_cfreq); 2951 if (temp_chan_state < chan_state) 2952 chan_state = temp_chan_state; 2953 chan_cfreq = chan_cfreq + 20; 2954 } 2955 2956 return chan_state; 2957 } 2958 2959 /** 2960 * reg_get_5g_bonded_channel_for_freq()- Return the channel state for a 2961 * 5G or 6G channel frequency based on the channel width and bonded channel 2962 * @pdev: Pointer to pdev. 2963 * @freq: Channel center frequency. 2964 * @ch_width: Channel Width. 2965 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2966 * 2967 * Return: Channel State 2968 */ 2969 enum channel_state 2970 reg_get_5g_bonded_channel_for_freq(struct wlan_objmgr_pdev *pdev, 2971 uint16_t freq, 2972 enum phy_ch_width ch_width, 2973 const struct bonded_channel_freq 2974 **bonded_chan_ptr_ptr) 2975 2976 { 2977 if (ch_width == CH_WIDTH_80P80MHZ) 2978 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2979 bonded_chan_80mhz_list_freq, 2980 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2981 bonded_chan_ptr_ptr); 2982 else if (ch_width == CH_WIDTH_160MHZ) 2983 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2984 bonded_chan_160mhz_list_freq, 2985 QDF_ARRAY_SIZE(bonded_chan_160mhz_list_freq), 2986 bonded_chan_ptr_ptr); 2987 else if (ch_width == CH_WIDTH_80MHZ) 2988 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2989 bonded_chan_80mhz_list_freq, 2990 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2991 bonded_chan_ptr_ptr); 2992 else if (ch_width == CH_WIDTH_40MHZ) 2993 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2994 bonded_chan_40mhz_list_freq, 2995 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 2996 bonded_chan_ptr_ptr); 2997 else 2998 return reg_get_channel_state_for_freq(pdev, freq); 2999 } 3000 3001 enum channel_state 3002 reg_get_5g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3003 qdf_freq_t freq, 3004 enum phy_ch_width bw) 3005 { 3006 enum channel_enum ch_indx; 3007 enum channel_state chan_state; 3008 struct regulatory_channel *reg_channels; 3009 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3010 bool bw_enabled = false; 3011 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3012 3013 if (bw > CH_WIDTH_80P80MHZ) { 3014 reg_err("bw passed is not good"); 3015 return CHANNEL_STATE_INVALID; 3016 } 3017 3018 chan_state = reg_get_5g_bonded_channel_for_freq(pdev, freq, bw, 3019 &bonded_chan_ptr); 3020 3021 if ((chan_state == CHANNEL_STATE_INVALID) || 3022 (chan_state == CHANNEL_STATE_DISABLE)) 3023 return chan_state; 3024 3025 pdev_priv_obj = reg_get_pdev_obj(pdev); 3026 3027 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3028 reg_err("pdev reg obj is NULL"); 3029 return CHANNEL_STATE_INVALID; 3030 } 3031 reg_channels = pdev_priv_obj->cur_chan_list; 3032 3033 ch_indx = reg_get_chan_enum_for_freq(freq); 3034 if (ch_indx == INVALID_CHANNEL) 3035 return CHANNEL_STATE_INVALID; 3036 if (bw == CH_WIDTH_5MHZ) 3037 bw_enabled = true; 3038 else if (bw == CH_WIDTH_10MHZ) 3039 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 3040 (reg_channels[ch_indx].max_bw >= 10); 3041 else if (bw == CH_WIDTH_20MHZ) 3042 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 3043 (reg_channels[ch_indx].max_bw >= 20); 3044 else if (bw == CH_WIDTH_40MHZ) 3045 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 3046 (reg_channels[ch_indx].max_bw >= 40); 3047 else if (bw == CH_WIDTH_80MHZ) 3048 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3049 (reg_channels[ch_indx].max_bw >= 80); 3050 else if (bw == CH_WIDTH_160MHZ) 3051 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 3052 (reg_channels[ch_indx].max_bw >= 160); 3053 else if (bw == CH_WIDTH_80P80MHZ) 3054 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 3055 (reg_channels[ch_indx].max_bw >= 80); 3056 3057 if (bw_enabled) 3058 return chan_state; 3059 else 3060 return CHANNEL_STATE_DISABLE; 3061 } 3062 3063 enum channel_state 3064 reg_get_2g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 3065 qdf_freq_t oper_ch_freq, 3066 qdf_freq_t sec_ch_freq, 3067 enum phy_ch_width bw) 3068 { 3069 enum channel_enum chan_idx; 3070 enum channel_state chan_state; 3071 struct regulatory_channel *reg_channels; 3072 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3073 bool bw_enabled = false; 3074 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 3075 3076 if (bw > CH_WIDTH_40MHZ) 3077 return CHANNEL_STATE_INVALID; 3078 3079 if (bw == CH_WIDTH_40MHZ) { 3080 if ((sec_ch_freq + 20 != oper_ch_freq) && 3081 (oper_ch_freq + 20 != sec_ch_freq)) 3082 return CHANNEL_STATE_INVALID; 3083 chan_state2 = reg_get_channel_state_for_freq(pdev, sec_ch_freq); 3084 if (chan_state2 == CHANNEL_STATE_INVALID) 3085 return chan_state2; 3086 } 3087 3088 pdev_priv_obj = reg_get_pdev_obj(pdev); 3089 3090 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3091 reg_err("reg pdev priv obj is NULL"); 3092 return CHANNEL_STATE_INVALID; 3093 } 3094 3095 reg_channels = pdev_priv_obj->cur_chan_list; 3096 3097 chan_state = reg_get_channel_state_for_freq(pdev, oper_ch_freq); 3098 if (chan_state2 < chan_state) 3099 chan_state = chan_state2; 3100 3101 if ((chan_state == CHANNEL_STATE_INVALID) || 3102 (chan_state == CHANNEL_STATE_DISABLE)) 3103 return chan_state; 3104 3105 chan_idx = reg_get_chan_enum_for_freq(oper_ch_freq); 3106 if (chan_idx == INVALID_CHANNEL) 3107 return CHANNEL_STATE_INVALID; 3108 if (bw == CH_WIDTH_5MHZ) 3109 bw_enabled = true; 3110 else if (bw == CH_WIDTH_10MHZ) 3111 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 3112 (reg_channels[chan_idx].max_bw >= 10); 3113 else if (bw == CH_WIDTH_20MHZ) 3114 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 3115 (reg_channels[chan_idx].max_bw >= 20); 3116 else if (bw == CH_WIDTH_40MHZ) 3117 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 3118 (reg_channels[chan_idx].max_bw >= 40); 3119 3120 if (bw_enabled) 3121 return chan_state; 3122 else 3123 return CHANNEL_STATE_DISABLE; 3124 3125 return CHANNEL_STATE_ENABLE; 3126 } 3127 3128 /** 3129 * reg_set_5g_channel_params_for_freq()- Set channel parameters like center 3130 * frequency for a bonded channel state. Also return the maximum bandwidth 3131 * supported by the channel. 3132 * @pdev: Pointer to pdev. 3133 * @freq: Channel center frequency. 3134 * ch_params: Pointer to ch_params. 3135 * 3136 * Return: void 3137 */ 3138 static void reg_set_5g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3139 uint16_t freq, 3140 struct ch_params *ch_params) 3141 { 3142 /* 3143 * Set channel parameters like center frequency for a bonded channel 3144 * state. Also return the maximum bandwidth supported by the channel. 3145 */ 3146 3147 enum phy_ch_width next_lower_bw; 3148 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3149 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 3150 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3151 const struct bonded_channel_freq *bonded_chan_ptr2 = NULL; 3152 3153 if (!ch_params) { 3154 reg_err("ch_params is NULL"); 3155 return; 3156 } 3157 3158 if (ch_params->ch_width >= CH_WIDTH_MAX) { 3159 if (ch_params->mhz_freq_seg1 != 0) 3160 ch_params->ch_width = CH_WIDTH_80P80MHZ; 3161 else 3162 ch_params->ch_width = CH_WIDTH_160MHZ; 3163 } 3164 next_lower_bw = ch_params->ch_width; 3165 3166 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3167 ch_params->ch_width = next_lower_bw; 3168 next_lower_bw = get_next_lower_bw[ch_params->ch_width]; 3169 bonded_chan_ptr = NULL; 3170 bonded_chan_ptr2 = NULL; 3171 chan_state = reg_get_5g_bonded_channel_for_freq( 3172 pdev, freq, ch_params->ch_width, 3173 &bonded_chan_ptr); 3174 3175 chan_state = reg_get_5g_bonded_channel_state_for_freq( 3176 pdev, freq, ch_params->ch_width); 3177 3178 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 3179 chan_state2 = reg_get_5g_bonded_channel_state_for_freq( 3180 pdev, ch_params->mhz_freq_seg1 - 3181 NEAREST_20MHZ_CHAN_FREQ_OFFSET, 3182 CH_WIDTH_80MHZ); 3183 3184 chan_state = reg_combine_channel_states( 3185 chan_state, chan_state2); 3186 } 3187 3188 if ((chan_state != CHANNEL_STATE_ENABLE) && 3189 (chan_state != CHANNEL_STATE_DFS)) 3190 continue; 3191 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 3192 ch_params->sec_ch_offset = NO_SEC_CH; 3193 ch_params->mhz_freq_seg0 = freq; 3194 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3195 ch_params->center_freq_seg0 = 3196 (ch_params->mhz_freq_seg0 - 3197 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3198 else 3199 ch_params->center_freq_seg0 = 3200 (ch_params->mhz_freq_seg0 - 3201 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3202 break; 3203 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 3204 reg_get_5g_bonded_chan_array_for_freq( 3205 pdev, freq, bonded_chan_40mhz_list_freq, 3206 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3207 &bonded_chan_ptr2); 3208 if (!bonded_chan_ptr || !bonded_chan_ptr2) 3209 continue; 3210 if (freq == bonded_chan_ptr2->start_freq) 3211 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 3212 else 3213 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 3214 3215 ch_params->mhz_freq_seg0 = 3216 (bonded_chan_ptr->start_freq + 3217 bonded_chan_ptr->end_freq) / 2; 3218 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3219 ch_params->center_freq_seg0 = 3220 (ch_params->mhz_freq_seg0 - 3221 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3222 else 3223 ch_params->center_freq_seg0 = 3224 (ch_params->mhz_freq_seg0 - 3225 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3226 break; 3227 } 3228 } 3229 3230 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 3231 ch_params->mhz_freq_seg1 = ch_params->mhz_freq_seg0; 3232 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg1)) 3233 ch_params->center_freq_seg1 = 3234 (ch_params->mhz_freq_seg1 - SIXG_STARTING_FREQ) / 3235 FREQ_TO_CHAN_SCALE; 3236 else 3237 ch_params->center_freq_seg1 = 3238 (ch_params->mhz_freq_seg1 - FIVEG_STARTING_FREQ) / 3239 FREQ_TO_CHAN_SCALE; 3240 chan_state = reg_get_5g_bonded_channel_for_freq( 3241 pdev, freq, CH_WIDTH_80MHZ, &bonded_chan_ptr); 3242 if (bonded_chan_ptr) { 3243 ch_params->mhz_freq_seg0 = 3244 (bonded_chan_ptr->start_freq + 3245 bonded_chan_ptr->end_freq) / 2; 3246 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3247 ch_params->center_freq_seg0 = 3248 (ch_params->mhz_freq_seg0 - 3249 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3250 else 3251 ch_params->center_freq_seg0 = 3252 (ch_params->mhz_freq_seg0 - 3253 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3254 } 3255 } 3256 3257 /* Overwrite mhz_freq_seg1 to 0 for non 160 and 80+80 width */ 3258 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 3259 ch_params->ch_width == CH_WIDTH_80P80MHZ)) { 3260 ch_params->mhz_freq_seg1 = 0; 3261 ch_params->center_freq_seg1 = 0; 3262 } 3263 } 3264 3265 /** 3266 * reg_set_2g_channel_params_for_freq() - set the 2.4G bonded channel parameters 3267 * @oper_freq: operating channel 3268 * @ch_params: channel parameters 3269 * @sec_ch_2g_freq: 2.4G secondary channel 3270 * 3271 * Return: void 3272 */ 3273 static void reg_set_2g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3274 uint16_t oper_freq, 3275 struct ch_params *ch_params, 3276 uint16_t sec_ch_2g_freq) 3277 { 3278 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3279 3280 if (ch_params->ch_width >= CH_WIDTH_MAX) 3281 ch_params->ch_width = CH_WIDTH_40MHZ; 3282 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g_freq) { 3283 if (oper_freq >= TWOG_CHAN_1_IN_MHZ && oper_freq <= 3284 TWOG_CHAN_5_IN_MHZ) 3285 sec_ch_2g_freq = oper_freq + 20; 3286 else if (oper_freq >= TWOG_CHAN_6_IN_MHZ && oper_freq <= 3287 TWOG_CHAN_13_IN_MHZ) 3288 sec_ch_2g_freq = oper_freq - 20; 3289 } 3290 3291 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3292 chan_state = 3293 reg_get_2g_bonded_channel_state_for_freq(pdev, oper_freq, 3294 sec_ch_2g_freq, 3295 ch_params->ch_width); 3296 if (chan_state == CHANNEL_STATE_ENABLE) { 3297 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 3298 if (oper_freq < sec_ch_2g_freq) 3299 ch_params->sec_ch_offset = 3300 LOW_PRIMARY_CH; 3301 else 3302 ch_params->sec_ch_offset = 3303 HIGH_PRIMARY_CH; 3304 ch_params->mhz_freq_seg0 = 3305 (oper_freq + sec_ch_2g_freq) / 2; 3306 if (ch_params->mhz_freq_seg0 == 3307 TWOG_CHAN_14_IN_MHZ) 3308 ch_params->center_freq_seg0 = 14; 3309 else 3310 ch_params->center_freq_seg0 = 3311 (ch_params->mhz_freq_seg0 - 3312 TWOG_STARTING_FREQ) / 3313 FREQ_TO_CHAN_SCALE; 3314 } else { 3315 ch_params->sec_ch_offset = NO_SEC_CH; 3316 ch_params->mhz_freq_seg0 = oper_freq; 3317 if (ch_params->mhz_freq_seg0 == 3318 TWOG_CHAN_14_IN_MHZ) 3319 ch_params->center_freq_seg0 = 14; 3320 else 3321 ch_params->center_freq_seg0 = 3322 (ch_params->mhz_freq_seg0 - 3323 TWOG_STARTING_FREQ) / 3324 FREQ_TO_CHAN_SCALE; 3325 } 3326 break; 3327 } 3328 3329 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3330 } 3331 /* Overwrite mhz_freq_seg1 and center_freq_seg1 to 0 for 2.4 Ghz */ 3332 ch_params->mhz_freq_seg1 = 0; 3333 ch_params->center_freq_seg1 = 0; 3334 } 3335 3336 void reg_set_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3337 qdf_freq_t freq, 3338 qdf_freq_t sec_ch_2g_freq, 3339 struct ch_params *ch_params) 3340 { 3341 if (reg_is_5ghz_ch_freq(freq) || reg_is_6ghz_chan_freq(freq)) 3342 reg_set_5g_channel_params_for_freq(pdev, freq, ch_params); 3343 else if (reg_is_24ghz_ch_freq(freq)) 3344 reg_set_2g_channel_params_for_freq(pdev, freq, ch_params, 3345 sec_ch_2g_freq); 3346 } 3347 3348 uint8_t reg_get_channel_reg_power_for_freq(struct wlan_objmgr_pdev *pdev, 3349 qdf_freq_t freq) 3350 { 3351 enum channel_enum chan_enum; 3352 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3353 struct regulatory_channel *reg_channels; 3354 3355 chan_enum = reg_get_chan_enum_for_freq(freq); 3356 3357 if (chan_enum == INVALID_CHANNEL) { 3358 reg_err("channel is invalid"); 3359 return QDF_STATUS_E_FAILURE; 3360 } 3361 3362 pdev_priv_obj = reg_get_pdev_obj(pdev); 3363 3364 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3365 reg_err("reg pdev priv obj is NULL"); 3366 return QDF_STATUS_E_FAILURE; 3367 } 3368 3369 reg_channels = pdev_priv_obj->cur_chan_list; 3370 3371 return reg_channels[chan_enum].tx_power; 3372 } 3373 3374 bool reg_is_dfs_for_freq(struct wlan_objmgr_pdev *pdev, qdf_freq_t freq) 3375 { 3376 enum channel_state ch_state; 3377 3378 ch_state = reg_get_channel_state_for_freq(pdev, freq); 3379 3380 return ch_state == CHANNEL_STATE_DFS; 3381 } 3382 3383 void reg_update_nol_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3384 uint16_t *chan_freq_list, 3385 uint8_t num_chan, 3386 bool nol_chan) 3387 { 3388 enum channel_enum chan_enum; 3389 struct regulatory_channel *mas_chan_list; 3390 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3391 struct wlan_objmgr_psoc *psoc; 3392 uint16_t i; 3393 3394 if (!num_chan || !chan_freq_list) { 3395 reg_err("chan_freq_list or num_ch is NULL"); 3396 return; 3397 } 3398 3399 psoc = wlan_pdev_get_psoc(pdev); 3400 3401 pdev_priv_obj = reg_get_pdev_obj(pdev); 3402 if (!pdev_priv_obj) { 3403 reg_err("reg pdev private obj is NULL"); 3404 return; 3405 } 3406 3407 mas_chan_list = pdev_priv_obj->mas_chan_list; 3408 for (i = 0; i < num_chan; i++) { 3409 chan_enum = reg_get_chan_enum_for_freq(chan_freq_list[i]); 3410 if (chan_enum == INVALID_CHANNEL) { 3411 reg_err("Invalid freq in nol list, freq %d", 3412 chan_freq_list[i]); 3413 continue; 3414 } 3415 mas_chan_list[chan_enum].nol_chan = nol_chan; 3416 } 3417 3418 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3419 3420 reg_send_scheduler_msg_sb(psoc, pdev); 3421 } 3422 3423 void reg_update_nol_history_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3424 uint16_t *chan_list, 3425 uint8_t num_chan, 3426 bool nol_history_chan) 3427 { 3428 enum channel_enum chan_enum; 3429 struct regulatory_channel *mas_chan_list; 3430 struct regulatory_channel *cur_chan_list; 3431 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3432 uint16_t i; 3433 3434 if (!num_chan || !chan_list) { 3435 reg_err("chan_list or num_ch is NULL"); 3436 return; 3437 } 3438 3439 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 3440 pdev, WLAN_UMAC_COMP_REGULATORY); 3441 3442 if (!pdev_priv_obj) { 3443 reg_err("reg psoc private obj is NULL"); 3444 return; 3445 } 3446 3447 mas_chan_list = pdev_priv_obj->mas_chan_list; 3448 cur_chan_list = pdev_priv_obj->cur_chan_list; 3449 3450 for (i = 0; i < num_chan; i++) { 3451 chan_enum = reg_get_chan_enum_for_freq(chan_list[i]); 3452 if (chan_enum == INVALID_CHANNEL) { 3453 reg_err("Invalid ch in nol list, chan %d", 3454 chan_list[i]); 3455 continue; 3456 } 3457 mas_chan_list[chan_enum].nol_history = nol_history_chan; 3458 cur_chan_list[chan_enum].nol_history = nol_history_chan; 3459 } 3460 } 3461 3462 static inline bool REG_IS_FREQUENCY_VALID_5G_SBS(qdf_freq_t curfreq, 3463 qdf_freq_t newfreq) 3464 { 3465 return ((curfreq) > (newfreq) ? 3466 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3467 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3468 > REG_SBS_SEPARATION_THRESHOLD : 3469 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3470 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3471 > REG_SBS_SEPARATION_THRESHOLD); 3472 } 3473 3474 bool reg_is_frequency_valid_5g_sbs(qdf_freq_t curfreq, qdf_freq_t newfreq) 3475 { 3476 return REG_IS_FREQUENCY_VALID_5G_SBS(curfreq, newfreq); 3477 } 3478 3479 qdf_freq_t reg_min_chan_freq(void) 3480 { 3481 return channel_map[MIN_24GHZ_CHANNEL].center_freq; 3482 } 3483 3484 qdf_freq_t reg_max_chan_freq(void) 3485 { 3486 return channel_map[NUM_CHANNELS - 1].center_freq; 3487 } 3488 3489 bool reg_is_same_band_freqs(qdf_freq_t freq1, qdf_freq_t freq2) 3490 { 3491 return (freq1 && freq2 && ((REG_IS_6GHZ_FREQ(freq1) && 3492 REG_IS_6GHZ_FREQ(freq2)) || 3493 (REG_IS_5GHZ_FREQ(freq1) && 3494 REG_IS_5GHZ_FREQ(freq2)) || 3495 (REG_IS_24GHZ_CH_FREQ(freq1) && 3496 REG_IS_24GHZ_CH_FREQ(freq2)))); 3497 } 3498 3499 enum reg_wifi_band reg_freq_to_band(qdf_freq_t freq) 3500 { 3501 if (REG_IS_24GHZ_CH_FREQ(freq)) 3502 return REG_BAND_2G; 3503 else if (REG_IS_5GHZ_FREQ(freq) || REG_IS_49GHZ_FREQ(freq)) 3504 return REG_BAND_5G; 3505 else if (REG_IS_6GHZ_FREQ(freq)) 3506 return REG_BAND_6G; 3507 return REG_BAND_UNKNOWN; 3508 } 3509 3510 #endif /* CONFIG_CHAN_FREQ_API */ 3511 3512 uint8_t reg_get_max_tx_power(struct wlan_objmgr_pdev *pdev) 3513 { 3514 struct regulatory_channel *cur_chan_list; 3515 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3516 uint8_t i, max_tx_power = 0; 3517 3518 pdev_priv_obj = reg_get_pdev_obj(pdev); 3519 3520 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3521 reg_err("reg pdev private obj is NULL"); 3522 return QDF_STATUS_E_FAILURE; 3523 } 3524 3525 cur_chan_list = pdev_priv_obj->cur_chan_list; 3526 3527 for (i = 0; i < NUM_CHANNELS; i++) { 3528 if (cur_chan_list[i].state != CHANNEL_STATE_DISABLE && 3529 cur_chan_list[i].chan_flags != REGULATORY_CHAN_DISABLED) { 3530 if (cur_chan_list[i].tx_power > max_tx_power) 3531 max_tx_power = cur_chan_list[i].tx_power; 3532 } 3533 } 3534 3535 if (!max_tx_power) 3536 reg_err_rl("max_tx_power is zero"); 3537 3538 return max_tx_power; 3539 } 3540 3541 QDF_STATUS reg_set_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3542 { 3543 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3544 3545 psoc_reg = reg_get_psoc_obj(psoc); 3546 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) { 3547 reg_err("psoc reg component is NULL"); 3548 return QDF_STATUS_E_INVAL; 3549 } 3550 3551 psoc_reg->ignore_fw_reg_offload_ind = true; 3552 return QDF_STATUS_SUCCESS; 3553 } 3554 3555 bool reg_get_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3556 { 3557 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3558 3559 psoc_reg = reg_get_psoc_obj(psoc); 3560 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) 3561 return false; 3562 3563 return psoc_reg->ignore_fw_reg_offload_ind; 3564 } 3565 3566 QDF_STATUS reg_set_6ghz_supported(struct wlan_objmgr_psoc *psoc, bool val) 3567 { 3568 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3569 3570 psoc_priv_obj = reg_get_psoc_obj(psoc); 3571 3572 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3573 reg_err("psoc reg component is NULL"); 3574 return QDF_STATUS_E_FAILURE; 3575 } 3576 3577 psoc_priv_obj->six_ghz_supported = val; 3578 3579 return QDF_STATUS_SUCCESS; 3580 } 3581 3582 bool reg_is_6ghz_op_class(struct wlan_objmgr_pdev *pdev, uint8_t op_class) 3583 { 3584 return ((op_class >= MIN_6GHZ_OPER_CLASS) && 3585 (op_class <= MAX_6GHZ_OPER_CLASS)); 3586 } 3587 3588 bool reg_is_6ghz_supported(struct wlan_objmgr_pdev *pdev) 3589 { 3590 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 3591 struct wlan_objmgr_psoc *psoc; 3592 3593 psoc = wlan_pdev_get_psoc(pdev); 3594 if (!psoc) { 3595 reg_err_rl("psoc is NULL"); 3596 return false; 3597 } 3598 3599 psoc_priv_obj = reg_get_psoc_obj(psoc); 3600 3601 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 3602 reg_err("psoc reg component is NULL"); 3603 return false; 3604 } 3605 3606 return psoc_priv_obj->six_ghz_supported; 3607 } 3608 3609 #ifdef DISABLE_UNII_SHARED_BANDS 3610 QDF_STATUS 3611 reg_get_unii_5g_bitmap(struct wlan_objmgr_pdev *pdev, uint8_t *bitmap) 3612 { 3613 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3614 3615 pdev_priv_obj = reg_get_pdev_obj(pdev); 3616 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3617 reg_err_rl("pdev reg component is NULL"); 3618 return QDF_STATUS_E_FAILURE; 3619 } 3620 *bitmap = pdev_priv_obj->unii_5g_bitmap; 3621 3622 return QDF_STATUS_SUCCESS; 3623 } 3624 #endif 3625