1 /* 2 * Copyright (c) 2014-2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: reg_services_common.c 21 * This file defines regulatory component service functions 22 */ 23 24 #include <wlan_cmn.h> 25 #include <reg_services_public_struct.h> 26 #include <wlan_objmgr_psoc_obj.h> 27 #include <qdf_lock.h> 28 #include "reg_priv_objs.h" 29 #include "reg_utils.h" 30 #include "reg_callbacks.h" 31 #include "reg_services_common.h" 32 #include <wlan_objmgr_psoc_obj.h> 33 #include "reg_db.h" 34 #include "reg_db_parser.h" 35 #include "reg_build_chan_list.h" 36 #include <wlan_objmgr_pdev_obj.h> 37 38 const struct chan_map *channel_map; 39 #ifdef CONFIG_CHAN_NUM_API 40 static const struct bonded_channel bonded_chan_40mhz_list[] = { 41 {36, 40}, 42 {44, 48}, 43 {52, 56}, 44 {60, 64}, 45 {100, 104}, 46 {108, 112}, 47 {116, 120}, 48 {124, 128}, 49 {132, 136}, 50 {140, 144}, 51 {149, 153}, 52 {157, 161}, 53 {165, 169} 54 }; 55 56 static const struct bonded_channel bonded_chan_80mhz_list[] = { 57 {36, 48}, 58 {52, 64}, 59 {100, 112}, 60 {116, 128}, 61 {132, 144}, 62 {149, 161} 63 }; 64 65 static const struct bonded_channel bonded_chan_160mhz_list[] = { 66 {36, 64}, 67 {100, 128} 68 }; 69 #endif /* CONFIG_CHAN_NUM_API */ 70 71 #ifdef CONFIG_CHAN_FREQ_API 72 /* bonded_chan_40mhz_list_freq - List of 40MHz bonnded channel frequencies */ 73 static const struct bonded_channel_freq bonded_chan_40mhz_list_freq[] = { 74 {5180, 5200}, 75 {5220, 5240}, 76 {5260, 5280}, 77 {5300, 5320}, 78 {5500, 5520}, 79 {5540, 5560}, 80 {5580, 5600}, 81 {5620, 5640}, 82 {5660, 5680}, 83 {5700, 5720}, 84 {5745, 5765}, 85 {5785, 5805}, 86 {5825, 5845}, 87 #ifdef CONFIG_BAND_6GHZ 88 {5945, 5965}, 89 {5985, 6005}, 90 {6025, 6045}, 91 {6065, 6085}, 92 {6105, 6125}, 93 {6145, 6165}, 94 {6185, 6205}, 95 {6225, 6245}, 96 {6265, 6285}, 97 {6305, 6325}, 98 {6345, 6365}, 99 {6385, 6405}, 100 {6425, 6445}, 101 {6465, 6485}, 102 {6505, 6525}, 103 {6545, 6565}, 104 {6585, 6605}, 105 {6625, 6645}, 106 {6665, 6685}, 107 {6705, 6725}, 108 {6745, 6765}, 109 {6785, 6805}, 110 {6825, 6845}, 111 {6865, 6885}, 112 {6905, 6925}, 113 {6945, 6965}, 114 {6985, 7005}, 115 {7025, 7045}, 116 {7065, 7085} 117 #endif /*CONFIG_BAND_6GHZ*/ 118 }; 119 120 /* bonded_chan_80mhz_list_freq - List of 80MHz bonnded channel frequencies */ 121 static const struct bonded_channel_freq bonded_chan_80mhz_list_freq[] = { 122 {5180, 5240}, 123 {5260, 5320}, 124 {5500, 5560}, 125 {5580, 5640}, 126 {5660, 5720}, 127 {5745, 5805}, 128 #ifdef CONFIG_BAND_6GHZ 129 {5945, 6005}, 130 {6025, 6085}, 131 {6105, 6165}, 132 {6185, 6245}, 133 {6265, 6325}, 134 {6345, 6405}, 135 {6425, 6485}, 136 {6505, 6565}, 137 {6585, 6645}, 138 {6665, 6725}, 139 {6745, 6805}, 140 {6825, 6885}, 141 {6905, 6965}, 142 {6985, 7045} 143 #endif /*CONFIG_BAND_6GHZ*/ 144 }; 145 146 /* bonded_chan_160mhz_list_freq - List of 160MHz bonnded channel frequencies */ 147 static const struct bonded_channel_freq bonded_chan_160mhz_list_freq[] = { 148 {5180, 5320}, 149 {5500, 5640}, 150 #ifdef CONFIG_BAND_6GHZ 151 {5945, 6085}, 152 {6105, 6245}, 153 {6265, 6405}, 154 {6425, 6565}, 155 {6585, 6725}, 156 {6745, 6885}, 157 {6905, 7045} 158 #endif /*CONFIG_BAND_6GHZ*/ 159 }; 160 #endif /*CONFIG_CHAN_FREQ_API*/ 161 162 static const enum phy_ch_width get_next_lower_bw[] = { 163 [CH_WIDTH_80P80MHZ] = CH_WIDTH_160MHZ, 164 [CH_WIDTH_160MHZ] = CH_WIDTH_80MHZ, 165 [CH_WIDTH_80MHZ] = CH_WIDTH_40MHZ, 166 [CH_WIDTH_40MHZ] = CH_WIDTH_20MHZ, 167 [CH_WIDTH_20MHZ] = CH_WIDTH_10MHZ, 168 [CH_WIDTH_10MHZ] = CH_WIDTH_5MHZ, 169 [CH_WIDTH_5MHZ] = CH_WIDTH_INVALID 170 }; 171 172 static const struct chan_map channel_map_us[NUM_CHANNELS] = { 173 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 174 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 175 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 176 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 177 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 178 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 179 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 180 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 181 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 182 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 183 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 184 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 185 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 186 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 187 188 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 189 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 190 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 191 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 192 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 193 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 194 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 195 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 196 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 197 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 198 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 199 [CHAN_ENUM_4942] = {4942, 1, 5, 5}, 200 [CHAN_ENUM_4945] = {4945, 11, 10, 10}, 201 [CHAN_ENUM_4947] = {4947, 2, 5, 5}, 202 [CHAN_ENUM_4950] = {4950, 20, 10, 20}, 203 [CHAN_ENUM_4952] = {4952, 3, 5, 5}, 204 [CHAN_ENUM_4955] = {4955, 21, 10, 20}, 205 [CHAN_ENUM_4957] = {4957, 4, 5, 5}, 206 [CHAN_ENUM_4960] = {4960, 22, 10, 20}, 207 [CHAN_ENUM_4962] = {4962, 5, 5, 5}, 208 [CHAN_ENUM_4965] = {4965, 23, 10, 20}, 209 [CHAN_ENUM_4967] = {4967, 6, 5, 5}, 210 [CHAN_ENUM_4970] = {4970, 24, 10, 20}, 211 [CHAN_ENUM_4972] = {4972, 7, 5, 5}, 212 [CHAN_ENUM_4975] = {4975, 25, 10, 20}, 213 [CHAN_ENUM_4977] = {4977, 8, 5, 5}, 214 [CHAN_ENUM_4980] = {4980, 26, 10, 20}, 215 [CHAN_ENUM_4982] = {4982, 9, 5, 5}, 216 [CHAN_ENUM_4985] = {4985, 19, 10, 10}, 217 [CHAN_ENUM_4987] = {4987, 10, 5, 5}, 218 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 219 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 220 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 221 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 222 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 223 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 224 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 225 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 226 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 227 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 228 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 229 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 230 231 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 232 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 233 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 234 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 235 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 236 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 237 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 238 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 239 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 240 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 241 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 242 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 243 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 244 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 245 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 246 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 247 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 248 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 249 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 250 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 251 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 252 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 253 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 254 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 255 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 256 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 257 [CHAN_ENUM_5850] = {5850, 170, 2, 160}, 258 [CHAN_ENUM_5855] = {5855, 171, 2, 160}, 259 [CHAN_ENUM_5860] = {5860, 172, 2, 160}, 260 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 261 [CHAN_ENUM_5870] = {5870, 174, 2, 160}, 262 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 263 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 264 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 265 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 266 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 267 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 268 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 269 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 270 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 271 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 272 #ifdef CONFIG_BAND_6GHZ 273 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 274 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 275 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 276 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 277 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 278 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 279 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 280 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 281 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 282 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 283 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 284 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 285 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 286 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 287 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 288 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 289 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 290 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 291 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 292 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 293 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 294 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 295 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 296 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 297 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 298 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 299 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 300 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 301 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 302 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 303 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 304 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 305 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 306 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 307 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 308 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 309 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 310 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 311 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 312 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 313 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 314 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 315 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 316 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 317 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 318 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 319 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 320 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 321 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 322 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 323 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 324 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 325 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 326 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 327 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 328 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 329 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 330 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 331 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 332 #endif /* CONFIG_BAND_6GHZ */ 333 }; 334 335 static const struct chan_map channel_map_eu[NUM_CHANNELS] = { 336 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 337 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 338 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 339 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 340 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 341 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 342 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 343 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 344 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 345 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 346 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 347 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 348 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 349 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 350 351 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 352 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 353 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 354 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 355 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 356 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 357 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 358 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 359 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 360 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 361 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 362 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 363 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 364 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 365 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 366 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 367 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 368 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 369 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 370 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 371 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 372 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 373 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 374 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 375 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 376 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 377 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 378 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 379 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 380 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 381 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 382 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 383 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 384 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 385 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 386 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 387 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 388 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 389 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 390 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 391 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 392 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 393 394 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 395 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 396 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 397 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 398 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 399 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 400 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 401 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 402 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 403 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 404 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 405 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 406 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 407 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 408 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 409 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 410 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 411 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 412 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 413 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 414 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 415 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 416 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 417 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 418 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 419 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 420 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 421 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 422 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 423 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 424 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 425 [CHAN_ENUM_5875] = {5875, 175, 2, 160}, 426 [CHAN_ENUM_5880] = {5880, 176, 2, 160}, 427 [CHAN_ENUM_5885] = {5885, 177, 2, 160}, 428 [CHAN_ENUM_5890] = {5890, 178, 2, 160}, 429 [CHAN_ENUM_5895] = {5895, 179, 2, 160}, 430 [CHAN_ENUM_5900] = {5900, 180, 2, 160}, 431 [CHAN_ENUM_5905] = {5905, 181, 2, 160}, 432 [CHAN_ENUM_5910] = {5910, 182, 2, 160}, 433 [CHAN_ENUM_5915] = {5915, 183, 2, 160}, 434 [CHAN_ENUM_5920] = {5920, 184, 2, 160}, 435 #ifdef CONFIG_BAND_6GHZ 436 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 437 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 438 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 439 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 440 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 441 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 442 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 443 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 444 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 445 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 446 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 447 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 448 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 449 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 450 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 451 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 452 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 453 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 454 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 455 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 456 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 457 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 458 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 459 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 460 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 461 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 462 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 463 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 464 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 465 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 466 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 467 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 468 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 469 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 470 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 471 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 472 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 473 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 474 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 475 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 476 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 477 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 478 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 479 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 480 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 481 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 482 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 483 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 484 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 485 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 486 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 487 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 488 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 489 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 490 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 491 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 492 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 493 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 494 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 495 #endif /* CONFIG_BAND_6GHZ */ 496 }; 497 498 static const struct chan_map channel_map_jp[NUM_CHANNELS] = { 499 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 500 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 501 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 502 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 503 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 504 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 505 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 506 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 507 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 508 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 509 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 510 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 511 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 512 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 513 514 [CHAN_ENUM_4912] = {4912, 182, 5, 5}, 515 [CHAN_ENUM_4915] = {4915, 183, 10, 10}, 516 [CHAN_ENUM_4917] = {4917, 183, 5, 5}, 517 [CHAN_ENUM_4920] = {4920, 184, 10, 20}, 518 [CHAN_ENUM_4922] = {4922, 184, 5, 5}, 519 [CHAN_ENUM_4925] = {4925, 185, 10, 10}, 520 [CHAN_ENUM_4927] = {4927, 185, 5, 5}, 521 [CHAN_ENUM_4932] = {4932, 186, 5, 5}, 522 [CHAN_ENUM_4935] = {4935, 187, 10, 10}, 523 [CHAN_ENUM_4937] = {4937, 187, 5, 5}, 524 [CHAN_ENUM_4940] = {4940, 188, 10, 20}, 525 [CHAN_ENUM_4942] = {4942, 188, 5, 5}, 526 [CHAN_ENUM_4945] = {4945, 189, 10, 10}, 527 [CHAN_ENUM_4947] = {4947, 189, 5, 5}, 528 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 529 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 530 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 531 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 532 [CHAN_ENUM_4960] = {4960, 192, 20, 20}, 533 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 534 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 535 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 536 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 537 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 538 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 539 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 540 [CHAN_ENUM_4980] = {4980, 196, 20, 20}, 541 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 542 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 543 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 544 [CHAN_ENUM_5032] = {5032, 6, 5, 5}, 545 [CHAN_ENUM_5035] = {5035, 7, 10, 10}, 546 [CHAN_ENUM_5037] = {5037, 7, 5, 5}, 547 [CHAN_ENUM_5040] = {5040, 8, 10, 20}, 548 [CHAN_ENUM_5042] = {5042, 8, 5, 5}, 549 [CHAN_ENUM_5045] = {5045, 9, 10, 10}, 550 [CHAN_ENUM_5047] = {5047, 9, 5, 5}, 551 [CHAN_ENUM_5052] = {5052, 10, 5, 5}, 552 [CHAN_ENUM_5055] = {5055, 11, 10, 10}, 553 [CHAN_ENUM_5057] = {5057, 11, 5, 5}, 554 [CHAN_ENUM_5060] = {5060, 12, 20, 20}, 555 [CHAN_ENUM_5080] = {5080, 16, 20, 20}, 556 557 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 558 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 559 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 560 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 561 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 562 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 563 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 564 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 565 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 566 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 567 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 568 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 569 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 570 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 571 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 572 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 573 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 574 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 575 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 576 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 577 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 578 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 579 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 580 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 581 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 582 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 583 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 584 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 585 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 586 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 587 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 588 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 589 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 590 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 591 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 592 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 593 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 594 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 595 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 596 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 597 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 598 #ifdef CONFIG_BAND_6GHZ 599 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 600 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 601 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 602 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 603 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 604 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 605 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 606 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 607 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 608 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 609 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 610 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 611 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 612 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 613 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 614 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 615 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 616 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 617 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 618 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 619 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 620 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 621 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 622 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 623 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 624 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 625 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 626 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 627 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 628 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 629 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 630 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 631 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 632 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 633 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 634 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 635 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 636 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 637 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 638 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 639 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 640 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 641 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 642 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 643 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 644 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 645 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 646 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 647 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 648 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 649 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 650 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 651 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 652 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 653 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 654 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 655 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 656 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 657 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 658 #endif /* CONFIG_BAND_6GHZ */ 659 }; 660 661 static const struct chan_map channel_map_global[NUM_CHANNELS] = { 662 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 663 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 664 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 665 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 666 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 667 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 668 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 669 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 670 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 671 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 672 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 673 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 674 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 675 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 676 677 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 678 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 679 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 680 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 681 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 682 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 683 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 684 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 685 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 686 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 687 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 688 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 689 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 690 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 691 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 692 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 693 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 694 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 695 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 696 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 697 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 698 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 699 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 700 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 701 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 702 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 703 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 704 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 705 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 706 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 707 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 708 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 709 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 710 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 711 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 712 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 713 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 714 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 715 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 716 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 717 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 718 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 719 720 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 721 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 722 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 723 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 724 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 725 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 726 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 727 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 728 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 729 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 730 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 731 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 732 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 733 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 734 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 735 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 736 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 737 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 738 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 739 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 740 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 741 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 742 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 743 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 744 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 745 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 746 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 747 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 748 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 749 [CHAN_ENUM_5865] = {5865, 173, 2, 160}, 750 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 751 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 752 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 753 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 754 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 755 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 756 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 757 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 758 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 759 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 760 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 761 #ifdef CONFIG_BAND_6GHZ 762 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 763 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 764 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 765 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 766 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 767 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 768 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 769 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 770 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 771 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 772 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 773 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 774 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 775 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 776 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 777 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 778 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 779 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 780 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 781 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 782 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 783 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 784 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 785 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 786 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 787 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 788 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 789 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 790 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 791 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 792 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 793 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 794 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 795 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 796 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 797 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 798 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 799 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 800 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 801 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 802 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 803 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 804 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 805 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 806 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 807 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 808 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 809 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 810 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 811 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 812 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 813 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 814 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 815 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 816 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 817 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 818 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 819 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 820 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 821 #endif /* CONFIG_BAND_6GHZ */ 822 }; 823 824 static const struct chan_map channel_map_china[NUM_CHANNELS] = { 825 [CHAN_ENUM_2412] = {2412, 1, 20, 40}, 826 [CHAN_ENUM_2417] = {2417, 2, 20, 40}, 827 [CHAN_ENUM_2422] = {2422, 3, 20, 40}, 828 [CHAN_ENUM_2427] = {2427, 4, 20, 40}, 829 [CHAN_ENUM_2432] = {2432, 5, 20, 40}, 830 [CHAN_ENUM_2437] = {2437, 6, 20, 40}, 831 [CHAN_ENUM_2442] = {2442, 7, 20, 40}, 832 [CHAN_ENUM_2447] = {2447, 8, 20, 40}, 833 [CHAN_ENUM_2452] = {2452, 9, 20, 40}, 834 [CHAN_ENUM_2457] = {2457, 10, 20, 40}, 835 [CHAN_ENUM_2462] = {2462, 11, 20, 40}, 836 [CHAN_ENUM_2467] = {2467, 12, 20, 40}, 837 [CHAN_ENUM_2472] = {2472, 13, 20, 40}, 838 [CHAN_ENUM_2484] = {2484, 14, 20, 20}, 839 840 [CHAN_ENUM_4912] = {4912, INVALID_CHANNEL_NUM, 2, 20}, 841 [CHAN_ENUM_4915] = {4915, INVALID_CHANNEL_NUM, 2, 20}, 842 [CHAN_ENUM_4917] = {4917, INVALID_CHANNEL_NUM, 2, 20}, 843 [CHAN_ENUM_4920] = {4920, INVALID_CHANNEL_NUM, 2, 20}, 844 [CHAN_ENUM_4922] = {4922, INVALID_CHANNEL_NUM, 2, 20}, 845 [CHAN_ENUM_4925] = {4925, INVALID_CHANNEL_NUM, 2, 20}, 846 [CHAN_ENUM_4927] = {4927, INVALID_CHANNEL_NUM, 2, 20}, 847 [CHAN_ENUM_4932] = {4932, INVALID_CHANNEL_NUM, 2, 20}, 848 [CHAN_ENUM_4935] = {4935, INVALID_CHANNEL_NUM, 2, 20}, 849 [CHAN_ENUM_4937] = {4937, INVALID_CHANNEL_NUM, 2, 20}, 850 [CHAN_ENUM_4940] = {4940, INVALID_CHANNEL_NUM, 2, 20}, 851 [CHAN_ENUM_4942] = {4942, INVALID_CHANNEL_NUM, 2, 20}, 852 [CHAN_ENUM_4945] = {4945, INVALID_CHANNEL_NUM, 2, 20}, 853 [CHAN_ENUM_4947] = {4947, INVALID_CHANNEL_NUM, 2, 20}, 854 [CHAN_ENUM_4950] = {4950, INVALID_CHANNEL_NUM, 2, 20}, 855 [CHAN_ENUM_4952] = {4952, INVALID_CHANNEL_NUM, 2, 20}, 856 [CHAN_ENUM_4955] = {4955, INVALID_CHANNEL_NUM, 2, 20}, 857 [CHAN_ENUM_4957] = {4957, INVALID_CHANNEL_NUM, 2, 20}, 858 [CHAN_ENUM_4960] = {4960, INVALID_CHANNEL_NUM, 2, 20}, 859 [CHAN_ENUM_4962] = {4962, INVALID_CHANNEL_NUM, 2, 20}, 860 [CHAN_ENUM_4965] = {4965, INVALID_CHANNEL_NUM, 2, 20}, 861 [CHAN_ENUM_4967] = {4967, INVALID_CHANNEL_NUM, 2, 20}, 862 [CHAN_ENUM_4970] = {4970, INVALID_CHANNEL_NUM, 2, 20}, 863 [CHAN_ENUM_4972] = {4972, INVALID_CHANNEL_NUM, 2, 20}, 864 [CHAN_ENUM_4975] = {4975, INVALID_CHANNEL_NUM, 2, 20}, 865 [CHAN_ENUM_4977] = {4977, INVALID_CHANNEL_NUM, 2, 20}, 866 [CHAN_ENUM_4980] = {4980, INVALID_CHANNEL_NUM, 2, 20}, 867 [CHAN_ENUM_4982] = {4982, INVALID_CHANNEL_NUM, 2, 20}, 868 [CHAN_ENUM_4985] = {4985, INVALID_CHANNEL_NUM, 2, 20}, 869 [CHAN_ENUM_4987] = {4987, INVALID_CHANNEL_NUM, 2, 20}, 870 [CHAN_ENUM_5032] = {5032, INVALID_CHANNEL_NUM, 2, 20}, 871 [CHAN_ENUM_5035] = {5035, INVALID_CHANNEL_NUM, 2, 20}, 872 [CHAN_ENUM_5037] = {5037, INVALID_CHANNEL_NUM, 2, 20}, 873 [CHAN_ENUM_5040] = {5040, INVALID_CHANNEL_NUM, 2, 20}, 874 [CHAN_ENUM_5042] = {5042, INVALID_CHANNEL_NUM, 2, 20}, 875 [CHAN_ENUM_5045] = {5045, INVALID_CHANNEL_NUM, 2, 20}, 876 [CHAN_ENUM_5047] = {5047, INVALID_CHANNEL_NUM, 2, 20}, 877 [CHAN_ENUM_5052] = {5052, INVALID_CHANNEL_NUM, 2, 20}, 878 [CHAN_ENUM_5055] = {5055, INVALID_CHANNEL_NUM, 2, 20}, 879 [CHAN_ENUM_5057] = {5057, INVALID_CHANNEL_NUM, 2, 20}, 880 [CHAN_ENUM_5060] = {5060, INVALID_CHANNEL_NUM, 2, 20}, 881 [CHAN_ENUM_5080] = {5080, INVALID_CHANNEL_NUM, 2, 20}, 882 883 [CHAN_ENUM_5180] = {5180, 36, 2, 160}, 884 [CHAN_ENUM_5200] = {5200, 40, 2, 160}, 885 [CHAN_ENUM_5220] = {5220, 44, 2, 160}, 886 [CHAN_ENUM_5240] = {5240, 48, 2, 160}, 887 [CHAN_ENUM_5260] = {5260, 52, 2, 160}, 888 [CHAN_ENUM_5280] = {5280, 56, 2, 160}, 889 [CHAN_ENUM_5300] = {5300, 60, 2, 160}, 890 [CHAN_ENUM_5320] = {5320, 64, 2, 160}, 891 [CHAN_ENUM_5500] = {5500, 100, 2, 160}, 892 [CHAN_ENUM_5520] = {5520, 104, 2, 160}, 893 [CHAN_ENUM_5540] = {5540, 108, 2, 160}, 894 [CHAN_ENUM_5560] = {5560, 112, 2, 160}, 895 [CHAN_ENUM_5580] = {5580, 116, 2, 160}, 896 [CHAN_ENUM_5600] = {5600, 120, 2, 160}, 897 [CHAN_ENUM_5620] = {5620, 124, 2, 160}, 898 [CHAN_ENUM_5640] = {5640, 128, 2, 160}, 899 [CHAN_ENUM_5660] = {5660, 132, 2, 160}, 900 [CHAN_ENUM_5680] = {5680, 136, 2, 160}, 901 [CHAN_ENUM_5700] = {5700, 140, 2, 160}, 902 [CHAN_ENUM_5720] = {5720, 144, 2, 160}, 903 [CHAN_ENUM_5745] = {5745, 149, 2, 160}, 904 [CHAN_ENUM_5765] = {5765, 153, 2, 160}, 905 [CHAN_ENUM_5785] = {5785, 157, 2, 160}, 906 [CHAN_ENUM_5805] = {5805, 161, 2, 160}, 907 [CHAN_ENUM_5825] = {5825, 165, 2, 160}, 908 [CHAN_ENUM_5845] = {5845, 169, 2, 160}, 909 [CHAN_ENUM_5850] = {5850, INVALID_CHANNEL_NUM, 2, 160}, 910 [CHAN_ENUM_5855] = {5855, INVALID_CHANNEL_NUM, 2, 160}, 911 [CHAN_ENUM_5860] = {5860, INVALID_CHANNEL_NUM, 2, 160}, 912 [CHAN_ENUM_5865] = {5865, INVALID_CHANNEL_NUM, 2, 160}, 913 [CHAN_ENUM_5870] = {5870, INVALID_CHANNEL_NUM, 2, 160}, 914 [CHAN_ENUM_5875] = {5875, INVALID_CHANNEL_NUM, 2, 160}, 915 [CHAN_ENUM_5880] = {5880, INVALID_CHANNEL_NUM, 2, 160}, 916 [CHAN_ENUM_5885] = {5885, INVALID_CHANNEL_NUM, 2, 160}, 917 [CHAN_ENUM_5890] = {5890, INVALID_CHANNEL_NUM, 2, 160}, 918 [CHAN_ENUM_5895] = {5895, INVALID_CHANNEL_NUM, 2, 160}, 919 [CHAN_ENUM_5900] = {5900, INVALID_CHANNEL_NUM, 2, 160}, 920 [CHAN_ENUM_5905] = {5905, INVALID_CHANNEL_NUM, 2, 160}, 921 [CHAN_ENUM_5910] = {5910, INVALID_CHANNEL_NUM, 2, 160}, 922 [CHAN_ENUM_5915] = {5915, INVALID_CHANNEL_NUM, 2, 160}, 923 [CHAN_ENUM_5920] = {5920, INVALID_CHANNEL_NUM, 2, 160}, 924 #ifdef CONFIG_BAND_6GHZ 925 [CHAN_ENUM_5945] = {5945, 1, 2, 160}, 926 [CHAN_ENUM_5965] = {5965, 5, 2, 160}, 927 [CHAN_ENUM_5985] = {5985, 9, 2, 160}, 928 [CHAN_ENUM_6005] = {6005, 13, 2, 160}, 929 [CHAN_ENUM_6025] = {6025, 17, 2, 160}, 930 [CHAN_ENUM_6045] = {6045, 21, 2, 160}, 931 [CHAN_ENUM_6065] = {6065, 25, 2, 160}, 932 [CHAN_ENUM_6085] = {6085, 29, 2, 160}, 933 [CHAN_ENUM_6105] = {6105, 33, 2, 160}, 934 [CHAN_ENUM_6125] = {6125, 37, 2, 160}, 935 [CHAN_ENUM_6145] = {6145, 41, 2, 160}, 936 [CHAN_ENUM_6165] = {6165, 45, 2, 160}, 937 [CHAN_ENUM_6185] = {6185, 49, 2, 160}, 938 [CHAN_ENUM_6205] = {6205, 53, 2, 160}, 939 [CHAN_ENUM_6225] = {6225, 57, 2, 160}, 940 [CHAN_ENUM_6245] = {6245, 61, 2, 160}, 941 [CHAN_ENUM_6265] = {6265, 65, 2, 160}, 942 [CHAN_ENUM_6285] = {6285, 69, 2, 160}, 943 [CHAN_ENUM_6305] = {6305, 73, 2, 160}, 944 [CHAN_ENUM_6325] = {6325, 77, 2, 160}, 945 [CHAN_ENUM_6345] = {6345, 81, 2, 160}, 946 [CHAN_ENUM_6365] = {6365, 85, 2, 160}, 947 [CHAN_ENUM_6385] = {6385, 89, 2, 160}, 948 [CHAN_ENUM_6405] = {6405, 93, 2, 160}, 949 [CHAN_ENUM_6425] = {6425, 97, 2, 160}, 950 [CHAN_ENUM_6445] = {6445, 101, 2, 160}, 951 [CHAN_ENUM_6465] = {6465, 105, 2, 160}, 952 [CHAN_ENUM_6485] = {6485, 109, 2, 160}, 953 [CHAN_ENUM_6505] = {6505, 113, 2, 160}, 954 [CHAN_ENUM_6525] = {6525, 117, 2, 160}, 955 [CHAN_ENUM_6545] = {6545, 121, 2, 160}, 956 [CHAN_ENUM_6565] = {6565, 125, 2, 160}, 957 [CHAN_ENUM_6585] = {6585, 129, 2, 160}, 958 [CHAN_ENUM_6605] = {6605, 133, 2, 160}, 959 [CHAN_ENUM_6625] = {6625, 137, 2, 160}, 960 [CHAN_ENUM_6645] = {6645, 141, 2, 160}, 961 [CHAN_ENUM_6665] = {6665, 145, 2, 160}, 962 [CHAN_ENUM_6685] = {6685, 149, 2, 160}, 963 [CHAN_ENUM_6705] = {6705, 153, 2, 160}, 964 [CHAN_ENUM_6725] = {6725, 157, 2, 160}, 965 [CHAN_ENUM_6745] = {6745, 161, 2, 160}, 966 [CHAN_ENUM_6765] = {6765, 165, 2, 160}, 967 [CHAN_ENUM_6785] = {6785, 169, 2, 160}, 968 [CHAN_ENUM_6805] = {6805, 173, 2, 160}, 969 [CHAN_ENUM_6825] = {6825, 177, 2, 160}, 970 [CHAN_ENUM_6845] = {6845, 181, 2, 160}, 971 [CHAN_ENUM_6865] = {6865, 185, 2, 160}, 972 [CHAN_ENUM_6885] = {6885, 189, 2, 160}, 973 [CHAN_ENUM_6905] = {6905, 193, 2, 160}, 974 [CHAN_ENUM_6925] = {6925, 197, 2, 160}, 975 [CHAN_ENUM_6945] = {6945, 201, 2, 160}, 976 [CHAN_ENUM_6965] = {6965, 205, 2, 160}, 977 [CHAN_ENUM_6985] = {6985, 209, 2, 160}, 978 [CHAN_ENUM_7005] = {7005, 213, 2, 160}, 979 [CHAN_ENUM_7025] = {7025, 217, 2, 160}, 980 [CHAN_ENUM_7045] = {7045, 221, 2, 160}, 981 [CHAN_ENUM_7065] = {7065, 225, 2, 160}, 982 [CHAN_ENUM_7085] = {7085, 229, 2, 160}, 983 [CHAN_ENUM_7105] = {7105, 233, 2, 160} 984 #endif /* CONFIG_BAND_6GHZ */ 985 }; 986 987 void reg_init_channel_map(enum dfs_reg dfs_region) 988 { 989 switch (dfs_region) { 990 case DFS_UNINIT_REGION: 991 case DFS_UNDEF_REGION: 992 channel_map = channel_map_global; 993 break; 994 case DFS_FCC_REGION: 995 channel_map = channel_map_us; 996 break; 997 case DFS_ETSI_REGION: 998 channel_map = channel_map_eu; 999 break; 1000 case DFS_MKK_REGION: 1001 channel_map = channel_map_jp; 1002 break; 1003 case DFS_CN_REGION: 1004 channel_map = channel_map_china; 1005 break; 1006 case DFS_KR_REGION: 1007 channel_map = channel_map_eu; 1008 break; 1009 } 1010 } 1011 1012 uint16_t reg_get_bw_value(enum phy_ch_width bw) 1013 { 1014 switch (bw) { 1015 case CH_WIDTH_20MHZ: 1016 return 20; 1017 case CH_WIDTH_40MHZ: 1018 return 40; 1019 case CH_WIDTH_80MHZ: 1020 return 80; 1021 case CH_WIDTH_160MHZ: 1022 return 160; 1023 case CH_WIDTH_80P80MHZ: 1024 return 160; 1025 case CH_WIDTH_INVALID: 1026 return 0; 1027 case CH_WIDTH_5MHZ: 1028 return 5; 1029 case CH_WIDTH_10MHZ: 1030 return 10; 1031 case CH_WIDTH_MAX: 1032 return 160; 1033 default: 1034 return 0; 1035 } 1036 } 1037 1038 struct wlan_lmac_if_reg_tx_ops *reg_get_psoc_tx_ops( 1039 struct wlan_objmgr_psoc *psoc) 1040 { 1041 return &((psoc->soc_cb.tx_ops.reg_ops)); 1042 } 1043 1044 #ifdef CONFIG_CHAN_NUM_API 1045 QDF_STATUS reg_get_channel_list_with_power(struct wlan_objmgr_pdev *pdev, 1046 struct channel_power *ch_list, 1047 uint8_t *num_chan) 1048 { 1049 int i, count; 1050 struct regulatory_channel *reg_channels; 1051 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1052 1053 if (!num_chan || !ch_list) { 1054 reg_err("chan_list or num_ch is NULL"); 1055 return QDF_STATUS_E_FAILURE; 1056 } 1057 1058 pdev_priv_obj = reg_get_pdev_obj(pdev); 1059 1060 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1061 reg_err("reg pdev priv obj is NULL"); 1062 return QDF_STATUS_E_FAILURE; 1063 } 1064 1065 /* set the current channel list */ 1066 reg_channels = pdev_priv_obj->cur_chan_list; 1067 1068 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 1069 if (reg_channels[i].state && 1070 reg_channels[i].chan_flags != REGULATORY_CHAN_DISABLED) { 1071 ch_list[count].chan_num = 1072 reg_channels[i].chan_num; 1073 ch_list[count++].tx_power = 1074 reg_channels[i].tx_power; 1075 } 1076 } 1077 1078 *num_chan = count; 1079 1080 return QDF_STATUS_SUCCESS; 1081 } 1082 1083 enum channel_enum reg_get_chan_enum(uint32_t chan_num) 1084 { 1085 uint32_t count; 1086 1087 for (count = 0; count < NUM_CHANNELS; count++) 1088 if (channel_map[count].chan_num == chan_num) 1089 return count; 1090 1091 reg_err("invalid channel number %d", chan_num); 1092 1093 return INVALID_CHANNEL; 1094 } 1095 1096 enum channel_state reg_get_channel_state(struct wlan_objmgr_pdev *pdev, 1097 uint32_t ch) 1098 { 1099 enum channel_enum ch_idx; 1100 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1101 1102 ch_idx = reg_get_chan_enum(ch); 1103 1104 if (ch_idx == INVALID_CHANNEL) 1105 return CHANNEL_STATE_INVALID; 1106 1107 pdev_priv_obj = reg_get_pdev_obj(pdev); 1108 1109 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1110 reg_err("pdev reg obj is NULL"); 1111 return CHANNEL_STATE_INVALID; 1112 } 1113 1114 return pdev_priv_obj->cur_chan_list[ch_idx].state; 1115 } 1116 1117 /** 1118 * reg_get_5g_bonded_chan_array() - get ptr to bonded channel 1119 * @pdev: Pointer to pdev structure 1120 * @oper_ch: operating channel number 1121 * @bonded_chan_ar: bonded channel array 1122 * @array_size; Array size 1123 * @bonded_chan_ptr_ptr: bonded channel ptr ptr 1124 * 1125 * Return: bonded channel state 1126 */ 1127 static enum channel_state reg_get_5g_bonded_chan_array( 1128 struct wlan_objmgr_pdev *pdev, 1129 uint32_t oper_chan, 1130 const struct bonded_channel bonded_chan_ar[], 1131 uint16_t array_size, 1132 const struct bonded_channel **bonded_chan_ptr_ptr) 1133 { 1134 int i; 1135 uint8_t chan_num; 1136 const struct bonded_channel *bonded_chan_ptr = NULL; 1137 enum channel_state chan_state = CHANNEL_STATE_INVALID; 1138 enum channel_state temp_chan_state; 1139 1140 for (i = 0; i < array_size; i++) { 1141 if ((oper_chan >= bonded_chan_ar[i].start_ch) && 1142 (oper_chan <= bonded_chan_ar[i].end_ch)) { 1143 bonded_chan_ptr = &bonded_chan_ar[i]; 1144 break; 1145 } 1146 } 1147 1148 if (!bonded_chan_ptr) 1149 return chan_state; 1150 1151 *bonded_chan_ptr_ptr = bonded_chan_ptr; 1152 chan_num = bonded_chan_ptr->start_ch; 1153 while (chan_num <= bonded_chan_ptr->end_ch) { 1154 temp_chan_state = reg_get_channel_state(pdev, chan_num); 1155 if (temp_chan_state < chan_state) 1156 chan_state = temp_chan_state; 1157 chan_num = chan_num + 4; 1158 } 1159 1160 return chan_state; 1161 } 1162 1163 enum channel_state reg_get_5g_bonded_channel( 1164 struct wlan_objmgr_pdev *pdev, uint32_t chan_num, 1165 enum phy_ch_width ch_width, 1166 const struct bonded_channel **bonded_chan_ptr_ptr) 1167 { 1168 if (ch_width == CH_WIDTH_80P80MHZ) 1169 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1170 bonded_chan_80mhz_list, 1171 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1172 bonded_chan_ptr_ptr); 1173 else if (ch_width == CH_WIDTH_160MHZ) 1174 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1175 bonded_chan_160mhz_list, 1176 QDF_ARRAY_SIZE(bonded_chan_160mhz_list), 1177 bonded_chan_ptr_ptr); 1178 else if (ch_width == CH_WIDTH_80MHZ) 1179 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1180 bonded_chan_80mhz_list, 1181 QDF_ARRAY_SIZE(bonded_chan_80mhz_list), 1182 bonded_chan_ptr_ptr); 1183 else if (ch_width == CH_WIDTH_40MHZ) 1184 return reg_get_5g_bonded_chan_array(pdev, chan_num, 1185 bonded_chan_40mhz_list, 1186 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1187 bonded_chan_ptr_ptr); 1188 else 1189 return reg_get_channel_state(pdev, chan_num); 1190 } 1191 1192 enum channel_state reg_get_5g_bonded_channel_state( 1193 struct wlan_objmgr_pdev *pdev, 1194 uint8_t ch, enum phy_ch_width bw) 1195 { 1196 enum channel_enum ch_indx; 1197 enum channel_state chan_state; 1198 struct regulatory_channel *reg_channels; 1199 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1200 bool bw_enabled = false; 1201 const struct bonded_channel *bonded_chan_ptr = NULL; 1202 1203 if (bw > CH_WIDTH_80P80MHZ) { 1204 reg_err("bw passed is not good"); 1205 return CHANNEL_STATE_INVALID; 1206 } 1207 1208 chan_state = reg_get_5g_bonded_channel(pdev, ch, bw, &bonded_chan_ptr); 1209 1210 if ((chan_state == CHANNEL_STATE_INVALID) || 1211 (chan_state == CHANNEL_STATE_DISABLE)) 1212 return chan_state; 1213 1214 pdev_priv_obj = reg_get_pdev_obj(pdev); 1215 1216 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1217 reg_err("pdev reg obj is NULL"); 1218 return CHANNEL_STATE_INVALID; 1219 } 1220 reg_channels = pdev_priv_obj->cur_chan_list; 1221 1222 ch_indx = reg_get_chan_enum(ch); 1223 if (ch_indx == INVALID_CHANNEL) 1224 return CHANNEL_STATE_INVALID; 1225 if (bw == CH_WIDTH_5MHZ) 1226 bw_enabled = true; 1227 else if (bw == CH_WIDTH_10MHZ) 1228 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 1229 (reg_channels[ch_indx].max_bw >= 10); 1230 else if (bw == CH_WIDTH_20MHZ) 1231 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 1232 (reg_channels[ch_indx].max_bw >= 20); 1233 else if (bw == CH_WIDTH_40MHZ) 1234 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 1235 (reg_channels[ch_indx].max_bw >= 40); 1236 else if (bw == CH_WIDTH_80MHZ) 1237 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1238 (reg_channels[ch_indx].max_bw >= 80); 1239 else if (bw == CH_WIDTH_160MHZ) 1240 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 1241 (reg_channels[ch_indx].max_bw >= 160); 1242 else if (bw == CH_WIDTH_80P80MHZ) 1243 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 1244 (reg_channels[ch_indx].max_bw >= 80); 1245 1246 if (bw_enabled) 1247 return chan_state; 1248 else 1249 return CHANNEL_STATE_DISABLE; 1250 } 1251 1252 enum channel_state reg_get_2g_bonded_channel_state( 1253 struct wlan_objmgr_pdev *pdev, 1254 uint8_t oper_ch, uint8_t sec_ch, 1255 enum phy_ch_width bw) 1256 { 1257 enum channel_enum chan_idx; 1258 enum channel_state chan_state; 1259 struct regulatory_channel *reg_channels; 1260 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1261 bool bw_enabled = false; 1262 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 1263 1264 if (bw > CH_WIDTH_40MHZ) 1265 return CHANNEL_STATE_INVALID; 1266 1267 if (bw == CH_WIDTH_40MHZ) { 1268 if ((sec_ch + 4 != oper_ch) && 1269 (oper_ch + 4 != sec_ch)) 1270 return CHANNEL_STATE_INVALID; 1271 chan_state2 = reg_get_channel_state(pdev, sec_ch); 1272 if (chan_state2 == CHANNEL_STATE_INVALID) 1273 return chan_state2; 1274 } 1275 1276 pdev_priv_obj = reg_get_pdev_obj(pdev); 1277 1278 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1279 reg_err("reg pdev priv obj is NULL"); 1280 return CHANNEL_STATE_INVALID; 1281 } 1282 1283 reg_channels = pdev_priv_obj->cur_chan_list; 1284 1285 chan_state = reg_get_channel_state(pdev, oper_ch); 1286 if (chan_state2 < chan_state) 1287 chan_state = chan_state2; 1288 1289 if ((chan_state == CHANNEL_STATE_INVALID) || 1290 (chan_state == CHANNEL_STATE_DISABLE)) 1291 return chan_state; 1292 1293 chan_idx = reg_get_chan_enum(oper_ch); 1294 if (chan_idx == INVALID_CHANNEL) 1295 return CHANNEL_STATE_INVALID; 1296 if (bw == CH_WIDTH_5MHZ) 1297 bw_enabled = true; 1298 else if (bw == CH_WIDTH_10MHZ) 1299 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 1300 (reg_channels[chan_idx].max_bw >= 10); 1301 else if (bw == CH_WIDTH_20MHZ) 1302 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 1303 (reg_channels[chan_idx].max_bw >= 20); 1304 else if (bw == CH_WIDTH_40MHZ) 1305 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 1306 (reg_channels[chan_idx].max_bw >= 40); 1307 1308 if (bw_enabled) 1309 return chan_state; 1310 else 1311 return CHANNEL_STATE_DISABLE; 1312 1313 return CHANNEL_STATE_ENABLE; 1314 } 1315 #endif /* CONFIG_CHAN_NUM_API */ 1316 1317 /** 1318 * reg_combine_channel_states() - Get minimum of channel state1 and state2 1319 * @chan_state1: Channel state1 1320 * @chan_state2: Channel state2 1321 * 1322 * Return: Channel state 1323 */ 1324 static enum channel_state reg_combine_channel_states( 1325 enum channel_state chan_state1, 1326 enum channel_state chan_state2) 1327 { 1328 if ((chan_state1 == CHANNEL_STATE_INVALID) || 1329 (chan_state2 == CHANNEL_STATE_INVALID)) 1330 return CHANNEL_STATE_INVALID; 1331 else 1332 return min(chan_state1, chan_state2); 1333 } 1334 1335 #ifdef CONFIG_CHAN_NUM_API 1336 /** 1337 * reg_set_5g_channel_params () - Sets channel parameteres for given bandwidth 1338 * @ch: channel number. 1339 * @ch_params: pointer to the channel parameters. 1340 * 1341 * Return: None 1342 */ 1343 static void reg_set_5g_channel_params(struct wlan_objmgr_pdev *pdev, 1344 uint8_t ch, 1345 struct ch_params *ch_params) 1346 { 1347 /* 1348 * Set channel parameters like center frequency for a bonded channel 1349 * state. Also return the maximum bandwidth supported by the channel. 1350 */ 1351 1352 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1353 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 1354 const struct bonded_channel *bonded_chan_ptr = NULL; 1355 const struct bonded_channel *bonded_chan_ptr2 = NULL; 1356 1357 if (!ch_params) { 1358 reg_err("ch_params is NULL"); 1359 return; 1360 } 1361 1362 if (ch_params->ch_width >= CH_WIDTH_MAX) { 1363 if (ch_params->center_freq_seg1 != 0) 1364 ch_params->ch_width = CH_WIDTH_80P80MHZ; 1365 else 1366 ch_params->ch_width = CH_WIDTH_160MHZ; 1367 } 1368 1369 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1370 bonded_chan_ptr = NULL; 1371 bonded_chan_ptr2 = NULL; 1372 chan_state = reg_get_5g_bonded_channel( 1373 pdev, ch, ch_params->ch_width, 1374 &bonded_chan_ptr); 1375 1376 chan_state = reg_get_5g_bonded_channel_state( 1377 pdev, ch, ch_params->ch_width); 1378 1379 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 1380 chan_state2 = reg_get_5g_bonded_channel_state( 1381 pdev, ch_params->center_freq_seg1 - 2, 1382 CH_WIDTH_80MHZ); 1383 1384 chan_state = reg_combine_channel_states( 1385 chan_state, chan_state2); 1386 } 1387 1388 if ((chan_state != CHANNEL_STATE_ENABLE) && 1389 (chan_state != CHANNEL_STATE_DFS)) 1390 goto update_bw; 1391 1392 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 1393 ch_params->sec_ch_offset = NO_SEC_CH; 1394 ch_params->center_freq_seg0 = ch; 1395 break; 1396 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 1397 reg_get_5g_bonded_chan_array( 1398 pdev, ch, bonded_chan_40mhz_list, 1399 QDF_ARRAY_SIZE(bonded_chan_40mhz_list), 1400 &bonded_chan_ptr2); 1401 if (!bonded_chan_ptr || !bonded_chan_ptr2) 1402 goto update_bw; 1403 if (ch == bonded_chan_ptr2->start_ch) 1404 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 1405 else 1406 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 1407 1408 ch_params->center_freq_seg0 = 1409 (bonded_chan_ptr->start_ch + 1410 bonded_chan_ptr->end_ch) / 2; 1411 break; 1412 } 1413 update_bw: 1414 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1415 } 1416 1417 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 1418 ch_params->center_freq_seg1 = ch_params->center_freq_seg0; 1419 chan_state = reg_get_5g_bonded_channel( 1420 pdev, ch, CH_WIDTH_80MHZ, &bonded_chan_ptr); 1421 if (bonded_chan_ptr) 1422 ch_params->center_freq_seg0 = 1423 (bonded_chan_ptr->start_ch + 1424 bonded_chan_ptr->end_ch) / 2; 1425 } 1426 1427 /* Overwrite center_freq_seg1 to 0 for non 160 and 80+80 width */ 1428 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 1429 ch_params->ch_width == CH_WIDTH_80P80MHZ)) 1430 ch_params->center_freq_seg1 = 0; 1431 1432 reg_debug("ch %d ch_wd %d freq0 %d freq1 %d", ch, 1433 ch_params->ch_width, ch_params->center_freq_seg0, 1434 ch_params->center_freq_seg1); 1435 } 1436 1437 /** 1438 * reg_set_2g_channel_params() - set the 2.4G bonded channel parameters 1439 * @oper_ch: operating channel 1440 * @ch_params: channel parameters 1441 * @sec_ch_2g: 2.4G secondary channel 1442 * 1443 * Return: void 1444 */ 1445 static void reg_set_2g_channel_params(struct wlan_objmgr_pdev *pdev, 1446 uint16_t oper_ch, 1447 struct ch_params *ch_params, 1448 uint16_t sec_ch_2g) 1449 { 1450 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 1451 1452 if (ch_params->ch_width >= CH_WIDTH_MAX) 1453 ch_params->ch_width = CH_WIDTH_40MHZ; 1454 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g) { 1455 if (oper_ch >= 1 && oper_ch <= 5) 1456 sec_ch_2g = oper_ch + 4; 1457 else if (oper_ch >= 6 && oper_ch <= 13) 1458 sec_ch_2g = oper_ch - 4; 1459 } 1460 1461 while (ch_params->ch_width != CH_WIDTH_INVALID) { 1462 chan_state = reg_get_2g_bonded_channel_state( 1463 pdev, oper_ch, sec_ch_2g, ch_params->ch_width); 1464 if (chan_state == CHANNEL_STATE_ENABLE) { 1465 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 1466 if (oper_ch < sec_ch_2g) 1467 ch_params->sec_ch_offset = 1468 LOW_PRIMARY_CH; 1469 else 1470 ch_params->sec_ch_offset = 1471 HIGH_PRIMARY_CH; 1472 ch_params->center_freq_seg0 = 1473 (oper_ch + sec_ch_2g) / 2; 1474 } else { 1475 ch_params->sec_ch_offset = NO_SEC_CH; 1476 ch_params->center_freq_seg0 = oper_ch; 1477 } 1478 break; 1479 } 1480 1481 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 1482 } 1483 /* Overwrite center_freq_seg1 to 0 for 2.4 Ghz */ 1484 ch_params->center_freq_seg1 = 0; 1485 } 1486 1487 void reg_set_channel_params(struct wlan_objmgr_pdev *pdev, 1488 uint8_t ch, uint8_t sec_ch_2g, 1489 struct ch_params *ch_params) 1490 { 1491 if (REG_IS_5GHZ_CH(ch)) 1492 reg_set_5g_channel_params(pdev, ch, ch_params); 1493 else if (REG_IS_24GHZ_CH(ch)) 1494 reg_set_2g_channel_params(pdev, ch, ch_params, sec_ch_2g); 1495 } 1496 #endif /* CONFIG_CHAN_NUM_API */ 1497 1498 QDF_STATUS reg_get_curr_band(struct wlan_objmgr_pdev *pdev, 1499 enum band_info *band) 1500 { 1501 struct wlan_regulatory_pdev_priv_obj *pdev_reg; 1502 1503 pdev_reg = reg_get_pdev_obj(pdev); 1504 if (!IS_VALID_PDEV_REG_OBJ(pdev_reg)) { 1505 reg_err("pdev reg component is NULL"); 1506 return QDF_STATUS_E_INVAL; 1507 } 1508 1509 *band = pdev_reg->band_capability; 1510 1511 return QDF_STATUS_SUCCESS; 1512 } 1513 1514 QDF_STATUS reg_read_default_country(struct wlan_objmgr_psoc *psoc, 1515 uint8_t *country_code) 1516 { 1517 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1518 1519 if (!country_code) { 1520 reg_err("country_code is NULL"); 1521 return QDF_STATUS_E_INVAL; 1522 } 1523 1524 psoc_priv_obj = reg_get_psoc_obj(psoc); 1525 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1526 reg_err("psoc reg component is NULL"); 1527 return QDF_STATUS_E_INVAL; 1528 } 1529 1530 qdf_mem_copy(country_code, psoc_priv_obj->def_country, 1531 REG_ALPHA2_LEN + 1); 1532 1533 return QDF_STATUS_SUCCESS; 1534 } 1535 1536 void reg_get_current_dfs_region(struct wlan_objmgr_pdev *pdev, 1537 enum dfs_reg *dfs_reg) 1538 { 1539 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1540 1541 pdev_priv_obj = reg_get_pdev_obj(pdev); 1542 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1543 reg_err("reg component pdev priv is NULL"); 1544 return; 1545 } 1546 1547 *dfs_reg = pdev_priv_obj->dfs_region; 1548 } 1549 1550 void reg_set_dfs_region(struct wlan_objmgr_pdev *pdev, 1551 enum dfs_reg dfs_reg) 1552 { 1553 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1554 1555 pdev_priv_obj = reg_get_pdev_obj(pdev); 1556 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1557 reg_err("psoc reg component is NULL"); 1558 return; 1559 } 1560 1561 pdev_priv_obj->dfs_region = dfs_reg; 1562 1563 reg_init_channel_map(dfs_reg); 1564 } 1565 1566 #ifdef CONFIG_CHAN_NUM_API 1567 uint32_t reg_get_channel_reg_power(struct wlan_objmgr_pdev *pdev, 1568 uint32_t chan_num) 1569 { 1570 enum channel_enum chan_enum; 1571 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1572 struct regulatory_channel *reg_channels; 1573 1574 chan_enum = reg_get_chan_enum(chan_num); 1575 1576 if (chan_enum == INVALID_CHANNEL) { 1577 reg_err("channel is invalid"); 1578 return QDF_STATUS_E_FAILURE; 1579 } 1580 1581 pdev_priv_obj = reg_get_pdev_obj(pdev); 1582 1583 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1584 reg_err("reg pdev priv obj is NULL"); 1585 return QDF_STATUS_E_FAILURE; 1586 } 1587 1588 reg_channels = pdev_priv_obj->cur_chan_list; 1589 1590 return reg_channels[chan_enum].tx_power; 1591 } 1592 1593 uint32_t reg_get_channel_freq(struct wlan_objmgr_pdev *pdev, 1594 uint32_t chan_num) 1595 { 1596 enum channel_enum chan_enum; 1597 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1598 struct regulatory_channel *reg_channels; 1599 1600 chan_enum = reg_get_chan_enum(chan_num); 1601 1602 if (chan_enum == INVALID_CHANNEL) 1603 return CHANNEL_STATE_INVALID; 1604 1605 pdev_priv_obj = reg_get_pdev_obj(pdev); 1606 1607 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1608 reg_err("reg pdev priv obj is NULL"); 1609 return QDF_STATUS_E_FAILURE; 1610 } 1611 1612 reg_channels = pdev_priv_obj->cur_chan_list; 1613 1614 return reg_channels[chan_enum].center_freq; 1615 } 1616 1617 bool reg_is_dfs_ch(struct wlan_objmgr_pdev *pdev, 1618 uint32_t chan) 1619 { 1620 enum channel_state ch_state; 1621 1622 ch_state = reg_get_channel_state(pdev, chan); 1623 1624 return ch_state == CHANNEL_STATE_DFS; 1625 } 1626 #endif /* CONFIG_CHAN_NUM_API */ 1627 1628 uint32_t reg_freq_to_chan(struct wlan_objmgr_pdev *pdev, 1629 uint32_t freq) 1630 { 1631 uint32_t count; 1632 struct regulatory_channel *chan_list; 1633 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1634 1635 pdev_priv_obj = reg_get_pdev_obj(pdev); 1636 1637 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1638 reg_err("reg pdev priv obj is NULL"); 1639 return 0; 1640 } 1641 1642 chan_list = pdev_priv_obj->mas_chan_list; 1643 for (count = 0; count < NUM_CHANNELS; count++) { 1644 if (chan_list[count].center_freq >= freq) 1645 break; 1646 } 1647 1648 if (count == NUM_CHANNELS) 1649 goto end; 1650 1651 if (chan_list[count].center_freq == freq) 1652 return chan_list[count].chan_num; 1653 1654 if (count == 0) 1655 goto end; 1656 1657 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1658 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1659 reg_err("Frequency %d invalid in current reg domain", freq); 1660 return 0; 1661 } 1662 1663 return (chan_list[count - 1].chan_num + 1664 (freq - chan_list[count - 1].center_freq) / 5); 1665 1666 end: 1667 reg_err_rl("invalid frequency %d", freq); 1668 return 0; 1669 } 1670 1671 static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1672 uint8_t chan_num, 1673 enum channel_enum min_chan_range, 1674 enum channel_enum max_chan_range) 1675 { 1676 uint16_t count; 1677 struct regulatory_channel *chan_list; 1678 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1679 1680 pdev_priv_obj = reg_get_pdev_obj(pdev); 1681 1682 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1683 reg_err("reg pdev priv obj is NULL"); 1684 return 0; 1685 } 1686 1687 chan_list = pdev_priv_obj->mas_chan_list; 1688 1689 for (count = min_chan_range; count <= max_chan_range; count++) { 1690 if (reg_chan_is_49ghz(pdev, chan_list[count].chan_num)) { 1691 if (chan_list[count].chan_num == chan_num) 1692 break; 1693 continue; 1694 } else if ((chan_list[count].chan_num >= chan_num) && 1695 (chan_list[count].chan_num != INVALID_CHANNEL_NUM)) 1696 break; 1697 } 1698 1699 if (count == max_chan_range + 1) 1700 goto end; 1701 1702 if (chan_list[count].chan_num == chan_num) { 1703 if (chan_list[count].chan_flags & REGULATORY_CHAN_DISABLED) 1704 reg_err("Channel %d disabled in current reg domain", 1705 chan_num); 1706 return chan_list[count].center_freq; 1707 } 1708 1709 if (count == min_chan_range) 1710 goto end; 1711 1712 if ((chan_list[count - 1].chan_num == INVALID_CHANNEL_NUM) || 1713 reg_chan_is_49ghz(pdev, chan_list[count - 1].chan_num) || 1714 (chan_list[count].chan_num == INVALID_CHANNEL_NUM)) { 1715 reg_err("Channel %d invalid in current reg domain", 1716 chan_num); 1717 return 0; 1718 } 1719 1720 return (chan_list[count - 1].center_freq + 1721 (chan_num - chan_list[count - 1].chan_num) * 5); 1722 1723 end: 1724 1725 reg_debug_rl("Invalid channel %d", chan_num); 1726 return 0; 1727 } 1728 1729 uint16_t reg_legacy_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1730 uint8_t chan_num) 1731 { 1732 uint16_t min_chan_range = MIN_24GHZ_CHANNEL; 1733 uint16_t max_chan_range = MAX_5GHZ_CHANNEL; 1734 1735 return reg_compute_chan_to_freq(pdev, chan_num, 1736 min_chan_range, 1737 max_chan_range); 1738 } 1739 1740 #ifdef CONFIG_CHAN_NUM_API 1741 uint32_t reg_chan_to_freq(struct wlan_objmgr_pdev *pdev, 1742 uint32_t chan_num) 1743 { 1744 uint32_t count; 1745 struct regulatory_channel *chan_list; 1746 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1747 1748 pdev_priv_obj = reg_get_pdev_obj(pdev); 1749 1750 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 1751 reg_err("reg pdev priv obj is NULL"); 1752 return 0; 1753 } 1754 1755 chan_list = pdev_priv_obj->cur_chan_list; 1756 for (count = 0; count < NUM_CHANNELS; count++) 1757 if (chan_list[count].chan_num == chan_num) { 1758 if (reg_chan_in_range(chan_list, 1759 pdev_priv_obj->range_2g_low, 1760 pdev_priv_obj->range_2g_high, 1761 pdev_priv_obj->range_5g_low, 1762 pdev_priv_obj->range_5g_high, 1763 count)) { 1764 return chan_list[count].center_freq; 1765 } 1766 } 1767 1768 reg_debug_rl("invalid channel %d", chan_num); 1769 return 0; 1770 } 1771 1772 bool reg_chan_is_49ghz(struct wlan_objmgr_pdev *pdev, uint8_t chan_num) 1773 { 1774 uint32_t freq = 0; 1775 1776 freq = reg_chan_to_freq(pdev, chan_num); 1777 1778 return REG_IS_49GHZ_FREQ(freq) ? true : false; 1779 } 1780 1781 enum band_info reg_chan_to_band(uint32_t chan_num) 1782 { 1783 if (chan_num <= 14) 1784 return BAND_2G; 1785 1786 return BAND_5G; 1787 } 1788 1789 void reg_update_nol_ch(struct wlan_objmgr_pdev *pdev, 1790 uint8_t *chan_list, 1791 uint8_t num_chan, 1792 bool nol_chan) 1793 { 1794 enum channel_enum chan_enum; 1795 struct regulatory_channel *mas_chan_list; 1796 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1797 uint16_t i; 1798 1799 if (!num_chan || !chan_list) { 1800 reg_err("chan_list or num_ch is NULL"); 1801 return; 1802 } 1803 1804 pdev_priv_obj = reg_get_pdev_obj(pdev); 1805 if (!pdev_priv_obj) { 1806 reg_err("reg psoc private obj is NULL"); 1807 return; 1808 } 1809 1810 mas_chan_list = pdev_priv_obj->mas_chan_list; 1811 for (i = 0; i < num_chan; i++) { 1812 chan_enum = reg_get_chan_enum(chan_list[i]); 1813 if (chan_enum == INVALID_CHANNEL) { 1814 reg_err("Invalid ch in nol list, chan %d", 1815 chan_list[i]); 1816 continue; 1817 } 1818 mas_chan_list[chan_enum].nol_chan = nol_chan; 1819 } 1820 1821 reg_compute_pdev_current_chan_list(pdev_priv_obj); 1822 } 1823 #endif /* CONFIG_CHAN_NUM_API */ 1824 1825 QDF_STATUS reg_program_default_cc(struct wlan_objmgr_pdev *pdev, 1826 uint16_t regdmn) 1827 { 1828 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1829 struct cur_regulatory_info *reg_info; 1830 uint16_t cc = -1; 1831 uint16_t country_index = -1, regdmn_pair = -1; 1832 struct wlan_objmgr_psoc *psoc; 1833 QDF_STATUS err; 1834 1835 pdev_priv_obj = reg_get_pdev_obj(pdev); 1836 if (!pdev_priv_obj) { 1837 reg_err("reg soc is NULL"); 1838 return QDF_STATUS_E_FAILURE; 1839 } 1840 1841 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1842 (sizeof(struct cur_regulatory_info)); 1843 if (!reg_info) { 1844 reg_err("reg info is NULL"); 1845 return QDF_STATUS_E_NOMEM; 1846 } 1847 1848 psoc = wlan_pdev_get_psoc(pdev); 1849 if (!psoc) { 1850 reg_err("psoc is NULL"); 1851 return QDF_STATUS_E_INVAL; 1852 } 1853 1854 reg_info->psoc = psoc; 1855 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1856 1857 if (regdmn == 0) { 1858 reg_get_default_country(®dmn); 1859 regdmn |= COUNTRY_ERD_FLAG; 1860 } 1861 1862 if (regdmn & COUNTRY_ERD_FLAG) { 1863 cc = regdmn & ~COUNTRY_ERD_FLAG; 1864 1865 reg_get_rdpair_from_country_code(cc, 1866 &country_index, 1867 ®dmn_pair); 1868 1869 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1870 if (err == QDF_STATUS_E_FAILURE) { 1871 reg_err("%s : Unable to set country code\n", __func__); 1872 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1873 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1874 qdf_mem_free(reg_info); 1875 return QDF_STATUS_E_FAILURE; 1876 } 1877 1878 pdev_priv_obj->ctry_code = cc; 1879 1880 } else { 1881 reg_get_rdpair_from_regdmn_id(regdmn, ®dmn_pair); 1882 1883 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1884 if (err == QDF_STATUS_E_FAILURE) { 1885 reg_err("%s : Unable to set country code\n", __func__); 1886 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1887 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1888 qdf_mem_free(reg_info); 1889 return QDF_STATUS_E_FAILURE; 1890 } 1891 1892 pdev_priv_obj->reg_dmn_pair = regdmn; 1893 } 1894 1895 reg_info->offload_enabled = false; 1896 reg_process_master_chan_list(reg_info); 1897 1898 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1899 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1900 qdf_mem_free(reg_info); 1901 1902 return QDF_STATUS_SUCCESS; 1903 } 1904 1905 QDF_STATUS reg_program_chan_list(struct wlan_objmgr_pdev *pdev, 1906 struct cc_regdmn_s *rd) 1907 { 1908 struct cur_regulatory_info *reg_info; 1909 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1910 uint16_t country_index = -1, regdmn_pair = -1; 1911 struct wlan_objmgr_psoc *psoc; 1912 struct wlan_lmac_if_reg_tx_ops *tx_ops; 1913 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 1914 uint8_t pdev_id; 1915 QDF_STATUS err; 1916 1917 pdev_priv_obj = reg_get_pdev_obj(pdev); 1918 if (!pdev_priv_obj) { 1919 reg_err(" pdev priv obj is NULL"); 1920 return QDF_STATUS_E_FAILURE; 1921 } 1922 1923 psoc = wlan_pdev_get_psoc(pdev); 1924 if (!psoc) { 1925 reg_err("psoc is NULL"); 1926 return QDF_STATUS_E_INVAL; 1927 } 1928 1929 psoc_priv_obj = reg_get_psoc_obj(psoc); 1930 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 1931 reg_err("psoc reg component is NULL"); 1932 return QDF_STATUS_E_FAILURE; 1933 } 1934 1935 if (psoc_priv_obj->offload_enabled) { 1936 if ((rd->flags == ALPHA_IS_SET) && (rd->cc.alpha[2] == 'O')) 1937 pdev_priv_obj->indoor_chan_enabled = false; 1938 else 1939 pdev_priv_obj->indoor_chan_enabled = true; 1940 1941 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1942 tx_ops = reg_get_psoc_tx_ops(psoc); 1943 if (tx_ops->set_user_country_code) { 1944 psoc_priv_obj->new_init_ctry_pending[pdev_id] = true; 1945 return tx_ops->set_user_country_code(psoc, pdev_id, rd); 1946 } 1947 1948 return QDF_STATUS_E_FAILURE; 1949 } 1950 1951 reg_info = (struct cur_regulatory_info *)qdf_mem_malloc 1952 (sizeof(struct cur_regulatory_info)); 1953 if (!reg_info) { 1954 reg_err("reg info is NULL"); 1955 return QDF_STATUS_E_NOMEM; 1956 } 1957 1958 reg_info->psoc = psoc; 1959 reg_info->phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 1960 1961 if (rd->flags == CC_IS_SET) { 1962 reg_get_rdpair_from_country_code(rd->cc.country_code, 1963 &country_index, 1964 ®dmn_pair); 1965 } else if (rd->flags == ALPHA_IS_SET) { 1966 reg_get_rdpair_from_country_iso(rd->cc.alpha, 1967 &country_index, 1968 ®dmn_pair); 1969 } else if (rd->flags == REGDMN_IS_SET) { 1970 reg_get_rdpair_from_regdmn_id(rd->cc.regdmn_id, 1971 ®dmn_pair); 1972 } 1973 1974 err = reg_get_cur_reginfo(reg_info, country_index, regdmn_pair); 1975 if (err == QDF_STATUS_E_FAILURE) { 1976 reg_err("%s : Unable to set country code\n", __func__); 1977 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1978 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1979 qdf_mem_free(reg_info); 1980 return QDF_STATUS_E_FAILURE; 1981 } 1982 1983 reg_info->offload_enabled = false; 1984 reg_process_master_chan_list(reg_info); 1985 1986 qdf_mem_free(reg_info->reg_rules_2g_ptr); 1987 qdf_mem_free(reg_info->reg_rules_5g_ptr); 1988 qdf_mem_free(reg_info); 1989 1990 return QDF_STATUS_SUCCESS; 1991 } 1992 1993 QDF_STATUS reg_get_current_cc(struct wlan_objmgr_pdev *pdev, 1994 struct cc_regdmn_s *rd) 1995 { 1996 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 1997 1998 pdev_priv_obj = reg_get_pdev_obj(pdev); 1999 if (!pdev_priv_obj) { 2000 reg_err("reg pdev priv is NULL"); 2001 return QDF_STATUS_E_FAILURE; 2002 } 2003 2004 if (rd->flags == CC_IS_SET) { 2005 rd->cc.country_code = pdev_priv_obj->ctry_code; 2006 } else if (rd->flags == ALPHA_IS_SET) { 2007 qdf_mem_copy(rd->cc.alpha, pdev_priv_obj->current_country, 2008 sizeof(rd->cc.alpha)); 2009 } else if (rd->flags == REGDMN_IS_SET) { 2010 rd->cc.regdmn_id = pdev_priv_obj->reg_dmn_pair; 2011 } 2012 2013 return QDF_STATUS_SUCCESS; 2014 } 2015 2016 QDF_STATUS reg_set_regdb_offloaded(struct wlan_objmgr_psoc *psoc, bool val) 2017 { 2018 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2019 2020 psoc_priv_obj = reg_get_psoc_obj(psoc); 2021 2022 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2023 reg_err("psoc reg component is NULL"); 2024 return QDF_STATUS_E_FAILURE; 2025 } 2026 2027 psoc_priv_obj->offload_enabled = val; 2028 2029 return QDF_STATUS_SUCCESS; 2030 } 2031 2032 QDF_STATUS reg_get_curr_regdomain(struct wlan_objmgr_pdev *pdev, 2033 struct cur_regdmn_info *cur_regdmn) 2034 { 2035 struct wlan_objmgr_psoc *psoc; 2036 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2037 uint16_t index; 2038 int num_reg_dmn; 2039 uint8_t phy_id; 2040 2041 psoc = wlan_pdev_get_psoc(pdev); 2042 psoc_priv_obj = reg_get_psoc_obj(psoc); 2043 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2044 reg_err("soc reg component is NULL"); 2045 return QDF_STATUS_E_INVAL; 2046 } 2047 2048 phy_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2049 cur_regdmn->regdmn_pair_id = 2050 psoc_priv_obj->mas_chan_params[phy_id].reg_dmn_pair; 2051 2052 reg_get_num_reg_dmn_pairs(&num_reg_dmn); 2053 for (index = 0; index < num_reg_dmn; index++) { 2054 if (g_reg_dmn_pairs[index].reg_dmn_pair_id == 2055 cur_regdmn->regdmn_pair_id) 2056 break; 2057 } 2058 2059 if (index == num_reg_dmn) { 2060 reg_err_rl("invalid regdomain"); 2061 return QDF_STATUS_E_FAILURE; 2062 } 2063 2064 cur_regdmn->dmn_id_2g = g_reg_dmn_pairs[index].dmn_id_2g; 2065 cur_regdmn->dmn_id_5g = g_reg_dmn_pairs[index].dmn_id_5g; 2066 cur_regdmn->ctl_2g = regdomains_2g[cur_regdmn->dmn_id_2g].ctl_val; 2067 cur_regdmn->ctl_5g = regdomains_5g[cur_regdmn->dmn_id_5g].ctl_val; 2068 cur_regdmn->dfs_region = 2069 regdomains_5g[cur_regdmn->dmn_id_5g].dfs_region; 2070 2071 return QDF_STATUS_SUCCESS; 2072 } 2073 2074 QDF_STATUS reg_modify_chan_144(struct wlan_objmgr_pdev *pdev, 2075 bool enable_ch_144) 2076 { 2077 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2078 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2079 struct wlan_objmgr_psoc *psoc; 2080 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2081 QDF_STATUS status; 2082 2083 pdev_priv_obj = reg_get_pdev_obj(pdev); 2084 2085 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2086 reg_err("pdev reg component is NULL"); 2087 return QDF_STATUS_E_INVAL; 2088 } 2089 2090 if (pdev_priv_obj->en_chan_144 == enable_ch_144) { 2091 reg_info("chan 144 is already %d", enable_ch_144); 2092 return QDF_STATUS_SUCCESS; 2093 } 2094 2095 psoc = wlan_pdev_get_psoc(pdev); 2096 if (!psoc) { 2097 reg_err("psoc is NULL"); 2098 return QDF_STATUS_E_INVAL; 2099 } 2100 2101 psoc_priv_obj = reg_get_psoc_obj(psoc); 2102 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2103 reg_err("psoc reg component is NULL"); 2104 return QDF_STATUS_E_INVAL; 2105 } 2106 2107 reg_debug("setting chan 144: %d", enable_ch_144); 2108 pdev_priv_obj->en_chan_144 = enable_ch_144; 2109 2110 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2111 2112 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2113 if (reg_tx_ops->fill_umac_legacy_chanlist) 2114 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2115 pdev_priv_obj->cur_chan_list); 2116 2117 status = reg_send_scheduler_msg_sb(psoc, pdev); 2118 2119 return status; 2120 } 2121 2122 bool reg_get_en_chan_144(struct wlan_objmgr_pdev *pdev) 2123 { 2124 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2125 2126 pdev_priv_obj = reg_get_pdev_obj(pdev); 2127 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2128 reg_err("pdev reg component is NULL"); 2129 return false; 2130 } 2131 2132 return pdev_priv_obj->en_chan_144; 2133 } 2134 2135 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_get_hal_reg_cap( 2136 struct wlan_objmgr_psoc *psoc) 2137 { 2138 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2139 2140 psoc_priv_obj = reg_get_psoc_obj(psoc); 2141 2142 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2143 reg_err("psoc reg component is NULL"); 2144 return NULL; 2145 } 2146 2147 return psoc_priv_obj->reg_cap; 2148 } 2149 2150 QDF_STATUS reg_set_hal_reg_cap( 2151 struct wlan_objmgr_psoc *psoc, 2152 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap, 2153 uint16_t phy_cnt) 2154 { 2155 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2156 2157 psoc_priv_obj = reg_get_psoc_obj(psoc); 2158 2159 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2160 reg_err("psoc reg component is NULL"); 2161 return QDF_STATUS_E_FAILURE; 2162 } 2163 2164 if (phy_cnt > PSOC_MAX_PHY_REG_CAP) { 2165 reg_err("phy cnt:%d is more than %d", phy_cnt, 2166 PSOC_MAX_PHY_REG_CAP); 2167 return QDF_STATUS_E_FAILURE; 2168 } 2169 2170 qdf_mem_copy(psoc_priv_obj->reg_cap, reg_cap, 2171 phy_cnt * 2172 sizeof(struct wlan_psoc_host_hal_reg_capabilities_ext)); 2173 2174 return QDF_STATUS_SUCCESS; 2175 } 2176 2177 bool reg_chan_in_range(struct regulatory_channel *chan_list, 2178 uint32_t low_freq_2g, uint32_t high_freq_2g, 2179 uint32_t low_freq_5g, uint32_t high_freq_5g, 2180 enum channel_enum ch_enum) 2181 { 2182 uint32_t low_limit_2g = NUM_CHANNELS; 2183 uint32_t high_limit_2g = NUM_CHANNELS; 2184 uint32_t low_limit_5g = NUM_CHANNELS; 2185 uint32_t high_limit_5g = NUM_CHANNELS; 2186 bool chan_in_range; 2187 enum channel_enum chan_enum; 2188 uint16_t min_bw; 2189 uint32_t center_freq; 2190 2191 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2192 min_bw = chan_list[chan_enum].min_bw; 2193 center_freq = chan_list[chan_enum].center_freq; 2194 2195 if ((center_freq - min_bw / 2) >= low_freq_2g) { 2196 low_limit_2g = chan_enum; 2197 break; 2198 } 2199 } 2200 2201 for (chan_enum = 0; chan_enum < NUM_CHANNELS; chan_enum++) { 2202 min_bw = chan_list[chan_enum].min_bw; 2203 center_freq = chan_list[chan_enum].center_freq; 2204 2205 if ((center_freq - min_bw / 2) >= low_freq_5g) { 2206 low_limit_5g = chan_enum; 2207 break; 2208 } 2209 } 2210 2211 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2212 min_bw = chan_list[chan_enum].min_bw; 2213 center_freq = chan_list[chan_enum].center_freq; 2214 2215 if (center_freq + min_bw / 2 <= high_freq_2g) { 2216 high_limit_2g = chan_enum; 2217 break; 2218 } 2219 if (chan_enum == 0) 2220 break; 2221 } 2222 2223 for (chan_enum = NUM_CHANNELS - 1; chan_enum >= 0; chan_enum--) { 2224 min_bw = chan_list[chan_enum].min_bw; 2225 center_freq = chan_list[chan_enum].center_freq; 2226 2227 if (center_freq + min_bw / 2 <= high_freq_5g) { 2228 high_limit_5g = chan_enum; 2229 break; 2230 } 2231 if (chan_enum == 0) 2232 break; 2233 } 2234 2235 chan_in_range = false; 2236 if ((low_limit_2g <= ch_enum) && 2237 (high_limit_2g >= ch_enum) && 2238 (low_limit_2g != NUM_CHANNELS) && 2239 (high_limit_2g != NUM_CHANNELS)) 2240 chan_in_range = true; 2241 if ((low_limit_5g <= ch_enum) && 2242 (high_limit_5g >= ch_enum) && 2243 (low_limit_5g != NUM_CHANNELS) && 2244 (high_limit_5g != NUM_CHANNELS)) 2245 chan_in_range = true; 2246 2247 if (chan_in_range) 2248 return true; 2249 else 2250 return false; 2251 } 2252 2253 #ifdef CONFIG_CHAN_NUM_API 2254 void reg_update_nol_history_ch(struct wlan_objmgr_pdev *pdev, 2255 uint8_t *chan_list, uint8_t num_chan, 2256 bool nol_history_chan) 2257 { 2258 enum channel_enum chan_enum; 2259 struct regulatory_channel *mas_chan_list; 2260 struct regulatory_channel *cur_chan_list; 2261 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2262 uint16_t i; 2263 2264 if (!num_chan || !chan_list) { 2265 reg_err("chan_list or num_ch is NULL"); 2266 return; 2267 } 2268 2269 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 2270 pdev, WLAN_UMAC_COMP_REGULATORY); 2271 2272 if (!pdev_priv_obj) { 2273 reg_err("reg psoc private obj is NULL"); 2274 return; 2275 } 2276 2277 mas_chan_list = pdev_priv_obj->mas_chan_list; 2278 cur_chan_list = pdev_priv_obj->cur_chan_list; 2279 2280 for (i = 0; i < num_chan; i++) { 2281 chan_enum = reg_get_chan_enum(chan_list[i]); 2282 if (chan_enum == INVALID_CHANNEL) { 2283 reg_err("Invalid ch in nol list, chan %d", 2284 chan_list[i]); 2285 continue; 2286 } 2287 mas_chan_list[chan_enum].nol_history = nol_history_chan; 2288 cur_chan_list[chan_enum].nol_history = nol_history_chan; 2289 } 2290 } 2291 2292 bool reg_is_24ghz_ch(uint32_t chan) 2293 { 2294 return REG_IS_24GHZ_CH(chan); 2295 } 2296 2297 bool reg_is_5ghz_ch(uint32_t chan) 2298 { 2299 return REG_IS_5GHZ_CH(chan); 2300 } 2301 #endif /* CONFIG_CHAN_NUM_API */ 2302 2303 bool reg_is_24ghz_ch_freq(uint32_t freq) 2304 { 2305 return REG_IS_24GHZ_CH_FREQ(freq); 2306 } 2307 2308 bool reg_is_5ghz_ch_freq(uint32_t freq) 2309 { 2310 return REG_IS_5GHZ_FREQ(freq); 2311 } 2312 2313 /** 2314 * BAND_2G_PRESENT() - Check if REG_BAND_2G is set in the band_mask 2315 * @band_mask: Bitmask for bands 2316 * 2317 * Return: True if REG_BAND_2G is set in the band_mask, else false 2318 */ 2319 static inline bool BAND_2G_PRESENT(uint8_t band_mask) 2320 { 2321 return !!(band_mask & (BIT(REG_BAND_2G))); 2322 } 2323 2324 /** 2325 * BAND_5G_PRESENT() - Check if REG_BAND_5G is set in the band_mask 2326 * @band_mask: Bitmask for bands 2327 * 2328 * Return: True if REG_BAND_5G is set in the band_mask, else false 2329 */ 2330 static inline bool BAND_5G_PRESENT(uint8_t band_mask) 2331 { 2332 return !!(band_mask & (BIT(REG_BAND_5G))); 2333 } 2334 2335 #ifdef CONFIG_BAND_6GHZ 2336 bool reg_is_6ghz_chan_freq(uint16_t freq) 2337 { 2338 return REG_IS_6GHZ_FREQ(freq); 2339 } 2340 2341 uint16_t reg_min_6ghz_chan_freq(void) 2342 { 2343 return REG_MIN_6GHZ_CHAN_FREQ; 2344 } 2345 2346 uint16_t reg_max_6ghz_chan_freq(void) 2347 { 2348 return REG_MAX_6GHZ_CHAN_FREQ; 2349 } 2350 2351 bool reg_is_6ghz_psc_chan_freq(uint16_t freq) 2352 { 2353 uint8_t count; 2354 2355 if (!REG_IS_6GHZ_FREQ(freq)) { 2356 reg_debug(" Channel frequency is not a 6GHz frequency"); 2357 return false; 2358 } 2359 for (count = 1; count <= NUM_PSC_FREQ; count++) { 2360 if (count == 2361 (((freq - SIXG_STARTING_FREQ) + (FREQ_LEFT_SHIFT)) / 2362 (FREQ_TO_CHAN_SCALE * NUM_80MHZ_BAND_IN_6G))) 2363 return true; 2364 } 2365 reg_debug(" Channel frequency is not a 6GHz PSC frequency"); 2366 2367 return false; 2368 } 2369 2370 /** 2371 * BAND_6G_PRESENT() - Check if REG_BAND_6G is set in the band_mask 2372 * @band_mask: Bitmask for bands 2373 * 2374 * Return: True if REG_BAND_6G is set in the band_mask, else false 2375 */ 2376 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2377 { 2378 return !!(band_mask & (BIT(REG_BAND_6G))); 2379 } 2380 #else 2381 static inline bool BAND_6G_PRESENT(uint8_t band_mask) 2382 { 2383 return false; 2384 } 2385 #endif /* CONFIG_BAND_6GHZ */ 2386 2387 uint16_t 2388 reg_get_band_channel_list(struct wlan_objmgr_pdev *pdev, 2389 uint8_t band_mask, 2390 struct regulatory_channel *channel_list) 2391 { 2392 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2393 struct regulatory_channel *cur_chan_list; 2394 uint16_t i, num_channels = 0; 2395 2396 pdev_priv_obj = reg_get_pdev_obj(pdev); 2397 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2398 reg_err("reg pdev priv obj is NULL"); 2399 return 0; 2400 } 2401 2402 cur_chan_list = pdev_priv_obj->cur_chan_list; 2403 2404 if (BAND_2G_PRESENT(band_mask)) { 2405 for (i = MIN_24GHZ_CHANNEL; i <= MAX_24GHZ_CHANNEL; i++) { 2406 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2407 !(cur_chan_list[i].chan_flags & 2408 REGULATORY_CHAN_DISABLED)) { 2409 channel_list[num_channels] = cur_chan_list[i]; 2410 num_channels++; 2411 } 2412 } 2413 } 2414 if (BAND_5G_PRESENT(band_mask)) { 2415 for (i = MIN_49GHZ_CHANNEL; i <= MAX_5GHZ_CHANNEL; i++) { 2416 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2417 !(cur_chan_list[i].chan_flags & 2418 REGULATORY_CHAN_DISABLED)) { 2419 channel_list[num_channels] = cur_chan_list[i]; 2420 num_channels++; 2421 } 2422 } 2423 } 2424 if (BAND_6G_PRESENT(band_mask)) { 2425 for (i = MIN_6GHZ_CHANNEL; i <= MAX_6GHZ_CHANNEL; i++) { 2426 if ((cur_chan_list[i].state != CHANNEL_STATE_DISABLE) && 2427 !(cur_chan_list[i].chan_flags & 2428 REGULATORY_CHAN_DISABLED)) { 2429 channel_list[num_channels] = cur_chan_list[i]; 2430 num_channels++; 2431 } 2432 } 2433 } 2434 2435 if (!num_channels) { 2436 reg_err("Failed to retrieve the channel list"); 2437 return 0; 2438 } 2439 2440 return num_channels; 2441 } 2442 2443 uint16_t reg_chan_band_to_freq(struct wlan_objmgr_pdev *pdev, 2444 uint8_t chan_num, 2445 uint8_t band_mask) 2446 { 2447 enum channel_enum min_chan, max_chan; 2448 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2449 uint16_t freq; 2450 2451 pdev_priv_obj = reg_get_pdev_obj(pdev); 2452 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2453 reg_err("reg pdev priv obj is NULL"); 2454 return 0; 2455 } 2456 2457 if (BAND_6G_PRESENT(band_mask)) { 2458 if (BAND_2G_PRESENT(band_mask) || 2459 BAND_5G_PRESENT(band_mask)) { 2460 reg_err("Incorrect band_mask %x", band_mask); 2461 return 0; 2462 } 2463 2464 min_chan = MIN_6GHZ_CHANNEL; 2465 max_chan = MAX_6GHZ_CHANNEL; 2466 return reg_compute_chan_to_freq(pdev, chan_num, 2467 min_chan, 2468 max_chan); 2469 } else { 2470 if (BAND_2G_PRESENT(band_mask)) { 2471 min_chan = MIN_24GHZ_CHANNEL; 2472 max_chan = MAX_24GHZ_CHANNEL; 2473 freq = reg_compute_chan_to_freq(pdev, chan_num, 2474 min_chan, 2475 max_chan); 2476 if (freq != 0) 2477 return freq; 2478 } 2479 2480 if (BAND_5G_PRESENT(band_mask)) { 2481 min_chan = MIN_49GHZ_CHANNEL; 2482 max_chan = MAX_5GHZ_CHANNEL; 2483 2484 return reg_compute_chan_to_freq(pdev, chan_num, 2485 min_chan, 2486 max_chan); 2487 } 2488 2489 reg_err("Incorrect band_mask %x", band_mask); 2490 return 0; 2491 } 2492 } 2493 2494 bool reg_is_49ghz_freq(uint32_t freq) 2495 { 2496 return REG_IS_49GHZ_FREQ(freq); 2497 } 2498 2499 uint32_t reg_ch_num(uint32_t ch_enum) 2500 { 2501 return REG_CH_NUM(ch_enum); 2502 } 2503 2504 uint32_t reg_ch_to_freq(uint32_t ch_enum) 2505 { 2506 return REG_CH_TO_FREQ(ch_enum); 2507 } 2508 2509 #ifdef CONFIG_CHAN_NUM_API 2510 bool reg_is_same_band_channels(uint32_t chan_num1, uint32_t chan_num2) 2511 { 2512 return (chan_num1 && chan_num2 && 2513 (REG_IS_5GHZ_CH(chan_num1) == REG_IS_5GHZ_CH(chan_num2))); 2514 } 2515 2516 bool reg_is_channel_valid_5g_sbs(uint32_t curchan, uint32_t newchan) 2517 { 2518 return REG_IS_CHANNEL_VALID_5G_SBS(curchan, newchan); 2519 } 2520 2521 uint32_t reg_min_24ghz_ch_num(void) 2522 { 2523 return REG_MIN_24GHZ_CH_NUM; 2524 } 2525 2526 uint32_t reg_max_24ghz_ch_num(void) 2527 { 2528 return REG_MAX_24GHZ_CH_NUM; 2529 } 2530 2531 uint32_t reg_min_5ghz_ch_num(void) 2532 { 2533 return REG_MIN_5GHZ_CH_NUM; 2534 } 2535 2536 uint32_t reg_max_5ghz_ch_num(void) 2537 { 2538 return REG_MAX_5GHZ_CH_NUM; 2539 } 2540 #endif /* CONFIG_CHAN_NUM_API */ 2541 2542 #ifdef CONFIG_CHAN_FREQ_API 2543 uint16_t reg_min_24ghz_chan_freq(void) 2544 { 2545 return REG_MIN_24GHZ_CH_FREQ; 2546 } 2547 2548 uint16_t reg_max_24ghz_chan_freq(void) 2549 { 2550 return REG_MAX_24GHZ_CH_FREQ; 2551 } 2552 2553 uint16_t reg_min_5ghz_chan_freq(void) 2554 { 2555 return REG_MIN_5GHZ_CH_FREQ; 2556 } 2557 2558 uint16_t reg_max_5ghz_chan_freq(void) 2559 { 2560 return REG_MAX_5GHZ_CH_FREQ; 2561 } 2562 #endif /* CONFIG_CHAN_FREQ_API */ 2563 2564 QDF_STATUS reg_enable_dfs_channels(struct wlan_objmgr_pdev *pdev, 2565 bool enable) 2566 { 2567 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2568 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2569 struct wlan_objmgr_psoc *psoc; 2570 QDF_STATUS status; 2571 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2572 2573 pdev_priv_obj = reg_get_pdev_obj(pdev); 2574 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2575 reg_err("pdev reg component is NULL"); 2576 return QDF_STATUS_E_INVAL; 2577 } 2578 2579 if (pdev_priv_obj->dfs_enabled == enable) { 2580 reg_info("dfs_enabled is already set to %d", enable); 2581 return QDF_STATUS_SUCCESS; 2582 } 2583 2584 psoc = wlan_pdev_get_psoc(pdev); 2585 if (!psoc) { 2586 reg_err("psoc is NULL"); 2587 return QDF_STATUS_E_INVAL; 2588 } 2589 2590 psoc_priv_obj = reg_get_psoc_obj(psoc); 2591 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2592 reg_err("psoc reg component is NULL"); 2593 return QDF_STATUS_E_INVAL; 2594 } 2595 2596 reg_info("setting dfs_enabled: %d", enable); 2597 2598 pdev_priv_obj->dfs_enabled = enable; 2599 2600 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2601 2602 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2603 2604 /* Fill the ic channel list with the updated current channel 2605 * chan list. 2606 */ 2607 if (reg_tx_ops->fill_umac_legacy_chanlist) 2608 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2609 pdev_priv_obj->cur_chan_list); 2610 2611 status = reg_send_scheduler_msg_sb(psoc, pdev); 2612 2613 return status; 2614 } 2615 2616 bool reg_is_regdmn_en302502_applicable(struct wlan_objmgr_pdev *pdev) 2617 { 2618 struct cur_regdmn_info cur_reg_dmn; 2619 QDF_STATUS status; 2620 2621 status = reg_get_curr_regdomain(pdev, &cur_reg_dmn); 2622 if (status != QDF_STATUS_SUCCESS) { 2623 reg_err("Failed to get reg domain"); 2624 return false; 2625 } 2626 2627 return reg_en302_502_regdmn(cur_reg_dmn.regdmn_pair_id); 2628 } 2629 2630 QDF_STATUS reg_modify_pdev_chan_range(struct wlan_objmgr_pdev *pdev) 2631 { 2632 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2633 struct wlan_regulatory_psoc_priv_obj *psoc_priv_obj; 2634 struct wlan_objmgr_psoc *psoc; 2635 struct wlan_lmac_if_reg_tx_ops *reg_tx_ops; 2636 struct wlan_psoc_host_hal_reg_capabilities_ext *reg_cap_ptr; 2637 uint32_t cnt; 2638 uint32_t pdev_id; 2639 enum direction dir; 2640 QDF_STATUS status = QDF_STATUS_SUCCESS; 2641 2642 pdev_id = wlan_objmgr_pdev_get_pdev_id(pdev); 2643 pdev_priv_obj = reg_get_pdev_obj(pdev); 2644 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2645 reg_err("pdev reg component is NULL"); 2646 return QDF_STATUS_E_INVAL; 2647 } 2648 2649 psoc = wlan_pdev_get_psoc(pdev); 2650 if (!psoc) { 2651 reg_err("psoc is NULL"); 2652 return QDF_STATUS_E_INVAL; 2653 } 2654 2655 psoc_priv_obj = reg_get_psoc_obj(psoc); 2656 if (!IS_VALID_PSOC_REG_OBJ(psoc_priv_obj)) { 2657 reg_err("psoc reg component is NULL"); 2658 return QDF_STATUS_E_INVAL; 2659 } 2660 2661 reg_cap_ptr = psoc_priv_obj->reg_cap; 2662 2663 for (cnt = 0; cnt < PSOC_MAX_PHY_REG_CAP; cnt++) { 2664 if (!reg_cap_ptr) { 2665 qdf_mem_free(pdev_priv_obj); 2666 reg_err("reg cap ptr is NULL"); 2667 return QDF_STATUS_E_FAULT; 2668 } 2669 2670 if (reg_cap_ptr->phy_id == pdev_id) 2671 break; 2672 reg_cap_ptr++; 2673 } 2674 2675 if (cnt == PSOC_MAX_PHY_REG_CAP) { 2676 qdf_mem_free(pdev_priv_obj); 2677 reg_err("extended capabilities not found for pdev"); 2678 return QDF_STATUS_E_FAULT; 2679 } 2680 2681 if (psoc_priv_obj->offload_enabled) { 2682 dir = NORTHBOUND; 2683 } else { 2684 dir = SOUTHBOUND; 2685 } 2686 2687 pdev_priv_obj->range_2g_low = reg_cap_ptr->low_2ghz_chan; 2688 pdev_priv_obj->range_2g_high = reg_cap_ptr->high_2ghz_chan; 2689 pdev_priv_obj->range_5g_low = reg_cap_ptr->low_5ghz_chan; 2690 pdev_priv_obj->range_5g_high = reg_cap_ptr->high_5ghz_chan; 2691 pdev_priv_obj->wireless_modes = reg_cap_ptr->wireless_modes; 2692 2693 reg_compute_pdev_current_chan_list(pdev_priv_obj); 2694 2695 reg_tx_ops = reg_get_psoc_tx_ops(psoc); 2696 2697 /* Fill the ic channel list with the updated current channel 2698 * chan list. 2699 */ 2700 if (reg_tx_ops->fill_umac_legacy_chanlist) { 2701 reg_tx_ops->fill_umac_legacy_chanlist(pdev, 2702 pdev_priv_obj->cur_chan_list); 2703 2704 } else { 2705 if (dir == NORTHBOUND) 2706 status = reg_send_scheduler_msg_nb(psoc, pdev); 2707 else 2708 status = reg_send_scheduler_msg_sb(psoc, pdev); 2709 } 2710 2711 return status; 2712 } 2713 2714 #ifdef CONFIG_CHAN_FREQ_API 2715 QDF_STATUS reg_get_channel_list_with_power_for_freq(struct wlan_objmgr_pdev 2716 *pdev, 2717 struct channel_power 2718 *ch_list, 2719 uint8_t *num_chan) 2720 { 2721 int i, count; 2722 struct regulatory_channel *reg_channels; 2723 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2724 2725 if (!num_chan || !ch_list) { 2726 reg_err("chan_list or num_ch is NULL"); 2727 return QDF_STATUS_E_FAILURE; 2728 } 2729 2730 pdev_priv_obj = reg_get_pdev_obj(pdev); 2731 2732 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2733 reg_err("reg pdev priv obj is NULL"); 2734 return QDF_STATUS_E_FAILURE; 2735 } 2736 2737 /* set the current channel list */ 2738 reg_channels = pdev_priv_obj->cur_chan_list; 2739 2740 for (i = 0, count = 0; i < NUM_CHANNELS; i++) { 2741 if (reg_channels[i].state && 2742 !(reg_channels[i].chan_flags & REGULATORY_CHAN_DISABLED)) { 2743 ch_list[count].center_freq = 2744 reg_channels[i].center_freq; 2745 ch_list[count++].tx_power = 2746 reg_channels[i].tx_power; 2747 } 2748 } 2749 2750 *num_chan = count; 2751 2752 return QDF_STATUS_SUCCESS; 2753 } 2754 2755 enum channel_enum reg_get_chan_enum_for_freq(uint16_t freq) 2756 { 2757 uint32_t count; 2758 2759 for (count = 0; count < NUM_CHANNELS; count++) 2760 if (channel_map[count].center_freq == freq) 2761 return count; 2762 2763 reg_err("invalid channel center frequency %d", freq); 2764 2765 return INVALID_CHANNEL; 2766 } 2767 2768 enum channel_state reg_get_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2769 uint16_t freq) 2770 { 2771 enum channel_enum ch_idx; 2772 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2773 2774 ch_idx = reg_get_chan_enum_for_freq(freq); 2775 2776 if (ch_idx == INVALID_CHANNEL) 2777 return CHANNEL_STATE_INVALID; 2778 2779 pdev_priv_obj = reg_get_pdev_obj(pdev); 2780 2781 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2782 reg_err("pdev reg obj is NULL"); 2783 return CHANNEL_STATE_INVALID; 2784 } 2785 2786 return pdev_priv_obj->cur_chan_list[ch_idx].state; 2787 } 2788 2789 /** 2790 * reg_get_5g_bonded_chan_array_for_freq()- Return the channel state for a 2791 * 5G or 6G channel frequency based on the bonded channel. 2792 * @pdev: Pointer to pdev. 2793 * @freq: Channel center frequency. 2794 * @bonded_chan_ar: Array of bonded channel frequencies. 2795 * @array_size: Array size. 2796 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2797 * 2798 * Return: Channel State 2799 */ 2800 static enum channel_state 2801 reg_get_5g_bonded_chan_array_for_freq(struct wlan_objmgr_pdev *pdev, 2802 uint16_t freq, 2803 const struct bonded_channel_freq 2804 bonded_chan_ar[], 2805 uint16_t array_size, 2806 const struct bonded_channel_freq 2807 **bonded_chan_ptr_ptr) 2808 { 2809 int i; 2810 uint16_t chan_cfreq; 2811 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2812 enum channel_state chan_state = CHANNEL_STATE_INVALID; 2813 enum channel_state temp_chan_state; 2814 2815 for (i = 0; i < array_size; i++) { 2816 if ((freq >= bonded_chan_ar[i].start_freq) && 2817 (freq <= bonded_chan_ar[i].end_freq)) { 2818 bonded_chan_ptr = &bonded_chan_ar[i]; 2819 break; 2820 } 2821 } 2822 2823 if (!bonded_chan_ptr) 2824 return chan_state; 2825 2826 *bonded_chan_ptr_ptr = bonded_chan_ptr; 2827 chan_cfreq = bonded_chan_ptr->start_freq; 2828 while (chan_cfreq <= bonded_chan_ptr->end_freq) { 2829 temp_chan_state = reg_get_channel_state_for_freq(pdev, 2830 chan_cfreq); 2831 if (temp_chan_state < chan_state) 2832 chan_state = temp_chan_state; 2833 chan_cfreq = chan_cfreq + 20; 2834 } 2835 2836 return chan_state; 2837 } 2838 2839 /** 2840 * reg_get_5g_bonded_channel_for_freq()- Return the channel state for a 2841 * 5G or 6G channel frequency based on the channel width and bonded channel 2842 * @pdev: Pointer to pdev. 2843 * @freq: Channel center frequency. 2844 * @ch_width: Channel Width. 2845 * @bonded_chan_ptr_ptr: Pointer to bonded_channel_freq. 2846 * 2847 * Return: Channel State 2848 */ 2849 static enum channel_state 2850 reg_get_5g_bonded_channel_for_freq(struct wlan_objmgr_pdev *pdev, 2851 uint16_t freq, 2852 enum phy_ch_width ch_width, 2853 const struct bonded_channel_freq 2854 **bonded_chan_ptr_ptr) 2855 2856 { 2857 if (ch_width == CH_WIDTH_80P80MHZ) 2858 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2859 bonded_chan_80mhz_list_freq, 2860 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2861 bonded_chan_ptr_ptr); 2862 else if (ch_width == CH_WIDTH_160MHZ) 2863 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2864 bonded_chan_160mhz_list_freq, 2865 QDF_ARRAY_SIZE(bonded_chan_160mhz_list_freq), 2866 bonded_chan_ptr_ptr); 2867 else if (ch_width == CH_WIDTH_80MHZ) 2868 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2869 bonded_chan_80mhz_list_freq, 2870 QDF_ARRAY_SIZE(bonded_chan_80mhz_list_freq), 2871 bonded_chan_ptr_ptr); 2872 else if (ch_width == CH_WIDTH_40MHZ) 2873 return reg_get_5g_bonded_chan_array_for_freq(pdev, freq, 2874 bonded_chan_40mhz_list_freq, 2875 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 2876 bonded_chan_ptr_ptr); 2877 else 2878 return reg_get_channel_state_for_freq(pdev, freq); 2879 } 2880 2881 enum channel_state 2882 reg_get_5g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2883 uint16_t freq, 2884 enum phy_ch_width bw) 2885 { 2886 enum channel_enum ch_indx; 2887 enum channel_state chan_state; 2888 struct regulatory_channel *reg_channels; 2889 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2890 bool bw_enabled = false; 2891 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 2892 2893 if (bw > CH_WIDTH_80P80MHZ) { 2894 reg_err("bw passed is not good"); 2895 return CHANNEL_STATE_INVALID; 2896 } 2897 2898 chan_state = reg_get_5g_bonded_channel_for_freq(pdev, freq, bw, 2899 &bonded_chan_ptr); 2900 2901 if ((chan_state == CHANNEL_STATE_INVALID) || 2902 (chan_state == CHANNEL_STATE_DISABLE)) 2903 return chan_state; 2904 2905 pdev_priv_obj = reg_get_pdev_obj(pdev); 2906 2907 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2908 reg_err("pdev reg obj is NULL"); 2909 return CHANNEL_STATE_INVALID; 2910 } 2911 reg_channels = pdev_priv_obj->cur_chan_list; 2912 2913 ch_indx = reg_get_chan_enum_for_freq(freq); 2914 if (ch_indx == INVALID_CHANNEL) 2915 return CHANNEL_STATE_INVALID; 2916 if (bw == CH_WIDTH_5MHZ) 2917 bw_enabled = true; 2918 else if (bw == CH_WIDTH_10MHZ) 2919 bw_enabled = (reg_channels[ch_indx].min_bw <= 10) && 2920 (reg_channels[ch_indx].max_bw >= 10); 2921 else if (bw == CH_WIDTH_20MHZ) 2922 bw_enabled = (reg_channels[ch_indx].min_bw <= 20) && 2923 (reg_channels[ch_indx].max_bw >= 20); 2924 else if (bw == CH_WIDTH_40MHZ) 2925 bw_enabled = (reg_channels[ch_indx].min_bw <= 40) && 2926 (reg_channels[ch_indx].max_bw >= 40); 2927 else if (bw == CH_WIDTH_80MHZ) 2928 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 2929 (reg_channels[ch_indx].max_bw >= 80); 2930 else if (bw == CH_WIDTH_160MHZ) 2931 bw_enabled = (reg_channels[ch_indx].min_bw <= 160) && 2932 (reg_channels[ch_indx].max_bw >= 160); 2933 else if (bw == CH_WIDTH_80P80MHZ) 2934 bw_enabled = (reg_channels[ch_indx].min_bw <= 80) && 2935 (reg_channels[ch_indx].max_bw >= 80); 2936 2937 if (bw_enabled) 2938 return chan_state; 2939 else 2940 return CHANNEL_STATE_DISABLE; 2941 } 2942 2943 enum channel_state 2944 reg_get_2g_bonded_channel_state_for_freq(struct wlan_objmgr_pdev *pdev, 2945 uint16_t oper_ch_freq, 2946 uint16_t sec_ch_freq, 2947 enum phy_ch_width bw) 2948 { 2949 enum channel_enum chan_idx; 2950 enum channel_state chan_state; 2951 struct regulatory_channel *reg_channels; 2952 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 2953 bool bw_enabled = false; 2954 enum channel_state chan_state2 = CHANNEL_STATE_INVALID; 2955 2956 if (bw > CH_WIDTH_40MHZ) 2957 return CHANNEL_STATE_INVALID; 2958 2959 if (bw == CH_WIDTH_40MHZ) { 2960 if ((sec_ch_freq + 20 != oper_ch_freq) && 2961 (oper_ch_freq + 20 != sec_ch_freq)) 2962 return CHANNEL_STATE_INVALID; 2963 chan_state2 = reg_get_channel_state_for_freq(pdev, sec_ch_freq); 2964 if (chan_state2 == CHANNEL_STATE_INVALID) 2965 return chan_state2; 2966 } 2967 2968 pdev_priv_obj = reg_get_pdev_obj(pdev); 2969 2970 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 2971 reg_err("reg pdev priv obj is NULL"); 2972 return CHANNEL_STATE_INVALID; 2973 } 2974 2975 reg_channels = pdev_priv_obj->cur_chan_list; 2976 2977 chan_state = reg_get_channel_state_for_freq(pdev, oper_ch_freq); 2978 if (chan_state2 < chan_state) 2979 chan_state = chan_state2; 2980 2981 if ((chan_state == CHANNEL_STATE_INVALID) || 2982 (chan_state == CHANNEL_STATE_DISABLE)) 2983 return chan_state; 2984 2985 chan_idx = reg_get_chan_enum_for_freq(oper_ch_freq); 2986 if (chan_idx == INVALID_CHANNEL) 2987 return CHANNEL_STATE_INVALID; 2988 if (bw == CH_WIDTH_5MHZ) 2989 bw_enabled = true; 2990 else if (bw == CH_WIDTH_10MHZ) 2991 bw_enabled = (reg_channels[chan_idx].min_bw <= 10) && 2992 (reg_channels[chan_idx].max_bw >= 10); 2993 else if (bw == CH_WIDTH_20MHZ) 2994 bw_enabled = (reg_channels[chan_idx].min_bw <= 20) && 2995 (reg_channels[chan_idx].max_bw >= 20); 2996 else if (bw == CH_WIDTH_40MHZ) 2997 bw_enabled = (reg_channels[chan_idx].min_bw <= 40) && 2998 (reg_channels[chan_idx].max_bw >= 40); 2999 3000 if (bw_enabled) 3001 return chan_state; 3002 else 3003 return CHANNEL_STATE_DISABLE; 3004 3005 return CHANNEL_STATE_ENABLE; 3006 } 3007 3008 /** 3009 * reg_set_5g_channel_params_for_freq()- Set channel parameters like center 3010 * frequency for a bonded channel state. Also return the maximum bandwidth 3011 * supported by the channel. 3012 * @pdev: Pointer to pdev. 3013 * @freq: Channel center frequency. 3014 * ch_params: Pointer to ch_params. 3015 * 3016 * Return: void 3017 */ 3018 static void reg_set_5g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3019 uint16_t freq, 3020 struct ch_params *ch_params) 3021 { 3022 /* 3023 * Set channel parameters like center frequency for a bonded channel 3024 * state. Also return the maximum bandwidth supported by the channel. 3025 */ 3026 3027 enum phy_ch_width next_lower_bw; 3028 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3029 enum channel_state chan_state2 = CHANNEL_STATE_ENABLE; 3030 const struct bonded_channel_freq *bonded_chan_ptr = NULL; 3031 const struct bonded_channel_freq *bonded_chan_ptr2 = NULL; 3032 3033 if (!ch_params) { 3034 reg_err("ch_params is NULL"); 3035 return; 3036 } 3037 3038 if (ch_params->ch_width >= CH_WIDTH_MAX) { 3039 if (ch_params->mhz_freq_seg1 != 0) 3040 ch_params->ch_width = CH_WIDTH_80P80MHZ; 3041 else 3042 ch_params->ch_width = CH_WIDTH_160MHZ; 3043 } 3044 next_lower_bw = ch_params->ch_width; 3045 3046 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3047 ch_params->ch_width = next_lower_bw; 3048 next_lower_bw = get_next_lower_bw[ch_params->ch_width]; 3049 bonded_chan_ptr = NULL; 3050 bonded_chan_ptr2 = NULL; 3051 chan_state = reg_get_5g_bonded_channel_for_freq( 3052 pdev, freq, ch_params->ch_width, 3053 &bonded_chan_ptr); 3054 3055 chan_state = reg_get_5g_bonded_channel_state_for_freq( 3056 pdev, freq, ch_params->ch_width); 3057 3058 if (ch_params->ch_width == CH_WIDTH_80P80MHZ) { 3059 chan_state2 = reg_get_5g_bonded_channel_state_for_freq( 3060 pdev, ch_params->mhz_freq_seg1 - 3061 NEAREST_20MHZ_CHAN_FREQ_OFFSET, 3062 CH_WIDTH_80MHZ); 3063 3064 chan_state = reg_combine_channel_states( 3065 chan_state, chan_state2); 3066 } 3067 3068 if ((chan_state != CHANNEL_STATE_ENABLE) && 3069 (chan_state != CHANNEL_STATE_DFS)) 3070 continue; 3071 if (ch_params->ch_width <= CH_WIDTH_20MHZ) { 3072 ch_params->sec_ch_offset = NO_SEC_CH; 3073 ch_params->mhz_freq_seg0 = freq; 3074 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3075 ch_params->center_freq_seg0 = 3076 (ch_params->mhz_freq_seg0 - 3077 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3078 else 3079 ch_params->center_freq_seg0 = 3080 (ch_params->mhz_freq_seg0 - 3081 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3082 break; 3083 } else if (ch_params->ch_width >= CH_WIDTH_40MHZ) { 3084 reg_get_5g_bonded_chan_array_for_freq( 3085 pdev, freq, bonded_chan_40mhz_list_freq, 3086 QDF_ARRAY_SIZE(bonded_chan_40mhz_list_freq), 3087 &bonded_chan_ptr2); 3088 if (!bonded_chan_ptr || !bonded_chan_ptr2) 3089 continue; 3090 if (freq == bonded_chan_ptr2->start_freq) 3091 ch_params->sec_ch_offset = LOW_PRIMARY_CH; 3092 else 3093 ch_params->sec_ch_offset = HIGH_PRIMARY_CH; 3094 3095 ch_params->mhz_freq_seg0 = 3096 (bonded_chan_ptr->start_freq + 3097 bonded_chan_ptr->end_freq) / 2; 3098 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3099 ch_params->center_freq_seg0 = 3100 (ch_params->mhz_freq_seg0 - 3101 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3102 else 3103 ch_params->center_freq_seg0 = 3104 (ch_params->mhz_freq_seg0 - 3105 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3106 break; 3107 } 3108 } 3109 3110 if (ch_params->ch_width == CH_WIDTH_160MHZ) { 3111 ch_params->mhz_freq_seg1 = ch_params->mhz_freq_seg0; 3112 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg1)) 3113 ch_params->center_freq_seg1 = 3114 (ch_params->mhz_freq_seg1 - SIXG_STARTING_FREQ) / 3115 FREQ_TO_CHAN_SCALE; 3116 else 3117 ch_params->center_freq_seg1 = 3118 (ch_params->mhz_freq_seg1 - FIVEG_STARTING_FREQ) / 3119 FREQ_TO_CHAN_SCALE; 3120 chan_state = reg_get_5g_bonded_channel_for_freq( 3121 pdev, freq, CH_WIDTH_80MHZ, &bonded_chan_ptr); 3122 if (bonded_chan_ptr) { 3123 ch_params->mhz_freq_seg0 = 3124 (bonded_chan_ptr->start_freq + 3125 bonded_chan_ptr->end_freq) / 2; 3126 if (reg_is_6ghz_chan_freq(ch_params->mhz_freq_seg0)) 3127 ch_params->center_freq_seg0 = 3128 (ch_params->mhz_freq_seg0 - 3129 SIXG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3130 else 3131 ch_params->center_freq_seg0 = 3132 (ch_params->mhz_freq_seg0 - 3133 FIVEG_STARTING_FREQ) / FREQ_TO_CHAN_SCALE; 3134 } 3135 } 3136 3137 /* Overwrite mhz_freq_seg1 to 0 for non 160 and 80+80 width */ 3138 if (!(ch_params->ch_width == CH_WIDTH_160MHZ || 3139 ch_params->ch_width == CH_WIDTH_80P80MHZ)) { 3140 ch_params->mhz_freq_seg1 = 0; 3141 ch_params->center_freq_seg1 = 0; 3142 } 3143 } 3144 3145 /** 3146 * reg_set_2g_channel_params_for_freq() - set the 2.4G bonded channel parameters 3147 * @oper_freq: operating channel 3148 * @ch_params: channel parameters 3149 * @sec_ch_2g_freq: 2.4G secondary channel 3150 * 3151 * Return: void 3152 */ 3153 static void reg_set_2g_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3154 uint16_t oper_freq, 3155 struct ch_params *ch_params, 3156 uint16_t sec_ch_2g_freq) 3157 { 3158 enum channel_state chan_state = CHANNEL_STATE_ENABLE; 3159 3160 if (ch_params->ch_width >= CH_WIDTH_MAX) 3161 ch_params->ch_width = CH_WIDTH_40MHZ; 3162 if ((reg_get_bw_value(ch_params->ch_width) > 20) && !sec_ch_2g_freq) { 3163 if (oper_freq >= TWOG_CHAN_1_IN_MHZ && oper_freq <= 3164 TWOG_CHAN_5_IN_MHZ) 3165 sec_ch_2g_freq = oper_freq + 20; 3166 else if (oper_freq >= TWOG_CHAN_6_IN_MHZ && oper_freq <= 3167 TWOG_CHAN_13_IN_MHZ) 3168 sec_ch_2g_freq = oper_freq - 20; 3169 } 3170 3171 while (ch_params->ch_width != CH_WIDTH_INVALID) { 3172 chan_state = 3173 reg_get_2g_bonded_channel_state_for_freq(pdev, oper_freq, 3174 sec_ch_2g_freq, 3175 ch_params->ch_width); 3176 if (chan_state == CHANNEL_STATE_ENABLE) { 3177 if (ch_params->ch_width == CH_WIDTH_40MHZ) { 3178 if (oper_freq < sec_ch_2g_freq) 3179 ch_params->sec_ch_offset = 3180 LOW_PRIMARY_CH; 3181 else 3182 ch_params->sec_ch_offset = 3183 HIGH_PRIMARY_CH; 3184 ch_params->mhz_freq_seg0 = 3185 (oper_freq + sec_ch_2g_freq) / 2; 3186 if (ch_params->mhz_freq_seg0 == 3187 TWOG_CHAN_14_IN_MHZ) 3188 ch_params->center_freq_seg0 = 14; 3189 else 3190 ch_params->center_freq_seg0 = 3191 (ch_params->mhz_freq_seg0 - 3192 TWOG_STARTING_FREQ) / 3193 FREQ_TO_CHAN_SCALE; 3194 } else { 3195 ch_params->sec_ch_offset = NO_SEC_CH; 3196 ch_params->mhz_freq_seg0 = oper_freq; 3197 if (ch_params->mhz_freq_seg0 == 3198 TWOG_CHAN_14_IN_MHZ) 3199 ch_params->center_freq_seg0 = 14; 3200 else 3201 ch_params->center_freq_seg0 = 3202 (ch_params->mhz_freq_seg0 - 3203 TWOG_STARTING_FREQ) / 3204 FREQ_TO_CHAN_SCALE; 3205 } 3206 break; 3207 } 3208 3209 ch_params->ch_width = get_next_lower_bw[ch_params->ch_width]; 3210 } 3211 /* Overwrite mhz_freq_seg1 and center_freq_seg1 to 0 for 2.4 Ghz */ 3212 ch_params->mhz_freq_seg1 = 0; 3213 ch_params->center_freq_seg1 = 0; 3214 } 3215 3216 void reg_set_channel_params_for_freq(struct wlan_objmgr_pdev *pdev, 3217 uint16_t freq, 3218 uint16_t sec_ch_2g_freq, 3219 struct ch_params *ch_params) 3220 { 3221 if (reg_is_5ghz_ch_freq(freq) || reg_is_6ghz_chan_freq(freq)) 3222 reg_set_5g_channel_params_for_freq(pdev, freq, ch_params); 3223 else if (reg_is_24ghz_ch_freq(freq)) 3224 reg_set_2g_channel_params_for_freq(pdev, freq, ch_params, 3225 sec_ch_2g_freq); 3226 } 3227 3228 uint8_t reg_get_channel_reg_power_for_freq(struct wlan_objmgr_pdev *pdev, 3229 uint16_t freq) 3230 { 3231 enum channel_enum chan_enum; 3232 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3233 struct regulatory_channel *reg_channels; 3234 3235 chan_enum = reg_get_chan_enum_for_freq(freq); 3236 3237 if (chan_enum == INVALID_CHANNEL) { 3238 reg_err("channel is invalid"); 3239 return QDF_STATUS_E_FAILURE; 3240 } 3241 3242 pdev_priv_obj = reg_get_pdev_obj(pdev); 3243 3244 if (!IS_VALID_PDEV_REG_OBJ(pdev_priv_obj)) { 3245 reg_err("reg pdev priv obj is NULL"); 3246 return QDF_STATUS_E_FAILURE; 3247 } 3248 3249 reg_channels = pdev_priv_obj->cur_chan_list; 3250 3251 return reg_channels[chan_enum].tx_power; 3252 } 3253 3254 bool reg_is_dfs_for_freq(struct wlan_objmgr_pdev *pdev, uint16_t freq) 3255 { 3256 enum channel_state ch_state; 3257 3258 ch_state = reg_get_channel_state_for_freq(pdev, freq); 3259 3260 return ch_state == CHANNEL_STATE_DFS; 3261 } 3262 3263 void reg_update_nol_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3264 uint16_t *chan_freq_list, 3265 uint8_t num_chan, 3266 bool nol_chan) 3267 { 3268 enum channel_enum chan_enum; 3269 struct regulatory_channel *mas_chan_list; 3270 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3271 uint16_t i; 3272 3273 if (!num_chan || !chan_freq_list) { 3274 reg_err("chan_freq_list or num_ch is NULL"); 3275 return; 3276 } 3277 3278 pdev_priv_obj = reg_get_pdev_obj(pdev); 3279 if (!pdev_priv_obj) { 3280 reg_err("reg psoc private obj is NULL"); 3281 return; 3282 } 3283 3284 mas_chan_list = pdev_priv_obj->mas_chan_list; 3285 for (i = 0; i < num_chan; i++) { 3286 chan_enum = reg_get_chan_enum_for_freq(chan_freq_list[i]); 3287 if (chan_enum == INVALID_CHANNEL) { 3288 reg_err("Invalid freq in nol list, freq %d", 3289 chan_freq_list[i]); 3290 continue; 3291 } 3292 mas_chan_list[chan_enum].nol_chan = nol_chan; 3293 } 3294 3295 reg_compute_pdev_current_chan_list(pdev_priv_obj); 3296 } 3297 3298 void reg_update_nol_history_ch_for_freq(struct wlan_objmgr_pdev *pdev, 3299 uint16_t *chan_list, 3300 uint8_t num_chan, 3301 bool nol_history_chan) 3302 { 3303 enum channel_enum chan_enum; 3304 struct regulatory_channel *mas_chan_list; 3305 struct regulatory_channel *cur_chan_list; 3306 struct wlan_regulatory_pdev_priv_obj *pdev_priv_obj; 3307 uint16_t i; 3308 3309 if (!num_chan || !chan_list) { 3310 reg_err("chan_list or num_ch is NULL"); 3311 return; 3312 } 3313 3314 pdev_priv_obj = wlan_objmgr_pdev_get_comp_private_obj( 3315 pdev, WLAN_UMAC_COMP_REGULATORY); 3316 3317 if (!pdev_priv_obj) { 3318 reg_err("reg psoc private obj is NULL"); 3319 return; 3320 } 3321 3322 mas_chan_list = pdev_priv_obj->mas_chan_list; 3323 cur_chan_list = pdev_priv_obj->cur_chan_list; 3324 3325 for (i = 0; i < num_chan; i++) { 3326 chan_enum = reg_get_chan_enum_for_freq(chan_list[i]); 3327 if (chan_enum == INVALID_CHANNEL) { 3328 reg_err("Invalid ch in nol list, chan %d", 3329 chan_list[i]); 3330 continue; 3331 } 3332 mas_chan_list[chan_enum].nol_history = nol_history_chan; 3333 cur_chan_list[chan_enum].nol_history = nol_history_chan; 3334 } 3335 } 3336 3337 static inline bool REG_IS_FREQUENCY_VALID_5G_SBS(uint16_t curfreq, 3338 uint16_t newfreq) 3339 { 3340 return ((curfreq) > (newfreq) ? 3341 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3342 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3343 > REG_SBS_SEPARATION_THRESHOLD : 3344 REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(newfreq)) 3345 - REG_CH_TO_FREQ(reg_get_chan_enum_for_freq(curfreq)) 3346 > REG_SBS_SEPARATION_THRESHOLD); 3347 } 3348 3349 bool reg_is_frequency_valid_5g_sbs(uint16_t curfreq, uint16_t newfreq) 3350 { 3351 return REG_IS_FREQUENCY_VALID_5G_SBS(curfreq, newfreq); 3352 } 3353 3354 uint16_t reg_min_chan_freq(void) 3355 { 3356 return channel_map[MIN_24GHZ_CHANNEL].center_freq; 3357 } 3358 3359 uint16_t reg_max_chan_freq(void) 3360 { 3361 return channel_map[NUM_CHANNELS - 1].center_freq; 3362 } 3363 3364 bool reg_is_same_band_freqs(uint16_t freq1, uint16_t freq2) 3365 { 3366 return (freq1 && freq2 && ((REG_IS_6GHZ_FREQ(freq1) && 3367 REG_IS_6GHZ_FREQ(freq2)) || 3368 (REG_IS_5GHZ_FREQ(freq1) && 3369 REG_IS_5GHZ_FREQ(freq2)) || 3370 (REG_IS_24GHZ_CH_FREQ(freq1) && 3371 REG_IS_24GHZ_CH_FREQ(freq2)))); 3372 } 3373 3374 enum reg_wifi_band reg_freq_to_band(uint16_t freq) 3375 { 3376 if (REG_IS_24GHZ_CH_FREQ(freq)) 3377 return REG_BAND_2G; 3378 else if (REG_IS_5GHZ_FREQ(freq) || REG_IS_49GHZ_FREQ(freq)) 3379 return REG_BAND_5G; 3380 else if (REG_IS_6GHZ_FREQ(freq)) 3381 return REG_BAND_6G; 3382 return REG_BAND_UNKNOWN; 3383 } 3384 #endif /* CONFIG_CHAN_FREQ_API */ 3385 3386 QDF_STATUS reg_set_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3387 { 3388 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3389 3390 psoc_reg = reg_get_psoc_obj(psoc); 3391 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) { 3392 reg_err("psoc reg component is NULL"); 3393 return QDF_STATUS_E_INVAL; 3394 } 3395 3396 psoc_reg->ignore_fw_reg_offload_ind = true; 3397 return QDF_STATUS_SUCCESS; 3398 } 3399 3400 bool reg_get_ignore_fw_reg_offload_ind(struct wlan_objmgr_psoc *psoc) 3401 { 3402 struct wlan_regulatory_psoc_priv_obj *psoc_reg; 3403 3404 psoc_reg = reg_get_psoc_obj(psoc); 3405 if (!IS_VALID_PSOC_REG_OBJ(psoc_reg)) 3406 return false; 3407 3408 return psoc_reg->ignore_fw_reg_offload_ind; 3409 } 3410 3411