1 /* 2 * Copyright (c) 2015-2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /** 20 * DOC: if_snoc.c 21 * 22 * c file for snoc specif implementations. 23 */ 24 25 #include "hif.h" 26 #include "hif_main.h" 27 #include "hif_debug.h" 28 #include "hif_io32.h" 29 #include "ce_main.h" 30 #include "ce_tasklet.h" 31 #include "ce_api.h" 32 #include "ce_internal.h" 33 #include "snoc_api.h" 34 #include "pld_common.h" 35 #include "qdf_util.h" 36 #ifdef IPA_OFFLOAD 37 #include <uapi/linux/msm_ipa.h> 38 #endif 39 #include "target_type.h" 40 41 /** 42 * hif_disable_isr(): disable isr 43 * 44 * This function disables isr and kills tasklets 45 * 46 * @hif_ctx: struct hif_softc 47 * 48 * Return: void 49 */ 50 void hif_snoc_disable_isr(struct hif_softc *scn) 51 { 52 hif_exec_kill(&scn->osc); 53 hif_nointrs(scn); 54 ce_tasklet_kill(scn); 55 qdf_atomic_set(&scn->active_tasklet_cnt, 0); 56 qdf_atomic_set(&scn->active_grp_tasklet_cnt, 0); 57 } 58 59 /** 60 * hif_dump_registers(): dump bus debug registers 61 * @hif_ctx: struct hif_opaque_softc 62 * 63 * This function dumps hif bus debug registers 64 * 65 * Return: 0 for success or error code 66 */ 67 int hif_snoc_dump_registers(struct hif_softc *hif_ctx) 68 { 69 int status; 70 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 71 72 status = hif_dump_ce_registers(scn); 73 if (status) 74 hif_err("Dump CE Registers Failed"); 75 76 return 0; 77 } 78 79 void hif_snoc_display_stats(struct hif_softc *hif_ctx) 80 { 81 if (!hif_ctx) { 82 hif_err("hif_ctx null"); 83 return; 84 } 85 hif_display_ce_stats(hif_ctx); 86 } 87 88 void hif_snoc_clear_stats(struct hif_softc *hif_ctx) 89 { 90 struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); 91 92 if (!hif_state) { 93 hif_err("hif_ctx null"); 94 return; 95 } 96 hif_clear_ce_stats(hif_state); 97 } 98 99 /** 100 * hif_snoc_close(): hif_bus_close 101 * 102 * Return: n/a 103 */ 104 void hif_snoc_close(struct hif_softc *scn) 105 { 106 hif_ce_close(scn); 107 } 108 109 /** 110 * hif_bus_open(): hif_bus_open 111 * @hif_ctx: hif context 112 * @bus_type: bus type 113 * 114 * Return: n/a 115 */ 116 QDF_STATUS hif_snoc_open(struct hif_softc *hif_ctx, enum qdf_bus_type bus_type) 117 { 118 return hif_ce_open(hif_ctx); 119 } 120 121 /** 122 * hif_snoc_get_soc_info() - populates scn with hw info 123 * 124 * fills in the virtual and physical base address as well as 125 * soc version info. 126 * 127 * return 0 or QDF_STATUS_E_FAILURE 128 */ 129 static QDF_STATUS hif_snoc_get_soc_info(struct hif_softc *scn) 130 { 131 int ret; 132 struct pld_soc_info soc_info; 133 134 qdf_mem_zero(&soc_info, sizeof(soc_info)); 135 136 ret = pld_get_soc_info(scn->qdf_dev->dev, &soc_info); 137 if (ret < 0) { 138 hif_err("pld_get_soc_info error = %d", ret); 139 return QDF_STATUS_E_FAILURE; 140 } 141 142 scn->mem = soc_info.v_addr; 143 scn->mem_pa = soc_info.p_addr; 144 145 scn->target_info.soc_version = soc_info.soc_id; 146 scn->target_info.target_version = soc_info.soc_id; 147 scn->target_info.target_revision = 0; 148 return QDF_STATUS_SUCCESS; 149 } 150 151 /** 152 * hif_bus_configure() - configure the snoc bus 153 * @scn: pointer to the hif context. 154 * 155 * return: 0 for success. nonzero for failure. 156 */ 157 int hif_snoc_bus_configure(struct hif_softc *scn) 158 { 159 int ret; 160 uint8_t wake_ce_id; 161 162 ret = hif_snoc_get_soc_info(scn); 163 if (ret) 164 return ret; 165 166 hif_ce_prepare_config(scn); 167 168 ret = hif_wlan_enable(scn); 169 if (ret) { 170 hif_err("hif_wlan_enable error = %d", ret); 171 return ret; 172 } 173 174 ret = hif_config_ce(scn); 175 if (ret) 176 goto wlan_disable; 177 178 ret = hif_get_wake_ce_id(scn, &wake_ce_id); 179 if (ret) 180 goto unconfig_ce; 181 182 scn->wake_irq = pld_get_irq(scn->qdf_dev->dev, wake_ce_id); 183 184 hif_info("expecting wake from ce %d, irq %d", 185 wake_ce_id, scn->wake_irq); 186 187 return 0; 188 189 unconfig_ce: 190 hif_unconfig_ce(scn); 191 192 wlan_disable: 193 hif_wlan_disable(scn); 194 195 return ret; 196 } 197 198 /** 199 * hif_snoc_get_target_type(): Get the target type 200 * 201 * This function is used to query the target type. 202 * 203 * @ol_sc: hif_softc struct pointer 204 * @dev: device pointer 205 * @bdev: bus dev pointer 206 * @bid: bus id pointer 207 * @hif_type: HIF type such as HIF_TYPE_QCA6180 208 * @target_type: target type such as TARGET_TYPE_QCA6180 209 * 210 * Return: 0 for success 211 */ 212 static inline int hif_snoc_get_target_type(struct hif_softc *ol_sc, 213 struct device *dev, void *bdev, const struct hif_bus_id *bid, 214 uint32_t *hif_type, uint32_t *target_type) 215 { 216 /* TODO: need to use HW version. Hard code for now */ 217 #ifdef QCA_WIFI_3_0_ADRASTEA 218 *hif_type = HIF_TYPE_ADRASTEA; 219 *target_type = TARGET_TYPE_ADRASTEA; 220 #else 221 *hif_type = 0; 222 *target_type = 0; 223 #endif 224 return 0; 225 } 226 227 #ifdef IPA_OFFLOAD 228 static int hif_set_dma_coherent_mask(qdf_device_t osdev) 229 { 230 uint8_t addr_bits; 231 232 if (false == hif_get_ipa_present()) 233 return qdf_set_dma_coherent_mask(osdev->dev, 234 DMA_COHERENT_MASK_DEFAULT); 235 236 if (hif_get_ipa_hw_type() < IPA_HW_v3_0) 237 addr_bits = DMA_COHERENT_MASK_BELOW_IPA_VER_3; 238 else 239 addr_bits = DMA_COHERENT_MASK_DEFAULT; 240 241 return qdf_set_dma_coherent_mask(osdev->dev, addr_bits); 242 } 243 #else 244 static int hif_set_dma_coherent_mask(qdf_device_t osdev) 245 { 246 return qdf_set_dma_coherent_mask(osdev->dev, 247 DMA_COHERENT_MASK_DEFAULT); 248 } 249 #endif 250 251 /** 252 * hif_enable_bus(): hif_enable_bus 253 * @dev: dev 254 * @bdev: bus dev 255 * @bid: bus id 256 * @type: bus type 257 * 258 * Return: QDF_STATUS 259 */ 260 QDF_STATUS hif_snoc_enable_bus(struct hif_softc *ol_sc, 261 struct device *dev, void *bdev, 262 const struct hif_bus_id *bid, 263 enum hif_enable_type type) 264 { 265 int ret; 266 int hif_type; 267 int target_type; 268 269 if (!ol_sc) { 270 hif_err("hif_ctx is NULL"); 271 return QDF_STATUS_E_NOMEM; 272 } 273 274 ret = hif_set_dma_coherent_mask(ol_sc->qdf_dev); 275 if (ret) { 276 hif_err("Failed to set dma mask error = %d", ret); 277 return qdf_status_from_os_return(ret); 278 } 279 280 ret = qdf_device_init_wakeup(ol_sc->qdf_dev, true); 281 if (ret == -EEXIST) 282 hif_warn("device_init_wakeup already done"); 283 else if (ret) { 284 hif_err("device_init_wakeup: err= %d", ret); 285 return qdf_status_from_os_return(ret); 286 } 287 288 ret = hif_snoc_get_target_type(ol_sc, dev, bdev, bid, 289 &hif_type, &target_type); 290 if (ret < 0) { 291 hif_err("Invalid device id/revision_id"); 292 return QDF_STATUS_E_FAILURE; 293 } 294 295 ol_sc->target_info.target_type = target_type; 296 297 hif_register_tbl_attach(ol_sc, hif_type); 298 hif_target_register_tbl_attach(ol_sc, target_type); 299 300 /* the bus should remain on durring suspend for snoc */ 301 hif_vote_link_up(GET_HIF_OPAQUE_HDL(ol_sc)); 302 303 hif_debug("X - hif_type = 0x%x, target_type = 0x%x", 304 hif_type, target_type); 305 306 return QDF_STATUS_SUCCESS; 307 } 308 309 /** 310 * hif_disable_bus(): hif_disable_bus 311 * 312 * This function disables the bus 313 * 314 * @bdev: bus dev 315 * 316 * Return: none 317 */ 318 void hif_snoc_disable_bus(struct hif_softc *scn) 319 { 320 int ret; 321 322 hif_vote_link_down(GET_HIF_OPAQUE_HDL(scn)); 323 324 ret = qdf_device_init_wakeup(scn->qdf_dev, false); 325 if (ret) 326 hif_err("device_init_wakeup: err %d", ret); 327 } 328 329 /** 330 * hif_nointrs(): disable IRQ 331 * 332 * This function stops interrupt(s) 333 * 334 * @scn: struct hif_softc 335 * 336 * Return: none 337 */ 338 void hif_snoc_nointrs(struct hif_softc *scn) 339 { 340 struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); 341 342 ce_unregister_irq(hif_state, CE_ALL_BITMAP); 343 } 344 345 /** 346 * ce_irq_enable() - enable copy engine IRQ 347 * @scn: struct hif_softc 348 * @ce_id: ce_id 349 * 350 * Return: N/A 351 */ 352 void hif_snoc_irq_enable(struct hif_softc *scn, 353 int ce_id) 354 { 355 ce_enable_irq_in_individual_register(scn, ce_id); 356 } 357 358 /** 359 * ce_irq_disable() - disable copy engine IRQ 360 * @scn: struct hif_softc 361 * @ce_id: ce_id 362 * 363 * Return: N/A 364 */ 365 void hif_snoc_irq_disable(struct hif_softc *scn, int ce_id) 366 { 367 ce_disable_irq_in_individual_register(scn, ce_id); 368 } 369 370 /* 371 * hif_snoc_setup_wakeup_sources() - enable/disable irq wake on correct irqs 372 * @hif_softc: hif context 373 * 374 * Firmware will send a wakeup request to the HTC_CTRL_RSVD_SVC when waking up 375 * the host driver. Ensure that the copy complete interrupt from this copy 376 * engine can wake up the apps processor. 377 * 378 * Return: 0 for success 379 */ 380 static 381 QDF_STATUS hif_snoc_setup_wakeup_sources(struct hif_softc *scn, bool enable) 382 { 383 int ret; 384 385 if (enable) 386 ret = enable_irq_wake(scn->wake_irq); 387 else 388 ret = disable_irq_wake(scn->wake_irq); 389 390 if (ret) { 391 hif_err("Fail to setup wake IRQ!"); 392 return QDF_STATUS_E_RESOURCES; 393 } 394 395 return QDF_STATUS_SUCCESS; 396 } 397 398 /** 399 * hif_snoc_bus_suspend() - prepare to suspend the bus 400 * @scn: hif context 401 * 402 * Setup wakeup interrupt configuration. 403 * Disable CE interrupts (wakeup interrupt will still wake apps) 404 * Drain tasklets. - make sure that we don't suspend while processing 405 * the wakeup message. 406 * 407 * Return: 0 on success. 408 */ 409 int hif_snoc_bus_suspend(struct hif_softc *scn) 410 { 411 if (hif_snoc_setup_wakeup_sources(scn, true) != QDF_STATUS_SUCCESS) 412 return -EFAULT; 413 return 0; 414 } 415 416 /** 417 * hif_snoc_bus_resume() - snoc bus resume function 418 * @scn: hif context 419 * 420 * Clear wakeup interrupt configuration. 421 * Reenable ce interrupts 422 * 423 * Return: 0 on success 424 */ 425 int hif_snoc_bus_resume(struct hif_softc *scn) 426 { 427 if (hif_snoc_setup_wakeup_sources(scn, false) != QDF_STATUS_SUCCESS) 428 QDF_BUG(0); 429 430 return 0; 431 } 432 433 /** 434 * hif_snoc_bus_suspend_noirq() - ensure there are no pending transactions 435 * @scn: hif context 436 * 437 * Ensure that if we received the wakeup message before the irq 438 * was disabled that the message is pocessed before suspending. 439 * 440 * Return: -EBUSY if we fail to flush the tasklets. 441 */ 442 int hif_snoc_bus_suspend_noirq(struct hif_softc *scn) 443 { 444 if (hif_drain_tasklets(scn) != 0) 445 return -EBUSY; 446 return 0; 447 } 448 449 int hif_snoc_map_ce_to_irq(struct hif_softc *scn, int ce_id) 450 { 451 return pld_get_irq(scn->qdf_dev->dev, ce_id); 452 } 453 454 /** 455 * hif_is_target_register_access_allowed(): Check target register access allow 456 * @scn: HIF Context 457 * 458 * This function help to check whether target register access is allowed or not 459 * 460 * Return: true if target access is allowed else false 461 */ 462 bool hif_is_target_register_access_allowed(struct hif_softc *scn) 463 { 464 if (hif_is_recovery_in_progress(scn)) 465 return hif_is_target_ready(scn); 466 else 467 return true; 468 } 469 470 /** 471 * hif_snoc_needs_bmi() - return true if the soc needs bmi through the driver 472 * @scn: hif context 473 * 474 * Return: true if soc needs driver bmi otherwise false 475 */ 476 bool hif_snoc_needs_bmi(struct hif_softc *scn) 477 { 478 return false; 479 } 480