xref: /wlan-dirver/qca-wifi-host-cmn/hif/src/sdio/native_sdio/include/hif_internal.h (revision a175314c51a4ce5cec2835cc8a8c7dc0c1810915)
1 /*
2  * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef _HIF_INTERNAL_H_
20 #define _HIF_INTERNAL_H_
21 
22 #include <linux/mmc/card.h>
23 #include <linux/mmc/mmc.h>
24 #include <linux/mmc/host.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/mmc/sdio_ids.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sd.h>
29 
30 #include "athdefs.h"
31 #include "a_types.h"
32 #include "a_osapi.h"
33 #include <qdf_types.h>          /* qdf_device_t, qdf_print */
34 #include <qdf_time.h>           /* qdf_system_ticks, etc. */
35 #include <qdf_status.h>
36 #include <qdf_timer.h>
37 #include <qdf_atomic.h>
38 #include "hif.h"
39 #include "hif_debug.h"
40 #include "hif_sdio_common.h"
41 #include <linux/scatterlist.h>
42 #include "hif_main.h"
43 
44 #define HIF_LINUX_MMC_SCATTER_SUPPORT
45 
46 #define BUS_REQUEST_MAX_NUM                105
47 
48 #define SDIO_CLOCK_FREQUENCY_DEFAULT       25000000
49 #define SDWLAN_ENABLE_DISABLE_TIMEOUT      20
50 #define FLAGS_CARD_ENAB                    0x02
51 #define FLAGS_CARD_IRQ_UNMSK               0x04
52 
53 /*
54  * direction - Direction of transfer (HIF_SDIO_READ/HIF_SDIO_WRITE).
55  */
56 #define HIF_SDIO_READ			0x00000001
57 #define HIF_SDIO_WRITE			0x00000002
58 #define HIF_SDIO_DIR_MASK		(HIF_SDIO_READ | HIF_SDIO_WRITE)
59 
60 /*
61  * type - An interface may support different kind of rd/wr commands.
62  * For example: SDIO supports CMD52/CMD53s. In case of MSIO it
63  * translates to using different kinds of TPCs. The command type
64  * is thus divided into a basic and an extended command and can
65  * be specified using HIF_BASIC_IO/HIF_EXTENDED_IO.
66  */
67 #define HIF_BASIC_IO			0x00000004
68 #define HIF_EXTENDED_IO			0x00000008
69 #define HIF_TYPE_MASK			(HIF_BASIC_IO | HIF_EXTENDED_IO)
70 
71 /*
72  * This indicates the whether the command is to be executed in a
73  * blocking or non-blocking fashion (HIF_SYNCHRONOUS/
74  * HIF_ASYNCHRONOUS). The read/write data paths in HTC have been
75  * implemented using the asynchronous mode allowing the the bus
76  * driver to indicate the completion of operation through the
77  * registered callback routine. The requirement primarily comes
78  * from the contexts these operations get called from (a driver's
79  * transmit context or the ISR context in case of receive).
80  * Support for both of these modes is essential.
81  */
82 #define HIF_SYNCHRONOUS		0x00000010
83 #define HIF_ASYNCHRONOUS	0x00000020
84 #define HIF_EMODE_MASK		(HIF_SYNCHRONOUS | HIF_ASYNCHRONOUS)
85 
86 /*
87  * An interface may support different kinds of commands based on
88  * the tradeoff between the amount of data it can carry and the
89  * setup time. Byte and Block modes are supported (HIF_BYTE_BASIS/
90  * HIF_BLOCK_BASIS). In case of latter, the data is rounded off
91  * to the nearest block size by padding. The size of the block is
92  * configurable at compile time using the HIF_BLOCK_SIZE and is
93  * negotiated with the target during initialization after the
94  * AR6000 interrupts are enabled.
95  */
96 #define HIF_BYTE_BASIS		0x00000040
97 #define HIF_BLOCK_BASIS		0x00000080
98 #define HIF_DMODE_MASK		(HIF_BYTE_BASIS | HIF_BLOCK_BASIS)
99 
100 /*
101  * This indicates if the address has to be incremented on AR6000
102  * after every read/write operation (HIF?FIXED_ADDRESS/
103  * HIF_INCREMENTAL_ADDRESS).
104  */
105 #define HIF_FIXED_ADDRESS			0x00000100
106 #define HIF_INCREMENTAL_ADDRESS		0x00000200
107 #define HIF_AMODE_MASK				(HIF_FIXED_ADDRESS | \
108 							HIF_INCREMENTAL_ADDRESS)
109 
110 #define HIF_WR_ASYNC_BYTE_FIX   \
111 		(HIF_SDIO_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
112 				HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
113 #define HIF_WR_ASYNC_BYTE_INC   \
114 	(HIF_SDIO_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
115 				HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
116 #define HIF_WR_ASYNC_BLOCK_INC  \
117 	(HIF_SDIO_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
118 				HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
119 #define HIF_WR_SYNC_BYTE_FIX    \
120 	(HIF_SDIO_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
121 				HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
122 #define HIF_WR_SYNC_BYTE_INC    \
123 	(HIF_SDIO_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
124 				HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
125 #define HIF_WR_SYNC_BLOCK_INC  \
126 	(HIF_SDIO_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
127 				HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
128 #define HIF_WR_ASYNC_BLOCK_FIX \
129 	(HIF_SDIO_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
130 				HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS)
131 #define HIF_WR_SYNC_BLOCK_FIX  \
132 	(HIF_SDIO_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
133 				HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS)
134 #define HIF_RD_SYNC_BYTE_INC    \
135 	(HIF_SDIO_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
136 				HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
137 #define HIF_RD_SYNC_BYTE_FIX    \
138 	(HIF_SDIO_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
139 				HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
140 #define HIF_RD_ASYNC_BYTE_FIX   \
141 	(HIF_SDIO_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
142 				HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
143 #define HIF_RD_ASYNC_BLOCK_FIX  \
144 	(HIF_SDIO_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
145 				HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS)
146 #define HIF_RD_ASYNC_BYTE_INC   \
147 	(HIF_SDIO_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
148 				HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
149 #define HIF_RD_ASYNC_BLOCK_INC  \
150 	(HIF_SDIO_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | \
151 				HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
152 #define HIF_RD_SYNC_BLOCK_INC  \
153 	(HIF_SDIO_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
154 				HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
155 #define HIF_RD_SYNC_BLOCK_FIX  \
156 	(HIF_SDIO_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | \
157 				HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS)
158 
159 enum hif_sdio_device_state {
160 		HIF_DEVICE_STATE_ON,
161 		HIF_DEVICE_STATE_DEEPSLEEP,
162 		HIF_DEVICE_STATE_CUTPOWER,
163 		HIF_DEVICE_STATE_WOW
164 };
165 
166 struct bus_request {
167 	struct bus_request *next;       /* link list of available requests */
168 	struct bus_request *inusenext;  /* link list of in use requests */
169 	struct semaphore sem_req;
170 	uint32_t address;       /* request data */
171 	char *buffer;
172 	uint32_t length;
173 	uint32_t request;
174 	void *context;
175 	QDF_STATUS status;
176 	struct HIF_SCATTER_REQ_PRIV *scatter_req;
177 };
178 
179 struct hif_sdio_dev {
180 	struct sdio_func *func;
181 	qdf_spinlock_t asynclock;
182 	struct task_struct *async_task; /* task to handle async commands */
183 	struct semaphore sem_async;     /* wake up for async task */
184 	int async_shutdown;     /* stop the async task */
185 	struct completion async_completion;     /* thread completion */
186 	struct bus_request *asyncreq;  /* request for async tasklet */
187 	struct bus_request *taskreq;   /*  async tasklet data */
188 	qdf_spinlock_t lock;
189 	struct bus_request *bus_request_free_queue;     /* free list */
190 	struct bus_request bus_request[BUS_REQUEST_MAX_NUM]; /* bus requests */
191 	void *claimed_ctx;
192 	struct htc_callbacks htc_callbacks;
193 	uint8_t *dma_buffer;
194 	DL_LIST scatter_req_head; /* scatter request list head */
195 	bool scatter_enabled; /* scatter enabled flag */
196 	bool is_suspend;
197 	bool is_disabled;
198 	atomic_t irq_handling;
199 	enum HIF_DEVICE_POWER_CHANGE_TYPE power_config;
200 	enum hif_sdio_device_state device_state;
201 	const struct sdio_device_id *id;
202 	struct mmc_host *host;
203 	void *htc_context;
204 };
205 
206 struct HIF_DEVICE_OS_DEVICE_INFO {
207 	void *os_dev;
208 };
209 
210 struct hif_mailbox_properties {
211 	u_int32_t    extended_address;  /* extended address for larger writes */
212 	u_int32_t    extended_size;
213 };
214 
215 struct hif_device_irq_yield_params {
216 	int recv_packet_yield_count;
217 	/* max number of packets to force DSR to return */
218 };
219 
220 struct hif_device_mbox_info {
221 	u_int32_t mbox_addresses[4];
222 	/* first element for legacy HIFs and return the address and ARRAY of
223 	 * 32bit words
224 	 */
225 	struct hif_mailbox_properties mbox_prop[4];
226 	u_int32_t gmbox_address;
227 	u_int32_t gmbox_size;
228 	u_int32_t flags;
229 	/* flags to describe mbox behavior or usage */
230 };
231 
232 enum hif_device_irq_mode {
233 	HIF_DEVICE_IRQ_SYNC_ONLY,
234 	/* DSR to process all interrupts before returning */
235 	HIF_DEVICE_IRQ_ASYNC_SYNC,  /* DSR to process interrupts */
236 };
237 
238 /* other interrupts are pending, host
239  * needs to read the to monitor
240  */
241 #define HIF_OTHER_EVENTS     (1 << 0)
242 /* pending recv packet */
243 #define HIF_RECV_MSG_AVAIL   (1 << 1)
244 
245 struct _HIF_PENDING_EVENTS_INFO {
246 	uint32_t events;
247 	uint32_t look_ahead;
248 	uint32_t available_recv_bytes;
249 };
250 
251 /* hif-sdio pending events handler type, some HIF modules
252  * use special mechanisms to detect packet available and other interrupts
253  */
254 typedef int (*HIF_PENDING_EVENTS_FUNC)(struct hif_sdio_dev *device,
255 					struct _HIF_PENDING_EVENTS_INFO *
256 					events, void *async_context);
257 
258 #define HIF_MASK_RECV    true
259 #define HIF_UNMASK_RECV  false
260 /* hif-sdio Handler type to mask receive events */
261 typedef int (*HIF_MASK_UNMASK_RECV_EVENT)(struct hif_sdio_dev *device,
262 					  bool mask,
263 					  void *async_context);
264 
265 QDF_STATUS hif_configure_device(struct hif_softc *ol_sc,
266 				struct hif_sdio_dev *device,
267 				enum hif_device_config_opcode opcode,
268 				void *config, uint32_t config_len);
269 
270 QDF_STATUS hif_attach_htc(struct hif_sdio_dev *device,
271 			  struct htc_callbacks *callbacks);
272 
273 QDF_STATUS hif_read_write(struct hif_sdio_dev *device,
274 			uint32_t address,
275 			char *buffer,
276 			uint32_t length, uint32_t request, void *context);
277 
278 void hif_ack_interrupt(struct hif_sdio_dev *device);
279 
280 void hif_mask_interrupt(struct hif_sdio_dev *device);
281 
282 void hif_un_mask_interrupt(struct hif_sdio_dev *device);
283 
284 void hif_sdio_configure_pipes(struct hif_sdio_dev *dev, struct sdio_func *func);
285 
286 struct _HIF_SCATTER_ITEM {
287 	u_int8_t     *buffer; /* CPU accessible address of buffer */
288 	int          length; /* length of transfer to/from this buffer */
289 	void         *caller_contexts[2]; /* caller context */
290 };
291 
292 struct _HIF_SCATTER_REQ;
293 
294 typedef void (*HIF_SCATTER_COMP_CB)(struct _HIF_SCATTER_REQ *);
295 
296 enum HIF_SCATTER_METHOD {
297 	HIF_SCATTER_NONE = 0,
298 	HIF_SCATTER_DMA_REAL, /* Real SG support no restrictions */
299 	HIF_SCATTER_DMA_BOUNCE, /* Uses SG DMA */
300 };
301 
302 struct _HIF_SCATTER_REQ {
303 	DL_LIST             list_link; /* link management */
304 	u_int32_t            address; /* address for the read/write operation */
305 	u_int32_t            request; /* request flags */
306 	u_int32_t            total_length; /* total length of entire transfer */
307 	u_int32_t            caller_flags; /* caller specific flags */
308 	HIF_SCATTER_COMP_CB  completion_routine; /* completion callback */
309 	int                  completion_status; /* status of completion */
310 	void                 *context; /* caller context for this request */
311 	int                  valid_scatter_entries; /* no of valid entries */
312 	/* scatter method handled by HIF */
313 	enum HIF_SCATTER_METHOD   scatter_method;
314 	void                 *hif_private[4]; /* HIF private area */
315 	u_int8_t             *scatter_bounce_buffer; /* bounce buffers */
316 	struct _HIF_SCATTER_ITEM    scatter_list[1]; /* start of scatter list */
317 };
318 
319 typedef struct _HIF_SCATTER_REQ * (*HIF_ALLOCATE_SCATTER_REQUEST)(
320 						struct hif_sdio_dev *device);
321 typedef void (*HIF_FREE_SCATTER_REQUEST)(struct hif_sdio_dev *device,
322 				struct _HIF_SCATTER_REQ *request);
323 typedef QDF_STATUS (*HIF_READWRITE_SCATTER)(struct hif_sdio_dev *device,
324 					struct _HIF_SCATTER_REQ *request);
325 
326 struct HIF_DEVICE_SCATTER_SUPPORT_INFO {
327 	/* information returned from HIF layer */
328 	HIF_ALLOCATE_SCATTER_REQUEST    allocate_req_func;
329 	HIF_FREE_SCATTER_REQUEST        free_req_func;
330 	HIF_READWRITE_SCATTER           read_write_scatter_func;
331 	int                             max_scatter_entries;
332 	int                             max_tx_size_per_scatter_req;
333 };
334 
335 void hif_get_target_revision(struct hif_softc *ol_sc);
336 struct HIF_SCATTER_REQ_PRIV;
337 
338 #define HIF_DMA_BUFFER_SIZE (4 * 1024)
339 #define CMD53_FIXED_ADDRESS 1
340 #define CMD53_INCR_ADDRESS  2
341 
342 struct bus_request *hif_allocate_bus_request(struct hif_sdio_dev *device);
343 void hif_free_bus_request(struct hif_sdio_dev *device,
344 			  struct bus_request *busrequest);
345 void add_to_async_list(struct hif_sdio_dev *device,
346 		       struct bus_request *busrequest);
347 void hif_dump_cccr(struct hif_sdio_dev *hif_device);
348 
349 #ifdef HIF_LINUX_MMC_SCATTER_SUPPORT
350 
351 #define MAX_SCATTER_REQUESTS             4
352 #define MAX_SCATTER_ENTRIES_PER_REQ      16
353 #define MAX_SCATTER_REQ_TRANSFER_SIZE    (32*1024)
354 
355 struct HIF_SCATTER_REQ_PRIV {
356 	struct _HIF_SCATTER_REQ *hif_scatter_req;
357 	struct hif_sdio_dev *device;     /* this device */
358 	struct bus_request *busrequest;
359 	/* scatter list for linux */
360 	struct scatterlist sgentries[MAX_SCATTER_ENTRIES_PER_REQ];
361 };
362 
363 #define ATH_DEBUG_SCATTER  ATH_DEBUG_MAKE_MODULE_MASK(0)
364 
365 QDF_STATUS setup_hif_scatter_support(struct hif_sdio_dev *device,
366 		   struct HIF_DEVICE_SCATTER_SUPPORT_INFO *info);
367 void cleanup_hif_scatter_resources(struct hif_sdio_dev *device);
368 QDF_STATUS do_hif_read_write_scatter(struct hif_sdio_dev *device,
369 				   struct bus_request *busrequest);
370 
371 #else                           /* HIF_LINUX_MMC_SCATTER_SUPPORT */
372 
373 static inline QDF_STATUS setup_hif_scatter_support(struct hif_sdio_dev *device,
374 				struct HIF_DEVICE_SCATTER_SUPPORT_INFO *info)
375 {
376 	return QDF_STATUS_E_NOSUPPORT;
377 }
378 
379 static inline QDF_STATUS do_hif_read_write_scatter(struct hif_sdio_dev *device,
380 					 struct bus_request *busrequest)
381 {
382 	return QDF_STATUS_E_NOSUPPORT;
383 }
384 
385 #define cleanup_hif_scatter_resources(d) { }
386 
387 #endif /* HIF_LINUX_MMC_SCATTER_SUPPORT */
388 
389 #define SDIO_SET_CMD52_ARG(arg, rw, func, raw, address, writedata) \
390 			((arg) = (((rw) & 1) << 31) | \
391 			(((func) & 0x7) << 28) | \
392 			(((raw) & 1) << 27) | \
393 			(1 << 26) | \
394 			(((address) & 0x1FFFF) << 9) | \
395 			(1 << 8) | \
396 			((writedata) & 0xFF))
397 
398 #define SDIO_SET_CMD52_READ_ARG(arg, func, address) \
399 	SDIO_SET_CMD52_ARG(arg, 0, (func), 0, address, 0x00)
400 #define SDIO_SET_CMD52_WRITE_ARG(arg, func, address, value) \
401 	SDIO_SET_CMD52_ARG(arg, 1, (func), 0, address, value)
402 
403 void hif_sdio_quirk_force_drive_strength(struct sdio_func *func);
404 void hif_sdio_quirk_write_cccr(struct sdio_func *func);
405 int hif_sdio_quirk_mod_strength(struct sdio_func *func);
406 int hif_sdio_quirk_async_intr(struct sdio_func *func);
407 int hif_sdio_set_bus_speed(struct sdio_func *func);
408 int hif_sdio_set_bus_width(struct sdio_func *func);
409 int hif_sdio_func_enable(struct hif_sdio_dev *device,
410 			 struct sdio_func *func);
411 QDF_STATUS hif_sdio_func_disable(struct hif_sdio_dev *device,
412 				 struct sdio_func *func,
413 				 bool reset);
414 QDF_STATUS reinit_sdio(struct hif_sdio_dev *device);
415 
416 int func0_cmd52_write_byte(struct mmc_card *card,
417 			   unsigned int address,
418 			   unsigned char byte);
419 
420 int func0_cmd52_read_byte(struct mmc_card *card,
421 			  unsigned int address,
422 			  unsigned char *byte);
423 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0))
424 /**
425  * sdio_card_highspeed() - check if high speed supported
426  * @card: pointer to mmc card struct
427  *
428  * Return: non zero if card supports high speed.
429  */
430 static inline int sdio_card_highspeed(struct mmc_card *card)
431 {
432 	return mmc_card_highspeed(card);
433 }
434 #else
435 static inline int sdio_card_highspeed(struct mmc_card *card)
436 {
437 	return mmc_card_hs(card);
438 }
439 #endif
440 
441 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0))
442 /**
443  * sdio_card_set_highspeed() - set high speed
444  * @card: pointer to mmc card struct
445  *
446  * Return: none.
447  */
448 static inline void sdio_card_set_highspeed(struct mmc_card *card)
449 {
450 	mmc_card_set_highspeed(card);
451 }
452 #else
453 static inline void sdio_card_set_highspeed(struct mmc_card *card)
454 {
455 }
456 #endif
457 
458 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0))
459 /**
460  * sdio_card_state() - set card state
461  * @card: pointer to mmc card struct
462  *
463  * Return: none.
464  */
465 static inline void sdio_card_state(struct mmc_card *card)
466 {
467 	card->state &= ~MMC_STATE_HIGHSPEED;
468 }
469 #else
470 static inline void sdio_card_state(struct mmc_card *card)
471 {
472 }
473 #endif
474 #endif /* _HIF_INTERNAL_H_ */
475