xref: /wlan-dirver/qca-wifi-host-cmn/hif/src/pcie/if_pci.h (revision a86b23ee68a2491aede2e03991f3fb37046f4e41)
1 /*
2  * Copyright (c) 2013-2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef __ATH_PCI_H__
20 #define __ATH_PCI_H__
21 
22 #include <linux/version.h>
23 #include <linux/semaphore.h>
24 #include <linux/interrupt.h>
25 
26 #define ATH_DBG_DEFAULT   0
27 #define DRAM_SIZE               0x000a8000
28 #include "hif.h"
29 #include "hif_runtime_pm.h"
30 #include "cepci.h"
31 #include "ce_main.h"
32 
33 #ifdef FORCE_WAKE
34 /* Register to wake the UMAC from power collapse */
35 #define PCIE_SOC_PCIE_REG_PCIE_SCRATCH_0_SOC_PCIE_REG 0x4040
36 /* Register used for handshake mechanism to validate UMAC is awake */
37 #define PCIE_PCIE_LOCAL_REG_PCIE_SOC_WAKE_PCIE_LOCAL_REG 0x3004
38 /* Timeout duration to validate UMAC wake status */
39 #ifdef HAL_CONFIG_SLUB_DEBUG_ON
40 #define FORCE_WAKE_DELAY_TIMEOUT_MS 500
41 #else
42 #define FORCE_WAKE_DELAY_TIMEOUT_MS 50
43 #endif /* HAL_CONFIG_SLUB_DEBUG_ON */
44 /* Validate UMAC status every 5ms */
45 #define FORCE_WAKE_DELAY_MS 5
46 #endif /* FORCE_WAKE */
47 
48 #ifdef QCA_HIF_HIA_EXTND
49 extern int32_t frac, intval, ar900b_20_targ_clk, qca9888_20_targ_clk;
50 #endif
51 
52 /* An address (e.g. of a buffer) in Copy Engine space. */
53 
54 #define HIF_MAX_TASKLET_NUM 11
55 struct hif_tasklet_entry {
56 	uint8_t id;        /* 0 - 9: maps to CE, 10: fw */
57 	void *hif_handler; /* struct hif_pci_softc */
58 };
59 
60 /**
61  * struct hif_msi_info - Structure to hold msi info
62  * @magic: cookie
63  * @magic_da: dma address
64  * @dmaContext: dma address
65  *
66  * Structure to hold MSI information for PCIe interrupts
67  */
68 struct hif_msi_info {
69 	void *magic;
70 	dma_addr_t magic_da;
71 	OS_DMA_MEM_CONTEXT(dmacontext);
72 };
73 
74 /**
75  * struct hif_pci_stats - Account for hif pci based statistics
76  * @mhi_force_wake_request_vote: vote for mhi
77  * @mhi_force_wake_failure: mhi force wake failure
78  * @mhi_force_wake_success: mhi force wake success
79  * @soc_force_wake_register_write_success: write to soc wake
80  * @soc_force_wake_failure: soc force wake failure
81  * @soc_force_wake_success: soc force wake success
82  * @mhi_force_wake_release_success: mhi force wake release success
83  * @soc_force_wake_release_success: soc force wake release
84  */
85 struct hif_pci_stats {
86 	uint32_t mhi_force_wake_request_vote;
87 	uint32_t mhi_force_wake_failure;
88 	uint32_t mhi_force_wake_success;
89 	uint32_t soc_force_wake_register_write_success;
90 	uint32_t soc_force_wake_failure;
91 	uint32_t soc_force_wake_success;
92 	uint32_t mhi_force_wake_release_failure;
93 	uint32_t mhi_force_wake_release_success;
94 	uint32_t soc_force_wake_release_success;
95 };
96 
97 struct hif_pci_softc {
98 	struct HIF_CE_state ce_sc;
99 	void __iomem *mem;      /* PCI address. */
100 	void __iomem *mem_ce;   /* PCI address for CE. */
101 	size_t mem_len;
102 
103 	struct device *dev;	/* For efficiency, should be first in struct */
104 	struct pci_dev *pdev;
105 	int num_msi_intrs;      /* number of MSI interrupts granted */
106 	/* 0 --> using legacy PCI line interrupts */
107 	struct tasklet_struct intr_tq;  /* tasklet */
108 	struct hif_msi_info msi_info;
109 	int ce_msi_irq_num[CE_COUNT_MAX];
110 	int irq;
111 	int irq_event;
112 	int cacheline_sz;
113 	u16 devid;
114 	struct hif_tasklet_entry tasklet_entries[HIF_MAX_TASKLET_NUM];
115 	bool pci_enabled;
116 	bool use_register_windowing;
117 	uint32_t register_window;
118 	qdf_spinlock_t register_access_lock;
119 	qdf_spinlock_t irq_lock;
120 	qdf_work_t reschedule_tasklet_work;
121 	uint32_t lcr_val;
122 #ifdef FEATURE_RUNTIME_PM
123 	struct hif_runtime_pm_ctx rpm_ctx;
124 #endif
125 	int (*hif_enable_pci)(struct hif_pci_softc *sc, struct pci_dev *pdev,
126 			      const struct pci_device_id *id);
127 	void (*hif_pci_deinit)(struct hif_pci_softc *sc);
128 	void (*hif_pci_get_soc_info)(struct hif_pci_softc *sc,
129 				     struct device *dev);
130 	struct hif_pci_stats stats;
131 };
132 
133 bool hif_pci_targ_is_present(struct hif_softc *scn, void *__iomem *mem);
134 int hif_configure_irq(struct hif_softc *sc);
135 void hif_pci_cancel_deferred_target_sleep(struct hif_softc *scn);
136 void wlan_tasklet(unsigned long data);
137 irqreturn_t hif_pci_legacy_ce_interrupt_handler(int irq, void *arg);
138 int hif_pci_addr_in_boundary(struct hif_softc *scn, uint32_t offset);
139 
140 /*
141  * A firmware interrupt to the Host is indicated by the
142  * low bit of SCRATCH_3_ADDRESS being set.
143  */
144 #define FW_EVENT_PENDING_REG_ADDRESS SCRATCH_3_ADDRESS
145 
146 /*
147  * Typically, MSI Interrupts are used with PCIe. To force use of legacy
148  * "ABCD" PCI line interrupts rather than MSI, define
149  * FORCE_LEGACY_PCI_INTERRUPTS.
150  * Even when NOT forced, the driver may attempt to use legacy PCI interrupts
151  * MSI allocation fails
152  */
153 #define LEGACY_INTERRUPTS(sc) ((sc)->num_msi_intrs == 0)
154 
155 /*
156  * There may be some pending tx frames during platform suspend.
157  * Suspend operation should be delayed until those tx frames are
158  * transferred from the host to target. This macro specifies how
159  * long suspend thread has to sleep before checking pending tx
160  * frame count.
161  */
162 #define OL_ATH_TX_DRAIN_WAIT_DELAY     50       /* ms */
163 
164 #define HIF_CE_DRAIN_WAIT_DELAY        10       /* ms */
165 /*
166  * Wait time (in unit of OL_ATH_TX_DRAIN_WAIT_DELAY) for pending
167  * tx frame completion before suspend. Refer: hif_pci_suspend()
168  */
169 #ifndef QCA_WIFI_3_0_EMU
170 #define OL_ATH_TX_DRAIN_WAIT_CNT       10
171 #else
172 #define OL_ATH_TX_DRAIN_WAIT_CNT       60
173 #endif
174 
175 #ifdef FORCE_WAKE
176 /**
177  * hif_print_pci_stats() - Display HIF PCI stats
178  * @hif_ctx - HIF pci handle
179  *
180  * Return: None
181  */
182 void hif_print_pci_stats(struct hif_pci_softc *pci_scn);
183 #else
184 static inline
185 void hif_print_pci_stats(struct hif_pci_softc *pci_scn)
186 {
187 }
188 #endif /* FORCE_WAKE */
189 #endif /* __ATH_PCI_H__ */
190