xref: /wlan-dirver/qca-wifi-host-cmn/hif/src/hif_main.h (revision bea437e2293c3d4fb1b5704fcf633aedac996962)
1 /*
2  * Copyright (c) 2013-2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 /*
20  * NB: Inappropriate references to "HTC" are used in this (and other)
21  * HIF implementations.  HTC is typically the calling layer, but it
22  * theoretically could be some alternative.
23  */
24 
25 /*
26  * This holds all state needed to process a pending send/recv interrupt.
27  * The information is saved here as soon as the interrupt occurs (thus
28  * allowing the underlying CE to re-use the ring descriptor). The
29  * information here is eventually processed by a completion processing
30  * thread.
31  */
32 
33 #ifndef __HIF_MAIN_H__
34 #define __HIF_MAIN_H__
35 
36 #include <qdf_atomic.h>         /* qdf_atomic_read */
37 #include "qdf_lock.h"
38 #include "cepci.h"
39 #include "hif.h"
40 #include "multibus.h"
41 #include "hif_unit_test_suspend_i.h"
42 
43 #define HIF_MIN_SLEEP_INACTIVITY_TIME_MS     50
44 #define HIF_SLEEP_INACTIVITY_TIMER_PERIOD_MS 60
45 
46 #define HIF_MAX_BUDGET 0xFFFF
47 
48 #define HIF_STATS_INC(_handle, _field, _delta) \
49 { \
50 	(_handle)->stats._field += _delta; \
51 }
52 
53 /*
54  * This macro implementation is exposed for efficiency only.
55  * The implementation may change and callers should
56  * consider the targid to be a completely opaque handle.
57  */
58 #define TARGID_TO_PCI_ADDR(targid) (*((A_target_id_t *)(targid)))
59 
60 #ifdef QCA_WIFI_3_0
61 #define DISABLE_L1SS_STATES 1
62 #endif
63 
64 #define MAX_NUM_OF_RECEIVES HIF_NAPI_MAX_RECEIVES
65 
66 #ifdef QCA_WIFI_3_0_ADRASTEA
67 #define ADRASTEA_BU 1
68 #else
69 #define ADRASTEA_BU 0
70 #endif
71 
72 #ifdef QCA_WIFI_3_0
73 #define HAS_FW_INDICATOR 0
74 #else
75 #define HAS_FW_INDICATOR 1
76 #endif
77 
78 
79 #define AR9888_DEVICE_ID (0x003c)
80 #define AR6320_DEVICE_ID (0x003e)
81 #define AR6320_FW_1_1  (0x11)
82 #define AR6320_FW_1_3  (0x13)
83 #define AR6320_FW_2_0  (0x20)
84 #define AR6320_FW_3_0  (0x30)
85 #define AR6320_FW_3_2  (0x32)
86 #define QCA6290_EMULATION_DEVICE_ID (0xabcd)
87 #define QCA6290_DEVICE_ID (0x1100)
88 #define QCN9000_DEVICE_ID (0x1104)
89 #define QCA6390_EMULATION_DEVICE_ID (0x0108)
90 #define QCA6390_DEVICE_ID (0x1101)
91 /* TODO: change IDs for HastingsPrime */
92 #define QCA6490_EMULATION_DEVICE_ID (0x010a)
93 #define QCA6490_DEVICE_ID (0x1103)
94 
95 #define ADRASTEA_DEVICE_ID_P2_E12 (0x7021)
96 #define AR9887_DEVICE_ID    (0x0050)
97 #define AR900B_DEVICE_ID    (0x0040)
98 #define QCA9984_DEVICE_ID   (0x0046)
99 #define QCA9888_DEVICE_ID   (0x0056)
100 #ifndef IPQ4019_DEVICE_ID
101 #define IPQ4019_DEVICE_ID   (0x12ef)
102 #endif
103 #define QCA8074_DEVICE_ID   (0xffff) /* Todo: replace this with
104 					actual number once available.
105 					currently defining this to 0xffff for
106 					emulation purpose */
107 #define QCA8074V2_DEVICE_ID (0xfffe) /* Todo: replace this with actual number */
108 #define QCA6018_DEVICE_ID (0xfffd) /* Todo: replace this with actual number */
109 /* Genoa */
110 #define QCN7605_DEVICE_ID  (0x1102) /* Genoa PCIe device ID*/
111 #define QCN7605_COMPOSITE  (0x9901)
112 #define QCN7605_STANDALONE  (0x9900)
113 #define QCN7605_STANDALONE_V2  (0x9902)
114 #define QCN7605_COMPOSITE_V2  (0x9903)
115 
116 #define RUMIM2M_DEVICE_ID_NODE0	0xabc0
117 #define RUMIM2M_DEVICE_ID_NODE1	0xabc1
118 #define RUMIM2M_DEVICE_ID_NODE2	0xabc2
119 #define RUMIM2M_DEVICE_ID_NODE3	0xabc3
120 #define RUMIM2M_DEVICE_ID_NODE4	0xaa10
121 #define RUMIM2M_DEVICE_ID_NODE5	0xaa11
122 
123 #define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn)
124 #define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn)
125 #define HIF_GET_SDIO_SOFTC(scn) ((struct hif_sdio_softc *)scn)
126 #define HIF_GET_USB_SOFTC(scn) ((struct hif_usb_softc *)scn)
127 #define HIF_GET_USB_DEVICE(scn) ((struct HIF_DEVICE_USB *)scn)
128 #define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn)
129 #define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn)
130 
131 struct hif_ce_stats {
132 	int hif_pipe_no_resrc_count;
133 	int ce_ring_delta_fail_count;
134 };
135 
136 /*
137  * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked
138  * for defined here
139  */
140 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)
141 struct ce_desc_hist {
142 	qdf_atomic_t history_index[CE_COUNT_MAX];
143 	uint32_t enable[CE_COUNT_MAX];
144 	bool data_enable[CE_COUNT_MAX];
145 	qdf_mutex_t ce_dbg_datamem_lock[CE_COUNT_MAX];
146 	uint32_t hist_index;
147 	uint32_t hist_id;
148 	void *hist_ev[CE_COUNT_MAX];
149 };
150 #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)*/
151 
152 struct hif_softc {
153 	struct hif_opaque_softc osc;
154 	struct hif_config_info hif_config;
155 	struct hif_target_info target_info;
156 	void __iomem *mem;
157 	enum qdf_bus_type bus_type;
158 	struct hif_bus_ops bus_ops;
159 	void *ce_id_to_state[CE_COUNT_MAX];
160 	qdf_device_t qdf_dev;
161 	bool hif_init_done;
162 	bool request_irq_done;
163 	bool ext_grp_irq_configured;
164 	/* Packet statistics */
165 	struct hif_ce_stats pkt_stats;
166 	enum hif_target_status target_status;
167 	uint64_t event_disable_mask;
168 
169 	struct targetdef_s *targetdef;
170 	struct ce_reg_def *target_ce_def;
171 	struct hostdef_s *hostdef;
172 	struct host_shadow_regs_s *host_shadow_regs;
173 
174 	bool recovery;
175 	bool notice_send;
176 	bool per_ce_irq;
177 	uint32_t ce_irq_summary;
178 	/* No of copy engines supported */
179 	unsigned int ce_count;
180 	atomic_t active_tasklet_cnt;
181 	atomic_t active_grp_tasklet_cnt;
182 	atomic_t link_suspended;
183 	uint32_t *vaddr_rri_on_ddr;
184 	qdf_dma_addr_t paddr_rri_on_ddr;
185 	int linkstate_vote;
186 	bool fastpath_mode_on;
187 	atomic_t tasklet_from_intr;
188 	int htc_htt_tx_endpoint;
189 	qdf_dma_addr_t mem_pa;
190 	bool athdiag_procfs_inited;
191 #ifdef FEATURE_NAPI
192 	struct qca_napi_data napi_data;
193 #endif /* FEATURE_NAPI */
194 	/* stores ce_service_max_yield_time in ns */
195 	unsigned long long ce_service_max_yield_time;
196 	uint8_t ce_service_max_rx_ind_flush;
197 	struct hif_driver_state_callbacks callbacks;
198 	uint32_t hif_con_param;
199 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT
200 	uint32_t nss_wifi_ol_mode;
201 #endif
202 	void *hal_soc;
203 	struct hif_ut_suspend_context ut_suspend_ctx;
204 	uint32_t hif_attribute;
205 	int wake_irq;
206 	void (*initial_wakeup_cb)(void *);
207 	void *initial_wakeup_priv;
208 #ifdef REMOVE_PKT_LOG
209 	/* Handle to pktlog device */
210 	void *pktlog_dev;
211 #endif
212 
213 /*
214  * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked
215  * for defined here
216  */
217 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)
218 	struct ce_desc_hist hif_ce_desc_hist;
219 #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)*/
220 
221 #ifdef IPA_OFFLOAD
222 	qdf_shared_mem_t *ipa_ce_ring;
223 #endif
224 };
225 
226 static inline
227 void *hif_get_hal_handle(struct hif_opaque_softc *hif_hdl)
228 {
229 	struct hif_softc *sc = (struct hif_softc *)hif_hdl;
230 
231 	if (!sc)
232 		return NULL;
233 
234 	return sc->hal_soc;
235 }
236 
237 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT
238 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc)
239 {
240 	return !!(sc->nss_wifi_ol_mode);
241 }
242 #else
243 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc)
244 {
245 	return false;
246 }
247 #endif
248 
249 static inline uint8_t hif_is_attribute_set(struct hif_softc *sc,
250 						uint32_t hif_attrib)
251 {
252 	return sc->hif_attribute == hif_attrib;
253 }
254 
255 #ifdef WLAN_FEATURE_DP_EVENT_HISTORY
256 static inline void hif_set_event_hist_mask(struct hif_opaque_softc *hif_handle)
257 {
258 	struct hif_softc *scn = (struct hif_softc *)hif_handle;
259 
260 	scn->event_disable_mask = HIF_EVENT_HIST_DISABLE_MASK;
261 }
262 #else
263 static inline void hif_set_event_hist_mask(struct hif_opaque_softc *hif_handle)
264 {
265 }
266 #endif /* WLAN_FEATURE_DP_EVENT_HISTORY */
267 
268 A_target_id_t hif_get_target_id(struct hif_softc *scn);
269 void hif_dump_pipe_debug_count(struct hif_softc *scn);
270 void hif_display_bus_stats(struct hif_opaque_softc *scn);
271 void hif_clear_bus_stats(struct hif_opaque_softc *scn);
272 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count);
273 void hif_shutdown_device(struct hif_opaque_softc *hif_ctx);
274 int hif_bus_configure(struct hif_softc *scn);
275 void hif_cancel_deferred_target_sleep(struct hif_softc *scn);
276 int hif_config_ce(struct hif_softc *scn);
277 void hif_unconfig_ce(struct hif_softc *scn);
278 void hif_ce_prepare_config(struct hif_softc *scn);
279 QDF_STATUS hif_ce_open(struct hif_softc *scn);
280 void hif_ce_close(struct hif_softc *scn);
281 int athdiag_procfs_init(void *scn);
282 void athdiag_procfs_remove(void);
283 /* routine to modify the initial buffer count to be allocated on an os
284  * platform basis. Platform owner will need to modify this as needed
285  */
286 qdf_size_t init_buffer_count(qdf_size_t maxSize);
287 
288 irqreturn_t hif_fw_interrupt_handler(int irq, void *arg);
289 int hif_get_device_type(uint32_t device_id,
290 			uint32_t revision_id,
291 			uint32_t *hif_type, uint32_t *target_type);
292 /*These functions are exposed to HDD*/
293 void hif_nointrs(struct hif_softc *scn);
294 void hif_bus_close(struct hif_softc *ol_sc);
295 QDF_STATUS hif_bus_open(struct hif_softc *ol_sc,
296 	enum qdf_bus_type bus_type);
297 QDF_STATUS hif_enable_bus(struct hif_softc *ol_sc, struct device *dev,
298 	void *bdev, const struct hif_bus_id *bid, enum hif_enable_type type);
299 void hif_disable_bus(struct hif_softc *scn);
300 void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag);
301 int hif_bus_get_context_size(enum qdf_bus_type bus_type);
302 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *bar_value);
303 uint32_t hif_get_conparam(struct hif_softc *scn);
304 struct hif_driver_state_callbacks *hif_get_callbacks_handle(
305 							struct hif_softc *scn);
306 bool hif_is_driver_unloading(struct hif_softc *scn);
307 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn);
308 bool hif_is_recovery_in_progress(struct hif_softc *scn);
309 bool hif_is_target_ready(struct hif_softc *scn);
310 void hif_wlan_disable(struct hif_softc *scn);
311 int hif_target_sleep_state_adjust(struct hif_softc *scn,
312 					 bool sleep_ok,
313 					 bool wait_for_it);
314 /**
315  * hif_get_rx_ctx_id() - Returns NAPI instance ID based on CE ID
316  * @ctx_id: Rx CE context ID
317  * @hif_hdl: HIF Context
318  *
319  * Return: Rx instance ID
320  */
321 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl);
322 void hif_ramdump_handler(struct hif_opaque_softc *scn);
323 #ifdef HIF_USB
324 void hif_usb_get_hw_info(struct hif_softc *scn);
325 void hif_usb_ramdump_handler(struct hif_opaque_softc *scn);
326 #else
327 static inline void hif_usb_get_hw_info(struct hif_softc *scn) {}
328 static inline void hif_usb_ramdump_handler(struct hif_opaque_softc *scn) {}
329 #endif
330 
331 /**
332  * hif_wake_interrupt_handler() - interrupt handler for standalone wake irq
333  * @irq: the irq number that fired
334  * @context: the opaque pointer passed to request_irq()
335  *
336  * Return: an irq return type
337  */
338 irqreturn_t hif_wake_interrupt_handler(int irq, void *context);
339 
340 #ifdef HIF_SNOC
341 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc);
342 #else
343 static inline
344 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc)
345 {
346 	return true;
347 }
348 #endif
349 
350 #ifdef ADRASTEA_RRI_ON_DDR
351 void hif_uninit_rri_on_ddr(struct hif_softc *scn);
352 #else
353 static inline
354 void hif_uninit_rri_on_ddr(struct hif_softc *scn) {}
355 #endif
356 #endif /* __HIF_MAIN_H__ */
357