1 /* 2 * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * NB: Inappropriate references to "HTC" are used in this (and other) 21 * HIF implementations. HTC is typically the calling layer, but it 22 * theoretically could be some alternative. 23 */ 24 25 /* 26 * This holds all state needed to process a pending send/recv interrupt. 27 * The information is saved here as soon as the interrupt occurs (thus 28 * allowing the underlying CE to re-use the ring descriptor). The 29 * information here is eventually processed by a completion processing 30 * thread. 31 */ 32 33 #ifndef __HIF_MAIN_H__ 34 #define __HIF_MAIN_H__ 35 36 #include <qdf_atomic.h> /* qdf_atomic_read */ 37 #include "qdf_lock.h" 38 #include "cepci.h" 39 #include "hif.h" 40 #include "multibus.h" 41 #include "hif_unit_test_suspend_i.h" 42 43 #define HIF_MIN_SLEEP_INACTIVITY_TIME_MS 50 44 #define HIF_SLEEP_INACTIVITY_TIMER_PERIOD_MS 60 45 46 #define HIF_MAX_BUDGET 0xFFFF 47 48 /* 49 * This macro implementation is exposed for efficiency only. 50 * The implementation may change and callers should 51 * consider the targid to be a completely opaque handle. 52 */ 53 #define TARGID_TO_PCI_ADDR(targid) (*((A_target_id_t *)(targid))) 54 55 #ifdef QCA_WIFI_3_0 56 #define DISABLE_L1SS_STATES 1 57 #endif 58 59 #define MAX_NUM_OF_RECEIVES HIF_NAPI_MAX_RECEIVES 60 61 #ifdef QCA_WIFI_3_0_ADRASTEA 62 #define ADRASTEA_BU 1 63 #else 64 #define ADRASTEA_BU 0 65 #endif 66 67 #ifdef QCA_WIFI_3_0 68 #define HAS_FW_INDICATOR 0 69 #else 70 #define HAS_FW_INDICATOR 1 71 #endif 72 73 74 #define AR9888_DEVICE_ID (0x003c) 75 #define AR6320_DEVICE_ID (0x003e) 76 #define AR6320_FW_1_1 (0x11) 77 #define AR6320_FW_1_3 (0x13) 78 #define AR6320_FW_2_0 (0x20) 79 #define AR6320_FW_3_0 (0x30) 80 #define AR6320_FW_3_2 (0x32) 81 #define QCA6290_EMULATION_DEVICE_ID (0xabcd) 82 #define QCA6290_DEVICE_ID (0x1100) 83 #define QCA6390_EMULATION_DEVICE_ID (0x0108) 84 #define QCA6390_DEVICE_ID (0x1101) 85 #define ADRASTEA_DEVICE_ID_P2_E12 (0x7021) 86 #define AR9887_DEVICE_ID (0x0050) 87 #define AR900B_DEVICE_ID (0x0040) 88 #define QCA9984_DEVICE_ID (0x0046) 89 #define QCA9888_DEVICE_ID (0x0056) 90 #ifndef IPQ4019_DEVICE_ID 91 #define IPQ4019_DEVICE_ID (0x12ef) 92 #endif 93 #define QCA8074_DEVICE_ID (0xffff) /* Todo: replace this with 94 actual number once available. 95 currently defining this to 0xffff for 96 emulation purpose */ 97 #define QCA8074V2_DEVICE_ID (0xfffe) /* Todo: replace this with actual number */ 98 #define QCA6018_DEVICE_ID (0xfffd) /* Todo: replace this with actual number */ 99 /* Genoa */ 100 #define QCN7605_DEVICE_ID (0x1102) /* Genoa PCIe device ID*/ 101 #define QCN7605_COMPOSITE (0x9900) 102 #define QCN7605_STANDALONE (0x9901) 103 104 #define RUMIM2M_DEVICE_ID_NODE0 0xabc0 105 #define RUMIM2M_DEVICE_ID_NODE1 0xabc1 106 #define RUMIM2M_DEVICE_ID_NODE2 0xabc2 107 #define RUMIM2M_DEVICE_ID_NODE3 0xabc3 108 #define RUMIM2M_DEVICE_ID_NODE4 0xaa10 109 #define RUMIM2M_DEVICE_ID_NODE5 0xaa11 110 111 #define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn) 112 #define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn) 113 #define HIF_GET_SDIO_SOFTC(scn) ((struct hif_sdio_softc *)scn) 114 #define HIF_GET_USB_SOFTC(scn) ((struct hif_usb_softc *)scn) 115 #define HIF_GET_USB_DEVICE(scn) ((struct HIF_DEVICE_USB *)scn) 116 #define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn) 117 #define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn) 118 119 struct hif_ce_stats { 120 int hif_pipe_no_resrc_count; 121 int ce_ring_delta_fail_count; 122 }; 123 124 /* 125 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 126 * for defined here 127 */ 128 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 129 struct ce_desc_hist { 130 qdf_atomic_t history_index[CE_COUNT_MAX]; 131 uint32_t enable[CE_COUNT_MAX]; 132 uint32_t data_enable[CE_COUNT_MAX]; 133 qdf_mutex_t ce_dbg_datamem_lock[CE_COUNT_MAX]; 134 uint32_t hist_index; 135 uint32_t hist_id; 136 void *hist_ev[CE_COUNT_MAX]; 137 }; 138 #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)*/ 139 140 struct hif_softc { 141 struct hif_opaque_softc osc; 142 struct hif_config_info hif_config; 143 struct hif_target_info target_info; 144 void __iomem *mem; 145 enum qdf_bus_type bus_type; 146 struct hif_bus_ops bus_ops; 147 void *ce_id_to_state[CE_COUNT_MAX]; 148 qdf_device_t qdf_dev; 149 bool hif_init_done; 150 bool request_irq_done; 151 bool ext_grp_irq_configured; 152 /* Packet statistics */ 153 struct hif_ce_stats pkt_stats; 154 enum hif_target_status target_status; 155 156 struct targetdef_s *targetdef; 157 struct ce_reg_def *target_ce_def; 158 struct hostdef_s *hostdef; 159 struct host_shadow_regs_s *host_shadow_regs; 160 161 bool recovery; 162 bool notice_send; 163 bool per_ce_irq; 164 uint32_t ce_irq_summary; 165 /* No of copy engines supported */ 166 unsigned int ce_count; 167 atomic_t active_tasklet_cnt; 168 atomic_t active_grp_tasklet_cnt; 169 atomic_t link_suspended; 170 uint32_t *vaddr_rri_on_ddr; 171 qdf_dma_addr_t paddr_rri_on_ddr; 172 int linkstate_vote; 173 bool fastpath_mode_on; 174 atomic_t tasklet_from_intr; 175 int htc_htt_tx_endpoint; 176 qdf_dma_addr_t mem_pa; 177 bool athdiag_procfs_inited; 178 #ifdef FEATURE_NAPI 179 struct qca_napi_data napi_data; 180 #endif /* FEATURE_NAPI */ 181 /* stores ce_service_max_yield_time in ns */ 182 unsigned long long ce_service_max_yield_time; 183 uint8_t ce_service_max_rx_ind_flush; 184 struct hif_driver_state_callbacks callbacks; 185 uint32_t hif_con_param; 186 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 187 uint32_t nss_wifi_ol_mode; 188 #endif 189 void *hal_soc; 190 struct hif_ut_suspend_context ut_suspend_ctx; 191 uint32_t hif_attribute; 192 int wake_irq; 193 void (*initial_wakeup_cb)(void *); 194 void *initial_wakeup_priv; 195 #ifdef REMOVE_PKT_LOG 196 /* Handle to pktlog device */ 197 void *pktlog_dev; 198 #endif 199 200 /* 201 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 202 * for defined here 203 */ 204 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 205 struct ce_desc_hist hif_ce_desc_hist; 206 #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)*/ 207 208 #ifdef IPA_OFFLOAD 209 qdf_shared_mem_t *ipa_ce_ring; 210 #endif 211 }; 212 213 static inline void *hif_get_hal_handle(void *hif_hdl) 214 { 215 struct hif_softc *sc = (struct hif_softc *)hif_hdl; 216 217 if (!sc) 218 return NULL; 219 220 return sc->hal_soc; 221 } 222 223 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 224 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 225 { 226 return !!(sc->nss_wifi_ol_mode); 227 } 228 #else 229 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 230 { 231 return false; 232 } 233 #endif 234 235 static inline uint8_t hif_is_attribute_set(struct hif_softc *sc, 236 uint32_t hif_attrib) 237 { 238 return sc->hif_attribute == hif_attrib; 239 } 240 241 A_target_id_t hif_get_target_id(struct hif_softc *scn); 242 void hif_dump_pipe_debug_count(struct hif_softc *scn); 243 void hif_display_bus_stats(struct hif_opaque_softc *scn); 244 void hif_clear_bus_stats(struct hif_opaque_softc *scn); 245 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count); 246 void hif_shutdown_device(struct hif_opaque_softc *hif_ctx); 247 int hif_bus_configure(struct hif_softc *scn); 248 void hif_cancel_deferred_target_sleep(struct hif_softc *scn); 249 int hif_config_ce(struct hif_softc *scn); 250 void hif_unconfig_ce(struct hif_softc *scn); 251 void hif_ce_prepare_config(struct hif_softc *scn); 252 QDF_STATUS hif_ce_open(struct hif_softc *scn); 253 void hif_ce_close(struct hif_softc *scn); 254 int athdiag_procfs_init(void *scn); 255 void athdiag_procfs_remove(void); 256 /* routine to modify the initial buffer count to be allocated on an os 257 * platform basis. Platform owner will need to modify this as needed 258 */ 259 qdf_size_t init_buffer_count(qdf_size_t maxSize); 260 261 irqreturn_t hif_fw_interrupt_handler(int irq, void *arg); 262 int hif_get_device_type(uint32_t device_id, 263 uint32_t revision_id, 264 uint32_t *hif_type, uint32_t *target_type); 265 /*These functions are exposed to HDD*/ 266 void hif_nointrs(struct hif_softc *scn); 267 void hif_bus_close(struct hif_softc *ol_sc); 268 QDF_STATUS hif_bus_open(struct hif_softc *ol_sc, 269 enum qdf_bus_type bus_type); 270 QDF_STATUS hif_enable_bus(struct hif_softc *ol_sc, struct device *dev, 271 void *bdev, const struct hif_bus_id *bid, enum hif_enable_type type); 272 void hif_disable_bus(struct hif_softc *scn); 273 void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag); 274 int hif_bus_get_context_size(enum qdf_bus_type bus_type); 275 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *bar_value); 276 uint32_t hif_get_conparam(struct hif_softc *scn); 277 struct hif_driver_state_callbacks *hif_get_callbacks_handle( 278 struct hif_softc *scn); 279 bool hif_is_driver_unloading(struct hif_softc *scn); 280 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn); 281 bool hif_is_recovery_in_progress(struct hif_softc *scn); 282 bool hif_is_target_ready(struct hif_softc *scn); 283 void hif_wlan_disable(struct hif_softc *scn); 284 int hif_target_sleep_state_adjust(struct hif_softc *scn, 285 bool sleep_ok, 286 bool wait_for_it); 287 /** 288 * hif_get_rx_ctx_id() - Returns NAPI instance ID based on CE ID 289 * @ctx_id: Rx CE context ID 290 * @hif_hdl: HIF Context 291 * 292 * Return: Rx instance ID 293 */ 294 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl); 295 void hif_ramdump_handler(struct hif_opaque_softc *scn); 296 #ifdef HIF_USB 297 void hif_usb_get_hw_info(struct hif_softc *scn); 298 void hif_usb_ramdump_handler(struct hif_opaque_softc *scn); 299 #else 300 static inline void hif_usb_get_hw_info(struct hif_softc *scn) {} 301 static inline void hif_usb_ramdump_handler(struct hif_opaque_softc *scn) {} 302 #endif 303 304 /** 305 * hif_wake_interrupt_handler() - interrupt handler for standalone wake irq 306 * @irq: the irq number that fired 307 * @context: the opaque pointer passed to request_irq() 308 * 309 * Return: an irq return type 310 */ 311 irqreturn_t hif_wake_interrupt_handler(int irq, void *context); 312 313 #ifdef HIF_SNOC 314 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc); 315 #else 316 static inline 317 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc) 318 { 319 return true; 320 } 321 #endif 322 323 #ifdef ADRASTEA_RRI_ON_DDR 324 void hif_uninit_rri_on_ddr(struct hif_softc *scn); 325 #else 326 static inline 327 void hif_uninit_rri_on_ddr(struct hif_softc *scn) {} 328 #endif 329 #endif /* __HIF_MAIN_H__ */ 330