1 /* 2 * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * NB: Inappropriate references to "HTC" are used in this (and other) 21 * HIF implementations. HTC is typically the calling layer, but it 22 * theoretically could be some alternative. 23 */ 24 25 /* 26 * This holds all state needed to process a pending send/recv interrupt. 27 * The information is saved here as soon as the interrupt occurs (thus 28 * allowing the underlying CE to re-use the ring descriptor). The 29 * information here is eventually processed by a completion processing 30 * thread. 31 */ 32 33 #ifndef __HIF_MAIN_H__ 34 #define __HIF_MAIN_H__ 35 36 #include <qdf_atomic.h> /* qdf_atomic_read */ 37 #include "qdf_lock.h" 38 #include "cepci.h" 39 #include "hif.h" 40 #include "multibus.h" 41 #include "hif_unit_test_suspend_i.h" 42 43 #define HIF_MIN_SLEEP_INACTIVITY_TIME_MS 50 44 #define HIF_SLEEP_INACTIVITY_TIMER_PERIOD_MS 60 45 46 #define HIF_MAX_BUDGET 0xFFFF 47 48 /* 49 * This macro implementation is exposed for efficiency only. 50 * The implementation may change and callers should 51 * consider the targid to be a completely opaque handle. 52 */ 53 #define TARGID_TO_PCI_ADDR(targid) (*((A_target_id_t *)(targid))) 54 55 #ifdef QCA_WIFI_3_0 56 #define DISABLE_L1SS_STATES 1 57 #endif 58 59 #define MAX_NUM_OF_RECEIVES HIF_NAPI_MAX_RECEIVES 60 61 #ifdef QCA_WIFI_3_0_ADRASTEA 62 #define ADRASTEA_BU 1 63 #else 64 #define ADRASTEA_BU 0 65 #endif 66 67 #ifdef QCA_WIFI_3_0 68 #define HAS_FW_INDICATOR 0 69 #else 70 #define HAS_FW_INDICATOR 1 71 #endif 72 73 74 #define AR9888_DEVICE_ID (0x003c) 75 #define AR6320_DEVICE_ID (0x003e) 76 #define AR6320_FW_1_1 (0x11) 77 #define AR6320_FW_1_3 (0x13) 78 #define AR6320_FW_2_0 (0x20) 79 #define AR6320_FW_3_0 (0x30) 80 #define AR6320_FW_3_2 (0x32) 81 #define QCA6290_EMULATION_DEVICE_ID (0xabcd) 82 #define QCA6290_DEVICE_ID (0x1100) 83 #define ADRASTEA_DEVICE_ID_P2_E12 (0x7021) 84 #define AR9887_DEVICE_ID (0x0050) 85 #define AR900B_DEVICE_ID (0x0040) 86 #define QCA9984_DEVICE_ID (0x0046) 87 #define QCA9888_DEVICE_ID (0x0056) 88 #ifndef IPQ4019_DEVICE_ID 89 #define IPQ4019_DEVICE_ID (0x12ef) 90 #endif 91 #define QCA8074_DEVICE_ID (0xffff) /* Todo: replace this with 92 actual number once available. 93 currently defining this to 0xffff for 94 emulation purpose */ 95 /* Genoa */ 96 #define QCN7605_COMPOSITE (0x9900) 97 #define QCN7605_STANDALONE (0x9901) 98 99 #define RUMIM2M_DEVICE_ID_NODE0 0xabc0 100 #define RUMIM2M_DEVICE_ID_NODE1 0xabc1 101 #define RUMIM2M_DEVICE_ID_NODE2 0xabc2 102 #define RUMIM2M_DEVICE_ID_NODE3 0xabc3 103 104 #define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn) 105 #define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn) 106 #define HIF_GET_SDIO_SOFTC(scn) ((struct hif_sdio_softc *)scn) 107 #define HIF_GET_USB_SOFTC(scn) ((struct hif_usb_softc *)scn) 108 #define HIF_GET_USB_DEVICE(scn) ((struct HIF_DEVICE_USB *)scn) 109 #define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn) 110 #define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn) 111 112 struct hif_ce_stats { 113 int hif_pipe_no_resrc_count; 114 int ce_ring_delta_fail_count; 115 }; 116 117 /* 118 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 119 * for defined here 120 */ 121 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 122 struct ce_desc_hist { 123 qdf_atomic_t history_index[CE_COUNT_MAX]; 124 uint32_t enable[CE_COUNT_MAX]; 125 uint32_t data_enable[CE_COUNT_MAX]; 126 uint32_t hist_index; 127 uint32_t hist_id; 128 void *hist_ev[CE_COUNT_MAX]; 129 }; 130 #endif /* #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || HIF_CE_DEBUG_DATA_BUF */ 131 132 struct hif_softc { 133 struct hif_opaque_softc osc; 134 struct hif_config_info hif_config; 135 struct hif_target_info target_info; 136 void __iomem *mem; 137 enum qdf_bus_type bus_type; 138 struct hif_bus_ops bus_ops; 139 void *ce_id_to_state[CE_COUNT_MAX]; 140 qdf_device_t qdf_dev; 141 bool hif_init_done; 142 bool request_irq_done; 143 bool ext_grp_irq_configured; 144 /* Packet statistics */ 145 struct hif_ce_stats pkt_stats; 146 enum hif_target_status target_status; 147 148 struct targetdef_s *targetdef; 149 struct ce_reg_def *target_ce_def; 150 struct hostdef_s *hostdef; 151 struct host_shadow_regs_s *host_shadow_regs; 152 153 bool recovery; 154 bool notice_send; 155 bool per_ce_irq; 156 uint32_t ce_irq_summary; 157 /* No of copy engines supported */ 158 unsigned int ce_count; 159 atomic_t active_tasklet_cnt; 160 atomic_t active_grp_tasklet_cnt; 161 atomic_t link_suspended; 162 uint32_t *vaddr_rri_on_ddr; 163 qdf_dma_addr_t paddr_rri_on_ddr; 164 int linkstate_vote; 165 bool fastpath_mode_on; 166 bool polled_mode_on; 167 atomic_t tasklet_from_intr; 168 int htc_htt_tx_endpoint; 169 qdf_dma_addr_t mem_pa; 170 bool athdiag_procfs_inited; 171 #ifdef FEATURE_NAPI 172 struct qca_napi_data napi_data; 173 #endif /* FEATURE_NAPI */ 174 /* stores ce_service_max_yield_time in ns */ 175 unsigned long long ce_service_max_yield_time; 176 uint8_t ce_service_max_rx_ind_flush; 177 struct hif_driver_state_callbacks callbacks; 178 uint32_t hif_con_param; 179 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 180 uint32_t nss_wifi_ol_mode; 181 #endif 182 void *hal_soc; 183 struct hif_ut_suspend_context ut_suspend_ctx; 184 uint32_t hif_attribute; 185 int wake_irq; 186 void (*initial_wakeup_cb)(void *); 187 void *initial_wakeup_priv; 188 #ifdef REMOVE_PKT_LOG 189 /* Handle to pktlog device */ 190 void *pktlog_dev; 191 #endif 192 193 /* 194 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 195 * for defined here 196 */ 197 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 198 struct ce_desc_hist hif_ce_desc_hist; 199 #endif /* #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || HIF_CE_DEBUG_DATA_BUF */ 200 #ifdef IPA_OFFLOAD 201 qdf_shared_mem_t *ipa_ce_ring; 202 #endif 203 }; 204 205 static inline void *hif_get_hal_handle(void *hif_hdl) 206 { 207 struct hif_softc *sc = (struct hif_softc *)hif_hdl; 208 209 if (!sc) 210 return NULL; 211 212 return sc->hal_soc; 213 } 214 215 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 216 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 217 { 218 return !!(sc->nss_wifi_ol_mode); 219 } 220 #else 221 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 222 { 223 return false; 224 } 225 #endif 226 227 static inline uint8_t hif_is_attribute_set(struct hif_softc *sc, 228 uint32_t hif_attrib) 229 { 230 return sc->hif_attribute == hif_attrib; 231 } 232 233 A_target_id_t hif_get_target_id(struct hif_softc *scn); 234 void hif_dump_pipe_debug_count(struct hif_softc *scn); 235 void hif_display_bus_stats(struct hif_opaque_softc *scn); 236 void hif_clear_bus_stats(struct hif_opaque_softc *scn); 237 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count); 238 void hif_shutdown_device(struct hif_opaque_softc *hif_ctx); 239 int hif_bus_configure(struct hif_softc *scn); 240 void hif_cancel_deferred_target_sleep(struct hif_softc *scn); 241 int hif_config_ce(struct hif_softc *scn); 242 void hif_unconfig_ce(struct hif_softc *scn); 243 void hif_ce_prepare_config(struct hif_softc *scn); 244 QDF_STATUS hif_ce_open(struct hif_softc *scn); 245 void hif_ce_close(struct hif_softc *scn); 246 int athdiag_procfs_init(void *scn); 247 void athdiag_procfs_remove(void); 248 /* routine to modify the initial buffer count to be allocated on an os 249 * platform basis. Platform owner will need to modify this as needed 250 */ 251 qdf_size_t init_buffer_count(qdf_size_t maxSize); 252 253 irqreturn_t hif_fw_interrupt_handler(int irq, void *arg); 254 int hif_get_device_type(uint32_t device_id, 255 uint32_t revision_id, 256 uint32_t *hif_type, uint32_t *target_type); 257 /*These functions are exposed to HDD*/ 258 void hif_nointrs(struct hif_softc *scn); 259 void hif_bus_close(struct hif_softc *ol_sc); 260 QDF_STATUS hif_bus_open(struct hif_softc *ol_sc, 261 enum qdf_bus_type bus_type); 262 QDF_STATUS hif_enable_bus(struct hif_softc *ol_sc, struct device *dev, 263 void *bdev, const struct hif_bus_id *bid, enum hif_enable_type type); 264 void hif_disable_bus(struct hif_softc *scn); 265 void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag); 266 int hif_bus_get_context_size(enum qdf_bus_type bus_type); 267 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *bar_value); 268 uint32_t hif_get_conparam(struct hif_softc *scn); 269 struct hif_driver_state_callbacks *hif_get_callbacks_handle( 270 struct hif_softc *scn); 271 bool hif_is_driver_unloading(struct hif_softc *scn); 272 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn); 273 bool hif_is_recovery_in_progress(struct hif_softc *scn); 274 bool hif_is_target_ready(struct hif_softc *scn); 275 void hif_wlan_disable(struct hif_softc *scn); 276 int hif_target_sleep_state_adjust(struct hif_softc *scn, 277 bool sleep_ok, 278 bool wait_for_it); 279 /** 280 * hif_get_rx_ctx_id() - Returns NAPI instance ID based on CE ID 281 * @ctx_id: Rx CE context ID 282 * @hif_hdl: HIF Context 283 * 284 * Return: Rx instance ID 285 */ 286 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl); 287 void hif_ramdump_handler(struct hif_opaque_softc *scn); 288 #ifdef HIF_USB 289 void hif_usb_get_hw_info(struct hif_softc *scn); 290 void hif_usb_ramdump_handler(struct hif_opaque_softc *scn); 291 #else 292 static inline void hif_usb_get_hw_info(struct hif_softc *scn) {} 293 static inline void hif_usb_ramdump_handler(struct hif_opaque_softc *scn) {} 294 #endif 295 296 /** 297 * hif_wake_interrupt_handler() - interrupt handler for standalone wake irq 298 * @irq: the irq number that fired 299 * @context: the opaque pointer passed to request_irq() 300 * 301 * Return: an irq return type 302 */ 303 irqreturn_t hif_wake_interrupt_handler(int irq, void *context); 304 305 #ifdef HIF_SNOC 306 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc); 307 #else 308 static inline 309 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc) 310 { 311 return true; 312 } 313 #endif 314 315 #ifdef ADRASTEA_RRI_ON_DDR 316 void hif_uninit_rri_on_ddr(struct hif_softc *scn); 317 #else 318 static inline 319 void hif_uninit_rri_on_ddr(struct hif_softc *scn) {} 320 #endif 321 #endif /* __HIF_MAIN_H__ */ 322