1 /* 2 * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * NB: Inappropriate references to "HTC" are used in this (and other) 21 * HIF implementations. HTC is typically the calling layer, but it 22 * theoretically could be some alternative. 23 */ 24 25 /* 26 * This holds all state needed to process a pending send/recv interrupt. 27 * The information is saved here as soon as the interrupt occurs (thus 28 * allowing the underlying CE to re-use the ring descriptor). The 29 * information here is eventually processed by a completion processing 30 * thread. 31 */ 32 33 #ifndef __HIF_MAIN_H__ 34 #define __HIF_MAIN_H__ 35 36 #include <qdf_atomic.h> /* qdf_atomic_read */ 37 #include "qdf_lock.h" 38 #include "cepci.h" 39 #include "hif.h" 40 #include "multibus.h" 41 #include "hif_unit_test_suspend_i.h" 42 43 #define HIF_MIN_SLEEP_INACTIVITY_TIME_MS 50 44 #define HIF_SLEEP_INACTIVITY_TIMER_PERIOD_MS 60 45 46 #define HIF_MAX_BUDGET 0xFFFF 47 48 /* 49 * This macro implementation is exposed for efficiency only. 50 * The implementation may change and callers should 51 * consider the targid to be a completely opaque handle. 52 */ 53 #define TARGID_TO_PCI_ADDR(targid) (*((A_target_id_t *)(targid))) 54 55 #ifdef QCA_WIFI_3_0 56 #define DISABLE_L1SS_STATES 1 57 #endif 58 59 #define MAX_NUM_OF_RECEIVES HIF_NAPI_MAX_RECEIVES 60 61 #ifdef QCA_WIFI_3_0_ADRASTEA 62 #define ADRASTEA_BU 1 63 #else 64 #define ADRASTEA_BU 0 65 #endif 66 67 #ifdef QCA_WIFI_3_0 68 #define HAS_FW_INDICATOR 0 69 #else 70 #define HAS_FW_INDICATOR 1 71 #endif 72 73 74 #define AR9888_DEVICE_ID (0x003c) 75 #define AR6320_DEVICE_ID (0x003e) 76 #define AR6320_FW_1_1 (0x11) 77 #define AR6320_FW_1_3 (0x13) 78 #define AR6320_FW_2_0 (0x20) 79 #define AR6320_FW_3_0 (0x30) 80 #define AR6320_FW_3_2 (0x32) 81 #define QCA6290_EMULATION_DEVICE_ID (0xabcd) 82 #define QCA6290_DEVICE_ID (0x1100) 83 #define QCA6390_EMULATION_DEVICE_ID (0x0108) 84 #define QCA6390_DEVICE_ID (0x1101) 85 #define ADRASTEA_DEVICE_ID_P2_E12 (0x7021) 86 #define AR9887_DEVICE_ID (0x0050) 87 #define AR900B_DEVICE_ID (0x0040) 88 #define QCA9984_DEVICE_ID (0x0046) 89 #define QCA9888_DEVICE_ID (0x0056) 90 #ifndef IPQ4019_DEVICE_ID 91 #define IPQ4019_DEVICE_ID (0x12ef) 92 #endif 93 #define QCA8074_DEVICE_ID (0xffff) /* Todo: replace this with 94 actual number once available. 95 currently defining this to 0xffff for 96 emulation purpose */ 97 #define QCA8074V2_DEVICE_ID (0xfffe) /* Todo: replace this with actual number */ 98 #define QCA6018_DEVICE_ID (0xfffd) /* Todo: replace this with actual number */ 99 /* Genoa */ 100 #define QCN7605_DEVICE_ID (0x1102) /* Genoa PCIe device ID*/ 101 #define QCN7605_COMPOSITE (0x9900) 102 #define QCN7605_STANDALONE (0x9901) 103 104 #define RUMIM2M_DEVICE_ID_NODE0 0xabc0 105 #define RUMIM2M_DEVICE_ID_NODE1 0xabc1 106 #define RUMIM2M_DEVICE_ID_NODE2 0xabc2 107 #define RUMIM2M_DEVICE_ID_NODE3 0xabc3 108 #define RUMIM2M_DEVICE_ID_NODE4 0xaa10 109 #define RUMIM2M_DEVICE_ID_NODE5 0xaa11 110 111 #define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn) 112 #define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn) 113 #define HIF_GET_SDIO_SOFTC(scn) ((struct hif_sdio_softc *)scn) 114 #define HIF_GET_USB_SOFTC(scn) ((struct hif_usb_softc *)scn) 115 #define HIF_GET_USB_DEVICE(scn) ((struct HIF_DEVICE_USB *)scn) 116 #define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn) 117 #define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn) 118 119 struct hif_ce_stats { 120 int hif_pipe_no_resrc_count; 121 int ce_ring_delta_fail_count; 122 }; 123 124 /* 125 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 126 * for defined here 127 */ 128 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 129 struct ce_desc_hist { 130 qdf_atomic_t history_index[CE_COUNT_MAX]; 131 uint32_t enable[CE_COUNT_MAX]; 132 uint32_t data_enable[CE_COUNT_MAX]; 133 uint32_t hist_index; 134 uint32_t hist_id; 135 void *hist_ev[CE_COUNT_MAX]; 136 }; 137 #endif /* #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || HIF_CE_DEBUG_DATA_BUF */ 138 139 struct hif_softc { 140 struct hif_opaque_softc osc; 141 struct hif_config_info hif_config; 142 struct hif_target_info target_info; 143 void __iomem *mem; 144 enum qdf_bus_type bus_type; 145 struct hif_bus_ops bus_ops; 146 void *ce_id_to_state[CE_COUNT_MAX]; 147 qdf_device_t qdf_dev; 148 bool hif_init_done; 149 bool request_irq_done; 150 bool ext_grp_irq_configured; 151 /* Packet statistics */ 152 struct hif_ce_stats pkt_stats; 153 enum hif_target_status target_status; 154 155 struct targetdef_s *targetdef; 156 struct ce_reg_def *target_ce_def; 157 struct hostdef_s *hostdef; 158 struct host_shadow_regs_s *host_shadow_regs; 159 160 bool recovery; 161 bool notice_send; 162 bool per_ce_irq; 163 uint32_t ce_irq_summary; 164 /* No of copy engines supported */ 165 unsigned int ce_count; 166 atomic_t active_tasklet_cnt; 167 atomic_t active_grp_tasklet_cnt; 168 atomic_t link_suspended; 169 uint32_t *vaddr_rri_on_ddr; 170 qdf_dma_addr_t paddr_rri_on_ddr; 171 int linkstate_vote; 172 bool fastpath_mode_on; 173 atomic_t tasklet_from_intr; 174 int htc_htt_tx_endpoint; 175 qdf_dma_addr_t mem_pa; 176 bool athdiag_procfs_inited; 177 #ifdef FEATURE_NAPI 178 struct qca_napi_data napi_data; 179 #endif /* FEATURE_NAPI */ 180 /* stores ce_service_max_yield_time in ns */ 181 unsigned long long ce_service_max_yield_time; 182 uint8_t ce_service_max_rx_ind_flush; 183 struct hif_driver_state_callbacks callbacks; 184 uint32_t hif_con_param; 185 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 186 uint32_t nss_wifi_ol_mode; 187 #endif 188 void *hal_soc; 189 struct hif_ut_suspend_context ut_suspend_ctx; 190 uint32_t hif_attribute; 191 int wake_irq; 192 void (*initial_wakeup_cb)(void *); 193 void *initial_wakeup_priv; 194 #ifdef REMOVE_PKT_LOG 195 /* Handle to pktlog device */ 196 void *pktlog_dev; 197 #endif 198 199 /* 200 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 201 * for defined here 202 */ 203 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 204 struct ce_desc_hist hif_ce_desc_hist; 205 #endif /* #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || HIF_CE_DEBUG_DATA_BUF */ 206 #ifdef IPA_OFFLOAD 207 qdf_shared_mem_t *ipa_ce_ring; 208 #endif 209 }; 210 211 static inline void *hif_get_hal_handle(void *hif_hdl) 212 { 213 struct hif_softc *sc = (struct hif_softc *)hif_hdl; 214 215 if (!sc) 216 return NULL; 217 218 return sc->hal_soc; 219 } 220 221 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 222 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 223 { 224 return !!(sc->nss_wifi_ol_mode); 225 } 226 #else 227 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 228 { 229 return false; 230 } 231 #endif 232 233 static inline uint8_t hif_is_attribute_set(struct hif_softc *sc, 234 uint32_t hif_attrib) 235 { 236 return sc->hif_attribute == hif_attrib; 237 } 238 239 A_target_id_t hif_get_target_id(struct hif_softc *scn); 240 void hif_dump_pipe_debug_count(struct hif_softc *scn); 241 void hif_display_bus_stats(struct hif_opaque_softc *scn); 242 void hif_clear_bus_stats(struct hif_opaque_softc *scn); 243 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count); 244 void hif_shutdown_device(struct hif_opaque_softc *hif_ctx); 245 int hif_bus_configure(struct hif_softc *scn); 246 void hif_cancel_deferred_target_sleep(struct hif_softc *scn); 247 int hif_config_ce(struct hif_softc *scn); 248 void hif_unconfig_ce(struct hif_softc *scn); 249 void hif_ce_prepare_config(struct hif_softc *scn); 250 QDF_STATUS hif_ce_open(struct hif_softc *scn); 251 void hif_ce_close(struct hif_softc *scn); 252 int athdiag_procfs_init(void *scn); 253 void athdiag_procfs_remove(void); 254 /* routine to modify the initial buffer count to be allocated on an os 255 * platform basis. Platform owner will need to modify this as needed 256 */ 257 qdf_size_t init_buffer_count(qdf_size_t maxSize); 258 259 irqreturn_t hif_fw_interrupt_handler(int irq, void *arg); 260 int hif_get_device_type(uint32_t device_id, 261 uint32_t revision_id, 262 uint32_t *hif_type, uint32_t *target_type); 263 /*These functions are exposed to HDD*/ 264 void hif_nointrs(struct hif_softc *scn); 265 void hif_bus_close(struct hif_softc *ol_sc); 266 QDF_STATUS hif_bus_open(struct hif_softc *ol_sc, 267 enum qdf_bus_type bus_type); 268 QDF_STATUS hif_enable_bus(struct hif_softc *ol_sc, struct device *dev, 269 void *bdev, const struct hif_bus_id *bid, enum hif_enable_type type); 270 void hif_disable_bus(struct hif_softc *scn); 271 void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag); 272 int hif_bus_get_context_size(enum qdf_bus_type bus_type); 273 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *bar_value); 274 uint32_t hif_get_conparam(struct hif_softc *scn); 275 struct hif_driver_state_callbacks *hif_get_callbacks_handle( 276 struct hif_softc *scn); 277 bool hif_is_driver_unloading(struct hif_softc *scn); 278 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn); 279 bool hif_is_recovery_in_progress(struct hif_softc *scn); 280 bool hif_is_target_ready(struct hif_softc *scn); 281 void hif_wlan_disable(struct hif_softc *scn); 282 int hif_target_sleep_state_adjust(struct hif_softc *scn, 283 bool sleep_ok, 284 bool wait_for_it); 285 /** 286 * hif_get_rx_ctx_id() - Returns NAPI instance ID based on CE ID 287 * @ctx_id: Rx CE context ID 288 * @hif_hdl: HIF Context 289 * 290 * Return: Rx instance ID 291 */ 292 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl); 293 void hif_ramdump_handler(struct hif_opaque_softc *scn); 294 #ifdef HIF_USB 295 void hif_usb_get_hw_info(struct hif_softc *scn); 296 void hif_usb_ramdump_handler(struct hif_opaque_softc *scn); 297 #else 298 static inline void hif_usb_get_hw_info(struct hif_softc *scn) {} 299 static inline void hif_usb_ramdump_handler(struct hif_opaque_softc *scn) {} 300 #endif 301 302 /** 303 * hif_wake_interrupt_handler() - interrupt handler for standalone wake irq 304 * @irq: the irq number that fired 305 * @context: the opaque pointer passed to request_irq() 306 * 307 * Return: an irq return type 308 */ 309 irqreturn_t hif_wake_interrupt_handler(int irq, void *context); 310 311 #ifdef HIF_SNOC 312 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc); 313 #else 314 static inline 315 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc) 316 { 317 return true; 318 } 319 #endif 320 321 #ifdef ADRASTEA_RRI_ON_DDR 322 void hif_uninit_rri_on_ddr(struct hif_softc *scn); 323 #else 324 static inline 325 void hif_uninit_rri_on_ddr(struct hif_softc *scn) {} 326 #endif 327 #endif /* __HIF_MAIN_H__ */ 328