1 /* 2 * Copyright (c) 2013-2019 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * NB: Inappropriate references to "HTC" are used in this (and other) 21 * HIF implementations. HTC is typically the calling layer, but it 22 * theoretically could be some alternative. 23 */ 24 25 /* 26 * This holds all state needed to process a pending send/recv interrupt. 27 * The information is saved here as soon as the interrupt occurs (thus 28 * allowing the underlying CE to re-use the ring descriptor). The 29 * information here is eventually processed by a completion processing 30 * thread. 31 */ 32 33 #ifndef __HIF_MAIN_H__ 34 #define __HIF_MAIN_H__ 35 36 #include <qdf_atomic.h> /* qdf_atomic_read */ 37 #include "qdf_lock.h" 38 #include "cepci.h" 39 #include "hif.h" 40 #include "multibus.h" 41 #include "hif_unit_test_suspend_i.h" 42 43 #define HIF_MIN_SLEEP_INACTIVITY_TIME_MS 50 44 #define HIF_SLEEP_INACTIVITY_TIMER_PERIOD_MS 60 45 46 #define HIF_MAX_BUDGET 0xFFFF 47 48 /* 49 * This macro implementation is exposed for efficiency only. 50 * The implementation may change and callers should 51 * consider the targid to be a completely opaque handle. 52 */ 53 #define TARGID_TO_PCI_ADDR(targid) (*((A_target_id_t *)(targid))) 54 55 #ifdef QCA_WIFI_3_0 56 #define DISABLE_L1SS_STATES 1 57 #endif 58 59 #define MAX_NUM_OF_RECEIVES HIF_NAPI_MAX_RECEIVES 60 61 #ifdef QCA_WIFI_3_0_ADRASTEA 62 #define ADRASTEA_BU 1 63 #else 64 #define ADRASTEA_BU 0 65 #endif 66 67 #ifdef QCA_WIFI_3_0 68 #define HAS_FW_INDICATOR 0 69 #else 70 #define HAS_FW_INDICATOR 1 71 #endif 72 73 74 #define AR9888_DEVICE_ID (0x003c) 75 #define AR6320_DEVICE_ID (0x003e) 76 #define AR6320_FW_1_1 (0x11) 77 #define AR6320_FW_1_3 (0x13) 78 #define AR6320_FW_2_0 (0x20) 79 #define AR6320_FW_3_0 (0x30) 80 #define AR6320_FW_3_2 (0x32) 81 #define QCA6290_EMULATION_DEVICE_ID (0xabcd) 82 #define QCA6290_DEVICE_ID (0x1100) 83 #define QCN9000_DEVICE_ID (0x1104) 84 #define QCA6390_EMULATION_DEVICE_ID (0x0108) 85 #define QCA6390_DEVICE_ID (0x1101) 86 /* TODO: change IDs for HastingsPrime */ 87 #define QCA6490_EMULATION_DEVICE_ID (0x010a) 88 #define QCA6490_DEVICE_ID (0x1103) 89 90 #define ADRASTEA_DEVICE_ID_P2_E12 (0x7021) 91 #define AR9887_DEVICE_ID (0x0050) 92 #define AR900B_DEVICE_ID (0x0040) 93 #define QCA9984_DEVICE_ID (0x0046) 94 #define QCA9888_DEVICE_ID (0x0056) 95 #ifndef IPQ4019_DEVICE_ID 96 #define IPQ4019_DEVICE_ID (0x12ef) 97 #endif 98 #define QCA8074_DEVICE_ID (0xffff) /* Todo: replace this with 99 actual number once available. 100 currently defining this to 0xffff for 101 emulation purpose */ 102 #define QCA8074V2_DEVICE_ID (0xfffe) /* Todo: replace this with actual number */ 103 #define QCA6018_DEVICE_ID (0xfffd) /* Todo: replace this with actual number */ 104 /* Genoa */ 105 #define QCN7605_DEVICE_ID (0x1102) /* Genoa PCIe device ID*/ 106 #define QCN7605_COMPOSITE (0x9901) 107 #define QCN7605_STANDALONE (0x9900) 108 #define QCN7605_STANDALONE_V2 (0x9902) 109 #define QCN7605_COMPOSITE_V2 (0x9903) 110 111 #define RUMIM2M_DEVICE_ID_NODE0 0xabc0 112 #define RUMIM2M_DEVICE_ID_NODE1 0xabc1 113 #define RUMIM2M_DEVICE_ID_NODE2 0xabc2 114 #define RUMIM2M_DEVICE_ID_NODE3 0xabc3 115 #define RUMIM2M_DEVICE_ID_NODE4 0xaa10 116 #define RUMIM2M_DEVICE_ID_NODE5 0xaa11 117 118 #define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn) 119 #define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn) 120 #define HIF_GET_SDIO_SOFTC(scn) ((struct hif_sdio_softc *)scn) 121 #define HIF_GET_USB_SOFTC(scn) ((struct hif_usb_softc *)scn) 122 #define HIF_GET_USB_DEVICE(scn) ((struct HIF_DEVICE_USB *)scn) 123 #define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn) 124 #define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn) 125 126 struct hif_ce_stats { 127 int hif_pipe_no_resrc_count; 128 int ce_ring_delta_fail_count; 129 }; 130 131 /* 132 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 133 * for defined here 134 */ 135 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 136 struct ce_desc_hist { 137 qdf_atomic_t history_index[CE_COUNT_MAX]; 138 uint32_t enable[CE_COUNT_MAX]; 139 bool data_enable[CE_COUNT_MAX]; 140 qdf_mutex_t ce_dbg_datamem_lock[CE_COUNT_MAX]; 141 uint32_t hist_index; 142 uint32_t hist_id; 143 void *hist_ev[CE_COUNT_MAX]; 144 }; 145 #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)*/ 146 147 struct hif_softc { 148 struct hif_opaque_softc osc; 149 struct hif_config_info hif_config; 150 struct hif_target_info target_info; 151 void __iomem *mem; 152 enum qdf_bus_type bus_type; 153 struct hif_bus_ops bus_ops; 154 void *ce_id_to_state[CE_COUNT_MAX]; 155 qdf_device_t qdf_dev; 156 bool hif_init_done; 157 bool request_irq_done; 158 bool ext_grp_irq_configured; 159 /* Packet statistics */ 160 struct hif_ce_stats pkt_stats; 161 enum hif_target_status target_status; 162 uint64_t event_disable_mask; 163 164 struct targetdef_s *targetdef; 165 struct ce_reg_def *target_ce_def; 166 struct hostdef_s *hostdef; 167 struct host_shadow_regs_s *host_shadow_regs; 168 169 bool recovery; 170 bool notice_send; 171 bool per_ce_irq; 172 uint32_t ce_irq_summary; 173 /* No of copy engines supported */ 174 unsigned int ce_count; 175 atomic_t active_tasklet_cnt; 176 atomic_t active_grp_tasklet_cnt; 177 atomic_t link_suspended; 178 uint32_t *vaddr_rri_on_ddr; 179 qdf_dma_addr_t paddr_rri_on_ddr; 180 int linkstate_vote; 181 bool fastpath_mode_on; 182 atomic_t tasklet_from_intr; 183 int htc_htt_tx_endpoint; 184 qdf_dma_addr_t mem_pa; 185 bool athdiag_procfs_inited; 186 #ifdef FEATURE_NAPI 187 struct qca_napi_data napi_data; 188 #endif /* FEATURE_NAPI */ 189 /* stores ce_service_max_yield_time in ns */ 190 unsigned long long ce_service_max_yield_time; 191 uint8_t ce_service_max_rx_ind_flush; 192 struct hif_driver_state_callbacks callbacks; 193 uint32_t hif_con_param; 194 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 195 uint32_t nss_wifi_ol_mode; 196 #endif 197 void *hal_soc; 198 struct hif_ut_suspend_context ut_suspend_ctx; 199 uint32_t hif_attribute; 200 int wake_irq; 201 void (*initial_wakeup_cb)(void *); 202 void *initial_wakeup_priv; 203 #ifdef REMOVE_PKT_LOG 204 /* Handle to pktlog device */ 205 void *pktlog_dev; 206 #endif 207 208 /* 209 * Note: For MCL, #if defined (HIF_CONFIG_SLUB_DEBUG_ON) needs to be checked 210 * for defined here 211 */ 212 #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) 213 struct ce_desc_hist hif_ce_desc_hist; 214 #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF)*/ 215 216 #ifdef IPA_OFFLOAD 217 qdf_shared_mem_t *ipa_ce_ring; 218 #endif 219 }; 220 221 static inline 222 void *hif_get_hal_handle(struct hif_opaque_softc *hif_hdl) 223 { 224 struct hif_softc *sc = (struct hif_softc *)hif_hdl; 225 226 if (!sc) 227 return NULL; 228 229 return sc->hal_soc; 230 } 231 232 #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT 233 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 234 { 235 return !!(sc->nss_wifi_ol_mode); 236 } 237 #else 238 static inline bool hif_is_nss_wifi_enabled(struct hif_softc *sc) 239 { 240 return false; 241 } 242 #endif 243 244 static inline uint8_t hif_is_attribute_set(struct hif_softc *sc, 245 uint32_t hif_attrib) 246 { 247 return sc->hif_attribute == hif_attrib; 248 } 249 250 #ifdef WLAN_FEATURE_DP_EVENT_HISTORY 251 static inline void hif_set_event_hist_mask(struct hif_opaque_softc *hif_handle) 252 { 253 struct hif_softc *scn = (struct hif_softc *)hif_handle; 254 255 scn->event_disable_mask = HIF_EVENT_HIST_DISABLE_MASK; 256 } 257 #else 258 static inline void hif_set_event_hist_mask(struct hif_opaque_softc *hif_handle) 259 { 260 } 261 #endif /* WLAN_FEATURE_DP_EVENT_HISTORY */ 262 263 A_target_id_t hif_get_target_id(struct hif_softc *scn); 264 void hif_dump_pipe_debug_count(struct hif_softc *scn); 265 void hif_display_bus_stats(struct hif_opaque_softc *scn); 266 void hif_clear_bus_stats(struct hif_opaque_softc *scn); 267 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count); 268 void hif_shutdown_device(struct hif_opaque_softc *hif_ctx); 269 int hif_bus_configure(struct hif_softc *scn); 270 void hif_cancel_deferred_target_sleep(struct hif_softc *scn); 271 int hif_config_ce(struct hif_softc *scn); 272 void hif_unconfig_ce(struct hif_softc *scn); 273 void hif_ce_prepare_config(struct hif_softc *scn); 274 QDF_STATUS hif_ce_open(struct hif_softc *scn); 275 void hif_ce_close(struct hif_softc *scn); 276 int athdiag_procfs_init(void *scn); 277 void athdiag_procfs_remove(void); 278 /* routine to modify the initial buffer count to be allocated on an os 279 * platform basis. Platform owner will need to modify this as needed 280 */ 281 qdf_size_t init_buffer_count(qdf_size_t maxSize); 282 283 irqreturn_t hif_fw_interrupt_handler(int irq, void *arg); 284 int hif_get_device_type(uint32_t device_id, 285 uint32_t revision_id, 286 uint32_t *hif_type, uint32_t *target_type); 287 /*These functions are exposed to HDD*/ 288 void hif_nointrs(struct hif_softc *scn); 289 void hif_bus_close(struct hif_softc *ol_sc); 290 QDF_STATUS hif_bus_open(struct hif_softc *ol_sc, 291 enum qdf_bus_type bus_type); 292 QDF_STATUS hif_enable_bus(struct hif_softc *ol_sc, struct device *dev, 293 void *bdev, const struct hif_bus_id *bid, enum hif_enable_type type); 294 void hif_disable_bus(struct hif_softc *scn); 295 void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag); 296 int hif_bus_get_context_size(enum qdf_bus_type bus_type); 297 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *bar_value); 298 uint32_t hif_get_conparam(struct hif_softc *scn); 299 struct hif_driver_state_callbacks *hif_get_callbacks_handle( 300 struct hif_softc *scn); 301 bool hif_is_driver_unloading(struct hif_softc *scn); 302 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn); 303 bool hif_is_recovery_in_progress(struct hif_softc *scn); 304 bool hif_is_target_ready(struct hif_softc *scn); 305 void hif_wlan_disable(struct hif_softc *scn); 306 int hif_target_sleep_state_adjust(struct hif_softc *scn, 307 bool sleep_ok, 308 bool wait_for_it); 309 /** 310 * hif_get_rx_ctx_id() - Returns NAPI instance ID based on CE ID 311 * @ctx_id: Rx CE context ID 312 * @hif_hdl: HIF Context 313 * 314 * Return: Rx instance ID 315 */ 316 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl); 317 void hif_ramdump_handler(struct hif_opaque_softc *scn); 318 #ifdef HIF_USB 319 void hif_usb_get_hw_info(struct hif_softc *scn); 320 void hif_usb_ramdump_handler(struct hif_opaque_softc *scn); 321 #else 322 static inline void hif_usb_get_hw_info(struct hif_softc *scn) {} 323 static inline void hif_usb_ramdump_handler(struct hif_opaque_softc *scn) {} 324 #endif 325 326 /** 327 * hif_wake_interrupt_handler() - interrupt handler for standalone wake irq 328 * @irq: the irq number that fired 329 * @context: the opaque pointer passed to request_irq() 330 * 331 * Return: an irq return type 332 */ 333 irqreturn_t hif_wake_interrupt_handler(int irq, void *context); 334 335 #ifdef HIF_SNOC 336 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc); 337 #else 338 static inline 339 bool hif_is_target_register_access_allowed(struct hif_softc *hif_sc) 340 { 341 return true; 342 } 343 #endif 344 345 #ifdef ADRASTEA_RRI_ON_DDR 346 void hif_uninit_rri_on_ddr(struct hif_softc *scn); 347 #else 348 static inline 349 void hif_uninit_rri_on_ddr(struct hif_softc *scn) {} 350 #endif 351 #endif /* __HIF_MAIN_H__ */ 352