1 /* 2 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. 3 * 4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc. 5 * 6 * 7 * Permission to use, copy, modify, and/or distribute this software for 8 * any purpose with or without fee is hereby granted, provided that the 9 * above copyright notice and this permission notice appear in all 10 * copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 19 * PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /* 23 * This file was originally distributed by Qualcomm Atheros, Inc. 24 * under proprietary terms before Copyright ownership was assigned 25 * to the Linux Foundation. 26 */ 27 28 #include "targcfg.h" 29 #include "qdf_lock.h" 30 #include "qdf_status.h" 31 #include "qdf_status.h" 32 #include <qdf_atomic.h> /* qdf_atomic_read */ 33 #include <targaddrs.h> 34 #include "hif_io32.h" 35 #include <hif.h> 36 #include <target_type.h> 37 #include "regtable.h" 38 #define ATH_MODULE_NAME hif 39 #include <a_debug.h> 40 #include "hif_main.h" 41 #include "hif_hw_version.h" 42 #if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB) 43 #include "ce_tasklet.h" 44 #include "ce_api.h" 45 #endif 46 #include "qdf_trace.h" 47 #include "qdf_status.h" 48 #include "hif_debug.h" 49 #include "mp_dev.h" 50 #ifdef QCA_WIFI_QCA8074 51 #include "hal_api.h" 52 #endif 53 #include "hif_napi.h" 54 #include "hif_unit_test_suspend_i.h" 55 #include "qdf_module.h" 56 57 void hif_dump(struct hif_opaque_softc *hif_ctx, uint8_t cmd_id, bool start) 58 { 59 hif_trigger_dump(hif_ctx, cmd_id, start); 60 } 61 62 /** 63 * hif_get_target_id(): hif_get_target_id 64 * 65 * Return the virtual memory base address to the caller 66 * 67 * @scn: hif_softc 68 * 69 * Return: A_target_id_t 70 */ 71 A_target_id_t hif_get_target_id(struct hif_softc *scn) 72 { 73 return scn->mem; 74 } 75 76 /** 77 * hif_get_targetdef(): hif_get_targetdef 78 * @scn: scn 79 * 80 * Return: void * 81 */ 82 void *hif_get_targetdef(struct hif_opaque_softc *hif_ctx) 83 { 84 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 85 86 return scn->targetdef; 87 } 88 89 /** 90 * hif_vote_link_down(): unvote for link up 91 * 92 * Call hif_vote_link_down to release a previous request made using 93 * hif_vote_link_up. A hif_vote_link_down call should only be made 94 * after a corresponding hif_vote_link_up, otherwise you could be 95 * negating a vote from another source. When no votes are present 96 * hif will not guarantee the linkstate after hif_bus_suspend. 97 * 98 * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread 99 * and initialization deinitialization sequencences. 100 * 101 * Return: n/a 102 */ 103 void hif_vote_link_down(struct hif_opaque_softc *hif_ctx) 104 { 105 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 106 107 QDF_BUG(scn); 108 scn->linkstate_vote--; 109 if (scn->linkstate_vote == 0) 110 hif_bus_prevent_linkdown(scn, false); 111 } 112 113 /** 114 * hif_vote_link_up(): vote to prevent bus from suspending 115 * 116 * Makes hif guarantee that fw can message the host normally 117 * durring suspend. 118 * 119 * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread 120 * and initialization deinitialization sequencences. 121 * 122 * Return: n/a 123 */ 124 void hif_vote_link_up(struct hif_opaque_softc *hif_ctx) 125 { 126 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 127 128 QDF_BUG(scn); 129 scn->linkstate_vote++; 130 if (scn->linkstate_vote == 1) 131 hif_bus_prevent_linkdown(scn, true); 132 } 133 134 /** 135 * hif_can_suspend_link(): query if hif is permitted to suspend the link 136 * 137 * Hif will ensure that the link won't be suspended if the upperlayers 138 * don't want it to. 139 * 140 * SYNCHRONIZATION: MC thread is stopped before bus suspend thus 141 * we don't need extra locking to ensure votes dont change while 142 * we are in the process of suspending or resuming. 143 * 144 * Return: false if hif will guarantee link up durring suspend. 145 */ 146 bool hif_can_suspend_link(struct hif_opaque_softc *hif_ctx) 147 { 148 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 149 150 QDF_BUG(scn); 151 return scn->linkstate_vote == 0; 152 } 153 154 /** 155 * hif_hia_item_address(): hif_hia_item_address 156 * @target_type: target_type 157 * @item_offset: item_offset 158 * 159 * Return: n/a 160 */ 161 uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset) 162 { 163 switch (target_type) { 164 case TARGET_TYPE_AR6002: 165 return AR6002_HOST_INTEREST_ADDRESS + item_offset; 166 case TARGET_TYPE_AR6003: 167 return AR6003_HOST_INTEREST_ADDRESS + item_offset; 168 case TARGET_TYPE_AR6004: 169 return AR6004_HOST_INTEREST_ADDRESS + item_offset; 170 case TARGET_TYPE_AR6006: 171 return AR6006_HOST_INTEREST_ADDRESS + item_offset; 172 case TARGET_TYPE_AR9888: 173 return AR9888_HOST_INTEREST_ADDRESS + item_offset; 174 case TARGET_TYPE_AR6320: 175 case TARGET_TYPE_AR6320V2: 176 return AR6320_HOST_INTEREST_ADDRESS + item_offset; 177 case TARGET_TYPE_ADRASTEA: 178 /* ADRASTEA doesn't have a host interest address */ 179 ASSERT(0); 180 return 0; 181 case TARGET_TYPE_AR900B: 182 return AR900B_HOST_INTEREST_ADDRESS + item_offset; 183 case TARGET_TYPE_QCA9984: 184 return QCA9984_HOST_INTEREST_ADDRESS + item_offset; 185 case TARGET_TYPE_QCA9888: 186 return QCA9888_HOST_INTEREST_ADDRESS + item_offset; 187 case TARGET_TYPE_IPQ4019: 188 return IPQ4019_HOST_INTEREST_ADDRESS + item_offset; 189 190 default: 191 ASSERT(0); 192 return 0; 193 } 194 } 195 196 /** 197 * hif_max_num_receives_reached() - check max receive is reached 198 * @scn: HIF Context 199 * @count: unsigned int. 200 * 201 * Output check status as bool 202 * 203 * Return: bool 204 */ 205 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count) 206 { 207 if (QDF_IS_EPPING_ENABLED(hif_get_conparam(scn))) 208 return count > 120; 209 else 210 return count > MAX_NUM_OF_RECEIVES; 211 } 212 213 /** 214 * init_buffer_count() - initial buffer count 215 * @maxSize: qdf_size_t 216 * 217 * routine to modify the initial buffer count to be allocated on an os 218 * platform basis. Platform owner will need to modify this as needed 219 * 220 * Return: qdf_size_t 221 */ 222 qdf_size_t init_buffer_count(qdf_size_t maxSize) 223 { 224 return maxSize; 225 } 226 227 /** 228 * hif_save_htc_htt_config_endpoint() - save htt_tx_endpoint 229 * @hif_ctx: hif context 230 * @htc_htt_tx_endpoint: htt_tx_endpoint 231 * 232 * Return: void 233 */ 234 void hif_save_htc_htt_config_endpoint(struct hif_opaque_softc *hif_ctx, 235 int htc_htt_tx_endpoint) 236 { 237 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 238 239 if (!scn) { 240 HIF_ERROR("%s: error: scn or scn->hif_sc is NULL!", 241 __func__); 242 return; 243 } 244 245 scn->htc_htt_tx_endpoint = htc_htt_tx_endpoint; 246 } 247 qdf_export_symbol(hif_save_htc_htt_config_endpoint); 248 249 static const struct qwlan_hw qwlan_hw_list[] = { 250 { 251 .id = AR6320_REV1_VERSION, 252 .subid = 0, 253 .name = "QCA6174_REV1", 254 }, 255 { 256 .id = AR6320_REV1_1_VERSION, 257 .subid = 0x1, 258 .name = "QCA6174_REV1_1", 259 }, 260 { 261 .id = AR6320_REV1_3_VERSION, 262 .subid = 0x2, 263 .name = "QCA6174_REV1_3", 264 }, 265 { 266 .id = AR6320_REV2_1_VERSION, 267 .subid = 0x4, 268 .name = "QCA6174_REV2_1", 269 }, 270 { 271 .id = AR6320_REV2_1_VERSION, 272 .subid = 0x5, 273 .name = "QCA6174_REV2_2", 274 }, 275 { 276 .id = AR6320_REV3_VERSION, 277 .subid = 0x6, 278 .name = "QCA6174_REV2.3", 279 }, 280 { 281 .id = AR6320_REV3_VERSION, 282 .subid = 0x8, 283 .name = "QCA6174_REV3", 284 }, 285 { 286 .id = AR6320_REV3_VERSION, 287 .subid = 0x9, 288 .name = "QCA6174_REV3_1", 289 }, 290 { 291 .id = AR6320_REV3_2_VERSION, 292 .subid = 0xA, 293 .name = "AR6320_REV3_2_VERSION", 294 }, 295 { 296 .id = WCN3990_v1, 297 .subid = 0x0, 298 .name = "WCN3990_V1", 299 }, 300 { 301 .id = WCN3990_v2, 302 .subid = 0x0, 303 .name = "WCN3990_V2", 304 }, 305 { 306 .id = WCN3990_v2_1, 307 .subid = 0x0, 308 .name = "WCN3990_V2.1", 309 }, 310 { 311 .id = QCA9379_REV1_VERSION, 312 .subid = 0xC, 313 .name = "QCA9379_REV1", 314 }, 315 { 316 .id = QCA9379_REV1_VERSION, 317 .subid = 0xD, 318 .name = "QCA9379_REV1_1", 319 } 320 }; 321 322 /** 323 * hif_get_hw_name(): get a human readable name for the hardware 324 * @info: Target Info 325 * 326 * Return: human readable name for the underlying wifi hardware. 327 */ 328 static const char *hif_get_hw_name(struct hif_target_info *info) 329 { 330 int i; 331 332 if (info->hw_name) 333 return info->hw_name; 334 335 for (i = 0; i < ARRAY_SIZE(qwlan_hw_list); i++) { 336 if (info->target_version == qwlan_hw_list[i].id && 337 info->target_revision == qwlan_hw_list[i].subid) { 338 return qwlan_hw_list[i].name; 339 } 340 } 341 342 info->hw_name = qdf_mem_malloc(64); 343 if (!info->hw_name) 344 return "Unknown Device (nomem)"; 345 346 i = qdf_snprint(info->hw_name, 64, "HW_VERSION=%x.", 347 info->target_version); 348 if (i < 0) 349 return "Unknown Device (snprintf failure)"; 350 else 351 return info->hw_name; 352 } 353 354 /** 355 * hif_get_hw_info(): hif_get_hw_info 356 * @scn: scn 357 * @version: version 358 * @revision: revision 359 * 360 * Return: n/a 361 */ 362 void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision, 363 const char **target_name) 364 { 365 struct hif_target_info *info = hif_get_target_info_handle(scn); 366 struct hif_softc *sc = HIF_GET_SOFTC(scn); 367 368 if (sc->bus_type == QDF_BUS_TYPE_USB) 369 hif_usb_get_hw_info(sc); 370 371 *version = info->target_version; 372 *revision = info->target_revision; 373 *target_name = hif_get_hw_name(info); 374 } 375 376 /** 377 * hif_get_dev_ba(): API to get device base address. 378 * @scn: scn 379 * @version: version 380 * @revision: revision 381 * 382 * Return: n/a 383 */ 384 void *hif_get_dev_ba(struct hif_opaque_softc *hif_handle) 385 { 386 struct hif_softc *scn = (struct hif_softc *)hif_handle; 387 388 return scn->mem; 389 } 390 qdf_export_symbol(hif_get_dev_ba); 391 /** 392 * hif_open(): hif_open 393 * @qdf_ctx: QDF Context 394 * @mode: Driver Mode 395 * @bus_type: Bus Type 396 * @cbk: CDS Callbacks 397 * 398 * API to open HIF Context 399 * 400 * Return: HIF Opaque Pointer 401 */ 402 struct hif_opaque_softc *hif_open(qdf_device_t qdf_ctx, uint32_t mode, 403 enum qdf_bus_type bus_type, 404 struct hif_driver_state_callbacks *cbk) 405 { 406 struct hif_softc *scn; 407 QDF_STATUS status = QDF_STATUS_SUCCESS; 408 int bus_context_size = hif_bus_get_context_size(bus_type); 409 410 if (bus_context_size == 0) { 411 HIF_ERROR("%s: context size 0 not allowed", __func__); 412 return NULL; 413 } 414 415 scn = (struct hif_softc *)qdf_mem_malloc(bus_context_size); 416 if (!scn) { 417 HIF_ERROR("%s: cannot alloc memory for HIF context of size:%d", 418 __func__, bus_context_size); 419 return GET_HIF_OPAQUE_HDL(scn); 420 } 421 422 scn->qdf_dev = qdf_ctx; 423 scn->hif_con_param = mode; 424 qdf_atomic_init(&scn->active_tasklet_cnt); 425 qdf_atomic_init(&scn->active_grp_tasklet_cnt); 426 qdf_atomic_init(&scn->link_suspended); 427 qdf_atomic_init(&scn->tasklet_from_intr); 428 qdf_mem_copy(&scn->callbacks, cbk, 429 sizeof(struct hif_driver_state_callbacks)); 430 scn->bus_type = bus_type; 431 status = hif_bus_open(scn, bus_type); 432 if (status != QDF_STATUS_SUCCESS) { 433 HIF_ERROR("%s: hif_bus_open error = %d, bus_type = %d", 434 __func__, status, bus_type); 435 qdf_mem_free(scn); 436 scn = NULL; 437 } 438 439 return GET_HIF_OPAQUE_HDL(scn); 440 } 441 442 #ifdef ADRASTEA_RRI_ON_DDR 443 /** 444 * hif_uninit_rri_on_ddr(): free consistent memory allocated for rri 445 * @scn: hif context 446 * 447 * Return: none 448 */ 449 void hif_uninit_rri_on_ddr(struct hif_softc *scn) 450 { 451 if (scn->vaddr_rri_on_ddr) 452 qdf_mem_free_consistent(scn->qdf_dev, scn->qdf_dev->dev, 453 (CE_COUNT * sizeof(uint32_t)), 454 scn->vaddr_rri_on_ddr, 455 scn->paddr_rri_on_ddr, 0); 456 scn->vaddr_rri_on_ddr = NULL; 457 } 458 #endif 459 460 /** 461 * hif_close(): hif_close 462 * @hif_ctx: hif_ctx 463 * 464 * Return: n/a 465 */ 466 void hif_close(struct hif_opaque_softc *hif_ctx) 467 { 468 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 469 470 if (scn == NULL) { 471 HIF_ERROR("%s: hif_opaque_softc is NULL", __func__); 472 return; 473 } 474 475 if (scn->athdiag_procfs_inited) { 476 athdiag_procfs_remove(); 477 scn->athdiag_procfs_inited = false; 478 } 479 480 if (scn->target_info.hw_name) { 481 char *hw_name = scn->target_info.hw_name; 482 483 scn->target_info.hw_name = "ErrUnloading"; 484 qdf_mem_free(hw_name); 485 } 486 487 hif_uninit_rri_on_ddr(scn); 488 489 hif_bus_close(scn); 490 qdf_mem_free(scn); 491 } 492 493 #ifdef QCA_WIFI_QCA8074 494 static QDF_STATUS hif_hal_attach(struct hif_softc *scn) 495 { 496 if (ce_srng_based(scn)) { 497 scn->hal_soc = hal_attach(scn, scn->qdf_dev); 498 if (scn->hal_soc == NULL) 499 return QDF_STATUS_E_FAILURE; 500 } 501 502 return QDF_STATUS_SUCCESS; 503 } 504 505 static QDF_STATUS hif_hal_detach(struct hif_softc *scn) 506 { 507 if (ce_srng_based(scn)) { 508 hal_detach(scn->hal_soc); 509 scn->hal_soc = NULL; 510 } 511 512 return QDF_STATUS_SUCCESS; 513 } 514 #else 515 static QDF_STATUS hif_hal_attach(struct hif_softc *scn) 516 { 517 return QDF_STATUS_SUCCESS; 518 } 519 520 static QDF_STATUS hif_hal_detach(struct hif_softc *scn) 521 { 522 return QDF_STATUS_SUCCESS; 523 } 524 #endif 525 526 /** 527 * hif_enable(): hif_enable 528 * @hif_ctx: hif_ctx 529 * @dev: dev 530 * @bdev: bus dev 531 * @bid: bus ID 532 * @bus_type: bus type 533 * @type: enable type 534 * 535 * Return: QDF_STATUS 536 */ 537 QDF_STATUS hif_enable(struct hif_opaque_softc *hif_ctx, struct device *dev, 538 void *bdev, 539 const struct hif_bus_id *bid, 540 enum qdf_bus_type bus_type, 541 enum hif_enable_type type) 542 { 543 QDF_STATUS status; 544 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 545 546 if (scn == NULL) { 547 HIF_ERROR("%s: hif_ctx = NULL", __func__); 548 return QDF_STATUS_E_NULL_VALUE; 549 } 550 551 status = hif_enable_bus(scn, dev, bdev, bid, type); 552 if (status != QDF_STATUS_SUCCESS) { 553 HIF_ERROR("%s: hif_enable_bus error = %d", 554 __func__, status); 555 return status; 556 } 557 558 status = hif_hal_attach(scn); 559 if (status != QDF_STATUS_SUCCESS) { 560 HIF_ERROR("%s: hal attach failed", __func__); 561 goto disable_bus; 562 } 563 564 if (hif_bus_configure(scn)) { 565 HIF_ERROR("%s: Target probe failed.", __func__); 566 status = QDF_STATUS_E_FAILURE; 567 goto hal_detach; 568 } 569 570 hif_ut_suspend_init(scn); 571 572 /* 573 * Flag to avoid potential unallocated memory access from MSI 574 * interrupt handler which could get scheduled as soon as MSI 575 * is enabled, i.e to take care of the race due to the order 576 * in where MSI is enabled before the memory, that will be 577 * in interrupt handlers, is allocated. 578 */ 579 580 scn->hif_init_done = true; 581 582 HIF_DBG("%s: OK", __func__); 583 584 return QDF_STATUS_SUCCESS; 585 586 hal_detach: 587 hif_hal_detach(scn); 588 disable_bus: 589 hif_disable_bus(scn); 590 return status; 591 } 592 593 void hif_disable(struct hif_opaque_softc *hif_ctx, enum hif_disable_type type) 594 { 595 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 596 597 if (!scn) 598 return; 599 600 hif_nointrs(scn); 601 if (scn->hif_init_done == false) 602 hif_shutdown_device(hif_ctx); 603 else 604 hif_stop(hif_ctx); 605 606 hif_hal_detach(scn); 607 608 hif_disable_bus(scn); 609 610 hif_wlan_disable(scn); 611 612 scn->notice_send = false; 613 614 HIF_DBG("%s: X", __func__); 615 } 616 617 void hif_display_stats(struct hif_opaque_softc *hif_ctx) 618 { 619 hif_display_bus_stats(hif_ctx); 620 } 621 622 void hif_clear_stats(struct hif_opaque_softc *hif_ctx) 623 { 624 hif_clear_bus_stats(hif_ctx); 625 } 626 627 /** 628 * hif_crash_shutdown_dump_bus_register() - dump bus registers 629 * @hif_ctx: hif_ctx 630 * 631 * Return: n/a 632 */ 633 #if defined(TARGET_RAMDUMP_AFTER_KERNEL_PANIC) \ 634 && defined(DEBUG) 635 636 static void hif_crash_shutdown_dump_bus_register(void *hif_ctx) 637 { 638 struct hif_opaque_softc *scn = hif_ctx; 639 640 if (hif_check_soc_status(scn)) 641 return; 642 643 if (hif_dump_registers(scn)) 644 HIF_ERROR("Failed to dump bus registers!"); 645 } 646 647 /** 648 * hif_crash_shutdown(): hif_crash_shutdown 649 * 650 * This function is called by the platform driver to dump CE registers 651 * 652 * @hif_ctx: hif_ctx 653 * 654 * Return: n/a 655 */ 656 void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx) 657 { 658 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 659 660 if (!hif_ctx) 661 return; 662 663 if (scn->bus_type == QDF_BUS_TYPE_SNOC) { 664 HIF_INFO_MED("%s: RAM dump disabled for bustype %d", 665 __func__, scn->bus_type); 666 return; 667 } 668 669 if (TARGET_STATUS_RESET == scn->target_status) { 670 HIF_INFO_MED("%s: Target is already asserted, ignore!", 671 __func__); 672 return; 673 } 674 675 if (hif_is_load_or_unload_in_progress(scn)) { 676 HIF_ERROR("%s: Load/unload is in progress, ignore!", __func__); 677 return; 678 } 679 680 hif_crash_shutdown_dump_bus_register(hif_ctx); 681 682 if (ol_copy_ramdump(hif_ctx)) 683 goto out; 684 685 HIF_INFO_MED("%s: RAM dump collecting completed!", __func__); 686 687 out: 688 return; 689 } 690 #else 691 void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx) 692 { 693 HIF_INFO_MED("%s: Collecting target RAM dump disabled", 694 __func__); 695 } 696 #endif /* TARGET_RAMDUMP_AFTER_KERNEL_PANIC */ 697 698 #ifdef QCA_WIFI_3_0 699 /** 700 * hif_check_fw_reg(): hif_check_fw_reg 701 * @scn: scn 702 * @state: 703 * 704 * Return: int 705 */ 706 int hif_check_fw_reg(struct hif_opaque_softc *scn) 707 { 708 return 0; 709 } 710 #endif 711 712 /** 713 * hif_read_phy_mem_base(): hif_read_phy_mem_base 714 * @scn: scn 715 * @phy_mem_base: physical mem base 716 * 717 * Return: n/a 718 */ 719 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *phy_mem_base) 720 { 721 *phy_mem_base = scn->mem_pa; 722 } 723 qdf_export_symbol(hif_read_phy_mem_base); 724 725 /** 726 * hif_get_device_type(): hif_get_device_type 727 * @device_id: device_id 728 * @revision_id: revision_id 729 * @hif_type: returned hif_type 730 * @target_type: returned target_type 731 * 732 * Return: int 733 */ 734 int hif_get_device_type(uint32_t device_id, 735 uint32_t revision_id, 736 uint32_t *hif_type, uint32_t *target_type) 737 { 738 int ret = 0; 739 740 switch (device_id) { 741 case ADRASTEA_DEVICE_ID_P2_E12: 742 743 *hif_type = HIF_TYPE_ADRASTEA; 744 *target_type = TARGET_TYPE_ADRASTEA; 745 break; 746 747 case AR9888_DEVICE_ID: 748 *hif_type = HIF_TYPE_AR9888; 749 *target_type = TARGET_TYPE_AR9888; 750 break; 751 752 case AR6320_DEVICE_ID: 753 switch (revision_id) { 754 case AR6320_FW_1_1: 755 case AR6320_FW_1_3: 756 *hif_type = HIF_TYPE_AR6320; 757 *target_type = TARGET_TYPE_AR6320; 758 break; 759 760 case AR6320_FW_2_0: 761 case AR6320_FW_3_0: 762 case AR6320_FW_3_2: 763 *hif_type = HIF_TYPE_AR6320V2; 764 *target_type = TARGET_TYPE_AR6320V2; 765 break; 766 767 default: 768 HIF_ERROR("%s: error - dev_id = 0x%x, rev_id = 0x%x", 769 __func__, device_id, revision_id); 770 ret = -ENODEV; 771 goto end; 772 } 773 break; 774 775 case AR9887_DEVICE_ID: 776 *hif_type = HIF_TYPE_AR9888; 777 *target_type = TARGET_TYPE_AR9888; 778 HIF_INFO(" *********** AR9887 **************"); 779 break; 780 781 case QCA9984_DEVICE_ID: 782 *hif_type = HIF_TYPE_QCA9984; 783 *target_type = TARGET_TYPE_QCA9984; 784 HIF_INFO(" *********** QCA9984 *************"); 785 break; 786 787 case QCA9888_DEVICE_ID: 788 *hif_type = HIF_TYPE_QCA9888; 789 *target_type = TARGET_TYPE_QCA9888; 790 HIF_INFO(" *********** QCA9888 *************"); 791 break; 792 793 case AR900B_DEVICE_ID: 794 *hif_type = HIF_TYPE_AR900B; 795 *target_type = TARGET_TYPE_AR900B; 796 HIF_INFO(" *********** AR900B *************"); 797 break; 798 799 case IPQ4019_DEVICE_ID: 800 *hif_type = HIF_TYPE_IPQ4019; 801 *target_type = TARGET_TYPE_IPQ4019; 802 HIF_INFO(" *********** IPQ4019 *************"); 803 break; 804 805 case QCA8074_DEVICE_ID: 806 case RUMIM2M_DEVICE_ID_NODE0: 807 case RUMIM2M_DEVICE_ID_NODE1: 808 case RUMIM2M_DEVICE_ID_NODE2: 809 case RUMIM2M_DEVICE_ID_NODE3: 810 *hif_type = HIF_TYPE_QCA8074; 811 *target_type = TARGET_TYPE_QCA8074; 812 HIF_INFO(" *********** QCA8074 *************\n"); 813 break; 814 815 case QCA6290_EMULATION_DEVICE_ID: 816 case QCA6290_DEVICE_ID: 817 *hif_type = HIF_TYPE_QCA6290; 818 *target_type = TARGET_TYPE_QCA6290; 819 HIF_INFO(" *********** QCA6290EMU *************\n"); 820 break; 821 822 default: 823 HIF_ERROR("%s: Unsupported device ID!", __func__); 824 ret = -ENODEV; 825 break; 826 } 827 828 if (*target_type == TARGET_TYPE_UNKNOWN) { 829 HIF_ERROR("%s: Unsupported target_type!", __func__); 830 ret = -ENODEV; 831 } 832 end: 833 return ret; 834 } 835 836 /** 837 * hif_get_bus_type() - return the bus type 838 * 839 * Return: enum qdf_bus_type 840 */ 841 enum qdf_bus_type hif_get_bus_type(struct hif_opaque_softc *hif_hdl) 842 { 843 struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); 844 845 return scn->bus_type; 846 } 847 848 /** 849 * Target info and ini parameters are global to the driver 850 * Hence these structures are exposed to all the modules in 851 * the driver and they don't need to maintains multiple copies 852 * of the same info, instead get the handle from hif and 853 * modify them in hif 854 */ 855 856 /** 857 * hif_get_ini_handle() - API to get hif_config_param handle 858 * @hif_ctx: HIF Context 859 * 860 * Return: pointer to hif_config_info 861 */ 862 struct hif_config_info *hif_get_ini_handle(struct hif_opaque_softc *hif_ctx) 863 { 864 struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx); 865 866 return &sc->hif_config; 867 } 868 869 /** 870 * hif_get_target_info_handle() - API to get hif_target_info handle 871 * @hif_ctx: HIF context 872 * 873 * Return: Pointer to hif_target_info 874 */ 875 struct hif_target_info *hif_get_target_info_handle( 876 struct hif_opaque_softc *hif_ctx) 877 { 878 struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx); 879 880 return &sc->target_info; 881 882 } 883 qdf_export_symbol(hif_get_target_info_handle); 884 885 #if defined(FEATURE_LRO) 886 887 /** 888 * hif_get_lro_info - Returns LRO instance for instance ID 889 * @ctx_id: LRO instance ID 890 * @hif_hdl: HIF Context 891 * 892 * Return: Pointer to LRO instance. 893 */ 894 void *hif_get_lro_info(int ctx_id, struct hif_opaque_softc *hif_hdl) 895 { 896 void *data; 897 898 if (hif_napi_enabled(hif_hdl, -1)) 899 data = hif_napi_get_lro_info(hif_hdl, ctx_id); 900 else 901 data = hif_ce_get_lro_ctx(hif_hdl, ctx_id); 902 903 return data; 904 } 905 906 /** 907 * hif_get_rx_ctx_id - Returns LRO instance ID based on underlying LRO instance 908 * @ctx_id: LRO context ID 909 * @hif_hdl: HIF Context 910 * 911 * Return: LRO instance ID 912 */ 913 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl) 914 { 915 if (hif_napi_enabled(hif_hdl, -1)) 916 return NAPI_PIPE2ID(ctx_id); 917 else 918 return ctx_id; 919 } 920 921 #else /* !defined(FEATURE_LRO) */ 922 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl) 923 { 924 return 0; 925 } 926 #endif 927 928 /** 929 * hif_get_target_status - API to get target status 930 * @hif_ctx: HIF Context 931 * 932 * Return: enum hif_target_status 933 */ 934 enum hif_target_status hif_get_target_status(struct hif_opaque_softc *hif_ctx) 935 { 936 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 937 938 return scn->target_status; 939 } 940 qdf_export_symbol(hif_get_target_status); 941 942 /** 943 * hif_set_target_status() - API to set target status 944 * @hif_ctx: HIF Context 945 * @status: Target Status 946 * 947 * Return: void 948 */ 949 void hif_set_target_status(struct hif_opaque_softc *hif_ctx, enum 950 hif_target_status status) 951 { 952 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 953 954 scn->target_status = status; 955 } 956 957 /** 958 * hif_init_ini_config() - API to initialize HIF configuration parameters 959 * @hif_ctx: HIF Context 960 * @cfg: HIF Configuration 961 * 962 * Return: void 963 */ 964 void hif_init_ini_config(struct hif_opaque_softc *hif_ctx, 965 struct hif_config_info *cfg) 966 { 967 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 968 969 qdf_mem_copy(&scn->hif_config, cfg, sizeof(struct hif_config_info)); 970 } 971 972 /** 973 * hif_get_conparam() - API to get driver mode in HIF 974 * @scn: HIF Context 975 * 976 * Return: driver mode of operation 977 */ 978 uint32_t hif_get_conparam(struct hif_softc *scn) 979 { 980 if (!scn) 981 return 0; 982 983 return scn->hif_con_param; 984 } 985 986 /** 987 * hif_get_callbacks_handle() - API to get callbacks Handle 988 * @scn: HIF Context 989 * 990 * Return: pointer to HIF Callbacks 991 */ 992 struct hif_driver_state_callbacks *hif_get_callbacks_handle( 993 struct hif_softc *scn) 994 { 995 return &scn->callbacks; 996 } 997 998 /** 999 * hif_is_driver_unloading() - API to query upper layers if driver is unloading 1000 * @scn: HIF Context 1001 * 1002 * Return: True/False 1003 */ 1004 bool hif_is_driver_unloading(struct hif_softc *scn) 1005 { 1006 struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn); 1007 1008 if (cbk && cbk->is_driver_unloading) 1009 return cbk->is_driver_unloading(cbk->context); 1010 1011 return false; 1012 } 1013 1014 /** 1015 * hif_is_load_or_unload_in_progress() - API to query upper layers if 1016 * load/unload in progress 1017 * @scn: HIF Context 1018 * 1019 * Return: True/False 1020 */ 1021 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn) 1022 { 1023 struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn); 1024 1025 if (cbk && cbk->is_load_unload_in_progress) 1026 return cbk->is_load_unload_in_progress(cbk->context); 1027 1028 return false; 1029 } 1030 1031 /** 1032 * hif_is_recovery_in_progress() - API to query upper layers if recovery in 1033 * progress 1034 * @scn: HIF Context 1035 * 1036 * Return: True/False 1037 */ 1038 bool hif_is_recovery_in_progress(struct hif_softc *scn) 1039 { 1040 struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn); 1041 1042 if (cbk && cbk->is_recovery_in_progress) 1043 return cbk->is_recovery_in_progress(cbk->context); 1044 1045 return false; 1046 } 1047 1048 #if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB) 1049 1050 /** 1051 * hif_update_pipe_callback() - API to register pipe specific callbacks 1052 * @osc: Opaque softc 1053 * @pipeid: pipe id 1054 * @callbacks: callbacks to register 1055 * 1056 * Return: void 1057 */ 1058 1059 void hif_update_pipe_callback(struct hif_opaque_softc *osc, 1060 u_int8_t pipeid, 1061 struct hif_msg_callbacks *callbacks) 1062 { 1063 struct hif_softc *scn = HIF_GET_SOFTC(osc); 1064 struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); 1065 struct HIF_CE_pipe_info *pipe_info; 1066 1067 QDF_BUG(pipeid < CE_COUNT_MAX); 1068 1069 HIF_INFO_LO("+%s pipeid %d\n", __func__, pipeid); 1070 1071 pipe_info = &hif_state->pipe_info[pipeid]; 1072 1073 qdf_mem_copy(&pipe_info->pipe_callbacks, 1074 callbacks, sizeof(pipe_info->pipe_callbacks)); 1075 1076 HIF_INFO_LO("-%s\n", __func__); 1077 } 1078 qdf_export_symbol(hif_update_pipe_callback); 1079 1080 /** 1081 * hif_is_target_ready() - API to query if target is in ready state 1082 * progress 1083 * @scn: HIF Context 1084 * 1085 * Return: True/False 1086 */ 1087 bool hif_is_target_ready(struct hif_softc *scn) 1088 { 1089 struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn); 1090 1091 if (cbk && cbk->is_target_ready) 1092 return cbk->is_target_ready(cbk->context); 1093 1094 return false; 1095 } 1096 1097 /** 1098 * hif_batch_send() - API to access hif specific function 1099 * ce_batch_send. 1100 * @osc: HIF Context 1101 * @msdu : list of msdus to be sent 1102 * @transfer_id : transfer id 1103 * @len : donwloaded length 1104 * 1105 * Return: list of msds not sent 1106 */ 1107 qdf_nbuf_t hif_batch_send(struct hif_opaque_softc *osc, qdf_nbuf_t msdu, 1108 uint32_t transfer_id, u_int32_t len, uint32_t sendhead) 1109 { 1110 void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE); 1111 1112 return ce_batch_send((struct CE_handle *)ce_tx_hdl, msdu, transfer_id, 1113 len, sendhead); 1114 } 1115 qdf_export_symbol(hif_batch_send); 1116 1117 /** 1118 * hif_update_tx_ring() - API to access hif specific function 1119 * ce_update_tx_ring. 1120 * @osc: HIF Context 1121 * @num_htt_cmpls : number of htt compl received. 1122 * 1123 * Return: void 1124 */ 1125 void hif_update_tx_ring(struct hif_opaque_softc *osc, u_int32_t num_htt_cmpls) 1126 { 1127 void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE); 1128 1129 ce_update_tx_ring(ce_tx_hdl, num_htt_cmpls); 1130 } 1131 qdf_export_symbol(hif_update_tx_ring); 1132 1133 1134 /** 1135 * hif_send_single() - API to access hif specific function 1136 * ce_send_single. 1137 * @osc: HIF Context 1138 * @msdu : msdu to be sent 1139 * @transfer_id: transfer id 1140 * @len : downloaded length 1141 * 1142 * Return: msdu sent status 1143 */ 1144 int hif_send_single(struct hif_opaque_softc *osc, qdf_nbuf_t msdu, uint32_t 1145 transfer_id, u_int32_t len) 1146 { 1147 void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE); 1148 1149 return ce_send_single((struct CE_handle *)ce_tx_hdl, msdu, transfer_id, 1150 len); 1151 } 1152 qdf_export_symbol(hif_send_single); 1153 1154 /** 1155 * hif_send_fast() - API to access hif specific function 1156 * ce_send_fast. 1157 * @osc: HIF Context 1158 * @msdu : array of msdus to be sent 1159 * @num_msdus : number of msdus in an array 1160 * @transfer_id: transfer id 1161 * @download_len: download length 1162 * 1163 * Return: No. of packets that could be sent 1164 */ 1165 int hif_send_fast(struct hif_opaque_softc *osc, qdf_nbuf_t nbuf, 1166 uint32_t transfer_id, uint32_t download_len) 1167 { 1168 void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE); 1169 1170 return ce_send_fast((struct CE_handle *)ce_tx_hdl, nbuf, 1171 transfer_id, download_len); 1172 } 1173 qdf_export_symbol(hif_send_fast); 1174 #endif 1175 1176 /** 1177 * hif_reg_write() - API to access hif specific function 1178 * hif_write32_mb. 1179 * @hif_ctx : HIF Context 1180 * @offset : offset on which value has to be written 1181 * @value : value to be written 1182 * 1183 * Return: None 1184 */ 1185 void hif_reg_write(struct hif_opaque_softc *hif_ctx, uint32_t offset, 1186 uint32_t value) 1187 { 1188 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 1189 1190 hif_write32_mb(scn->mem + offset, value); 1191 1192 } 1193 qdf_export_symbol(hif_reg_write); 1194 1195 /** 1196 * hif_reg_read() - API to access hif specific function 1197 * hif_read32_mb. 1198 * @hif_ctx : HIF Context 1199 * @offset : offset from which value has to be read 1200 * 1201 * Return: Read value 1202 */ 1203 uint32_t hif_reg_read(struct hif_opaque_softc *hif_ctx, uint32_t offset) 1204 { 1205 1206 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 1207 1208 return hif_read32_mb(scn->mem + offset); 1209 } 1210 qdf_export_symbol(hif_reg_read); 1211 1212 /** 1213 * hif_ramdump_handler(): generic ramdump handler 1214 * @scn: struct hif_opaque_softc 1215 * 1216 * Return: None 1217 */ 1218 void hif_ramdump_handler(struct hif_opaque_softc *scn) 1219 { 1220 if (hif_get_bus_type(scn) == QDF_BUS_TYPE_USB) 1221 hif_usb_ramdump_handler(scn); 1222 } 1223 1224 #ifdef WLAN_SUSPEND_RESUME_TEST 1225 irqreturn_t hif_wake_interrupt_handler(int irq, void *context) 1226 { 1227 struct hif_softc *scn = context; 1228 1229 HIF_INFO("wake interrupt received on irq %d", irq); 1230 1231 if (scn->initial_wakeup_cb) 1232 scn->initial_wakeup_cb(scn->initial_wakeup_priv); 1233 1234 if (hif_is_ut_suspended(scn)) 1235 hif_ut_fw_resume(scn); 1236 1237 return IRQ_HANDLED; 1238 } 1239 #else /* WLAN_SUSPEND_RESUME_TEST */ 1240 irqreturn_t hif_wake_interrupt_handler(int irq, void *context) 1241 { 1242 struct hif_softc *scn = context; 1243 1244 HIF_INFO("wake interrupt received on irq %d", irq); 1245 1246 if (scn->initial_wakeup_cb) 1247 scn->initial_wakeup_cb(scn->initial_wakeup_priv); 1248 1249 return IRQ_HANDLED; 1250 } 1251 #endif /* WLAN_SUSPEND_RESUME_TEST */ 1252 1253 void hif_set_initial_wakeup_cb(struct hif_opaque_softc *hif_ctx, 1254 void (*callback)(void *), 1255 void *priv) 1256 { 1257 struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); 1258 1259 scn->initial_wakeup_cb = callback; 1260 scn->initial_wakeup_priv = priv; 1261 } 1262 1263