xref: /wlan-dirver/qca-wifi-host-cmn/hif/src/hif_main.c (revision 3149adf58a329e17232a4c0e58d460d025edd55a)
1 /*
2  * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved.
3  *
4  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5  *
6  *
7  * Permission to use, copy, modify, and/or distribute this software for
8  * any purpose with or without fee is hereby granted, provided that the
9  * above copyright notice and this permission notice appear in all
10  * copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19  * PERFORMANCE OF THIS SOFTWARE.
20  */
21 
22 /*
23  * This file was originally distributed by Qualcomm Atheros, Inc.
24  * under proprietary terms before Copyright ownership was assigned
25  * to the Linux Foundation.
26  */
27 
28 #include "targcfg.h"
29 #include "qdf_lock.h"
30 #include "qdf_status.h"
31 #include "qdf_status.h"
32 #include <qdf_atomic.h>         /* qdf_atomic_read */
33 #include <targaddrs.h>
34 #include "hif_io32.h"
35 #include <hif.h>
36 #include <target_type.h>
37 #include "regtable.h"
38 #define ATH_MODULE_NAME hif
39 #include <a_debug.h>
40 #include "hif_main.h"
41 #include "hif_hw_version.h"
42 #if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB)
43 #include "ce_tasklet.h"
44 #include "ce_api.h"
45 #endif
46 #include "qdf_trace.h"
47 #include "qdf_status.h"
48 #include "hif_debug.h"
49 #include "mp_dev.h"
50 #ifdef QCA_WIFI_QCA8074
51 #include "hal_api.h"
52 #endif
53 #include "hif_napi.h"
54 #include "hif_unit_test_suspend_i.h"
55 #include "qdf_module.h"
56 
57 void hif_dump(struct hif_opaque_softc *hif_ctx, uint8_t cmd_id, bool start)
58 {
59 	hif_trigger_dump(hif_ctx, cmd_id, start);
60 }
61 
62 /**
63  * hif_get_target_id(): hif_get_target_id
64  *
65  * Return the virtual memory base address to the caller
66  *
67  * @scn: hif_softc
68  *
69  * Return: A_target_id_t
70  */
71 A_target_id_t hif_get_target_id(struct hif_softc *scn)
72 {
73 	return scn->mem;
74 }
75 
76 /**
77  * hif_get_targetdef(): hif_get_targetdef
78  * @scn: scn
79  *
80  * Return: void *
81  */
82 void *hif_get_targetdef(struct hif_opaque_softc *hif_ctx)
83 {
84 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
85 
86 	return scn->targetdef;
87 }
88 
89 /**
90  * hif_vote_link_down(): unvote for link up
91  *
92  * Call hif_vote_link_down to release a previous request made using
93  * hif_vote_link_up. A hif_vote_link_down call should only be made
94  * after a corresponding hif_vote_link_up, otherwise you could be
95  * negating a vote from another source. When no votes are present
96  * hif will not guarantee the linkstate after hif_bus_suspend.
97  *
98  * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
99  * and initialization deinitialization sequencences.
100  *
101  * Return: n/a
102  */
103 void hif_vote_link_down(struct hif_opaque_softc *hif_ctx)
104 {
105 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
106 
107 	QDF_BUG(scn);
108 	scn->linkstate_vote--;
109 	if (scn->linkstate_vote == 0)
110 		hif_bus_prevent_linkdown(scn, false);
111 }
112 
113 /**
114  * hif_vote_link_up(): vote to prevent bus from suspending
115  *
116  * Makes hif guarantee that fw can message the host normally
117  * durring suspend.
118  *
119  * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
120  * and initialization deinitialization sequencences.
121  *
122  * Return: n/a
123  */
124 void hif_vote_link_up(struct hif_opaque_softc *hif_ctx)
125 {
126 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
127 
128 	QDF_BUG(scn);
129 	scn->linkstate_vote++;
130 	if (scn->linkstate_vote == 1)
131 		hif_bus_prevent_linkdown(scn, true);
132 }
133 
134 /**
135  * hif_can_suspend_link(): query if hif is permitted to suspend the link
136  *
137  * Hif will ensure that the link won't be suspended if the upperlayers
138  * don't want it to.
139  *
140  * SYNCHRONIZATION: MC thread is stopped before bus suspend thus
141  * we don't need extra locking to ensure votes dont change while
142  * we are in the process of suspending or resuming.
143  *
144  * Return: false if hif will guarantee link up durring suspend.
145  */
146 bool hif_can_suspend_link(struct hif_opaque_softc *hif_ctx)
147 {
148 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
149 
150 	QDF_BUG(scn);
151 	return scn->linkstate_vote == 0;
152 }
153 
154 /**
155  * hif_hia_item_address(): hif_hia_item_address
156  * @target_type: target_type
157  * @item_offset: item_offset
158  *
159  * Return: n/a
160  */
161 uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset)
162 {
163 	switch (target_type) {
164 	case TARGET_TYPE_AR6002:
165 		return AR6002_HOST_INTEREST_ADDRESS + item_offset;
166 	case TARGET_TYPE_AR6003:
167 		return AR6003_HOST_INTEREST_ADDRESS + item_offset;
168 	case TARGET_TYPE_AR6004:
169 		return AR6004_HOST_INTEREST_ADDRESS + item_offset;
170 	case TARGET_TYPE_AR6006:
171 		return AR6006_HOST_INTEREST_ADDRESS + item_offset;
172 	case TARGET_TYPE_AR9888:
173 		return AR9888_HOST_INTEREST_ADDRESS + item_offset;
174 	case TARGET_TYPE_AR6320:
175 	case TARGET_TYPE_AR6320V2:
176 		return AR6320_HOST_INTEREST_ADDRESS + item_offset;
177 	case TARGET_TYPE_ADRASTEA:
178 		/* ADRASTEA doesn't have a host interest address */
179 		ASSERT(0);
180 		return 0;
181 	case TARGET_TYPE_AR900B:
182 		return AR900B_HOST_INTEREST_ADDRESS + item_offset;
183 	case TARGET_TYPE_QCA9984:
184 		return QCA9984_HOST_INTEREST_ADDRESS + item_offset;
185 	case TARGET_TYPE_QCA9888:
186 		return QCA9888_HOST_INTEREST_ADDRESS + item_offset;
187 	case TARGET_TYPE_IPQ4019:
188 		return IPQ4019_HOST_INTEREST_ADDRESS + item_offset;
189 
190 	default:
191 		ASSERT(0);
192 		return 0;
193 	}
194 }
195 
196 /**
197  * hif_max_num_receives_reached() - check max receive is reached
198  * @scn: HIF Context
199  * @count: unsigned int.
200  *
201  * Output check status as bool
202  *
203  * Return: bool
204  */
205 bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count)
206 {
207 	if (QDF_IS_EPPING_ENABLED(hif_get_conparam(scn)))
208 		return count > 120;
209 	else
210 		return count > MAX_NUM_OF_RECEIVES;
211 }
212 
213 /**
214  * init_buffer_count() - initial buffer count
215  * @maxSize: qdf_size_t
216  *
217  * routine to modify the initial buffer count to be allocated on an os
218  * platform basis. Platform owner will need to modify this as needed
219  *
220  * Return: qdf_size_t
221  */
222 qdf_size_t init_buffer_count(qdf_size_t maxSize)
223 {
224 	return maxSize;
225 }
226 
227 /**
228  * hif_save_htc_htt_config_endpoint() - save htt_tx_endpoint
229  * @hif_ctx: hif context
230  * @htc_htt_tx_endpoint: htt_tx_endpoint
231  *
232  * Return: void
233  */
234 void hif_save_htc_htt_config_endpoint(struct hif_opaque_softc *hif_ctx,
235 							int htc_htt_tx_endpoint)
236 {
237 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
238 
239 	if (!scn) {
240 		HIF_ERROR("%s: error: scn or scn->hif_sc is NULL!",
241 		       __func__);
242 		return;
243 	}
244 
245 	scn->htc_htt_tx_endpoint = htc_htt_tx_endpoint;
246 }
247 qdf_export_symbol(hif_save_htc_htt_config_endpoint);
248 
249 static const struct qwlan_hw qwlan_hw_list[] = {
250 	{
251 		.id = AR6320_REV1_VERSION,
252 		.subid = 0,
253 		.name = "QCA6174_REV1",
254 	},
255 	{
256 		.id = AR6320_REV1_1_VERSION,
257 		.subid = 0x1,
258 		.name = "QCA6174_REV1_1",
259 	},
260 	{
261 		.id = AR6320_REV1_3_VERSION,
262 		.subid = 0x2,
263 		.name = "QCA6174_REV1_3",
264 	},
265 	{
266 		.id = AR6320_REV2_1_VERSION,
267 		.subid = 0x4,
268 		.name = "QCA6174_REV2_1",
269 	},
270 	{
271 		.id = AR6320_REV2_1_VERSION,
272 		.subid = 0x5,
273 		.name = "QCA6174_REV2_2",
274 	},
275 	{
276 		.id = AR6320_REV3_VERSION,
277 		.subid = 0x6,
278 		.name = "QCA6174_REV2.3",
279 	},
280 	{
281 		.id = AR6320_REV3_VERSION,
282 		.subid = 0x8,
283 		.name = "QCA6174_REV3",
284 	},
285 	{
286 		.id = AR6320_REV3_VERSION,
287 		.subid = 0x9,
288 		.name = "QCA6174_REV3_1",
289 	},
290 	{
291 		.id = AR6320_REV3_2_VERSION,
292 		.subid = 0xA,
293 		.name = "AR6320_REV3_2_VERSION",
294 	},
295 	{
296 		.id = WCN3990_v1,
297 		.subid = 0x0,
298 		.name = "WCN3990_V1",
299 	},
300 	{
301 		.id = WCN3990_v2,
302 		.subid = 0x0,
303 		.name = "WCN3990_V2",
304 	},
305 	{
306 		.id = WCN3990_v2_1,
307 		.subid = 0x0,
308 		.name = "WCN3990_V2.1",
309 	},
310 	{
311 		.id = QCA9379_REV1_VERSION,
312 		.subid = 0xC,
313 		.name = "QCA9379_REV1",
314 	},
315 	{
316 		.id = QCA9379_REV1_VERSION,
317 		.subid = 0xD,
318 		.name = "QCA9379_REV1_1",
319 	}
320 };
321 
322 /**
323  * hif_get_hw_name(): get a human readable name for the hardware
324  * @info: Target Info
325  *
326  * Return: human readable name for the underlying wifi hardware.
327  */
328 static const char *hif_get_hw_name(struct hif_target_info *info)
329 {
330 	int i;
331 
332 	if (info->hw_name)
333 		return info->hw_name;
334 
335 	for (i = 0; i < ARRAY_SIZE(qwlan_hw_list); i++) {
336 		if (info->target_version == qwlan_hw_list[i].id &&
337 		    info->target_revision == qwlan_hw_list[i].subid) {
338 			return qwlan_hw_list[i].name;
339 		}
340 	}
341 
342 	info->hw_name = qdf_mem_malloc(64);
343 	if (!info->hw_name)
344 		return "Unknown Device (nomem)";
345 
346 	i = qdf_snprint(info->hw_name, 64, "HW_VERSION=%x.",
347 			info->target_version);
348 	if (i < 0)
349 		return "Unknown Device (snprintf failure)";
350 	else
351 		return info->hw_name;
352 }
353 
354 /**
355  * hif_get_hw_info(): hif_get_hw_info
356  * @scn: scn
357  * @version: version
358  * @revision: revision
359  *
360  * Return: n/a
361  */
362 void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision,
363 			const char **target_name)
364 {
365 	struct hif_target_info *info = hif_get_target_info_handle(scn);
366 	struct hif_softc *sc = HIF_GET_SOFTC(scn);
367 
368 	if (sc->bus_type == QDF_BUS_TYPE_USB)
369 		hif_usb_get_hw_info(sc);
370 
371 	*version = info->target_version;
372 	*revision = info->target_revision;
373 	*target_name = hif_get_hw_name(info);
374 }
375 
376 /**
377  * hif_get_dev_ba(): API to get device base address.
378  * @scn: scn
379  * @version: version
380  * @revision: revision
381  *
382  * Return: n/a
383  */
384 void *hif_get_dev_ba(struct hif_opaque_softc *hif_handle)
385 {
386 	struct hif_softc *scn = (struct hif_softc *)hif_handle;
387 
388 	return scn->mem;
389 }
390 qdf_export_symbol(hif_get_dev_ba);
391 /**
392  * hif_open(): hif_open
393  * @qdf_ctx: QDF Context
394  * @mode: Driver Mode
395  * @bus_type: Bus Type
396  * @cbk: CDS Callbacks
397  *
398  * API to open HIF Context
399  *
400  * Return: HIF Opaque Pointer
401  */
402 struct hif_opaque_softc *hif_open(qdf_device_t qdf_ctx, uint32_t mode,
403 				  enum qdf_bus_type bus_type,
404 				  struct hif_driver_state_callbacks *cbk)
405 {
406 	struct hif_softc *scn;
407 	QDF_STATUS status = QDF_STATUS_SUCCESS;
408 	int bus_context_size = hif_bus_get_context_size(bus_type);
409 
410 	if (bus_context_size == 0) {
411 		HIF_ERROR("%s: context size 0 not allowed", __func__);
412 		return NULL;
413 	}
414 
415 	scn = (struct hif_softc *)qdf_mem_malloc(bus_context_size);
416 	if (!scn) {
417 		HIF_ERROR("%s: cannot alloc memory for HIF context of size:%d",
418 						__func__, bus_context_size);
419 		return GET_HIF_OPAQUE_HDL(scn);
420 	}
421 
422 	scn->qdf_dev = qdf_ctx;
423 	scn->hif_con_param = mode;
424 	qdf_atomic_init(&scn->active_tasklet_cnt);
425 	qdf_atomic_init(&scn->active_grp_tasklet_cnt);
426 	qdf_atomic_init(&scn->link_suspended);
427 	qdf_atomic_init(&scn->tasklet_from_intr);
428 	qdf_mem_copy(&scn->callbacks, cbk,
429 		     sizeof(struct hif_driver_state_callbacks));
430 	scn->bus_type  = bus_type;
431 	status = hif_bus_open(scn, bus_type);
432 	if (status != QDF_STATUS_SUCCESS) {
433 		HIF_ERROR("%s: hif_bus_open error = %d, bus_type = %d",
434 				  __func__, status, bus_type);
435 		qdf_mem_free(scn);
436 		scn = NULL;
437 	}
438 
439 	return GET_HIF_OPAQUE_HDL(scn);
440 }
441 
442 /**
443  * hif_close(): hif_close
444  * @hif_ctx: hif_ctx
445  *
446  * Return: n/a
447  */
448 void hif_close(struct hif_opaque_softc *hif_ctx)
449 {
450 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
451 
452 	if (scn == NULL) {
453 		HIF_ERROR("%s: hif_opaque_softc is NULL", __func__);
454 		return;
455 	}
456 
457 	if (scn->athdiag_procfs_inited) {
458 		athdiag_procfs_remove();
459 		scn->athdiag_procfs_inited = false;
460 	}
461 
462 	if (scn->target_info.hw_name) {
463 		char *hw_name = scn->target_info.hw_name;
464 
465 		scn->target_info.hw_name = "ErrUnloading";
466 		qdf_mem_free(hw_name);
467 	}
468 
469 	if (scn->vaddr_rri_on_ddr)
470 		qdf_mem_free_consistent(scn->qdf_dev, scn->qdf_dev->dev,
471 					(CE_COUNT*sizeof(uint32_t)),
472 				scn->vaddr_rri_on_ddr, scn->paddr_rri_on_ddr,
473 				0);
474 
475 	scn->vaddr_rri_on_ddr = NULL;
476 	hif_bus_close(scn);
477 	qdf_mem_free(scn);
478 }
479 
480 #ifdef QCA_WIFI_QCA8074
481 static QDF_STATUS hif_hal_attach(struct hif_softc *scn)
482 {
483 	if (ce_srng_based(scn)) {
484 		scn->hal_soc = hal_attach(scn, scn->qdf_dev);
485 		if (scn->hal_soc == NULL)
486 			return QDF_STATUS_E_FAILURE;
487 	}
488 
489 	return QDF_STATUS_SUCCESS;
490 }
491 
492 static QDF_STATUS hif_hal_detach(struct hif_softc *scn)
493 {
494 	if (ce_srng_based(scn)) {
495 		hal_detach(scn->hal_soc);
496 		scn->hal_soc = NULL;
497 	}
498 
499 	return QDF_STATUS_SUCCESS;
500 }
501 #else
502 static QDF_STATUS hif_hal_attach(struct hif_softc *scn)
503 {
504 	return QDF_STATUS_SUCCESS;
505 }
506 
507 static QDF_STATUS hif_hal_detach(struct hif_softc *scn)
508 {
509 	return QDF_STATUS_SUCCESS;
510 }
511 #endif
512 
513 /**
514  * hif_enable(): hif_enable
515  * @hif_ctx: hif_ctx
516  * @dev: dev
517  * @bdev: bus dev
518  * @bid: bus ID
519  * @bus_type: bus type
520  * @type: enable type
521  *
522  * Return: QDF_STATUS
523  */
524 QDF_STATUS hif_enable(struct hif_opaque_softc *hif_ctx, struct device *dev,
525 					  void *bdev,
526 					  const struct hif_bus_id *bid,
527 					  enum qdf_bus_type bus_type,
528 					  enum hif_enable_type type)
529 {
530 	QDF_STATUS status;
531 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
532 
533 	if (scn == NULL) {
534 		HIF_ERROR("%s: hif_ctx = NULL", __func__);
535 		return QDF_STATUS_E_NULL_VALUE;
536 	}
537 
538 	status = hif_enable_bus(scn, dev, bdev, bid, type);
539 	if (status != QDF_STATUS_SUCCESS) {
540 		HIF_ERROR("%s: hif_enable_bus error = %d",
541 				  __func__, status);
542 		return status;
543 	}
544 
545 	status = hif_hal_attach(scn);
546 	if (status != QDF_STATUS_SUCCESS) {
547 		HIF_ERROR("%s: hal attach failed", __func__);
548 		goto disable_bus;
549 	}
550 
551 	if (hif_bus_configure(scn)) {
552 		HIF_ERROR("%s: Target probe failed.", __func__);
553 		status = QDF_STATUS_E_FAILURE;
554 		goto hal_detach;
555 	}
556 
557 	hif_ut_suspend_init(scn);
558 
559 	/*
560 	 * Flag to avoid potential unallocated memory access from MSI
561 	 * interrupt handler which could get scheduled as soon as MSI
562 	 * is enabled, i.e to take care of the race due to the order
563 	 * in where MSI is enabled before the memory, that will be
564 	 * in interrupt handlers, is allocated.
565 	 */
566 
567 	scn->hif_init_done = true;
568 
569 	HIF_DBG("%s: OK", __func__);
570 
571 	return QDF_STATUS_SUCCESS;
572 
573 hal_detach:
574 	hif_hal_detach(scn);
575 disable_bus:
576 	hif_disable_bus(scn);
577 	return status;
578 }
579 
580 void hif_disable(struct hif_opaque_softc *hif_ctx, enum hif_disable_type type)
581 {
582 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
583 
584 	if (!scn)
585 		return;
586 
587 	hif_nointrs(scn);
588 	if (scn->hif_init_done == false)
589 		hif_shutdown_device(hif_ctx);
590 	else
591 		hif_stop(hif_ctx);
592 
593 	hif_hal_detach(scn);
594 
595 	hif_disable_bus(scn);
596 
597 	hif_wlan_disable(scn);
598 
599 	scn->notice_send = false;
600 
601 	HIF_DBG("%s: X", __func__);
602 }
603 
604 void hif_display_stats(struct hif_opaque_softc *hif_ctx)
605 {
606 	hif_display_bus_stats(hif_ctx);
607 }
608 
609 void hif_clear_stats(struct hif_opaque_softc *hif_ctx)
610 {
611 	hif_clear_bus_stats(hif_ctx);
612 }
613 
614 /**
615  * hif_crash_shutdown_dump_bus_register() - dump bus registers
616  * @hif_ctx: hif_ctx
617  *
618  * Return: n/a
619  */
620 #if defined(TARGET_RAMDUMP_AFTER_KERNEL_PANIC) \
621 && defined(DEBUG)
622 
623 static void hif_crash_shutdown_dump_bus_register(void *hif_ctx)
624 {
625 	struct hif_opaque_softc *scn = hif_ctx;
626 
627 	if (hif_check_soc_status(scn))
628 		return;
629 
630 	if (hif_dump_registers(scn))
631 		HIF_ERROR("Failed to dump bus registers!");
632 }
633 
634 /**
635  * hif_crash_shutdown(): hif_crash_shutdown
636  *
637  * This function is called by the platform driver to dump CE registers
638  *
639  * @hif_ctx: hif_ctx
640  *
641  * Return: n/a
642  */
643 void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx)
644 {
645 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
646 
647 	if (!hif_ctx)
648 		return;
649 
650 	if (scn->bus_type == QDF_BUS_TYPE_SNOC) {
651 		HIF_INFO_MED("%s: RAM dump disabled for bustype %d",
652 				__func__, scn->bus_type);
653 		return;
654 	}
655 
656 	if (TARGET_STATUS_RESET == scn->target_status) {
657 		HIF_INFO_MED("%s: Target is already asserted, ignore!",
658 			    __func__);
659 		return;
660 	}
661 
662 	if (hif_is_load_or_unload_in_progress(scn)) {
663 		HIF_ERROR("%s: Load/unload is in progress, ignore!", __func__);
664 		return;
665 	}
666 
667 	hif_crash_shutdown_dump_bus_register(hif_ctx);
668 
669 	if (ol_copy_ramdump(hif_ctx))
670 		goto out;
671 
672 	HIF_INFO_MED("%s: RAM dump collecting completed!", __func__);
673 
674 out:
675 	return;
676 }
677 #else
678 void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx)
679 {
680 	HIF_INFO_MED("%s: Collecting target RAM dump disabled",
681 		__func__);
682 }
683 #endif /* TARGET_RAMDUMP_AFTER_KERNEL_PANIC */
684 
685 #ifdef QCA_WIFI_3_0
686 /**
687  * hif_check_fw_reg(): hif_check_fw_reg
688  * @scn: scn
689  * @state:
690  *
691  * Return: int
692  */
693 int hif_check_fw_reg(struct hif_opaque_softc *scn)
694 {
695 	return 0;
696 }
697 #endif
698 
699 /**
700  * hif_read_phy_mem_base(): hif_read_phy_mem_base
701  * @scn: scn
702  * @phy_mem_base: physical mem base
703  *
704  * Return: n/a
705  */
706 void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *phy_mem_base)
707 {
708 	*phy_mem_base = scn->mem_pa;
709 }
710 qdf_export_symbol(hif_read_phy_mem_base);
711 
712 /**
713  * hif_get_device_type(): hif_get_device_type
714  * @device_id: device_id
715  * @revision_id: revision_id
716  * @hif_type: returned hif_type
717  * @target_type: returned target_type
718  *
719  * Return: int
720  */
721 int hif_get_device_type(uint32_t device_id,
722 			uint32_t revision_id,
723 			uint32_t *hif_type, uint32_t *target_type)
724 {
725 	int ret = 0;
726 
727 	switch (device_id) {
728 	case ADRASTEA_DEVICE_ID_P2_E12:
729 
730 		*hif_type = HIF_TYPE_ADRASTEA;
731 		*target_type = TARGET_TYPE_ADRASTEA;
732 		break;
733 
734 	case AR9888_DEVICE_ID:
735 		*hif_type = HIF_TYPE_AR9888;
736 		*target_type = TARGET_TYPE_AR9888;
737 		break;
738 
739 	case AR6320_DEVICE_ID:
740 		switch (revision_id) {
741 		case AR6320_FW_1_1:
742 		case AR6320_FW_1_3:
743 			*hif_type = HIF_TYPE_AR6320;
744 			*target_type = TARGET_TYPE_AR6320;
745 			break;
746 
747 		case AR6320_FW_2_0:
748 		case AR6320_FW_3_0:
749 		case AR6320_FW_3_2:
750 			*hif_type = HIF_TYPE_AR6320V2;
751 			*target_type = TARGET_TYPE_AR6320V2;
752 			break;
753 
754 		default:
755 			HIF_ERROR("%s: error - dev_id = 0x%x, rev_id = 0x%x",
756 				   __func__, device_id, revision_id);
757 			ret = -ENODEV;
758 			goto end;
759 		}
760 		break;
761 
762 	case AR9887_DEVICE_ID:
763 		*hif_type = HIF_TYPE_AR9888;
764 		*target_type = TARGET_TYPE_AR9888;
765 		HIF_INFO(" *********** AR9887 **************");
766 		break;
767 
768 	case QCA9984_DEVICE_ID:
769 		*hif_type = HIF_TYPE_QCA9984;
770 		*target_type = TARGET_TYPE_QCA9984;
771 		HIF_INFO(" *********** QCA9984 *************");
772 		break;
773 
774 	case QCA9888_DEVICE_ID:
775 		*hif_type = HIF_TYPE_QCA9888;
776 		*target_type = TARGET_TYPE_QCA9888;
777 		HIF_INFO(" *********** QCA9888 *************");
778 		break;
779 
780 	case AR900B_DEVICE_ID:
781 		*hif_type = HIF_TYPE_AR900B;
782 		*target_type = TARGET_TYPE_AR900B;
783 		HIF_INFO(" *********** AR900B *************");
784 		break;
785 
786 	case IPQ4019_DEVICE_ID:
787 		*hif_type = HIF_TYPE_IPQ4019;
788 		*target_type = TARGET_TYPE_IPQ4019;
789 		HIF_INFO(" *********** IPQ4019  *************");
790 		break;
791 
792 	case QCA8074_DEVICE_ID:
793 	case RUMIM2M_DEVICE_ID_NODE0:
794 	case RUMIM2M_DEVICE_ID_NODE1:
795 	case RUMIM2M_DEVICE_ID_NODE2:
796 	case RUMIM2M_DEVICE_ID_NODE3:
797 		*hif_type = HIF_TYPE_QCA8074;
798 		*target_type = TARGET_TYPE_QCA8074;
799 		HIF_INFO(" *********** QCA8074  *************\n");
800 		break;
801 
802 	case QCA6290_EMULATION_DEVICE_ID:
803 	case QCA6290_DEVICE_ID:
804 		*hif_type = HIF_TYPE_QCA6290;
805 		*target_type = TARGET_TYPE_QCA6290;
806 		HIF_INFO(" *********** QCA6290EMU *************\n");
807 		break;
808 
809 	default:
810 		HIF_ERROR("%s: Unsupported device ID!", __func__);
811 		ret = -ENODEV;
812 		break;
813 	}
814 
815 	if (*target_type == TARGET_TYPE_UNKNOWN) {
816 		HIF_ERROR("%s: Unsupported target_type!", __func__);
817 		ret = -ENODEV;
818 	}
819 end:
820 	return ret;
821 }
822 
823 /**
824  * hif_needs_bmi() - return true if the soc needs bmi through the driver
825  * @hif_ctx: hif context
826  *
827  * Return: true if the soc needs driver bmi otherwise false
828  */
829 bool hif_needs_bmi(struct hif_opaque_softc *hif_ctx)
830 {
831 	struct hif_softc *hif_sc = HIF_GET_SOFTC(hif_ctx);
832 
833 	return (hif_sc->bus_type != QDF_BUS_TYPE_SNOC) &&
834 		!ce_srng_based(hif_sc);
835 }
836 qdf_export_symbol(hif_needs_bmi);
837 
838 /**
839  * hif_get_bus_type() - return the bus type
840  *
841  * Return: enum qdf_bus_type
842  */
843 enum qdf_bus_type hif_get_bus_type(struct hif_opaque_softc *hif_hdl)
844 {
845 	struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl);
846 
847 	return scn->bus_type;
848 }
849 
850 /**
851  * Target info and ini parameters are global to the driver
852  * Hence these structures are exposed to all the modules in
853  * the driver and they don't need to maintains multiple copies
854  * of the same info, instead get the handle from hif and
855  * modify them in hif
856  */
857 
858 /**
859  * hif_get_ini_handle() - API to get hif_config_param handle
860  * @hif_ctx: HIF Context
861  *
862  * Return: pointer to hif_config_info
863  */
864 struct hif_config_info *hif_get_ini_handle(struct hif_opaque_softc *hif_ctx)
865 {
866 	struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
867 
868 	return &sc->hif_config;
869 }
870 
871 /**
872  * hif_get_target_info_handle() - API to get hif_target_info handle
873  * @hif_ctx: HIF context
874  *
875  * Return: Pointer to hif_target_info
876  */
877 struct hif_target_info *hif_get_target_info_handle(
878 					struct hif_opaque_softc *hif_ctx)
879 {
880 	struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
881 
882 	return &sc->target_info;
883 
884 }
885 qdf_export_symbol(hif_get_target_info_handle);
886 
887 #if defined(FEATURE_LRO)
888 
889 /**
890  * hif_get_lro_info - Returns LRO instance for instance ID
891  * @ctx_id: LRO instance ID
892  * @hif_hdl: HIF Context
893  *
894  * Return: Pointer to LRO instance.
895  */
896 void *hif_get_lro_info(int ctx_id, struct hif_opaque_softc *hif_hdl)
897 {
898 	void *data;
899 
900 	if (hif_napi_enabled(hif_hdl, -1))
901 		data = hif_napi_get_lro_info(hif_hdl, ctx_id);
902 	else
903 		data = hif_ce_get_lro_ctx(hif_hdl, ctx_id);
904 
905 	return data;
906 }
907 
908 /**
909  * hif_get_rx_ctx_id - Returns LRO instance ID based on underlying LRO instance
910  * @ctx_id: LRO context ID
911  * @hif_hdl: HIF Context
912  *
913  * Return: LRO instance ID
914  */
915 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl)
916 {
917 	if (hif_napi_enabled(hif_hdl, -1))
918 		return NAPI_PIPE2ID(ctx_id);
919 	else
920 		return ctx_id;
921 }
922 
923 #else /* !defined(FEATURE_LRO) */
924 int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl)
925 {
926 	return 0;
927 }
928 #endif
929 
930 /**
931  * hif_get_target_status - API to get target status
932  * @hif_ctx: HIF Context
933  *
934  * Return: enum hif_target_status
935  */
936 enum hif_target_status hif_get_target_status(struct hif_opaque_softc *hif_ctx)
937 {
938 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
939 
940 	return scn->target_status;
941 }
942 qdf_export_symbol(hif_get_target_status);
943 
944 /**
945  * hif_set_target_status() - API to set target status
946  * @hif_ctx: HIF Context
947  * @status: Target Status
948  *
949  * Return: void
950  */
951 void hif_set_target_status(struct hif_opaque_softc *hif_ctx, enum
952 			   hif_target_status status)
953 {
954 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
955 
956 	scn->target_status = status;
957 }
958 
959 /**
960  * hif_init_ini_config() - API to initialize HIF configuration parameters
961  * @hif_ctx: HIF Context
962  * @cfg: HIF Configuration
963  *
964  * Return: void
965  */
966 void hif_init_ini_config(struct hif_opaque_softc *hif_ctx,
967 			 struct hif_config_info *cfg)
968 {
969 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
970 
971 	qdf_mem_copy(&scn->hif_config, cfg, sizeof(struct hif_config_info));
972 }
973 
974 /**
975  * hif_get_conparam() - API to get driver mode in HIF
976  * @scn: HIF Context
977  *
978  * Return: driver mode of operation
979  */
980 uint32_t hif_get_conparam(struct hif_softc *scn)
981 {
982 	if (!scn)
983 		return 0;
984 
985 	return scn->hif_con_param;
986 }
987 
988 /**
989  * hif_get_callbacks_handle() - API to get callbacks Handle
990  * @scn: HIF Context
991  *
992  * Return: pointer to HIF Callbacks
993  */
994 struct hif_driver_state_callbacks *hif_get_callbacks_handle(
995 							struct hif_softc *scn)
996 {
997 	return &scn->callbacks;
998 }
999 
1000 /**
1001  * hif_is_driver_unloading() - API to query upper layers if driver is unloading
1002  * @scn: HIF Context
1003  *
1004  * Return: True/False
1005  */
1006 bool hif_is_driver_unloading(struct hif_softc *scn)
1007 {
1008 	struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
1009 
1010 	if (cbk && cbk->is_driver_unloading)
1011 		return cbk->is_driver_unloading(cbk->context);
1012 
1013 	return false;
1014 }
1015 
1016 /**
1017  * hif_is_load_or_unload_in_progress() - API to query upper layers if
1018  * load/unload in progress
1019  * @scn: HIF Context
1020  *
1021  * Return: True/False
1022  */
1023 bool hif_is_load_or_unload_in_progress(struct hif_softc *scn)
1024 {
1025 	struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
1026 
1027 	if (cbk && cbk->is_load_unload_in_progress)
1028 		return cbk->is_load_unload_in_progress(cbk->context);
1029 
1030 	return false;
1031 }
1032 
1033 /**
1034  * hif_update_pipe_callback() - API to register pipe specific callbacks
1035  * @osc: Opaque softc
1036  * @pipeid: pipe id
1037  * @callbacks: callbacks to register
1038  *
1039  * Return: void
1040  */
1041 
1042 void hif_update_pipe_callback(struct hif_opaque_softc *osc,
1043 					u_int8_t pipeid,
1044 					struct hif_msg_callbacks *callbacks)
1045 {
1046 	struct hif_softc *scn = HIF_GET_SOFTC(osc);
1047 	struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
1048 	struct HIF_CE_pipe_info *pipe_info;
1049 
1050 	QDF_BUG(pipeid < CE_COUNT_MAX);
1051 
1052 	HIF_INFO_LO("+%s pipeid %d\n", __func__, pipeid);
1053 
1054 	pipe_info = &hif_state->pipe_info[pipeid];
1055 
1056 	qdf_mem_copy(&pipe_info->pipe_callbacks,
1057 			callbacks, sizeof(pipe_info->pipe_callbacks));
1058 
1059 	HIF_INFO_LO("-%s\n", __func__);
1060 }
1061 qdf_export_symbol(hif_update_pipe_callback);
1062 
1063 /**
1064  * hif_is_recovery_in_progress() - API to query upper layers if recovery in
1065  * progress
1066  * @scn: HIF Context
1067  *
1068  * Return: True/False
1069  */
1070 bool hif_is_recovery_in_progress(struct hif_softc *scn)
1071 {
1072 	struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
1073 
1074 	if (cbk && cbk->is_recovery_in_progress)
1075 		return cbk->is_recovery_in_progress(cbk->context);
1076 
1077 	return false;
1078 }
1079 
1080 /**
1081  * hif_is_target_ready() - API to query if target is in ready state
1082  * progress
1083  * @scn: HIF Context
1084  *
1085  * Return: True/False
1086  */
1087 bool hif_is_target_ready(struct hif_softc *scn)
1088 {
1089 	struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
1090 
1091 	if (cbk && cbk->is_target_ready)
1092 		return cbk->is_target_ready(cbk->context);
1093 
1094 	return false;
1095 }
1096 #if defined(HIF_PCI) || defined(SNOC) || defined(HIF_AHB)
1097 /**
1098  * hif_batch_send() - API to access hif specific function
1099  * ce_batch_send.
1100  * @osc: HIF Context
1101  * @msdu : list of msdus to be sent
1102  * @transfer_id : transfer id
1103  * @len : donwloaded length
1104  *
1105  * Return: list of msds not sent
1106  */
1107 qdf_nbuf_t hif_batch_send(struct hif_opaque_softc *osc, qdf_nbuf_t msdu,
1108 		uint32_t transfer_id, u_int32_t len, uint32_t sendhead)
1109 {
1110 	void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
1111 
1112 	return ce_batch_send((struct CE_handle *)ce_tx_hdl, msdu, transfer_id,
1113 			len, sendhead);
1114 }
1115 qdf_export_symbol(hif_batch_send);
1116 
1117 /**
1118  * hif_update_tx_ring() - API to access hif specific function
1119  * ce_update_tx_ring.
1120  * @osc: HIF Context
1121  * @num_htt_cmpls : number of htt compl received.
1122  *
1123  * Return: void
1124  */
1125 void hif_update_tx_ring(struct hif_opaque_softc *osc, u_int32_t num_htt_cmpls)
1126 {
1127 	void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
1128 
1129 	ce_update_tx_ring(ce_tx_hdl, num_htt_cmpls);
1130 }
1131 qdf_export_symbol(hif_update_tx_ring);
1132 
1133 
1134 /**
1135  * hif_send_single() - API to access hif specific function
1136  * ce_send_single.
1137  * @osc: HIF Context
1138  * @msdu : msdu to be sent
1139  * @transfer_id: transfer id
1140  * @len : downloaded length
1141  *
1142  * Return: msdu sent status
1143  */
1144 int hif_send_single(struct hif_opaque_softc *osc, qdf_nbuf_t msdu, uint32_t
1145 		transfer_id, u_int32_t len)
1146 {
1147 	void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
1148 
1149 	return ce_send_single((struct CE_handle *)ce_tx_hdl, msdu, transfer_id,
1150 			len);
1151 }
1152 qdf_export_symbol(hif_send_single);
1153 
1154 /**
1155  * hif_send_fast() - API to access hif specific function
1156  * ce_send_fast.
1157  * @osc: HIF Context
1158  * @msdu : array of msdus to be sent
1159  * @num_msdus : number of msdus in an array
1160  * @transfer_id: transfer id
1161  * @download_len: download length
1162  *
1163  * Return: No. of packets that could be sent
1164  */
1165 int hif_send_fast(struct hif_opaque_softc *osc, qdf_nbuf_t nbuf,
1166 		uint32_t transfer_id, uint32_t download_len)
1167 {
1168 	void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
1169 
1170 	return ce_send_fast((struct CE_handle *)ce_tx_hdl, nbuf,
1171 			transfer_id, download_len);
1172 }
1173 qdf_export_symbol(hif_send_fast);
1174 #endif
1175 
1176 /**
1177  * hif_reg_write() - API to access hif specific function
1178  * hif_write32_mb.
1179  * @hif_ctx : HIF Context
1180  * @offset : offset on which value has to be written
1181  * @value : value to be written
1182  *
1183  * Return: None
1184  */
1185 void hif_reg_write(struct hif_opaque_softc *hif_ctx, uint32_t offset,
1186 		uint32_t value)
1187 {
1188 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
1189 
1190 	hif_write32_mb(scn->mem + offset, value);
1191 
1192 }
1193 qdf_export_symbol(hif_reg_write);
1194 
1195 /**
1196  * hif_reg_read() - API to access hif specific function
1197  * hif_read32_mb.
1198  * @hif_ctx : HIF Context
1199  * @offset : offset from which value has to be read
1200  *
1201  * Return: Read value
1202  */
1203 uint32_t hif_reg_read(struct hif_opaque_softc *hif_ctx, uint32_t offset)
1204 {
1205 
1206 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
1207 
1208 	return hif_read32_mb(scn->mem + offset);
1209 }
1210 qdf_export_symbol(hif_reg_read);
1211 
1212 #if defined(HIF_USB)
1213 /**
1214  * hif_ramdump_handler(): generic ramdump handler
1215  * @scn: struct hif_opaque_softc
1216  *
1217  * Return: None
1218  */
1219 
1220 void hif_ramdump_handler(struct hif_opaque_softc *scn)
1221 
1222 {
1223 	if (hif_get_bus_type == QDF_BUS_TYPE_USB)
1224 		hif_usb_ramdump_handler();
1225 }
1226 #endif
1227 
1228 #ifdef WLAN_SUSPEND_RESUME_TEST
1229 irqreturn_t hif_wake_interrupt_handler(int irq, void *context)
1230 {
1231 	struct hif_softc *scn = context;
1232 
1233 	HIF_INFO("wake interrupt received on irq %d", irq);
1234 
1235 	if (scn->initial_wakeup_cb)
1236 		scn->initial_wakeup_cb(scn->initial_wakeup_priv);
1237 
1238 	if (hif_is_ut_suspended(scn))
1239 		hif_ut_fw_resume(scn);
1240 
1241 	return IRQ_HANDLED;
1242 }
1243 #else /* WLAN_SUSPEND_RESUME_TEST */
1244 irqreturn_t hif_wake_interrupt_handler(int irq, void *context)
1245 {
1246 	struct hif_softc *scn = context;
1247 
1248 	HIF_INFO("wake interrupt received on irq %d", irq);
1249 
1250 	if (scn->initial_wakeup_cb)
1251 		scn->initial_wakeup_cb(scn->initial_wakeup_priv);
1252 
1253 	return IRQ_HANDLED;
1254 }
1255 #endif /* WLAN_SUSPEND_RESUME_TEST */
1256 
1257 void hif_set_initial_wakeup_cb(struct hif_opaque_softc *hif_ctx,
1258 			       void (*callback)(void *),
1259 			       void *priv)
1260 {
1261 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
1262 
1263 	scn->initial_wakeup_cb = callback;
1264 	scn->initial_wakeup_priv = priv;
1265 }
1266 
1267