xref: /wlan-dirver/qca-wifi-host-cmn/hif/src/dispatcher/pci_api.h (revision d0c05845839e5f2ba5a8dcebe0cd3e4cd4e8dfcf)
1 /*
2  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3  * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef _PCI_API_H_
21 #define _PCI_API_H_
22 struct hif_exec_context;
23 
24 QDF_STATUS hif_pci_open(struct hif_softc *hif_ctx,
25 			enum qdf_bus_type bus_type);
26 void hif_pci_close(struct hif_softc *hif_ctx);
27 void hif_pci_prevent_linkdown(struct hif_softc *scn, bool flag);
28 void hif_pci_reset_soc(struct hif_softc *ol_sc);
29 int hif_pci_bus_suspend(struct hif_softc *scn);
30 int hif_pci_bus_suspend_noirq(struct hif_softc *scn);
31 int hif_pci_bus_resume(struct hif_softc *scn);
32 int hif_pci_bus_resume_noirq(struct hif_softc *scn);
33 int hif_pci_target_sleep_state_adjust(struct hif_softc *scn,
34 			bool sleep_ok, bool wait_for_it);
35 
36 void hif_pci_disable_isr(struct hif_softc *scn);
37 void hif_pci_nointrs(struct hif_softc *scn);
38 QDF_STATUS hif_pci_enable_bus(struct hif_softc *scn,
39 			struct device *dev, void *bdev,
40 			const struct hif_bus_id *bid,
41 			enum hif_enable_type type);
42 void hif_pci_disable_bus(struct hif_softc *scn);
43 int hif_pci_bus_configure(struct hif_softc *scn);
44 void hif_pci_irq_disable(struct hif_softc *scn, int ce_id);
45 void hif_pci_irq_enable(struct hif_softc *scn, int ce_id);
46 int hif_pci_dump_registers(struct hif_softc *scn);
47 void hif_pci_enable_power_management(struct hif_softc *hif_ctx,
48 				 bool is_packet_log_enabled);
49 void hif_pci_disable_power_management(struct hif_softc *hif_ctx);
50 int hif_pci_configure_grp_irq(struct hif_softc *scn,
51 			      struct hif_exec_context *exec);
52 void hif_pci_deconfigure_grp_irq(struct hif_softc *scn);
53 
54 /**
55  * hif_pci_reg_read32() - Read register in 32bits
56  * @hif_sc: PCIe control struct
57  * @offset: The register offset
58  *
59  * This function will read register in 32bits
60  *
61  * Return: return value for register with specified offset
62  */
63 uint32_t hif_pci_reg_read32(struct hif_softc *hif_sc,
64 			    uint32_t offset);
65 
66 /**
67  * hif_pci_reg_write32() - Write register in 32bits
68  * @hif_sc: PCIe control struct
69  * @offset: The register offset
70  * @value: The value need to be written
71  *
72  * This function will write register in 32bits
73  *
74  * Return: None
75  */
76 void hif_pci_reg_write32(struct hif_softc *hif_sc,
77 			 uint32_t offset,
78 			 uint32_t value);
79 
80 void hif_pci_display_stats(struct hif_softc *hif_ctx);
81 void hif_pci_clear_stats(struct hif_softc *hif_ctx);
82 int hif_pci_legacy_map_ce_to_irq(struct hif_softc *scn, int ce_id);
83 bool hif_pci_needs_bmi(struct hif_softc *scn);
84 const char *hif_pci_get_irq_name(int irq_no);
85 
86 /** hif_pci_config_irq_affinity() - Set the IRQ affinity
87  * @scn: hif context
88  *
89  * Set IRQ affinity hint for WLAN IRQs to gold cores only for
90  * defconfig builds.
91  *
92  * Return: None
93  */
94 void hif_pci_config_irq_affinity(struct hif_softc *scn);
95 int hif_ce_msi_configure_irq_by_ceid(struct hif_softc *scn, int ce_id);
96 
97 #ifdef FEATURE_IRQ_AFFINITY
98 /*
99  * hif_pci_set_grp_intr_affinity() - Set irq affinity hint for grp
100  *  intrs based on bitmask
101  * @scn: hif context
102  * @grp_intr_bitmask:
103  * @perf: affine to perf or non-perf cluster
104  *
105  * Return: None
106  */
107 void hif_pci_set_grp_intr_affinity(struct hif_softc *scn,
108 				   uint32_t grp_intr_bitmask, bool perf);
109 #endif
110 #endif /* _PCI_API_H_ */
111