1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include "hif.h" 21 #include "hif_main.h" 22 #include "multibus.h" 23 #include "pci_api.h" 24 #include "hif_io32.h" 25 #include "dummy.h" 26 #include "ce_api.h" 27 28 /** 29 * hif_initialize_pci_ops() - initialize the pci ops 30 * @bus_ops: hif_bus_ops table pointer to initialize 31 * 32 * Return: QDF_STATUS_SUCCESS 33 */ 34 QDF_STATUS hif_initialize_pci_ops(struct hif_softc *hif_sc) 35 { 36 struct hif_bus_ops *bus_ops = &hif_sc->bus_ops; 37 38 bus_ops->hif_bus_open = &hif_pci_open; 39 bus_ops->hif_bus_close = &hif_pci_close; 40 bus_ops->hif_bus_prevent_linkdown = &hif_pci_prevent_linkdown; 41 bus_ops->hif_reset_soc = &hif_pci_reset_soc; 42 bus_ops->hif_bus_suspend = &hif_pci_bus_suspend; 43 bus_ops->hif_bus_resume = &hif_pci_bus_resume; 44 bus_ops->hif_bus_suspend_noirq = &hif_pci_bus_suspend_noirq; 45 bus_ops->hif_bus_resume_noirq = &hif_pci_bus_resume_noirq; 46 47 /* do not put the target to sleep for epping or maxperf mode */ 48 if (CONFIG_ATH_PCIE_MAX_PERF == 0 && 49 !QDF_IS_EPPING_ENABLED(hif_get_conparam(hif_sc))) 50 bus_ops->hif_target_sleep_state_adjust = 51 &hif_pci_target_sleep_state_adjust; 52 else 53 bus_ops->hif_target_sleep_state_adjust = 54 &hif_dummy_target_sleep_state_adjust; 55 56 bus_ops->hif_disable_isr = &hif_pci_disable_isr; 57 bus_ops->hif_nointrs = &hif_pci_nointrs; 58 bus_ops->hif_enable_bus = &hif_pci_enable_bus; 59 bus_ops->hif_disable_bus = &hif_pci_disable_bus; 60 bus_ops->hif_bus_configure = &hif_pci_bus_configure; 61 bus_ops->hif_get_config_item = &hif_dummy_get_config_item; 62 bus_ops->hif_set_mailbox_swap = &hif_dummy_set_mailbox_swap; 63 bus_ops->hif_claim_device = &hif_dummy_claim_device; 64 bus_ops->hif_shutdown_device = &hif_ce_stop; 65 bus_ops->hif_stop = &hif_ce_stop; 66 bus_ops->hif_cancel_deferred_target_sleep = 67 &hif_pci_cancel_deferred_target_sleep; 68 bus_ops->hif_irq_disable = &hif_pci_irq_disable; 69 bus_ops->hif_irq_enable = &hif_pci_irq_enable; 70 bus_ops->hif_dump_registers = &hif_pci_dump_registers; 71 bus_ops->hif_dump_target_memory = &hif_ce_dump_target_memory; 72 bus_ops->hif_reg_read32 = &hif_pci_reg_read32; 73 bus_ops->hif_reg_write32 = &hif_pci_reg_write32; 74 bus_ops->hif_ipa_get_ce_resource = &hif_ce_ipa_get_ce_resource; 75 bus_ops->hif_mask_interrupt_call = &hif_dummy_mask_interrupt_call; 76 bus_ops->hif_enable_power_management = 77 &hif_pci_enable_power_management; 78 bus_ops->hif_disable_power_management = 79 &hif_pci_disable_power_management; 80 bus_ops->hif_grp_irq_configure = &hif_pci_configure_grp_irq; 81 bus_ops->hif_grp_irq_deconfigure = &hif_pci_deconfigure_grp_irq; 82 bus_ops->hif_display_stats = 83 &hif_pci_display_stats; 84 bus_ops->hif_clear_stats = 85 &hif_pci_clear_stats; 86 bus_ops->hif_addr_in_boundary = &hif_pci_addr_in_boundary; 87 88 /* default to legacy mapping handler; override as needed */ 89 bus_ops->hif_map_ce_to_irq = &hif_pci_legacy_map_ce_to_irq; 90 bus_ops->hif_needs_bmi = &hif_pci_needs_bmi; 91 92 bus_ops->hif_config_irq_affinity = 93 &hif_pci_config_irq_affinity; 94 bus_ops->hif_config_irq_by_ceid = &hif_ce_msi_configure_irq_by_ceid; 95 bus_ops->hif_config_irq_clear_cpu_affinity = 96 &hif_pci_config_irq_clear_cpu_affinity; 97 bus_ops->hif_log_bus_info = &hif_log_pcie_info; 98 #ifdef FEATURE_IRQ_AFFINITY 99 bus_ops->hif_set_grp_intr_affinity = &hif_pci_set_grp_intr_affinity; 100 #endif 101 102 return QDF_STATUS_SUCCESS; 103 } 104 105 /** 106 * hif_update_irq_ops_with_pci() - reinitialize the pci ops 107 * for hybrid bus type device qcn6122 ie.connected to pci slot 108 * but act as ahb bus device from host perspective 109 * 110 * @hif_sc: hif_softc to get bus ops 111 * 112 * Return: QDF_STATUS_SUCCESS 113 */ 114 QDF_STATUS hif_update_irq_ops_with_pci(struct hif_softc *hif_sc) 115 { 116 struct hif_bus_ops *bus_ops = &hif_sc->bus_ops; 117 118 bus_ops->hif_grp_irq_configure = &hif_pci_configure_grp_irq; 119 bus_ops->hif_grp_irq_deconfigure = &hif_pci_deconfigure_grp_irq; 120 bus_ops->hif_nointrs = &hif_pci_nointrs; 121 bus_ops->hif_irq_disable = &hif_pci_irq_disable; 122 bus_ops->hif_irq_enable = &hif_pci_irq_enable; 123 bus_ops->hif_disable_isr = &hif_pci_disable_isr; 124 125 return QDF_STATUS_SUCCESS; 126 } 127 128 /** 129 * hif_pci_get_context_size() - return the size of the pci context 130 * 131 * Return the size of the context. (0 for invalid bus) 132 */ 133 int hif_pci_get_context_size(void) 134 { 135 return sizeof(struct hif_pci_softc); 136 } 137